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-rw-r--r--ports/mimxrt/boards/MIMXRT1011_clock_config.c2
-rw-r--r--ports/mimxrt/boards/MIMXRT1011_clock_config.h2
-rw-r--r--ports/mimxrt/boards/MIMXRT1015_clock_config.c2
-rw-r--r--ports/mimxrt/boards/MIMXRT1015_clock_config.h2
-rw-r--r--ports/mimxrt/boards/MIMXRT1021_clock_config.c2
-rw-r--r--ports/mimxrt/boards/MIMXRT1021_clock_config.h2
-rw-r--r--ports/mimxrt/boards/MIMXRT1052_clock_config.c2
-rw-r--r--ports/mimxrt/boards/MIMXRT1052_clock_config.h2
-rw-r--r--ports/mimxrt/boards/MIMXRT1062_clock_config.c2
-rw-r--r--ports/mimxrt/boards/MIMXRT1062_clock_config.h2
-rw-r--r--ports/mimxrt/boards/MIMXRT1064_clock_config.c2
-rw-r--r--ports/mimxrt/boards/MIMXRT1064_clock_config.h2
-rw-r--r--ports/mimxrt/machine_uart.c13
13 files changed, 12 insertions, 25 deletions
diff --git a/ports/mimxrt/boards/MIMXRT1011_clock_config.c b/ports/mimxrt/boards/MIMXRT1011_clock_config.c
index cc889d314..33e1ecfec 100644
--- a/ports/mimxrt/boards/MIMXRT1011_clock_config.c
+++ b/ports/mimxrt/boards/MIMXRT1011_clock_config.c
@@ -241,7 +241,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart3);
CLOCK_DisableClock(kCLOCK_Lpuart4);
/* Set UART_CLK_PODF. */
- CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+ CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable SPDIF clock gate. */
diff --git a/ports/mimxrt/boards/MIMXRT1011_clock_config.h b/ports/mimxrt/boards/MIMXRT1011_clock_config.h
index 76f3df422..145f3b50c 100644
--- a/ports/mimxrt/boards/MIMXRT1011_clock_config.h
+++ b/ports/mimxrt/boards/MIMXRT1011_clock_config.h
@@ -71,7 +71,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
diff --git a/ports/mimxrt/boards/MIMXRT1015_clock_config.c b/ports/mimxrt/boards/MIMXRT1015_clock_config.c
index 7cc91f951..331af4b9e 100644
--- a/ports/mimxrt/boards/MIMXRT1015_clock_config.c
+++ b/ports/mimxrt/boards/MIMXRT1015_clock_config.c
@@ -257,7 +257,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart3);
CLOCK_DisableClock(kCLOCK_Lpuart4);
/* Set UART_CLK_PODF. */
- CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+ CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable SPDIF clock gate. */
diff --git a/ports/mimxrt/boards/MIMXRT1015_clock_config.h b/ports/mimxrt/boards/MIMXRT1015_clock_config.h
index 65944077e..975ad52e0 100644
--- a/ports/mimxrt/boards/MIMXRT1015_clock_config.h
+++ b/ports/mimxrt/boards/MIMXRT1015_clock_config.h
@@ -74,7 +74,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
diff --git a/ports/mimxrt/boards/MIMXRT1021_clock_config.c b/ports/mimxrt/boards/MIMXRT1021_clock_config.c
index 1b8792dd2..f17e73bea 100644
--- a/ports/mimxrt/boards/MIMXRT1021_clock_config.c
+++ b/ports/mimxrt/boards/MIMXRT1021_clock_config.c
@@ -306,7 +306,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */
- CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+ CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable SPDIF clock gate. */
diff --git a/ports/mimxrt/boards/MIMXRT1021_clock_config.h b/ports/mimxrt/boards/MIMXRT1021_clock_config.h
index 21d4e630a..6f7896bdc 100644
--- a/ports/mimxrt/boards/MIMXRT1021_clock_config.h
+++ b/ports/mimxrt/boards/MIMXRT1021_clock_config.h
@@ -79,7 +79,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 176000000UL
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 176000000UL
diff --git a/ports/mimxrt/boards/MIMXRT1052_clock_config.c b/ports/mimxrt/boards/MIMXRT1052_clock_config.c
index fa7450d48..bff43ae5e 100644
--- a/ports/mimxrt/boards/MIMXRT1052_clock_config.c
+++ b/ports/mimxrt/boards/MIMXRT1052_clock_config.c
@@ -311,7 +311,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */
- CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+ CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable LCDIF clock gate. */
diff --git a/ports/mimxrt/boards/MIMXRT1052_clock_config.h b/ports/mimxrt/boards/MIMXRT1052_clock_config.h
index f213ac7e2..358a6f03b 100644
--- a/ports/mimxrt/boards/MIMXRT1052_clock_config.h
+++ b/ports/mimxrt/boards/MIMXRT1052_clock_config.h
@@ -83,7 +83,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL
diff --git a/ports/mimxrt/boards/MIMXRT1062_clock_config.c b/ports/mimxrt/boards/MIMXRT1062_clock_config.c
index 589ffb0b5..f60797900 100644
--- a/ports/mimxrt/boards/MIMXRT1062_clock_config.c
+++ b/ports/mimxrt/boards/MIMXRT1062_clock_config.c
@@ -324,7 +324,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */
- CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+ CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable LCDIF clock gate. */
diff --git a/ports/mimxrt/boards/MIMXRT1062_clock_config.h b/ports/mimxrt/boards/MIMXRT1062_clock_config.h
index 082202484..0a6552664 100644
--- a/ports/mimxrt/boards/MIMXRT1062_clock_config.h
+++ b/ports/mimxrt/boards/MIMXRT1062_clock_config.h
@@ -86,7 +86,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL
diff --git a/ports/mimxrt/boards/MIMXRT1064_clock_config.c b/ports/mimxrt/boards/MIMXRT1064_clock_config.c
index 56dd75d7f..573b6a5c9 100644
--- a/ports/mimxrt/boards/MIMXRT1064_clock_config.c
+++ b/ports/mimxrt/boards/MIMXRT1064_clock_config.c
@@ -324,7 +324,7 @@ void BOARD_BootClockRUN(void) {
CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */
- CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+ CLOCK_SetDiv(kCLOCK_UartDiv, 1);
/* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable LCDIF clock gate. */
diff --git a/ports/mimxrt/boards/MIMXRT1064_clock_config.h b/ports/mimxrt/boards/MIMXRT1064_clock_config.h
index 13bc925a1..80ca030eb 100644
--- a/ports/mimxrt/boards/MIMXRT1064_clock_config.h
+++ b/ports/mimxrt/boards/MIMXRT1064_clock_config.h
@@ -86,7 +86,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL
diff --git a/ports/mimxrt/machine_uart.c b/ports/mimxrt/machine_uart.c
index fba2b7fe3..8e1505349 100644
--- a/ports/mimxrt/machine_uart.c
+++ b/ports/mimxrt/machine_uart.c
@@ -153,24 +153,12 @@ static void machine_uart_ensure_active(machine_uart_obj_t *uart) {
}
}
-#if !defined(MIMXRT117x_SERIES)
-static inline void uart_set_clock_divider(uint32_t baudrate) {
- // For baud rates < 460800 divide the clock by 10, supporting baud rates down to 50 baud.
- if (baudrate >= 460800) {
- CLOCK_SetDiv(kCLOCK_UartDiv, 0);
- } else {
- CLOCK_SetDiv(kCLOCK_UartDiv, 9);
- }
-}
-#endif
-
void machine_uart_set_baudrate(mp_obj_t uart_in, uint32_t baudrate) {
machine_uart_obj_t *uart = MP_OBJ_TO_PTR(uart_in);
#if defined(MIMXRT117x_SERIES)
// Use the Lpuart1 clock value, which is set for All UART devices.
LPUART_SetBaudRate(uart->lpuart, baudrate, CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1));
#else
- uart_set_clock_divider(baudrate);
LPUART_SetBaudRate(uart->lpuart, baudrate, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot));
#endif
}
@@ -315,7 +303,6 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
// Use the Lpuart1 clock value, which is set for All UART devices.
LPUART_Init(self->lpuart, &self->config, CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1));
#else
- uart_set_clock_divider(self->config.baudRate_Bps);
LPUART_Init(self->lpuart, &self->config, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot));
#endif
LPUART_TransferCreateHandle(self->lpuart, &self->handle, LPUART_UserCallback, self);
generated by cgit v1.2.3 (git 2.46.0) at 2025-11-14 20:38:19 +0000