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-rw-r--r--ports/stm32/powerctrlboot.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/ports/stm32/powerctrlboot.c b/ports/stm32/powerctrlboot.c
index 206b19b75..880e43e04 100644
--- a/ports/stm32/powerctrlboot.c
+++ b/ports/stm32/powerctrlboot.c
@@ -154,12 +154,23 @@ void SystemClock_Config(void) {
#elif defined(STM32WB)
+#include "stm32wbxx_ll_hsem.h"
+
+// This semaphore protected access to the CLK48 configuration.
+// CPU1 should hold this semaphore while the USB peripheral is in use.
+// See AN5289 and https://github.com/micropython/micropython/issues/6316.
+#define CLK48_SEMID (5)
+
void SystemClock_Config(void) {
// Enable the 32MHz external oscillator
RCC->CR |= RCC_CR_HSEON;
while (!(RCC->CR & RCC_CR_HSERDY)) {
}
+ // Prevent CPU2 from disabling CLK48.
+ while (LL_HSEM_1StepLock(HSEM, CLK48_SEMID)) {
+ }
+
// Use HSE and the PLL to get a 64MHz SYSCLK
#define PLLM (HSE_VALUE / 8000000) // VCO input is 8MHz
#define PLLN (24) // 24*8MHz = 192MHz