diff options
| -rw-r--r-- | ports/stm32/boards/stm32f413xg.ld | 14 | ||||
| -rw-r--r-- | ports/stm32/boards/stm32f413xh.ld | 14 |
2 files changed, 14 insertions, 14 deletions
diff --git a/ports/stm32/boards/stm32f413xg.ld b/ports/stm32/boards/stm32f413xg.ld index 2df46f2b5..cecfcaa88 100644 --- a/ports/stm32/boards/stm32f413xg.ld +++ b/ports/stm32/boards/stm32f413xg.ld @@ -29,10 +29,10 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM); _heap_start = _ebss; /* heap starts just after statically allocated memory */ _heap_end = _sstack; -+/* Filesystem cache in RAM, and storage in flash */ -+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(SRAM2); -+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); -+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); -+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); -+_micropy_hw_internal_flash_storage2_start = ORIGIN(FLASH_FS2); -+_micropy_hw_internal_flash_storage2_end = ORIGIN(FLASH_FS2) + LENGTH(FLASH_FS2); +/* Filesystem cache in RAM, and storage in flash */ +_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(SRAM2); +_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); +_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); +_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); +_micropy_hw_internal_flash_storage2_start = ORIGIN(FLASH_FS2); +_micropy_hw_internal_flash_storage2_end = ORIGIN(FLASH_FS2) + LENGTH(FLASH_FS2); diff --git a/ports/stm32/boards/stm32f413xh.ld b/ports/stm32/boards/stm32f413xh.ld index 0512a3f05..0846b5c80 100644 --- a/ports/stm32/boards/stm32f413xh.ld +++ b/ports/stm32/boards/stm32f413xh.ld @@ -29,10 +29,10 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM); _heap_start = _ebss; /* heap starts just after statically allocated memory */ _heap_end = _sstack; -+/* Filesystem cache in RAM, and storage in flash */ -+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(SRAM2); -+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); -+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); -+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); -+_micropy_hw_internal_flash_storage2_start = ORIGIN(FLASH_FS2); -+_micropy_hw_internal_flash_storage2_end = ORIGIN(FLASH_FS2) + LENGTH(FLASH_FS2); +/* Filesystem cache in RAM, and storage in flash */ +_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(SRAM2); +_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); +_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); +_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); +_micropy_hw_internal_flash_storage2_start = ORIGIN(FLASH_FS2); +_micropy_hw_internal_flash_storage2_end = ORIGIN(FLASH_FS2) + LENGTH(FLASH_FS2); |