diff options
| -rw-r--r-- | ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h | 29 | ||||
| -rw-r--r-- | ports/stm32/boards/NUCLEO_F767ZI/pins.csv | 98 | ||||
| -rw-r--r-- | ports/stm32/boards/stm32f767.ld | 2 |
3 files changed, 92 insertions, 37 deletions
diff --git a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h index b144ce466..b659223b4 100644 --- a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h +++ b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.h @@ -1,7 +1,5 @@ -// This board is only confirmed to operate using DFU mode and openocd. -// DFU mode can be accessed by setting BOOT0 (see schematics) -// To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in -// the make command. +// Note: if the board shows odd behaviour check the option bits and make sure nDBANK is +// set to make the 2MByte space continuous instead of divided into two 1MByte segments. #define MICROPY_HW_BOARD_NAME "NUCLEO-F767ZI" #define MICROPY_HW_MCU_NAME "STM32F767" @@ -31,16 +29,25 @@ void NUCLEO_F767ZI_board_early_init(void); #define MICROPY_HW_UART2_CTS (pin_D3) #define MICROPY_HW_UART3_TX (pin_D8) #define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART6_TX (pin_G14) -#define MICROPY_HW_UART6_RX (pin_G9) +#define MICROPY_HW_UART6_TX (pin_C6) +#define MICROPY_HW_UART6_RX (pin_C7) +#define MICROPY_HW_UART5_TX (pin_B6) +#define MICROPY_HW_UART5_RX (pin_B12) +#define MICROPY_HW_UART7_TX (pin_F7) +#define MICROPY_HW_UART7_RX (pin_F6) +#define MICROPY_HW_UART8_TX (pin_E1) +#define MICROPY_HW_UART8_RX (pin_E0) + #define MICROPY_HW_UART_REPL PYB_UART_3 #define MICROPY_HW_UART_REPL_BAUD 115200 // I2C busses #define MICROPY_HW_I2C1_SCL (pin_B8) #define MICROPY_HW_I2C1_SDA (pin_B9) -#define MICROPY_HW_I2C3_SCL (pin_H7) -#define MICROPY_HW_I2C3_SDA (pin_H8) +#define MICROPY_HW_I2C2_SCL (pin_F1) +#define MICROPY_HW_I2C2_SDA (pin_F0) +#define MICROPY_HW_I2C4_SCL (pin_F14) +#define MICROPY_HW_I2C4_SDA (pin_F15) // SPI #define MICROPY_HW_SPI3_NSS (pin_A4) @@ -49,10 +56,8 @@ void NUCLEO_F767ZI_board_early_init(void); #define MICROPY_HW_SPI3_MOSI (pin_B5) // CAN busses -#define MICROPY_HW_CAN1_TX (pin_B9) -#define MICROPY_HW_CAN1_RX (pin_B8) -#define MICROPY_HW_CAN2_TX (pin_B13) -#define MICROPY_HW_CAN2_RX (pin_B12) +#define MICROPY_HW_CAN1_TX (pin_D1) +#define MICROPY_HW_CAN1_RX (pin_D0) // USRSW is pulled low. Pressing the button makes the input go high. #define MICROPY_HW_USRSW_PIN (pin_C13) diff --git a/ports/stm32/boards/NUCLEO_F767ZI/pins.csv b/ports/stm32/boards/NUCLEO_F767ZI/pins.csv index ccd90d447..e447b76b0 100644 --- a/ports/stm32/boards/NUCLEO_F767ZI/pins.csv +++ b/ports/stm32/boards/NUCLEO_F767ZI/pins.csv @@ -33,19 +33,58 @@ D22,PB5 D23,PB3 D24,PA4 D25,PB4 +D26,PB6 +D27,PB2 +D28,PD13 +D29,PD12 +D30,PD11 +D31,PE2 +D32,PA0 +D33,PB0 +D34,PE0 +D35,PB11 +D36,PB10 +D37,PE15 +D38,PE14 +D39,PE12 +D40,PE10 +D41,PE7 +D42,PE8 +D43,PC8 +D44,PC9 +D45,PC10 +D46,PC11 +D47,PC12 +D48,PD2 +D49,PG2 +D50,PG3 +D51,PD7 +D52,PD6 +D53,PD5 +D54,PD4 +D55,PD3 +D56,PE2 +D57,PE4 +D58,PE5 +D59,PE6 +D60,PE3 +D61,PF8 +D62,PF7 +D63,PF9 +D64,PG1 +D65,PG0 +D66,PD1 +D67,PD0 +D68,PF0 +D69,PF1 +D70,PF2 +D71,PA7 +DAC1,PA4 +DAC2,PA5 LED1,PB0 LED2,PB7 LED3,PB14 SW,PC13 -TP1,PH2 -TP2,PI8 -TP3,PH15 -AUDIO_INT,PD6 -AUDIO_SDA,PH8 -AUDIO_SCL,PH7 -EXT_SDA,PB9 -EXT_SCL,PB8 -EXT_RST,PG3 SD_D0,PC8 SD_D1,PC9 SD_D2,PC10 @@ -53,29 +92,38 @@ SD_D3,PC11 SD_CMD,PD2 SD_CK,PC12 SD_SW,PG2 -LCD_BL_CTRL,PK3 -LCD_INT,PI13 -LCD_SDA,PH8 -LCD_SCL,PH7 -OTG_FS_POWER,PD5 -OTG_FS_OVER_CURRENT,PD4 -OTG_HS_OVER_CURRENT,PE3 +OTG_FS_POWER,PG6 +OTG_FS_OVER_CURRENT,PG7 USB_VBUS,PA9 USB_ID,PA10 USB_DM,PA11 USB_DP,PA12 -USB_POWER,PG6 -VCP_TX,PD8 -VCP_RX,PD9 UART2_TX,PD5 UART2_RX,PD6 UART2_RTS,PD4 UART2_CTS,PD3 -UART6_TX,PG14 -UART6_RX,PG9 -SPI_B_NSS,PA4 -SPI_B_SCK,PB3 -SPI_B_MOSI,PB5 +VCP_TX,PD8 +VCP_RX,PD9 +UART3_TX,PD8 +UART3_RX,PD9 +UART5_TX,PB6 +UART5_RX,PB12 +UART6_TX,PC6 +UART6_RX,PC7 +UART7_TX,PF7 +UART7_RX,PF6 +UART8_TX,PE1 +UART8_RX,PE0 +SPI3_NSS,PA4 +SPI3_SCK,PB3 +SPI3_MISO,PB4 +SPI3_MOSI,PB5 +I2C1_SDA,PB9 +I2C1_SCL,PB8 +I2C2_SDA,PF0 +I2C2_SCL,PF1 +I2C4_SCL,PF14 +I2C4_SDA,PF15 ETH_MDC,PC1 ETH_MDIO,PA2 ETH_RMII_REF_CLK,PA1 @@ -85,3 +133,5 @@ ETH_RMII_RXD1,PC5 ETH_RMII_TX_EN,PG11 ETH_RMII_TXD0,PG13 ETH_RMII_TXD1,PB13 +SWDIO,PA13 +SWDCLK,PA14 diff --git a/ports/stm32/boards/stm32f767.ld b/ports/stm32/boards/stm32f767.ld index 9410b9fa6..d07f2ecbe 100644 --- a/ports/stm32/boards/stm32f767.ld +++ b/ports/stm32/boards/stm32f767.ld @@ -5,7 +5,7 @@ /* Specify the memory areas */ MEMORY { - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */ FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 2016K /* sectors 1-11 3x32K 1*128K 7*256K */ FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ |