diff options
| -rw-r--r-- | ports/stm32/boards/STM32F429DISC/mpconfigboard.h | 2 | ||||
| -rw-r--r-- | ports/stm32/boards/STM32F769DISC/mpconfigboard.h | 2 | ||||
| -rw-r--r-- | ports/stm32/boards/STM32F7DISC/mpconfigboard.h | 2 | ||||
| -rw-r--r-- | ports/stm32/main.c | 17 | ||||
| -rw-r--r-- | ports/stm32/mpconfigboard_common.h | 8 |
5 files changed, 21 insertions, 10 deletions
diff --git a/ports/stm32/boards/STM32F429DISC/mpconfigboard.h b/ports/stm32/boards/STM32F429DISC/mpconfigboard.h index f2e4d10ee..3d04f65ea 100644 --- a/ports/stm32/boards/STM32F429DISC/mpconfigboard.h +++ b/ports/stm32/boards/STM32F429DISC/mpconfigboard.h @@ -76,6 +76,8 @@ // SDRAM #define MICROPY_HW_SDRAM_SIZE (64 / 8 * 1024 * 1024) // 64 Mbit #define MICROPY_HW_SDRAM_STARTUP_TEST (1) +#define MICROPY_HEAP_START sdram_start() +#define MICROPY_HEAP_END sdram_end() // Timing configuration for 90 Mhz (11.90ns) of SD clock frequency (180Mhz/2) #define MICROPY_HW_SDRAM_TIMING_TMRD (2) diff --git a/ports/stm32/boards/STM32F769DISC/mpconfigboard.h b/ports/stm32/boards/STM32F769DISC/mpconfigboard.h index de86e4dda..d31a22b0c 100644 --- a/ports/stm32/boards/STM32F769DISC/mpconfigboard.h +++ b/ports/stm32/boards/STM32F769DISC/mpconfigboard.h @@ -83,6 +83,8 @@ // Optional SDRAM configuration; requires SYSCLK <= 200MHz #define MICROPY_HW_SDRAM_SIZE (128 * 1024 * 1024 / 8) // 128 Mbit #define MICROPY_HW_SDRAM_STARTUP_TEST (0) +#define MICROPY_HEAP_START sdram_start() +#define MICROPY_HEAP_END sdram_end() // Timing configuration for 90 Mhz (11.90ns) of SD clock frequency (180Mhz/2) #define MICROPY_HW_SDRAM_TIMING_TMRD (2) diff --git a/ports/stm32/boards/STM32F7DISC/mpconfigboard.h b/ports/stm32/boards/STM32F7DISC/mpconfigboard.h index ceacd852f..792206c40 100644 --- a/ports/stm32/boards/STM32F7DISC/mpconfigboard.h +++ b/ports/stm32/boards/STM32F7DISC/mpconfigboard.h @@ -84,6 +84,8 @@ void STM32F7DISC_board_early_init(void); // SDRAM #define MICROPY_HW_SDRAM_SIZE (64 / 8 * 1024 * 1024) // 64 Mbit #define MICROPY_HW_SDRAM_STARTUP_TEST (1) +#define MICROPY_HEAP_START sdram_start() +#define MICROPY_HEAP_END sdram_end() // Timing configuration for 90 Mhz (11.90ns) of SD clock frequency (180Mhz/2) #define MICROPY_HW_SDRAM_TIMING_TMRD (2) diff --git a/ports/stm32/main.c b/ports/stm32/main.c index eefb19b56..7656569c8 100644 --- a/ports/stm32/main.c +++ b/ports/stm32/main.c @@ -498,6 +498,12 @@ void stm32_main(uint32_t reset_mode) { #endif // basic sub-system init + #if MICROPY_HW_SDRAM_SIZE + sdram_init(); + #if MICROPY_HW_SDRAM_STARTUP_TEST + sdram_test(true); + #endif + #endif #if MICROPY_PY_THREAD pyb_thread_init(&pyb_thread_main); #endif @@ -556,16 +562,7 @@ soft_reset: mp_stack_set_limit((char*)&_estack - (char*)&_heap_end - 1024); // GC init - #if MICROPY_HW_SDRAM_SIZE - sdram_init(); - #if MICROPY_HW_SDRAM_STARTUP_TEST - sdram_test(true); - #endif - - gc_init(sdram_start(), sdram_end()); - #else - gc_init(&_heap_start, &_heap_end); - #endif + gc_init(MICROPY_HEAP_START, MICROPY_HEAP_END); #if MICROPY_ENABLE_PYSTACK static mp_obj_t pystack[384]; diff --git a/ports/stm32/mpconfigboard_common.h b/ports/stm32/mpconfigboard_common.h index af20aa73b..2acdcc2f7 100644 --- a/ports/stm32/mpconfigboard_common.h +++ b/ports/stm32/mpconfigboard_common.h @@ -115,6 +115,14 @@ /*****************************************************************************/ // General configuration +// Heap start / end definitions +#ifndef MICROPY_HEAP_START +#define MICROPY_HEAP_START &_heap_start +#endif +#ifndef MICROPY_HEAP_END +#define MICROPY_HEAP_END &_heap_end +#endif + // Configuration for STM32F0 series #if defined(STM32F0) |