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-rw-r--r--ports/stm32/rfcore.c7
-rw-r--r--ports/stm32/rfcore.h1
2 files changed, 7 insertions, 1 deletions
diff --git a/ports/stm32/rfcore.c b/ports/stm32/rfcore.c
index 602ef974b..54b339343 100644
--- a/ports/stm32/rfcore.c
+++ b/ports/stm32/rfcore.c
@@ -416,8 +416,13 @@ void rfcore_ble_check_msg(int (*cb)(void *, const uint8_t *, size_t), void *env)
SWAP_UINT8(buf[3], buf[6]);
SWAP_UINT8(buf[4], buf[5]);
tl_ble_hci_cmd_resp(HCI_OPCODE(OGF_VENDOR, OCF_WRITE_CONFIG), 8, buf); // set BDADDR
- tl_ble_hci_cmd_resp(HCI_OPCODE(OGF_VENDOR, OCF_SET_TX_POWER), 2, (const uint8_t *)"\x00\x06"); // 0 dBm
}
}
+// "level" is 0x00-0x1f, ranging from -40 dBm to +6 dBm (not linear).
+void rfcore_ble_set_txpower(uint8_t level) {
+ uint8_t buf[2] = { 0x00, level };
+ tl_ble_hci_cmd_resp(HCI_OPCODE(OGF_VENDOR, OCF_SET_TX_POWER), 2, buf);
+}
+
#endif // defined(STM32WB)
diff --git a/ports/stm32/rfcore.h b/ports/stm32/rfcore.h
index 138c438f1..fbe111e1e 100644
--- a/ports/stm32/rfcore.h
+++ b/ports/stm32/rfcore.h
@@ -33,5 +33,6 @@ void rfcore_init(void);
void rfcore_ble_init(void);
void rfcore_ble_hci_cmd(size_t len, const uint8_t *src);
void rfcore_ble_check_msg(int (*cb)(void *, const uint8_t *, size_t), void *env);
+void rfcore_ble_set_txpower(uint8_t level);
#endif // MICROPY_INCLUDED_STM32_RFCORE_H