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-rw-r--r--ports/stm32/powerctrl.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/ports/stm32/powerctrl.c b/ports/stm32/powerctrl.c
index 669e568f8..42bd262c2 100644
--- a/ports/stm32/powerctrl.c
+++ b/ports/stm32/powerctrl.c
@@ -54,8 +54,6 @@ int powerctrl_rcc_clock_config_pll(RCC_ClkInitTypeDef *rcc_init, uint32_t sysclk
}
}
RCC->DCKCFGR2 |= RCC_DCKCFGR2_CK48MSEL;
- } else {
- RCC->DCKCFGR2 &= ~RCC_DCKCFGR2_CK48MSEL;
}
// If possible, scale down the internal voltage regulator to save power
@@ -208,6 +206,8 @@ set_clk:
}
#if defined(STM32F7)
+ // Deselect PLLSAI as 48MHz source if we were using it
+ RCC->DCKCFGR2 &= ~RCC_DCKCFGR2_CK48MSEL;
// Turn PLLSAI off because we are changing PLLM (which drives PLLSAI)
RCC->CR &= ~RCC_CR_PLLSAION;
#endif