diff options
| -rw-r--r-- | ports/stm32/powerctrl.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/ports/stm32/powerctrl.c b/ports/stm32/powerctrl.c index dfd9e8262..1d1792c38 100644 --- a/ports/stm32/powerctrl.c +++ b/ports/stm32/powerctrl.c @@ -94,9 +94,11 @@ int powerctrl_rcc_clock_config_pll(RCC_ClkInitTypeDef *rcc_init, uint32_t sysclk if (need_pllsai) { // Configure PLLSAI at 48MHz for those peripherals that need this freq - const uint32_t pllsain = 192; + // (calculation assumes it can get an integral value of PLLSAIN) + const uint32_t pllm = (RCC->PLLCFGR >> RCC_PLLCFGR_PLLM_Pos) & 0x3f; const uint32_t pllsaip = 4; const uint32_t pllsaiq = 2; + const uint32_t pllsain = 48 * pllsaip * pllm / (HSE_VALUE / 1000000); RCC->PLLSAICFGR = pllsaiq << RCC_PLLSAICFGR_PLLSAIQ_Pos | (pllsaip / 2 - 1) << RCC_PLLSAICFGR_PLLSAIP_Pos | pllsain << RCC_PLLSAICFGR_PLLSAIN_Pos; |