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-rw-r--r--ports/mimxrt/flash.c6
-rw-r--r--ports/mimxrt/hal/flexspi_flash_config.h24
-rw-r--r--ports/mimxrt/hal/flexspi_hyper_flash.c3
-rw-r--r--ports/mimxrt/hal/flexspi_nor_flash.c40
-rw-r--r--ports/mimxrt/hal/qspi_nor_flash_config.c60
5 files changed, 67 insertions, 66 deletions
diff --git a/ports/mimxrt/flash.c b/ports/mimxrt/flash.c
index 3a18f8f51..7df799884 100644
--- a/ports/mimxrt/flash.c
+++ b/ports/mimxrt/flash.c
@@ -28,10 +28,8 @@
void flash_init(void) {
// Upload the custom flash configuration
- // This should be performed by the boot ROM but for some reason it is not.
- FLEXSPI_UpdateLUT(BOARD_FLEX_SPI, 0,
- qspiflash_config.memConfig.lookupTable,
- ARRAY_SIZE(qspiflash_config.memConfig.lookupTable));
+ // And fix the entry for PAGEPROGRAM_QUAD
+ flexspi_nor_update_lut();
// Configure FLEXSPI IP FIFO access.
BOARD_FLEX_SPI->MCR0 &= ~(FLEXSPI_MCR0_ARDFEN_MASK);
diff --git a/ports/mimxrt/hal/flexspi_flash_config.h b/ports/mimxrt/hal/flexspi_flash_config.h
index 5320231a1..7538537ae 100644
--- a/ports/mimxrt/hal/flexspi_flash_config.h
+++ b/ports/mimxrt/hal/flexspi_flash_config.h
@@ -75,6 +75,12 @@
(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+#define EMPTY_LUT \
+ FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), \
+ FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), \
+ FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), \
+ FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), \
+
// !@brief Definitions for FlexSPI Serial Clock Frequency
typedef enum _FlexSpiSerialClockFreq
{
@@ -209,20 +215,20 @@ typedef struct _FlexSPIConfig
} flexspi_mem_config_t;
/* */
-#define NOR_CMD_LUT_SEQ_IDX_READ_NORMAL 0
+#define NOR_CMD_LUT_SEQ_IDX_READ 0
#define NOR_CMD_LUT_SEQ_IDX_READSTATUSREG 1
-#define NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD 2
+#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI 2
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 3
-#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI 4
+#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG 4
#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5
-#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG 6
-#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD 7
-#define NOR_CMD_LUT_SEQ_IDX_READID 8
+#define NOR_CMD_LUT_SEQ_IDX_READQUAD 6
+#define NOR_CMD_LUT_SEQ_IDX_READID 7
+#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM 9
-#define NOR_CMD_LUT_SEQ_IDX_ENTERQPI 10
+#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD 10
#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11
-#define NOR_CMD_LUT_SEQ_IDX_EXITQPI 12
-#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 13
+// Index 12 is left empty
+#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13
#define HYPERFLASH_CMD_LUT_SEQ_IDX_READDATA 0
#define HYPERFLASH_CMD_LUT_SEQ_IDX_WRITEDATA 1
diff --git a/ports/mimxrt/hal/flexspi_hyper_flash.c b/ports/mimxrt/hal/flexspi_hyper_flash.c
index 5e5d87166..c0cd63ca0 100644
--- a/ports/mimxrt/hal/flexspi_hyper_flash.c
+++ b/ports/mimxrt/hal/flexspi_hyper_flash.c
@@ -9,6 +9,9 @@
#include "fsl_clock.h"
#include "flexspi_hyper_flash.h"
+void flexspi_nor_update_lut(void) {
+}
+
// Copy of a few (pseudo-)functions from fsl_clock.h, which were nor reliably
// inlined when they should be. That caused DEBUG mode to fail.
// It does not increase the code size, since they were supposed to be inline.
diff --git a/ports/mimxrt/hal/flexspi_nor_flash.c b/ports/mimxrt/hal/flexspi_nor_flash.c
index 956fb657d..a890533a6 100644
--- a/ports/mimxrt/hal/flexspi_nor_flash.c
+++ b/ports/mimxrt/hal/flexspi_nor_flash.c
@@ -36,6 +36,23 @@
#include <assert.h>
#include "fsl_common.h"
#include "flexspi_nor_flash.h"
+#include "flexspi_flash_config.h"
+
+uint32_t LUT_pageprogram_quad[4] = {
+ // 10 Page Program - quad mode
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_1PAD, 24),
+ FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04, STOP, FLEXSPI_1PAD, 0),
+ FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
+ FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
+};
+
+void flexspi_nor_update_lut(void) {
+ uint32_t lookuptable_copy[64];
+ memcpy(lookuptable_copy, (const uint32_t *)&qspiflash_config.memConfig.lookupTable, 64 * sizeof(uint32_t));
+ // write PAGEPROGRAM_QUAD code to entry 10
+ memcpy(&lookuptable_copy[10 * 4], LUT_pageprogram_quad, 4 * sizeof(uint32_t));
+ FLEXSPI_UpdateLUT(BOARD_FLEX_SPI, 0, lookuptable_copy, 64);
+}
void flexspi_nor_reset(FLEXSPI_Type *base) __attribute__((section(".ram_functions")));
void flexspi_nor_reset(FLEXSPI_Type *base) {
@@ -106,9 +123,9 @@ status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base) __attribute__((section
status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base) {
flexspi_transfer_t flashXfer;
status_t status;
- uint32_t writeValue = 0x40;
+ uint32_t writeValue = qspiflash_config.memConfig.deviceModeArg;
- /* Write neable */
+ /* Write enable */
status = flexspi_nor_write_enable(base, 0);
if (status != kStatus_Success) {
@@ -228,22 +245,3 @@ status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, co
return status;
}
-
-status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId) __attribute__((section(".ram_functions")));
-status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId) {
- uint32_t temp;
- flexspi_transfer_t flashXfer;
- flashXfer.deviceAddress = 0;
- flashXfer.port = kFLEXSPI_PortA1;
- flashXfer.cmdType = kFLEXSPI_Read;
- flashXfer.SeqNumber = 1;
- flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READID;
- flashXfer.data = &temp;
- flashXfer.dataSize = 2;
-
- status_t status = FLEXSPI_TransferBlocking(base, &flashXfer);
-
- *vendorId = temp;
-
- return status;
-}
diff --git a/ports/mimxrt/hal/qspi_nor_flash_config.c b/ports/mimxrt/hal/qspi_nor_flash_config.c
index a8040737e..9edf44fc6 100644
--- a/ports/mimxrt/hal/qspi_nor_flash_config.c
+++ b/ports/mimxrt/hal/qspi_nor_flash_config.c
@@ -49,76 +49,75 @@ const flexspi_nor_config_t qspiflash_config = {
.seqNum = 1u,
},
.deviceModeArg = 0x40,
- // Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = MICROPY_HW_FLASH_CLK,
.sflashA1Size = MICROPY_HW_FLASH_SIZE,
.lookupTable =
{
- // 0 Read LUTs 0 -> 0
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
+ // 0 Read LUTs 0
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 24),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 1 Read status register -> 1
+ // 1 Read status register
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x01),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 2 Fast read quad mode - SDR
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x6B, RADDR_SDR, FLEXSPI_1PAD, 0x18),
- FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x08, READ_SDR, FLEXSPI_4PAD, 0x04),
+ // 2 Read extend parameters
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x81, READ_SDR, FLEXSPI_1PAD, 0x04),
+ FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 3 Write Enable -> 3
+ // 3 Write Enable
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 4 Read extend parameters
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x81, READ_SDR, FLEXSPI_1PAD, 0x04),
+ // 4 Write Status Reg
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x01),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 5 Erase Sector -> 5
+ // 5 Erase Sector
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 24),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 6 Write Status Reg
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x04),
- FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
+ // 6 Fast read quad mode - SDR
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x6B, RADDR_SDR, FLEXSPI_1PAD, 24),
+ FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x08, READ_SDR, FLEXSPI_4PAD, 0x04),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 7 Page Program - quad mode (-> 9)
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_1PAD, 0x18),
- FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04, STOP, FLEXSPI_1PAD, 0),
+ // 7 Read ID
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x90, DUMMY_SDR, FLEXSPI_1PAD, 24),
+ FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD, 0x00, 0, 0, 0),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 8 Read ID
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x90, DUMMY_SDR, FLEXSPI_1PAD, 24),
- FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD, 0x00, 0, 0, 0),
+ // 8 Erase Block (32k)
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x52, RADDR_SDR, FLEXSPI_1PAD, 24),
+ FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 9 Page Program - single mode -> 9
+ // 9 Page Program - single mode
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 24),
FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0, 0, 0, 0),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 10 Enter QPI mode
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x35, STOP, FLEXSPI_1PAD, 0),
- FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
+ // 10 Page Program - quad mode
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_1PAD, 24),
+ FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04, STOP, FLEXSPI_1PAD, 0),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
@@ -128,15 +127,12 @@ const flexspi_nor_config_t qspiflash_config = {
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- // 12 Exit QPI mode
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_4PAD, 0xF5, STOP, FLEXSPI_1PAD, 0),
- FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
- FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
+ // 12 Empty LUT
+ EMPTY_LUT
- // 13 Erase Block (32k) -> 13
- FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x52, RADDR_SDR, FLEXSPI_1PAD, 24),
- FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
+ // 13 READ SDFP
+ FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x5A, RADDR_SDR, FLEXSPI_1PAD, 24),
+ FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8, READ_SDR, FLEXSPI_1PAD, 0x04),
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), // Filler
},
generated by cgit v1.2.3 (git 2.46.0) at 2025-11-13 11:50:58 +0000