summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--ports/stm32/boards/stm32f0xx_hal_conf_base.h1
-rw-r--r--ports/stm32/boards/stm32f4xx_hal_conf_base.h1
-rw-r--r--ports/stm32/boards/stm32f7xx_hal_conf_base.h1
-rw-r--r--ports/stm32/boards/stm32h7xx_hal_conf_base.h1
-rw-r--r--ports/stm32/boards/stm32l0xx_hal_conf_base.h1
-rw-r--r--ports/stm32/boards/stm32l4xx_hal_conf_base.h1
-rw-r--r--ports/stm32/boards/stm32wbxx_hal_conf_base.h1
-rw-r--r--ports/stm32/uart.c16
-rw-r--r--ports/stm32/uart.h2
9 files changed, 22 insertions, 3 deletions
diff --git a/ports/stm32/boards/stm32f0xx_hal_conf_base.h b/ports/stm32/boards/stm32f0xx_hal_conf_base.h
index 5c6f31d1d..70e6ccf75 100644
--- a/ports/stm32/boards/stm32f0xx_hal_conf_base.h
+++ b/ports/stm32/boards/stm32f0xx_hal_conf_base.h
@@ -49,6 +49,7 @@
#include "stm32f0xx_hal_wwdg.h"
#include "stm32f0xx_ll_adc.h"
#include "stm32f0xx_ll_rtc.h"
+#include "stm32f0xx_ll_usart.h"
// Enable various HAL modules
#define HAL_MODULE_ENABLED
diff --git a/ports/stm32/boards/stm32f4xx_hal_conf_base.h b/ports/stm32/boards/stm32f4xx_hal_conf_base.h
index 057a9e81e..134a30018 100644
--- a/ports/stm32/boards/stm32f4xx_hal_conf_base.h
+++ b/ports/stm32/boards/stm32f4xx_hal_conf_base.h
@@ -56,6 +56,7 @@
#include "stm32f4xx_ll_adc.h"
#include "stm32f4xx_ll_pwr.h"
#include "stm32f4xx_ll_rtc.h"
+#include "stm32f4xx_ll_usart.h"
// Enable various HAL modules
#define HAL_ADC_MODULE_ENABLED
diff --git a/ports/stm32/boards/stm32f7xx_hal_conf_base.h b/ports/stm32/boards/stm32f7xx_hal_conf_base.h
index 6e7dff304..efb15d471 100644
--- a/ports/stm32/boards/stm32f7xx_hal_conf_base.h
+++ b/ports/stm32/boards/stm32f7xx_hal_conf_base.h
@@ -56,6 +56,7 @@
#include "stm32f7xx_ll_adc.h"
#include "stm32f7xx_ll_pwr.h"
#include "stm32f7xx_ll_rtc.h"
+#include "stm32f7xx_ll_usart.h"
// Enable various HAL modules
#define HAL_ADC_MODULE_ENABLED
diff --git a/ports/stm32/boards/stm32h7xx_hal_conf_base.h b/ports/stm32/boards/stm32h7xx_hal_conf_base.h
index a451cfde7..c07ae93e3 100644
--- a/ports/stm32/boards/stm32h7xx_hal_conf_base.h
+++ b/ports/stm32/boards/stm32h7xx_hal_conf_base.h
@@ -56,6 +56,7 @@
#include "stm32h7xx_ll_adc.h"
#include "stm32h7xx_ll_pwr.h"
#include "stm32h7xx_ll_rtc.h"
+#include "stm32h7xx_ll_usart.h"
// Enable various HAL modules
#define HAL_ADC_MODULE_ENABLED
diff --git a/ports/stm32/boards/stm32l0xx_hal_conf_base.h b/ports/stm32/boards/stm32l0xx_hal_conf_base.h
index 6b5ece766..cc033666a 100644
--- a/ports/stm32/boards/stm32l0xx_hal_conf_base.h
+++ b/ports/stm32/boards/stm32l0xx_hal_conf_base.h
@@ -48,6 +48,7 @@
#include "stm32l0xx_hal_wwdg.h"
#include "stm32l0xx_ll_adc.h"
#include "stm32l0xx_ll_rtc.h"
+#include "stm32l0xx_ll_usart.h"
// Enable various HAL modules
#define HAL_MODULE_ENABLED
diff --git a/ports/stm32/boards/stm32l4xx_hal_conf_base.h b/ports/stm32/boards/stm32l4xx_hal_conf_base.h
index 215e798b9..8d77a80a7 100644
--- a/ports/stm32/boards/stm32l4xx_hal_conf_base.h
+++ b/ports/stm32/boards/stm32l4xx_hal_conf_base.h
@@ -52,6 +52,7 @@
#include "stm32l4xx_hal_wwdg.h"
#include "stm32l4xx_ll_adc.h"
#include "stm32l4xx_ll_rtc.h"
+#include "stm32l4xx_ll_usart.h"
// Enable various HAL modules
#define HAL_MODULE_ENABLED
diff --git a/ports/stm32/boards/stm32wbxx_hal_conf_base.h b/ports/stm32/boards/stm32wbxx_hal_conf_base.h
index 91309e286..72af0262a 100644
--- a/ports/stm32/boards/stm32wbxx_hal_conf_base.h
+++ b/ports/stm32/boards/stm32wbxx_hal_conf_base.h
@@ -43,6 +43,7 @@
#include "stm32wbxx_hal_usart.h"
#include "stm32wbxx_ll_adc.h"
#include "stm32wbxx_ll_rtc.h"
+#include "stm32wbxx_ll_usart.h"
// Enable various HAL modules
#define HAL_MODULE_ENABLED
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
index b14a18c6d..8091ba05f 100644
--- a/ports/stm32/uart.c
+++ b/ports/stm32/uart.c
@@ -603,7 +603,7 @@ void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached) {
self->attached_to_repl = attached;
}
-uint32_t uart_get_baudrate(pyb_uart_obj_t *self) {
+uint32_t uart_get_source_freq(pyb_uart_obj_t *self) {
uint32_t uart_clk = 0;
#if defined(STM32F0)
@@ -672,10 +672,20 @@ uint32_t uart_get_baudrate(pyb_uart_obj_t *self) {
}
#endif
+ return uart_clk;
+}
+
+uint32_t uart_get_baudrate(pyb_uart_obj_t *self) {
// This formula assumes UART_OVERSAMPLING_16
- uint32_t baudrate = uart_clk / self->uartx->BRR;
+ return uart_get_source_freq(self) / self->uartx->BRR;
+}
- return baudrate;
+void uart_set_baudrate(pyb_uart_obj_t *self, uint32_t baudrate) {
+ LL_USART_SetBaudRate(self->uartx, uart_get_source_freq(self),
+ #if defined(STM32H7) || defined(STM32WB)
+ LL_USART_PRESCALER_DIV1,
+ #endif
+ LL_USART_OVERSAMPLING_16, baudrate);
}
mp_uint_t uart_rx_any(pyb_uart_obj_t *self) {
diff --git a/ports/stm32/uart.h b/ports/stm32/uart.h
index 9a38db593..570a79c93 100644
--- a/ports/stm32/uart.h
+++ b/ports/stm32/uart.h
@@ -86,6 +86,8 @@ void uart_irq_handler(mp_uint_t uart_id);
void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached);
uint32_t uart_get_baudrate(pyb_uart_obj_t *self);
+void uart_set_baudrate(pyb_uart_obj_t *self, uint32_t baudrate);
+
mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj);
bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout);
int uart_rx_char(pyb_uart_obj_t *uart_obj);