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-rw-r--r--ports/alif/mpu.c11
-rw-r--r--ports/alif/mpu.h4
2 files changed, 15 insertions, 0 deletions
diff --git a/ports/alif/mpu.c b/ports/alif/mpu.c
index 471eff20a..60753674a 100644
--- a/ports/alif/mpu.c
+++ b/ports/alif/mpu.c
@@ -25,6 +25,7 @@
*/
#include "py/mpconfig.h"
+#include "irq.h"
#include "mpu.h"
#include ALIF_CMSIS_H
@@ -76,3 +77,13 @@ void MPU_Load_Regions(void) {
// Load the MPU regions from the table.
ARM_MPU_Load(0, mpu_table, sizeof(mpu_table) / sizeof(ARM_MPU_Region_t));
}
+
+void mpu_config_mram(bool read_only) {
+ uintptr_t atomic = disable_irq();
+ ARM_MPU_Disable();
+ MPU->RNR = MP_MPU_REGION_MRAM;
+ MPU->RBAR = ARM_MPU_RBAR(MRAM_BASE, ARM_MPU_SH_NON, read_only, 1, 0);
+ MPU->RLAR = ARM_MPU_RLAR(MRAM_BASE + MRAM_SIZE - 1, MP_MPU_ATTR_NORMAL_WT_RA);
+ ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
+ enable_irq(atomic);
+}
diff --git a/ports/alif/mpu.h b/ports/alif/mpu.h
index 88fbe0112..1d3602941 100644
--- a/ports/alif/mpu.h
+++ b/ports/alif/mpu.h
@@ -24,6 +24,8 @@
* THE SOFTWARE.
*/
+#include <stdbool.h>
+
#define MP_MPU_ATTR_NORMAL_WT_RA_TRANSIENT (0)
#define MP_MPU_ATTR_DEVICE_nGnRE (1)
#define MP_MPU_ATTR_NORMAL_WB_RA_WA (2)
@@ -37,3 +39,5 @@
#define MP_MPU_REGION_OSPI_REGISTERS (4)
#define MP_MPU_REGION_OSPI0_XIP (5)
#define MP_MPU_REGION_OPENAMP (6)
+
+void mpu_config_mram(bool read_only);