diff options
| -rw-r--r-- | ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h | 11 | ||||
| -rw-r--r-- | ports/stm32/mpconfigboard_common.h | 23 | ||||
| -rw-r--r-- | ports/stm32/powerctrl.c | 15 | ||||
| -rw-r--r-- | ports/stm32/stm32_it.c | 13 | ||||
| -rw-r--r-- | ports/stm32/system_stm32.c | 32 |
5 files changed, 64 insertions, 30 deletions
diff --git a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h index a843d3c35..babf63c7a 100644 --- a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h +++ b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.h @@ -5,8 +5,17 @@ #define MICROPY_HW_HAS_FLASH (1) #define MICROPY_HW_ENABLE_RTC (1) -// HSE is 8MHz, CPU freq set to 84MHz +// HSE is 8MHz, HSI is 16MHz CPU freq set to 84MHz +// Default source for the clock is HSI. +// For revisions of the board greater than C-01, HSE can be used as a +// clock source by removing the #define MICROPY_HW_CLK_USE_HSE line +#define MICROPY_HW_CLK_USE_HSI (1) + +#if MICROPY_HW_CLK_USE_HSI +#define MICROPY_HW_CLK_PLLM (16) +#else #define MICROPY_HW_CLK_PLLM (8) +#endif #define MICROPY_HW_CLK_PLLN (336) #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV4) #define MICROPY_HW_CLK_PLLQ (7) diff --git a/ports/stm32/mpconfigboard_common.h b/ports/stm32/mpconfigboard_common.h index d4e7c2014..e208f2238 100644 --- a/ports/stm32/mpconfigboard_common.h +++ b/ports/stm32/mpconfigboard_common.h @@ -181,11 +181,28 @@ #error Unsupported MCU series #endif -// Configure HSE for bypass or oscillator +#if MICROPY_HW_CLK_USE_HSI +// Use HSI as clock source +#define MICROPY_HW_CLK_VALUE (HSI_VALUE) +#define MICROPY_HW_RCC_OSCILLATOR_TYPE (RCC_OSCILLATORTYPE_HSI) +#define MICROPY_HW_RCC_PLL_SRC (RCC_PLLSOURCE_HSI) +#define MICROPY_HW_RCC_CR_HSxON (RCC_CR_HSION) +#define MICROPY_HW_RCC_HSI_STATE (RCC_HSI_ON) +#define MICROPY_HW_RCC_FLAG_HSxRDY (RCC_FLAG_HSIRDY) +#define MICROPY_HW_RCC_HSE_STATE (RCC_HSE_OFF) +#else +// Use HSE as a clock source (bypass or oscillator) +#define MICROPY_HW_CLK_VALUE (HSE_VALUE) +#define MICROPY_HW_RCC_OSCILLATOR_TYPE (RCC_OSCILLATORTYPE_HSE) +#define MICROPY_HW_RCC_PLL_SRC (RCC_PLLSOURCE_HSE) +#define MICROPY_HW_RCC_CR_HSxON (RCC_CR_HSEON) +#define MICROPY_HW_RCC_HSI_STATE (RCC_HSI_OFF) +#define MICROPY_HW_RCC_FLAG_HSxRDY (RCC_FLAG_HSERDY) #if MICROPY_HW_CLK_USE_BYPASS -#define MICROPY_HW_CLK_HSE_STATE (RCC_HSE_BYPASS) +#define MICROPY_HW_RCC_HSE_STATE (RCC_HSE_BYPASS) #else -#define MICROPY_HW_CLK_HSE_STATE (RCC_HSE_ON) +#define MICROPY_HW_RCC_HSE_STATE (RCC_HSE_ON) +#endif #endif #if MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE diff --git a/ports/stm32/powerctrl.c b/ports/stm32/powerctrl.c index fe4d58001..165919977 100644 --- a/ports/stm32/powerctrl.c +++ b/ports/stm32/powerctrl.c @@ -215,10 +215,10 @@ set_clk: // Re-configure PLL // Even if we don't use the PLL for the system clock, we still need it for USB, RNG and SDIO RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = MICROPY_HW_CLK_HSE_STATE; + RCC_OscInitStruct.OscillatorType = MICROPY_HW_RCC_OSCILLATOR_TYPE; + RCC_OscInitStruct.HSEState = MICROPY_HW_RCC_HSE_STATE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLSource = MICROPY_HW_RCC_PLL_SRC; RCC_OscInitStruct.PLL.PLLM = m; RCC_OscInitStruct.PLL.PLLN = n; RCC_OscInitStruct.PLL.PLLP = p; @@ -297,9 +297,12 @@ void powerctrl_enter_stop_mode(void) { #else #if !defined(STM32L4) - // enable HSE - __HAL_RCC_HSE_CONFIG(MICROPY_HW_CLK_HSE_STATE); - while (!__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY)) { + // enable clock + __HAL_RCC_HSE_CONFIG(MICROPY_HW_RCC_HSE_STATE); + #if MICROPY_HW_CLK_USE_HSI + __HAL_RCC_HSI_ENABLE(); + #endif + while (!__HAL_RCC_GET_FLAG(MICROPY_HW_RCC_FLAG_HSxRDY)) { } #endif diff --git a/ports/stm32/stm32_it.c b/ports/stm32/stm32_it.c index 0f2be4c68..004e0f974 100644 --- a/ports/stm32/stm32_it.c +++ b/ports/stm32/stm32_it.c @@ -329,13 +329,16 @@ STATIC void OTG_CMD_WKUP_Handler(PCD_HandleTypeDef *pcd_handle) { /* Reset SLEEPDEEP bit of Cortex System Control Register */ SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - /* Configures system clock after wake-up from STOP: enable HSE, PLL and select - PLL as system clock source (HSE and PLL are disabled in STOP mode) */ + /* Configures system clock after wake-up from STOP: enable HSE/HSI, PLL and select + PLL as system clock source (HSE/HSI and PLL are disabled in STOP mode) */ - __HAL_RCC_HSE_CONFIG(MICROPY_HW_CLK_HSE_STATE); + __HAL_RCC_HSE_CONFIG(MICROPY_HW_RCC_HSE_STATE); + #if MICROPY_HW_CLK_USE_HSI + __HAL_RCC_HSI_ENABLE(); + #endif - /* Wait till HSE is ready */ - while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + /* Wait till HSE/HSI is ready */ + while(__HAL_RCC_GET_FLAG(MICROPY_HW_RCC_FLAG_HSxRDY) == RESET) {} /* Enable the main PLL. */ diff --git a/ports/stm32/system_stm32.c b/ports/stm32/system_stm32.c index e0e27cef0..e0f054500 100644 --- a/ports/stm32/system_stm32.c +++ b/ports/stm32/system_stm32.c @@ -111,7 +111,7 @@ void __fatal_error(const char *msg); #if defined(STM32F4) || defined(STM32F7) #define CONFIG_RCC_CR_1ST (RCC_CR_HSION) -#define CONFIG_RCC_CR_2ND (RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON) +#define CONFIG_RCC_CR_2ND (MICROPY_HW_RCC_CR_HSxON | RCC_CR_CSSON | RCC_CR_PLLON) #define CONFIG_RCC_PLLCFGR (0x24003010) #if defined(STM32F4) @@ -222,7 +222,7 @@ void SystemInit(void) /* Reset CFGR register */ RCC->CFGR = 0x00000000; - /* Reset HSEON, CSSON and PLLON bits */ + /* Reset HSxON, CSSON and PLLON bits */ RCC->CR &= ~ CONFIG_RCC_CR_2ND; /* Reset PLLCFGR register */ @@ -295,16 +295,17 @@ void SystemInit(void) * @brief System Clock Configuration * * The system Clock is configured for F4/F7 as follows: - * System Clock source = PLL (HSE) + * (HSx should be read as HSE or HSI depending on the value of MICROPY_HW_CLK_USE_HSI) + * System Clock source = PLL (HSx) * SYSCLK(Hz) = 168000000 * HCLK(Hz) = 168000000 * AHB Prescaler = 1 * APB1 Prescaler = 4 * APB2 Prescaler = 2 - * HSE Frequency(Hz) = HSE_VALUE - * PLL_M = HSE_VALUE/1000000 + * HSx Frequency(Hz) = HSx_VALUE + * PLL_M = HSx_VALUE/1000000 * PLL_N = 336 - * PLL_P = 2 + * PLL_P = 4 * PLL_Q = 7 * VDD(V) = 3.3 * Main regulator output voltage = Scale1 mode @@ -331,16 +332,16 @@ void SystemInit(void) * PLL is configured as follows: * * VCO_IN - * F4/F7 = HSE / M + * F4/F7 = HSx / M * L4 = MSI / M * VCO_OUT - * F4/F7 = HSE / M * N + * F4/F7 = HSx / M * N * L4 = MSI / M * N * PLLCLK - * F4/F7 = HSE / M * N / P + * F4/F7 = HSx / M * N / P * L4 = MSI / M * N / R * PLL48CK - * F4/F7 = HSE / M * N / Q + * F4/F7 = HSx / M * N / Q * L4 = MSI / M * N / Q USB Clock is obtained over PLLSAI1 * * SYSCLK = PLLCLK @@ -352,6 +353,7 @@ void SystemInit(void) * VCO_IN between 1MHz and 2MHz (2MHz recommended) * VCO_OUT between 192MHz and 432MHz * HSE = 8MHz + * HSI = 16MHz * M = 2 .. 63 (inclusive) * N = 192 ... 432 (inclusive) * P = 2, 4, 6, 8 @@ -411,13 +413,13 @@ void SystemClock_Config(void) /* Enable HSE Oscillator and activate PLL with HSE as source */ #if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = MICROPY_HW_CLK_HSE_STATE; - RCC_OscInitStruct.HSIState = RCC_HSI_OFF; + RCC_OscInitStruct.OscillatorType = MICROPY_HW_RCC_OSCILLATOR_TYPE; + RCC_OscInitStruct.HSEState = MICROPY_HW_RCC_HSE_STATE; + RCC_OscInitStruct.HSIState = MICROPY_HW_RCC_HSI_STATE; #if defined(STM32H7) RCC_OscInitStruct.CSIState = RCC_CSI_OFF; #endif - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLSource = MICROPY_HW_RCC_PLL_SRC; #elif defined(STM32L4) RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.LSEState = RCC_LSE_ON; @@ -538,7 +540,7 @@ void SystemClock_Config(void) } #endif - uint32_t vco_out = RCC_OscInitStruct.PLL.PLLN * (HSE_VALUE / 1000000) / RCC_OscInitStruct.PLL.PLLM; + uint32_t vco_out = RCC_OscInitStruct.PLL.PLLN * (MICROPY_HW_CLK_VALUE / 1000000) / RCC_OscInitStruct.PLL.PLLM; uint32_t sysclk_mhz = vco_out / RCC_OscInitStruct.PLL.PLLP; bool need_pllsai = vco_out % 48 != 0; if (powerctrl_rcc_clock_config_pll(&RCC_ClkInitStruct, sysclk_mhz, need_pllsai) != 0) { |