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-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/bdev.c45
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/board.json21
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/board_init.c96
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/deploy.md18
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/manifest.py18
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/mbedtls_config_board.h8
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/mpconfigboard.h236
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/mpconfigboard.mk33
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/pins.csv95
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/stm32h747.ld51
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/stm32h7xx_hal_conf.h49
-rw-r--r--ports/stm32/boards/ARDUINO_OPTA/wifi_nvram_1dx.h49
12 files changed, 719 insertions, 0 deletions
diff --git a/ports/stm32/boards/ARDUINO_OPTA/bdev.c b/ports/stm32/boards/ARDUINO_OPTA/bdev.c
new file mode 100644
index 000000000..a821ffd6f
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/bdev.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Arduino SA
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "storage.h"
+#include "qspi.h"
+
+#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
+// Shared cache for first and second SPI block devices
+static mp_spiflash_cache_t spi_bdev_cache;
+#endif
+
+// First external SPI flash uses hardware QSPI interface
+const mp_spiflash_config_t spiflash_config = {
+ .bus_kind = MP_SPIFLASH_BUS_QSPI,
+ .bus.u_qspi.data = NULL,
+ .bus.u_qspi.proto = &qspi_proto,
+ #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
+ .cache = &spi_bdev_cache,
+ #endif
+};
+
+spi_bdev_t spi_bdev;
diff --git a/ports/stm32/boards/ARDUINO_OPTA/board.json b/ports/stm32/boards/ARDUINO_OPTA/board.json
new file mode 100644
index 000000000..3955d7df3
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/board.json
@@ -0,0 +1,21 @@
+{
+ "deploy": [
+ "./deploy.md"
+ ],
+ "docs": "",
+ "features": [
+ "BLE",
+ "Dual-core",
+ "External Flash",
+ "USB",
+ "WiFi"
+ ],
+ "images": [
+ "AFX00002_01.iso_1000x750.jpg"
+ ],
+ "mcu": "stm32h7",
+ "product": "Arduino Opta WiFi",
+ "thumbnail": "",
+ "url": "https://store.arduino.cc/products/opta-wifi",
+ "vendor": "Arduino"
+}
diff --git a/ports/stm32/boards/ARDUINO_OPTA/board_init.c b/ports/stm32/boards/ARDUINO_OPTA/board_init.c
new file mode 100644
index 000000000..c0907f5d3
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/board_init.c
@@ -0,0 +1,96 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Arduino SA
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <string.h>
+#include "py/mphal.h"
+#include "storage.h"
+#include "sdram.h"
+
+#define BOOTLOADER_MAGIC (0xDF59)
+
+void OPTA_board_startup(void) {
+}
+
+void OPTA_board_early_init(void) {
+ HAL_InitTick(TICK_INT_PRIORITY);
+
+ // Enable oscillator pin
+ // This is enabled in the bootloader anyway.
+ OPTA_board_osc_enable(true);
+
+ #if MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
+ // The Arduino/mbed bootloader uses the MPU to protect sector 1
+ // which is used for the flash filesystem. The following code
+ // resets and disables all MPU regions configured in the bootloader.
+ HAL_MPU_Disable();
+ MPU_Region_InitTypeDef MPU_InitStruct;
+ MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
+ MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
+ MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
+ MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
+ MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
+ MPU_InitStruct.SubRegionDisable = 0x00;
+ MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
+
+ for (int i = MPU_REGION_NUMBER0; i < MPU_REGION_NUMBER15; i++) {
+ MPU_InitStruct.Number = i;
+ MPU_InitStruct.Enable = MPU_REGION_DISABLE;
+ HAL_MPU_ConfigRegion(&MPU_InitStruct);
+ }
+ #endif
+}
+
+void OPTA_board_enter_bootloader(void) {
+ RTC_HandleTypeDef RTCHandle;
+ RTCHandle.Instance = RTC;
+ HAL_RTCEx_BKUPWrite(&RTCHandle, RTC_BKP_DR0, BOOTLOADER_MAGIC);
+ NVIC_SystemReset();
+}
+
+void OPTA_board_osc_enable(int enable) {
+ mp_hal_pin_config(pyb_pin_OSCEN, MP_HAL_PIN_MODE_OUTPUT, MP_HAL_PIN_PULL_UP, 0);
+ mp_hal_pin_config_speed(pyb_pin_OSCEN, MP_HAL_PIN_SPEED_LOW);
+ mp_hal_pin_write(pyb_pin_OSCEN, enable);
+}
+
+void OPTA_board_low_power(int mode) {
+
+ #if !MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
+ // Enable QSPI deepsleep for modes 1 and 2
+ mp_spiflash_deepsleep(&spi_bdev.spiflash, (mode != 0));
+ #endif
+
+ #if defined(M4_APP_ADDR)
+ // Signal Cortex-M4 to go to Standby mode.
+ if (mode == 2) {
+ __HAL_RCC_HSEM_CLK_ENABLE();
+ HAL_HSEM_FastTake(0);
+ HAL_HSEM_Release(0, 0);
+ __HAL_RCC_HSEM_CLK_DISABLE();
+ HAL_Delay(100);
+ }
+ #endif
+}
diff --git a/ports/stm32/boards/ARDUINO_OPTA/deploy.md b/ports/stm32/boards/ARDUINO_OPTA/deploy.md
new file mode 100644
index 000000000..4e0571dea
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/deploy.md
@@ -0,0 +1,18 @@
+### Via dfu-util
+
+This board can be programmed via DFU bootloader, using e.g. [dfu-util](http://dfu-util.sourceforge.net/).
+To enter the DFU bootloader, double tap the recessed reset button, or you can use `machine.bootloader()` from the MicroPython REPL.
+
+The Arduino Opta indicates its DFU state by blinking the green LED above the RESET button.
+
+**NOTE**: The board might remain in DFU mode after the upload, a simple reset will bring the board back to Run-Time.
+
+```bash
+dfu-util -w -a 0 -d 2341:0364 -D build-ARDUINO_OPTA/firmware.dfu
+```
+
+Or from MicroPython source repository, making sure the current directory is `ports/stm32`:
+
+```bash
+make BOARD=ARDUINO_OPTA deploy
+```
diff --git a/ports/stm32/boards/ARDUINO_OPTA/manifest.py b/ports/stm32/boards/ARDUINO_OPTA/manifest.py
new file mode 100644
index 000000000..b7b9a2b47
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/manifest.py
@@ -0,0 +1,18 @@
+include("$(PORT_DIR)/boards/manifest.py")
+
+# Networking
+require("bundle-networking")
+
+# Utils
+require("time")
+require("senml")
+require("logging")
+
+# Bluetooth
+require("aioble")
+
+# Register external library
+add_library("arduino-lib", "$(ARDUINO_LIB_DIR)")
+
+# RPC
+require("msgpackrpc", library="arduino-lib")
diff --git a/ports/stm32/boards/ARDUINO_OPTA/mbedtls_config_board.h b/ports/stm32/boards/ARDUINO_OPTA/mbedtls_config_board.h
new file mode 100644
index 000000000..07aef7946
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/mbedtls_config_board.h
@@ -0,0 +1,8 @@
+#ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_BOARD_H
+#define MICROPY_INCLUDED_MBEDTLS_CONFIG_BOARD_H
+
+#define MBEDTLS_ECP_NIST_OPTIM
+
+#include "ports/stm32/mbedtls/mbedtls_config_port.h"
+
+#endif /* MICROPY_INCLUDED_MBEDTLS_CONFIG_BOARD_H */
diff --git a/ports/stm32/boards/ARDUINO_OPTA/mpconfigboard.h b/ports/stm32/boards/ARDUINO_OPTA/mpconfigboard.h
new file mode 100644
index 000000000..869522e1e
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/mpconfigboard.h
@@ -0,0 +1,236 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ * The MIT License (MIT)
+ * Copyright (c) 2024 Arduino SA
+ */
+
+#define MICROPY_HW_BOARD_NAME "Arduino OPTA"
+#define MICROPY_HW_MCU_NAME "STM32H747"
+#define MICROPY_HW_FLASH_FS_LABEL "OPTA"
+
+// Network config
+#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-opta"
+
+#define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_C)
+#define UINT_FMT "%u"
+#define INT_FMT "%d"
+typedef int mp_int_t; // must be pointer size
+typedef unsigned int mp_uint_t; // must be pointer size
+
+#define MICROPY_FATFS_EXFAT (1)
+#define MICROPY_HW_ENABLE_RTC (1)
+#define MICROPY_HW_ENABLE_RNG (1)
+#define MICROPY_HW_ENABLE_ADC (1)
+#define MICROPY_HW_ENABLE_USB (1)
+#define MICROPY_HW_HAS_SWITCH (1)
+#define MICROPY_HW_HAS_FLASH (1)
+#define MICROPY_HW_ENABLE_TIMER (1)
+
+// Flash storage config
+#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
+#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
+
+#define MICROPY_BOARD_STARTUP OPTA_board_startup
+void OPTA_board_startup(void);
+
+#define MICROPY_BOARD_EARLY_INIT OPTA_board_early_init
+void OPTA_board_early_init(void);
+
+#define MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET (0)
+#define MICROPY_BOARD_ENTER_BOOTLOADER(nargs, args) OPTA_board_enter_bootloader()
+void OPTA_board_enter_bootloader(void);
+
+void OPTA_board_low_power(int mode);
+#define MICROPY_BOARD_LEAVE_STOP OPTA_board_low_power(0);
+#define MICROPY_BOARD_ENTER_STOP OPTA_board_low_power(1);
+#define MICROPY_BOARD_ENTER_STANDBY OPTA_board_low_power(2);
+
+void OPTA_board_osc_enable(int enable);
+#define MICROPY_BOARD_PRE_STOP OPTA_board_osc_enable(0);
+#define MICROPY_BOARD_POST_STOP OPTA_board_osc_enable(1);
+
+// PLL1 400MHz/50MHz for SDMMC and FDCAN
+// USB and RNG are clocked from the HSI48
+#define MICROPY_HW_CLK_PLLM (5)
+#define MICROPY_HW_CLK_PLLN (160)
+#define MICROPY_HW_CLK_PLLP (2)
+#define MICROPY_HW_CLK_PLLQ (16)
+#define MICROPY_HW_CLK_PLLR (2)
+#define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_2)
+#define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE)
+#define MICROPY_HW_CLK_PLLFRAC (0)
+
+// PLL2 200MHz for FMC and QSPI.
+#define MICROPY_HW_CLK_PLL2M (5)
+#define MICROPY_HW_CLK_PLL2N (80)
+#define MICROPY_HW_CLK_PLL2P (2)
+#define MICROPY_HW_CLK_PLL2Q (2)
+#define MICROPY_HW_CLK_PLL2R (2)
+#define MICROPY_HW_CLK_PLL2VCI (RCC_PLL2VCIRANGE_2)
+#define MICROPY_HW_CLK_PLL2VCO (RCC_PLL2VCOWIDE)
+#define MICROPY_HW_CLK_PLL2FRAC (0)
+
+// PLL3 160MHz SPI123 100MHz for ADC
+#define MICROPY_HW_CLK_PLL3M (5)
+#define MICROPY_HW_CLK_PLL3N (160)
+#define MICROPY_HW_CLK_PLL3P (5)
+#define MICROPY_HW_CLK_PLL3Q (5)
+#define MICROPY_HW_CLK_PLL3R (8)
+#define MICROPY_HW_CLK_PLL3VCI (RCC_PLL3VCIRANGE_2)
+#define MICROPY_HW_CLK_PLL3VCO (RCC_PLL3VCOWIDE)
+#define MICROPY_HW_CLK_PLL3FRAC (0)
+
+// HSE in BYPASS mode.
+#define MICROPY_HW_CLK_USE_BYPASS (1)
+
+// Bus clock divider values
+#define MICROPY_HW_CLK_AHB_DIV (RCC_HCLK_DIV2)
+#define MICROPY_HW_CLK_APB1_DIV (RCC_APB1_DIV2)
+#define MICROPY_HW_CLK_APB2_DIV (RCC_APB2_DIV2)
+#define MICROPY_HW_CLK_APB3_DIV (RCC_APB3_DIV2)
+#define MICROPY_HW_CLK_APB4_DIV (RCC_APB4_DIV2)
+
+// Peripheral clock sources
+#define MICROPY_HW_RCC_HSI48_STATE (RCC_HSI48_ON)
+#define MICROPY_HW_RCC_USB_CLKSOURCE (RCC_USBCLKSOURCE_HSI48)
+#define MICROPY_HW_RCC_RTC_CLKSOURCE (RCC_RTCCLKSOURCE_LSI)
+#define MICROPY_HW_RCC_FMC_CLKSOURCE (RCC_FMCCLKSOURCE_PLL2)
+#define MICROPY_HW_RCC_RNG_CLKSOURCE (RCC_RNGCLKSOURCE_HSI48)
+#define MICROPY_HW_RCC_ADC_CLKSOURCE (RCC_ADCCLKSOURCE_PLL3)
+#define MICROPY_HW_RCC_SDMMC_CLKSOURCE (RCC_SDMMCCLKSOURCE_PLL)
+#define MICROPY_HW_RCC_FDCAN_CLKSOURCE (RCC_FDCANCLKSOURCE_PLL)
+#define MICROPY_HW_RCC_SPI123_CLKSOURCE (RCC_SPI123CLKSOURCE_PLL3)
+#define MICROPY_HW_RCC_I2C123_CLKSOURCE (RCC_I2C123CLKSOURCE_D2PCLK1)
+#define MICROPY_HW_RCC_QSPI_CLKSOURCE (RCC_QSPICLKSOURCE_PLL2)
+
+// SMPS configuration
+#define MICROPY_HW_PWR_SMPS_CONFIG (PWR_LDO_SUPPLY)
+
+// Configure the analog switches for dual-pad pins.
+#define MICROPY_HW_ANALOG_SWITCH_PA0 (SYSCFG_SWITCH_PA0_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PA1 (SYSCFG_SWITCH_PA1_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PC2 (SYSCFG_SWITCH_PC2_OPEN)
+#define MICROPY_HW_ANALOG_SWITCH_PC3 (SYSCFG_SWITCH_PC3_OPEN)
+
+// There is an external 32kHz oscillator
+#define RTC_ASYNCH_PREDIV (0)
+#define RTC_SYNCH_PREDIV (0x7fff)
+#define MICROPY_HW_RTC_USE_BYPASS (1)
+#define MICROPY_HW_RTC_USE_US (1)
+#define MICROPY_HW_RTC_USE_CALOUT (1)
+
+#if !MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
+// QSPI flash #1 for storage
+#define MICROPY_HW_QSPI_PRESCALER (2) // 100MHz
+#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (27)
+// Reserve 1MiB at the end for compatibility with alternate firmware that places WiFi blob here.
+#define MICROPY_HW_SPIFLASH_SIZE_BITS (120 * 1024 * 1024)
+#define MICROPY_HW_QSPIFLASH_CS (pyb_pin_QSPI2_CS)
+#define MICROPY_HW_QSPIFLASH_SCK (pyb_pin_QSPI2_CLK)
+#define MICROPY_HW_QSPIFLASH_IO0 (pyb_pin_QSPI2_D0)
+#define MICROPY_HW_QSPIFLASH_IO1 (pyb_pin_QSPI2_D1)
+#define MICROPY_HW_QSPIFLASH_IO2 (pyb_pin_QSPI2_D2)
+#define MICROPY_HW_QSPIFLASH_IO3 (pyb_pin_QSPI2_D3)
+
+// SPI flash #1, block device config
+extern const struct _mp_spiflash_config_t spiflash_config;
+extern struct _spi_bdev_t spi_bdev;
+#define MICROPY_HW_BDEV_SPIFLASH (&spi_bdev)
+#define MICROPY_HW_BDEV_SPIFLASH_CONFIG (&spiflash_config)
+#define MICROPY_HW_BDEV_SPIFLASH_SIZE_BYTES (MICROPY_HW_SPIFLASH_SIZE_BITS / 8)
+#define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev)
+#endif
+
+// 3 wait states
+#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_2
+
+// UART config
+#define MICROPY_HW_UART3_TX (pyb_pin_UART3_TX)
+#define MICROPY_HW_UART3_RX (pyb_pin_UART3_RX)
+#define MICROPY_HW_UART3_RTS (pyb_pin_UART3_RTS)
+#define MICROPY_HW_UART3_CTS (pyb_pin_UART3_CTS)
+#define MICROPY_HW_UART3_RX_PULL (GPIO_NOPULL)
+
+#define MICROPY_HW_UART4_TX (pyb_pin_BT_TXD)
+#define MICROPY_HW_UART4_RX (pyb_pin_BT_RXD)
+#define MICROPY_HW_UART4_RTS (pyb_pin_BT_RTS)
+#define MICROPY_HW_UART4_CTS (pyb_pin_BT_CTS)
+
+#define MICROPY_HW_UART6_TX (pyb_pin_UART6_TX)
+#define MICROPY_HW_UART6_RX (pyb_pin_UART6_RX)
+
+// I2C buses
+#define MICROPY_HW_I2C1_SCL (pyb_pin_I2C1_SCL)
+#define MICROPY_HW_I2C1_SDA (pyb_pin_I2C1_SDA)
+
+#define MICROPY_HW_I2C3_SCL (pyb_pin_I2C3_SCL)
+#define MICROPY_HW_I2C3_SDA (pyb_pin_I2C3_SDA)
+
+// USRSW is pulled high. Pressing the button makes the input go low.
+#define MICROPY_HW_USRSW_PIN (pyb_pin_USER_BUTTON)
+#define MICROPY_HW_USRSW_PULL (GPIO_PULLUP)
+#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING)
+#define MICROPY_HW_USRSW_PRESSED (0)
+
+// LEDs
+#define MICROPY_HW_LED1 (pyb_pin_LED_SYS_1) // user 1
+#define MICROPY_HW_LED2 (pyb_pin_LED_SYS_2) // user 2
+#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin))
+#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin))
+
+// WiFi SDMMC
+#define MICROPY_HW_SDIO_SDMMC (1)
+#define MICROPY_HW_SDIO_CK (pyb_pin_WL_SDIO_CLK)
+#define MICROPY_HW_SDIO_CMD (pyb_pin_WL_SDIO_CMD)
+#define MICROPY_HW_SDIO_D0 (pyb_pin_WL_SDIO_0)
+#define MICROPY_HW_SDIO_D1 (pyb_pin_WL_SDIO_1)
+#define MICROPY_HW_SDIO_D2 (pyb_pin_WL_SDIO_2)
+#define MICROPY_HW_SDIO_D3 (pyb_pin_WL_SDIO_3)
+
+// CYW43 config
+// A custom NVRAM file is needed to disable the LPO.
+#define CYW43_WIFI_NVRAM_INCLUDE_FILE "wifi_nvram_1dx.h"
+
+#define MICROPY_HW_USB_CDC_RX_DATA_SIZE (1024)
+#define MICROPY_HW_USB_CDC_TX_DATA_SIZE (1024)
+#define MICROPY_HW_USB_CDC_1200BPS_TOUCH (1)
+
+// Bluetooth config
+#define MICROPY_HW_BLE_UART_ID (PYB_UART_4)
+#define MICROPY_HW_BLE_UART_BAUDRATE (115200)
+#define MICROPY_HW_BLE_UART_BAUDRATE_SECONDARY (3000000)
+
+// Ethernet via RMII
+#define MICROPY_HW_ETH_MDC (pin_C1)
+#define MICROPY_HW_ETH_MDIO (pin_A2)
+#define MICROPY_HW_ETH_RMII_REF_CLK (pin_A1)
+#define MICROPY_HW_ETH_RMII_CRS_DV (pin_A7)
+#define MICROPY_HW_ETH_RMII_RXD0 (pin_C4)
+#define MICROPY_HW_ETH_RMII_RXD1 (pin_C5)
+#define MICROPY_HW_ETH_RMII_TX_EN (pin_G11)
+#define MICROPY_HW_ETH_RMII_TXD0 (pin_G13)
+#define MICROPY_HW_ETH_RMII_TXD1 (pin_G12)
+
+// USB config
+#define MICROPY_HW_USB_FS (1)
+#define MICROPY_HW_USB_VID 0x2341
+#define MICROPY_HW_USB_PID 0x0564
+#define MICROPY_HW_USB_PID_CDC_MSC (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC_HID (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_MSC (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC2_MSC (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC2 (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC3 (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC3_MSC (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC_MSC_HID (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC2_MSC_HID (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_PID_CDC3_MSC_HID (MICROPY_HW_USB_PID)
+#define MICROPY_HW_USB_LANGID_STRING 0x409
+#define MICROPY_HW_USB_MANUFACTURER_STRING "Arduino"
+#define MICROPY_HW_USB_PRODUCT_FS_STRING "Opta Virtual Comm Port in FS Mode"
+#define MICROPY_HW_USB_PRODUCT_HS_STRING "Opta Virtual Comm Port in HS Mode"
+#define MICROPY_HW_USB_INTERFACE_FS_STRING "Opta Interface"
+#define MICROPY_HW_USB_INTERFACE_HS_STRING "Opta Interface"
+#define MICROPY_HW_USB_CONFIGURATION_FS_STRING "Opta Config"
+#define MICROPY_HW_USB_CONFIGURATION_HS_STRING "Opta Config"
diff --git a/ports/stm32/boards/ARDUINO_OPTA/mpconfigboard.mk b/ports/stm32/boards/ARDUINO_OPTA/mpconfigboard.mk
new file mode 100644
index 000000000..a4f6043c7
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/mpconfigboard.mk
@@ -0,0 +1,33 @@
+USE_MBOOT = 0
+USE_PYDFU = 0
+# For dual core HAL drivers.
+CFLAGS += -DCORE_CM7
+
+# Arduino bootloader PID:VID
+BOOTLOADER_DFU_USB_VID = 0x2341
+BOOTLOADER_DFU_USB_PID = 0x0364
+
+# MCU settings
+MCU_SERIES = h7
+CMSIS_MCU = STM32H747xx
+MICROPY_FLOAT_IMPL = single
+AF_FILE = boards/stm32h743_af.csv
+LD_FILES = boards/ARDUINO_OPTA/stm32h747.ld
+TEXT0_ADDR = 0x08040000
+
+# MicroPython settings
+MICROPY_PY_BLUETOOTH = 1
+MICROPY_BLUETOOTH_NIMBLE = 1
+MICROPY_BLUETOOTH_BTSTACK = 0
+MICROPY_PY_LWIP = 1
+MICROPY_PY_NETWORK_CYW43 = 1
+MICROPY_PY_SSL = 1
+MICROPY_SSL_MBEDTLS = 1
+MICROPY_PY_OPENAMP = 1
+MICROPY_PY_OPENAMP_REMOTEPROC = 1
+
+ARDUINO_LIB_DIR = lib/arduino-lib
+GIT_SUBMODULES += $(ARDUINO_LIB_DIR)
+FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py
+MICROPY_MANIFEST_ARDUINO_LIB_DIR = $(TOP)/$(ARDUINO_LIB_DIR)
+MBEDTLS_CONFIG_FILE = '"$(BOARD_DIR)/mbedtls_config_board.h"'
diff --git a/ports/stm32/boards/ARDUINO_OPTA/pins.csv b/ports/stm32/boards/ARDUINO_OPTA/pins.csv
new file mode 100644
index 000000000..ef05f616a
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/pins.csv
@@ -0,0 +1,95 @@
+# Inputs
+IN_1,PA0_C
+IN_2,PC2_C
+IN_3,PF12
+IN_4,PB0
+IN_5,PF10
+IN_6,PF8
+IN_7,PF6
+IN_8,PF4
+
+# Outputs
+OUT_1,PI6
+OUT_2,PI5
+OUT_3,PI7
+OUT_4,PI4
+RELAY_1,PI6
+RELAY_2,PI5
+RELAY_3,PI7
+RELAY_4,PI4
+
+# Modbus
+UART3_TX,PB10
+UART3_RX,PB11
+UART3_CTS,PB13
+UART3_RTS,PB14
+UART3_RE,PB13
+UART3_DE,PB14
+
+# Expansion port
+UART6_TX,PG14
+UART6_RX,PC7
+I2C3_SDA,PH8
+I2C3_SCL,PH7
+BUS_DETECT,PG8
+
+# Crypto/USB C controller
+I2C1_SDA,PB7
+I2C1_SCL,PB6
+USB_PCON_DETECT,PJ4
+USB_PCON_FAULT,PE7
+USB_PCON_ENABLE,PG1
+
+-USB_DM,PA11
+-USB_DP,PA12
+
+# LEDs
+LED_BUILTIN,PH11
+LED_SYS_1,PH11
+LED_SYS_2,PH12
+LED_SYS_3,PE5
+LEDR,PH11
+LEDG,PH12
+LEDB,PE5
+USER_BUTTON,PE4
+LED_D0,PI0
+LED_D1,PI1
+LED_D2,PI3
+LED_D3,PH15
+LED_RELAY1,PI0
+LED_RELAY2,PI1
+LED_RELAY3,PI3
+LED_RELAY4,PH15
+
+OSCEN,PH1
+-WL_REG_ON,PJ1
+-WL_HOST_WAKE,PJ5
+-WL_SDIO_0,PC8
+-WL_SDIO_1,PC9
+-WL_SDIO_2,PC10
+-WL_SDIO_3,PC11
+-WL_SDIO_CMD,PD2
+-WL_SDIO_CLK,PC12
+-BT_RXD,-PH14
+-BT_TXD,PB9
+-BT_CTS,-PB15
+-BT_RTS,-PA15
+-BT_REG_ON,PJ12
+-BT_HOST_WAKE,PJ13
+-BT_DEV_WAKE,PJ14
+-QSPI2_CS,PG6
+-QSPI2_CLK,PF10
+-QSPI2_D0,PD11
+-QSPI2_D1,PD12
+-QSPI2_D2,PE2
+-QSPI2_D3,PF6
+-ETH_RST,PJ15
+-ETH_RMII_REF_CLK,PA1
+-ETH_MDIO,-PA2
+-ETH_RMII_CRS_DV,-PA7
+-ETH_MDC,-PC1
+-ETH_RMII_RXD0,-PC4
+-ETH_RMII_RXD1,-PC5
+-ETH_RMII_TX_EN,PG11
+-ETH_RMII_TXD0,PG13
+-ETH_RMII_TXD1,PG12
diff --git a/ports/stm32/boards/ARDUINO_OPTA/stm32h747.ld b/ports/stm32/boards/ARDUINO_OPTA/stm32h747.ld
new file mode 100644
index 000000000..793a76b97
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/stm32h747.ld
@@ -0,0 +1,51 @@
+/*
+ GNU linker script for STM32H747
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+ ITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
+ DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* AXI SRAM D1 */
+ SRAM1 (xrw) : ORIGIN = 0x30000000, LENGTH = 128K /* SRAM1 D2 */
+ SRAM2 (xrw) : ORIGIN = 0x30020000, LENGTH = 128K /* SRAM2 D2 */
+ SRAM3 (xrw) : ORIGIN = 0x30040000, LENGTH = 32K /* SRAM3 D2 */
+ SRAM4 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K /* SRAM4 D3 */
+ FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* Total available flash */
+ FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 16384K /* 16MBs external QSPI flash */
+ FLASH_BL (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* Arduino bootloader */
+ FLASH_FS (r) : ORIGIN = 0x08020000, LENGTH = 128K /* filesystem */
+ FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1280K /* CM7 firmware */
+ FLASH_CM4 (rx) : ORIGIN = 0x08180000, LENGTH = 512K /* CM4 firmware */
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+
+/* Define the stack. The stack is full descending so begins just above last byte
+ of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
+_sstack = _estack - 16K; /* tunable */
+
+/* RAM extents for the garbage collector */
+_ram_start = ORIGIN(RAM);
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_start = _ebss; /* heap starts just after statically allocated memory */
+_heap_end = _sstack;
+
+/* Note the following varilables are only used if the filesystem flash storage is enabled */
+/* Location of filesystem RAM cache */
+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(DTCM);
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
+
+/* Location of filesystem flash storage */
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+
+/* OpenAMP shared memory region */
+_openamp_shm_region_start = ORIGIN(SRAM4);
+_openamp_shm_region_end = ORIGIN(SRAM4) + LENGTH(SRAM4);
+
+INCLUDE common_blifs.ld
diff --git a/ports/stm32/boards/ARDUINO_OPTA/stm32h7xx_hal_conf.h b/ports/stm32/boards/ARDUINO_OPTA/stm32h7xx_hal_conf.h
new file mode 100644
index 000000000..0175f66b7
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/stm32h7xx_hal_conf.h
@@ -0,0 +1,49 @@
+/* This file is part of the MicroPython project, http://micropython.org/
+ * The MIT License (MIT)
+ * Copyright (c) 2019 Damien P. George
+ */
+#ifndef MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
+#define MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
+
+// Oscillator values in Hz
+#define HSE_VALUE (25000000)
+#define LSE_VALUE (32768)
+#define EXTERNAL_CLOCK_VALUE (12288000)
+
+// Oscillator timeouts in ms
+#define HSE_STARTUP_TIMEOUT (5000)
+#define LSE_STARTUP_TIMEOUT (5000)
+
+#define DATA_CACHE_ENABLE 1
+#define INSTRUCTION_CACHE_ENABLE 1
+#define PREFETCH_ENABLE 1
+#define USE_RTOS 0
+
+#define HAL_HSEM_MODULE_ENABLED
+#define HAL_JPEG_MODULE_ENABLED
+#define HAL_LPTIM_MODULE_ENABLED
+#define HAL_LTDC_MODULE_ENABLED
+#define HAL_MDIOS_MODULE_ENABLED
+#define HAL_MDMA_MODULE_ENABLED
+#define HAL_MMC_MODULE_ENABLED
+#define HAL_NAND_MODULE_ENABLED
+#define HAL_OPAMP_MODULE_ENABLED
+#define HAL_QSPI_MODULE_ENABLED
+#define HAL_RNG_MODULE_ENABLED
+#define HAL_SAI_MODULE_ENABLED
+#define HAL_SMBUS_MODULE_ENABLED
+#define HAL_SPDIFRX_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+#define HAL_SWPMI_MODULE_ENABLED
+
+#ifdef HAL_HSEM_MODULE_ENABLED
+#include "stm32h7xx_hal_hsem.h"
+#endif
+
+#ifdef HAL_MMC_MODULE_ENABLED
+#include "stm32h7xx_hal_mmc.h"
+#endif
+
+#include "boards/stm32h7xx_hal_conf_base.h"
+
+#endif // MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
diff --git a/ports/stm32/boards/ARDUINO_OPTA/wifi_nvram_1dx.h b/ports/stm32/boards/ARDUINO_OPTA/wifi_nvram_1dx.h
new file mode 100644
index 000000000..7b98edad1
--- /dev/null
+++ b/ports/stm32/boards/ARDUINO_OPTA/wifi_nvram_1dx.h
@@ -0,0 +1,49 @@
+static const uint8_t wifi_nvram_4343[] CYW43_RESOURCE_ATTRIBUTE =
+ // Type1DX_Final_nvram2.txt
+ // 2.4 GHz, 20 MHz BW mode
+ "manfid=0x2d0\x00"
+ "prodid=0x0726\x00"
+ "vendid=0x14e4\x00"
+ "devid=0x43e2\x00"
+ "boardtype=0x0726\x00"
+ "boardrev=0x1202\x00"
+ "boardnum=22\x00"
+ "macaddr=00:90:4c:c5:12:38\x00"
+ "sromrev=11\x00"
+ "boardflags=0x00404201\x00"
+ "boardflags3=0x04000000\x00"
+ "xtalfreq=37400\x00"
+ "nocrc=1\x00"
+ "ag0=0\x00"
+ "aa2g=1\x00"
+ "ccode=ALL\x00"
+ // "pa0itssit=0x20\x00"
+ "extpagain2g=0\x00"
+ "pa2ga0=-145,6667,-751\x00"
+ "AvVmid_c0=0x0,0xc8\x00"
+ "cckpwroffset0=2\x00"
+ "maxp2ga0=74\x00"
+ // "txpwrbckof=6\x00"
+ "cckbw202gpo=0\x00"
+ "legofdmbw202gpo=0x88888888\x00"
+ "mcsbw202gpo=0xaaaaaaaa\x00"
+ "propbw202gpo=0xdd\x00"
+ "ofdmdigfilttype=18\x00"
+ "ofdmdigfilttypebe=18\x00"
+ "papdmode=1\x00"
+ "papdvalidtest=1\x00"
+ "pacalidx2g=48\x00"
+ "papdepsoffset=-22\x00"
+ "papdendidx=58\x00"
+ "il0macaddr=00:90:4c:c5:12:38\x00"
+ "wl0id=0x431b\x00"
+ "muxenab=0x10\x00"
+ // BT COEX deferral limit setting
+ // "btc_params 8 45000\x00"
+ // "btc_params 10 20000\x00"
+ // "spurconfig=0x3\x00"
+ // Antenna diversity
+ "swdiv_en=1\x00"
+ "swdiv_gpio=1\x00"
+ "\x00\x00"
+;
generated by cgit v1.2.3 (git 2.46.0) at 2025-11-18 04:27:14 +0000