summaryrefslogtreecommitdiff
path: root/docs/wipy/quickref.rst
diff options
context:
space:
mode:
Diffstat (limited to 'docs/wipy/quickref.rst')
-rw-r--r--docs/wipy/quickref.rst14
1 files changed, 7 insertions, 7 deletions
diff --git a/docs/wipy/quickref.rst b/docs/wipy/quickref.rst
index a22ea45b5..f9ea3d501 100644
--- a/docs/wipy/quickref.rst
+++ b/docs/wipy/quickref.rst
@@ -107,8 +107,8 @@ See :ref:`machine.SPI <machine.SPI>`. ::
from machine import SPI
- # configure the SPI master @ 2MHz
- spi = SPI(0, SPI.MASTER, baudrate=200000, polarity=0, phase=0)
+ # configure the SPI controller @ 2MHz
+ spi = SPI(0, SPI.CONTROLLER, baudrate=2_000_000, polarity=0, phase=0)
spi.write('hello')
spi.read(5) # receive 5 bytes on the bus
rbuf = bytearray(5)
@@ -122,11 +122,11 @@ See :ref:`machine.I2C <machine.I2C>`. ::
from machine import I2C
# configure the I2C bus
i2c = I2C(baudrate=100000)
- i2c.scan() # returns list of slave addresses
- i2c.writeto(0x42, 'hello') # send 5 bytes to slave with address 0x42
- i2c.readfrom(0x42, 5) # receive 5 bytes from slave
- i2c.readfrom_mem(0x42, 0x10, 2) # read 2 bytes from slave 0x42, slave memory 0x10
- i2c.writeto_mem(0x42, 0x10, 'xy') # write 2 bytes to slave 0x42, slave memory 0x10
+ i2c.scan() # returns list of peripheral addresses
+ i2c.writeto(0x42, 'hello') # send 5 bytes to peripheral with address 0x42
+ i2c.readfrom(0x42, 5) # receive 5 bytes from peripheral
+ i2c.readfrom_mem(0x42, 0x10, 2) # read 2 bytes from peripheral 0x42, peripheral memory 0x10
+ i2c.writeto_mem(0x42, 0x10, 'xy') # write 2 bytes to peripheral 0x42, peripheral memory 0x10
Watchdog timer (WDT)
--------------------