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2025-06-16tests/ports/rp2: Add tests for rp2-specific timer options.Chris Webb
Add tests for both one-shot and periodic timers using the rp2-specific tick_hz= and hard= parameters. Signed-off-by: Chris Webb <chris@arachsys.com>
2025-06-16rp2/machine_timer: Support hard IRQ timer callbacks.Chris Webb
Unlike some boards like stm32, timer callbacks on the rp2 port are unconditionally dispatched via mp_sched_schedule(), behaving like soft IRQs with consequent GC jitter and delays. Add a 'hard' keyword argument to the rp2 Timer constructor and init. This defaults to False but if it is set True, the timer callback will be dispatched in hard IRQ context rather than queued. Signed-off-by: Chris Webb <chris@arachsys.com>
2025-06-16drivers/esp-hosted: Replace EVENT_POLL_HOOK with mp_event_wait_ms.Andrew Leech
Signed-off-by: Andrew Leech <andrew@alelec.net>
2025-06-16renesas-ra: Replace MICROPY_EVENT_POLL_HOOK with mp_event_wait.Andrew Leech
Basic update to the renesas-ra port to replace the traditional `MICROPY_EVENT_POLL_HOOK` with the newer mp_event_wait API as appropriate. Signed-off-by: Andrew Leech <andrew@alelec.net>
2025-06-16tools/mpremote: Improve df command to use new no-arg vfs.mount() query.Damien George
The existing `mpremote df` command is not very good, because it needs to assume that all directories in the root directory are mount points, and also doesn't correctly stat filesystems when the current directory is not the root. This leads to wrong results With the introduction of `vfs.mount()` to return a list of mounted filesystems and their path, a much better df can be implemented, as done in this commit. The new df will also fall back to using the old approach of listing the root directory if the no-arg `vfs.mount()` query is not supported. Signed-off-by: Damien George <damien@micropython.org>
2025-06-16esp32/modesp32: Make wake_on_ext1 available only on SoCs supporting it.Meir Armon
The `esp32.wake_on_ext1()` method should only be available on boards that have SOC_PM_SUPPORT_EXT1_WAKEUP=y. And update docs to reflect this. Signed-off-by: Meir Armon <meirarmon@gmail.com>
2025-06-16esp32/modesp32: Make wake_on_ext0 available only on SoCs supporting it.Meir Armon
The `esp32.wake_on_ext0()` method should only be available on boards that have SOC_PM_SUPPORT_EXT0_WAKEUP=y. And update docs to reflect this. Signed-off-by: Meir Armon <meirarmon@gmail.com>
2025-06-16esp32/modesp32: Make wake_on_touch available only on SoCs supporting it.Meir Armon
The `esp32.wake_on_touch()` method should only be available on boards that have SOC_TOUCH_SENSOR_SUPPORTED=y. And update docs to reflect this. Signed-off-by: Meir Armon <meirarmon@gmail.com>
2025-06-16py/asmbase: Fix assertion error with viper code.Jeff Epler
In the case of viper code it's possible to reach MP_ASM_PASS_EMIT with a code size of 0 bytes. Update the assertion accordingly. After this change, `mpy-cross -march=debug' on viper tests no longer crashes. Fixes issue #17467. Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-16unix/coverage: Add coverage test for left adjusted print.Jeff Epler
Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-16py/mpprint: Remove unused "PF_FLAG_NO_TRAILZ" flag.Jeff Epler
Looking at the git history, there's no indication that the `PF_FLAG_NO_TRAILZ` flag was ever implemented or that "%!" was used as an `mp_printf` format string in practice. So remove the flag and re-number the other flags. Leave `PF_FLAG_SEP_POS` at 9 (the highest position that probably works with 16-bit integers like the pic16bit port). Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-16py/objlist: Reduce code size in slice operations.Jeff Epler
By refactoring the code to separate out the slicing operation from the regular indexing operation, code can be shared between the various types of slice operations (read/assign/delete). Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-16py/mpz: Avoid undefined behavior decrementing NULL.Jeff Epler
In the case where an mpz number is zero, its `len` is 0 and its `dig` is NULL. In that case, decrementing NULL via `d--` is undefined behavior according to the C specification. Restructuring the loops in this way avoids undefined behavior. Also, ensure that these cases are tested in the coverage test. This doesn't make much difference now, but would otherwise cause errors later when the undefined behavior sanitizer is employed in CI. Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-16esp32/modesp32: Make wake_on_ulp available only on SoCs that support it.Meir Armon
The `esp32.wake_on_ulp()` method should only be available on boards that have SOC_ULP_SUPPORTED=y. Update docs to reflect this. Signed-off-by: Meir Armon <meirarmon@gmail.com>
2025-06-14esp32/README: Update README to describe auto filesystem sizing.Damien George
Signed-off-by: Damien George <damien@micropython.org>
2025-06-14esp32/boards: Convert all boards to auto detect flash size.Damien George
Remove the "vfs" entry from all partitions-*.csv files, and then remove duplicated files. And remove the ESP32_GENERIC_S3-FLASH_4M variant, because it's no longer needed. Signed-off-by: Damien George <damien@micropython.org>
2025-06-14esp32/main: Auto detect the size of flash and auto create vfs partition.Damien George
Currently in the esp32 port the size of the SPI flash must be configured at build time, eg 4MiB, 8MiB, etc. Also, the esp32 partition table must be configured at build time, which depends on the size of the SPI flash. A bigger flash means more can be allocated to the user filesystem. This commit makes it so the SPI flash size is automatically determined at runtime, and the filesystem size is automatically set to take up as much room as possible (a "vfs" partition is created automatically if it doesn't exist). This works by: - Setting the SPI flash size to be 4MiB in the build (or some other value, as long as the firmware app fits). - Removing the vfs partition from the esp32 partition table (only nvs, phy_init and firmware, and maybe romfs, remain in the partition table). - At boot, query the physical size of the SPI flash and use that as the actual size in the code. - If it doesn't already exist, automatically create a "vfs" partition which takes up the flash from the end of all existing partitions to the end of flash. This allows simplifying a lot of board configurations, and removing some board variants that just change the flash size (to be done in a following commit). It's also fully backwards compatible, in the following sense: - Existing boards with MicroPython firmware will continue to work with the same filesystem, ie the filesystem won't be erased when the firmware is updated. - If a user has a custom esp32 partition table and installs MicroPython as a bare app into the app partition, the new MicroPython firmware will honour the esp32 partition table and use either "vfs" or "ffat" partitions as the filesystem. Signed-off-by: Damien George <damien@micropython.org>
2025-06-13esp8266/modmachine: Use common machine_time_pulse_us implementation.Damien George
Testing shows that for frequencies which the esp8266 can handle -- up to about 1kHz -- `machine.time_pulse_us()` now gives more accurate results. Prior to this commit it would measure on average about 1us lower, but now the average is much closer to the true value. For example a pulse that is 1000us long, it would measure between 998 and 1000us. Now it measures between 999us and 1001us. Signed-off-by: Damien George <damien@micropython.org>
2025-06-13extmod/machine_pulse: Optimise time_pulse_us for code size.Damien George
This implementation is based on the esp8266 custom implementation, and further optimised for size and accuracy. Testing on PYBD_SF2 and RPI_PICO2_W shows that it is at least as good as the original implementation in performance. Signed-off-by: Damien George <damien@micropython.org>
2025-06-12tests/run-natmodtests.py: Consider a test skipped if mpy doesn't exist.Damien George
This is different to a test not being run because there is no corresponding natmod at all. Signed-off-by: Damien George <damien@micropython.org>
2025-06-12tests/run-perfbench.py: Create a _result.json at end of run.Damien George
Reuse the `create_test_report()` function from `run-tests.py` to generate a `_result.json` file summarising the test run. Signed-off-by: Damien George <damien@micropython.org>
2025-06-12tests/run-natmodtests.py: Create a _result.json at end of run.Damien George
Reuse the `create_test_report()` function from `run-tests.py` to generate a `_result.json` file summarising the test run. Signed-off-by: Damien George <damien@micropython.org>
2025-06-12tests/run-multitests.py: Create a _result.json at end of run.Damien George
Reuse the `create_test_report()` function from `run-tests.py` to generate a `_result.json` file summarising the test run. If there's more than one permutation of the test run, only the last result is saved. Signed-off-by: Damien George <damien@micropython.org>
2025-06-12tests/run-tests.py: Factor out helper function to create test report.Damien George
This commit factors existing code in `run-tests.py` into a new helper function `create_test_report()`. That function prints out a summary of the test run (eg number of tests passed, number failed, number skipped) and creates the corresponding `_results.json` file. This is done so `create_test_report()` can be reused by the other test runners. The `test_count` counter is now gone, and instead the number of passed plus number of failed tests is used as an equivalent count. For consistency this commit makes a minor change to the printed output of `run-tests.py`: instead of printing a shorthand name for tests that failed or skipped, it now prints the full name. Eg what was previously printed as `attrtuple2` is now printed as `basics/attrtuple2.py`. This makes the output a little longer (when there are failed/skipped tests) but helps to disambiguate the test name, eg which directory it's in. Signed-off-by: Damien George <damien@micropython.org>
2025-06-12tests/extmod/random_extra_float.py: Skip when funcs not available.Damien George
This test was factored out from `random_extra.py` back in commit 6572029dc0665e58c2ea7355c9e541bdf83105a4, and the skip logic copied from that file. But the skip logic needs to test that the `random` and `uniform` functions exist, not `randint`. This commit fixes that skip logic. Signed-off-by: Damien George <damien@micropython.org>
2025-06-11github/workflows: Use windows-latest runner for all Windows CI jobs.Damien George
The windows-2019 runner has been deprecated by GitHub, so stop using that. Also take the chance to stop using windows-2022 and just use windows-latest everywhere. Signed-off-by: Damien George <damien@micropython.org>
2025-06-11py/objfloat: Change MSVC workaround for NAN being a constant.Damien George
It's actually a bug in the Windows SDK, not MSVC, as per https://stackoverflow.com/questions/79195142/recent-msvc-versions-dont-treat-nan-as-constant-workaround/79324199#79324199 Thanks to @stinos. Signed-off-by: Damien George <damien@micropython.org>
2025-06-10py/parsenum: Fix parsing complex literals with negative real part.Jeff Epler
If a complex literal had a negative real part and a positive imaginary part, it was not parsed properly because the imaginary part also came out negative. Includes a test of complex parsing, which fails without this fix. Co-authored-by: ComplexSymbol <141301057+ComplexSymbol@users.noreply.github.com> Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-10py/objarray: Allow extending array with any iterable.Jeff Epler
As suggested by @dpgeorge, factor out part of array_construct to allow it to be used for construction & extension. Note that extending with a known-length list (or tuple) goes through the slow path of calling array_extend once per element. Fixes issue #7408. Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-10py/parsenum: Further reduce code size in check for inf/nan.Jeff Epler
A few more bytes can be saved by not using nested `if`s (4 bytes for `build-MICROBIT/py/parsenum.o`, 8 bytes for RPI_PICO firmware). This commit is better viewed with whitespace changes hidden, because two blocks were reindented (e.g., `git show -b`). Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-10py/parsenum: Reduce code size in check for inf/nan.Jeff Epler
By avoiding two different checks of the string length, code size is reduced without changing behavior: Some invalid float/complex strings like "ix" will get handled just like "xx" in the main number literal parsing code instead. The optimizer alone couldn't remove the reundant comparisons because it couldn't make a transformation that let an invalid string like "ix" pass into the generic number parsing code. Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-10extmod/modre: Use specific error message if regex is too complex.Jeff Epler
If the error reporting mode is at least "normal", report a failure due to a complex regex with a different message. Fixes issue #17150. Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-10py/dynruntime.mk: Enable single-precision float by default on armv6/7m.Damien George
Soft float now works on these ARM targets thanks to the parent commit. Signed-off-by: Damien George <damien@micropython.org>
2025-06-10tools/mpy_ld.py: Support R_ARM_ABS32 relocation in text.Damien George
Add support for R_ARM_ABS32 relocations in native .mpy files. These can be rewritten in the same way that data relocations are. Fixes issue #14430. Signed-off-by: Damien George <damien@micropython.org>
2025-06-10py/asmthumb: Implement long jumps on Thumb/armv6m architecture.Damien George
With this change, all tests (except thread tests) now pass on RPI_PICO when using the native emitter: (plug in RPI_PICO) $ cd tests $ ./run-tests.py -t a0 --via-mpy --emit native Signed-off-by: Damien George <damien@micropython.org>
2025-06-10py/asmxtensa: Extend BCC range to 18 bits.Alessandro Gatti
This commit lets the native emitter backend extends the range of the BCC family of opcodes (BALL, BANY, BBC, BBS, BEQ, BGE, BGEU, BLT, BLTU, BNALL, BNE, BNONE) from 8 bits to 18 bits. The test suite contains some test files that, when compiled into native code, would require BCC jumps outside the (signed) 8 bits range. In this case either the MicroPython interpreter or mpy-cross would raise an exception, not running the test when using the "--via-mpy --emit native" command line options with the test runner. This comes with a 3 bytes penalty on each forward jump, bringing the footprint of those jumps to 6 bytes each, as a longer opcode sequence has to be emitted to let jumps access a larger range. However, this is slightly offset by the fact that backward jumps can be emitted with a single opcode if the range is small enough (8-bits offset). Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10py/asmxtensa: Extend BCCZ range to 18 bits.Alessandro Gatti
This commit lets the native emitter backend extends the range of the BCCZ family of opcodes (BEQZ, BNEZ, BLTZ, BGEZ) from 12 bits to 18 bits. The test suite contains some test files that, when compiled into native code, would require BCCZ jumps outside the (signed) 12 bits range. In this case either the MicroPython interpreter or mpy-cross would raise an exception, not running the test when using the "--via-mpy --emit native" command line options with the test runner. This comes with a 3 bytes penalty on each forward jump, bringing the footprint of those jumps to 6 bytes each, as a longer opcode sequence has to be emitted to let jumps access a larger range. However, this is slightly offset by the fact that backward jumps can be emitted with a single opcode if the range is small enough (3 bytes for a 12-bits offset). Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10tools/ci.sh: Fix nanbox CI test runs.Alessandro Gatti
This commit fixes CI test runs for the `nanbox` target, which were broken by the unconditional native emitter code output changes in the test runner. The `nanbox` configuration does not enable native emitters of any kind, and with a full test run that includes executing emitted native code things would break when doing CI runs. This is worked around by introducing a common subset of tests that do not involve the native emitter, and a more comprehensive set of tests that include both non-emitter and emitter tests. The `nanbox` CI test run will stop at the first subset, whilst other configurations will run that and execute further tests. Function names have been kept the same for steps that involve native code, with the `nanbox` subset having another one. This should not trigger any breakage in existing CI configurations or external scripts. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10tests/run-tests.py: Unconditionally enable native tests if asked.Alessandro Gatti
This commit lets the test runner enumerate and run native tests if the feature check fails but native tests were explicitly requested from the command line. The old behaviour would disable native tests anyway if the feature check failed, however this hid a bug in the x86 native emitter that would be triggered even during the feature check. That meant the test suite would pass on x86 even with a broken emitter, as those tests would have been skipped anyway. Now, if the user asks for native code it will get native code out of the runner no matter what. Co-authored-by: Damien George <damien@micropython.org> Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10py/asmarm: Give a proper name to the temporary register.Alessandro Gatti
This commit performs a small refactoring on the Arm native emitter, by renaming all but one instance of ASM_ARM_REG_R8 into REG_TEMP. ASM_ARM_REG_R8 is the temporary register used by the emitter when operations cannot overwrite the value of a particular register and some extra storage is needed. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10py/asmarm: Extend int-indexed 32-bit load/store offset ranges.Alessandro Gatti
This commit extends the range for int-indexed load/store opcode generators, making them emit correct code sequences for offsets that span more than 12 bits. This is necessary due to those generator bits being also used in the Viper emitter, where it's more probable to reference offsets that can not be embedded in the LDR/STR opcodes. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10py/emitnative: Remove redundant RV32 Viper int-indexed code.Alessandro Gatti
This commit removes redundant RV32 implementations of certain int-indexed code generation operations (32-bit load/store and 16-bit load). Those operations were already available as part of the native emitter API but were not exposed to the Viper code generator. As part of the introduction of more specialised load and store API calls to int-indexed Viper load/store generator bits, the existing native emitter implementations are reused, thus making the Viper implementations redundant. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10py/asmxtensa: Extend existing specialised load/store operations range.Alessandro Gatti
This commit updates the existing specialised implementations for int-indexed 32-bit load and store operations, and adds a specialised implementation for int-indexed 16-bit load. The 32-bit operations relied on the fact that their applicability was limited to a specific range, falling back on a generic implementation otherwise. Introducing a single entry point for each int-indexed load/store operation size would break that assumption. Now those two operations contain fallback code to generate working code by themselves instead of raising an exception. The 16-bit operation instead simply did not have any range check, but it was not exposed directly to the Viper emitter. When a 16-bit int-indexed load entry point was introduced, the existing implementation would fail when accessing memory outside its 0..255 halfwords range. A specialised implementation is now present, performing fewer operations than the existing Viper emitter equivalent. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10py/asmthumb: Extend load/store generators with ARMv7-M opcodes.Alessandro Gatti
This commit lets the Thumb native code generator backend emit ARMv7-M specific opcodes for indexed load/store operations if possible. Now T3 opcode encodings are used if the generator backend is configured to allow emitting ARMv7-M opcodes and if the (unsigned) scaled index fits in 12 bits. Or, in other words, LDR{B,H}.W and STR{B,H}.W opcodes are now emitted if possible. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10py/emitnative: Let Viper int-indexed code use appropriate operands.Alessandro Gatti
This commit extends the generic ASM API by adding the rest of the ASM_{LOAD,STORE}[size]_REG_REG_OFFSET macros whenever applicable. The Viper int-indexed load/store code generator was changed to use those API functions if they are available, falling back to backend-specific implementations if possible and ultimately to a generic implementation. Right now all backends except for x64 implement load16, load32, and store32 operations (x64 only implements load16). Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-10lib/berkeley-db-1.xx: Update submodule to latest.Jeff Epler
Fixes a memory leak in the case lseek fails when creating the mpool. Signed-off-by: Jeff Epler <jepler@gmail.com>
2025-06-10extmod/modnetwork: Consolidate definition of common drivers.Andrew Leech
Most extmod network drivers were being defined on a per-port basis, duplicating code and making enabling a driver on a new port harder. This consolidates extmod driver declarations and removes the existing per-port definitions of them. This commit has been verified to be a no-op in terms of firmware change. Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
2025-06-10tools/boardgen.py: Ensure board pin locals_dict has consistent order.Andrew Leech
`tools/boardgen.py` is used by the `make-pins.py` scripts in many ports to generate the pin definitions for the machine module. In #17391 it was found that this is currently generating the C structs for board pin definitions with inconsistent ordering (across different build runs), which makes it sometimes impossible to get a consistent binary file even for no change in source files. This commit fixes that by sorting the board pin names alphabetically. Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
2025-06-10github/workflows: Split QEMU/Arm builds into separate entries.Alessandro Gatti
This commit takes the QEMU/Arm CI build and test step and splits it into three separate steps (bigendian, sabrelite, thumb), to allow them to run in parallel. Currently the QEMU/Arm CI build step would take up to 16 minutes, often being the last step blocking a full test run. With this commit, when the steps run in parallel the time it takes to complete the QEMU/Arm build and test procedure is cut in half - taking between 8 to 9 minutes depending on the CI runner load. The existing `ci_build_and_test_arm` function has been removed, in favour of having three separate functions - one per configuration. They are called `ci_build_and_test_arm_bigendian`, `ci_build_and_test_arm_sabrelite`, and `ci_build_and_test_arm_thumb`. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-06-05esp32: Update ADC driver update to the new esp_adc API.purewack
This commit updates the ADC to use the new driver `esp_adc/adc_oneshot.h`. There are several errata notes about not being able to change the bit-width of the ADCs certain chips. The only chip that can switch resolution to a lower one is the normal ESP32. ESP32 C2 and S3 are stuck at 12 bits, while S2 is at 13 bits. On the S2, you can change the resolution, but it has no effect on the resolution, rather, it prevents attenuation from working at all! The resolution is set to the maximum possible for each SoC, with the ESP32 being the only one not throwing errors when trying to set the bit-width to 9, 10, 11 or 12 bits using `ADC.width(bits)`. Signed-off-by: Damian Nowacki (purewack) bobimaster15@gmail.com