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2024-12-19rp2/boards/RPI_PICO2_W: Add RISCV variant for Pico 2 W.Peter Harper
Build with: make BOARD=RPI_PICO2_W BOARD_VARIANT=RISCV Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
2024-12-19rp2/boards/RPI_PICO2_W: Add new Pico 2 W board definition.Peter Harper
Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
2024-12-19rp2/mphalport: Add mp_hal_is_pin_reserved() function.Peter Harper
As cyw43 pins might be dynamic, add a function that returns if a pin is reserved. This is used by `MICROPY_HW_PIN_RESERVED` to prevent the pin IRQ from being reset across a soft-reset. Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
2024-12-19rp2/cyw43_configport: Define cyw43 pins.Peter Harper
The cyw43 pins used to be hardcoded and `CYW43_PIN_WL_HOST_WAKE` and `CYW43_PIN_WL_REG_ON` were in the `pico_w.h` board header. This has been changed so the board header just defines the "default version of the pins, e.g. `CYW43_DEFAULT_PIN_WL_HOST_WAKE`, `CYW43_DEFAULT_PIN_WL_REG_ON` etc. Set the pin values in `cyw43_configport.`h so `cyw43-driver` sees them and allow them to be changed at runtime (dynamic) if required. Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
2024-12-19rp2/CMakeLists.txt: Add components required by bootrom.h.Phil Howard
Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
2024-12-19rp2/modmachine: Fix USB sleep on RP2350 MCUs.Peter Harper
Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
2024-12-19lib/pico-sdk: Update to version 2.1.0.Peter Harper
Brings in support for Pico 2 W, among other things. Signed-off-by: Peter Harper <peter.harper@raspberrypi.com>
2024-12-19ports: Fix machine.RTC.init() method so argument order matches the docs.robert-hh
This commit makes the argument ordering of `machine.RTC.init()` the same for all the ports that implement arguments to this method: cc3200, esp32, mimxrt and samd. The cc3200 argument ordering is used, which matches the documentation. Also document the availability and the differing semantics for the stm32 and renesas-ra port. Signed-off-by: robert-hh <robert@hammelrath.com>
2024-12-19mimxrt/machine_rtc: Drop machine.RTC.now() method.robert-hh
This is not part of the common machine API. It's dropped on the mimxrt port and kept only on the cc3200 port for legacy. Also show the port availability of `RTC.now()` in the documentation. Signed-off-by: robert-hh <robert@hammelrath.com>
2024-12-19docs: Fix the quickref documentation of rtc.datetime().robert-hh
Such that it matches the implementation and the documentation of the `machine.RTC` class. Signed-off-by: robert-hh <robert@hammelrath.com>
2024-12-19tests/run-tests.py: Set name of injected test module to '__main__'.Damien George
Running unittest-based tests with --via-mpy is currently broken, because the unittest test needs the module to be named `__main__`, whereas it's actually called `__injected_test`. Fix this by changing the name when the file is opened. Signed-off-by: Damien George <damien@micropython.org>
2024-12-19stm32: Fix extraction of hse/hsi/pllm values from preprocessed source.Damien George
The expressions for the `micropy_hw_hse_value` etc variables may contain parenthesis, eg `micropy_hw_hse_value = ((25) * 1000000)`. To handle such a case, simplify the regex and always use `eval(found)` to evaluate the expression. Signed-off-by: Damien George <damien@micropython.org>
2024-12-18stm32: Generate PLL tables from pre-processed headers.Andrew Leech
Allows boards to configure their HSE and PLL values in variants. Signed-off-by: Andrew Leech <andrew@alelec.net>
2024-12-18stm32/boards/WEACT_F411_BLACKPILL: Add WeAct F411 'blackpill' boards.Andrew Leech
Adds board profile for the WeAct F411 'blackpill' which is a quite popular low cost ST dev board. This board also has optional spiflash so can be purchased in a few different configurations. Builds for v3.1 with no SPI Flash by default. Includes variants for different board versions and spi flash sizes. Signed-off-by: Andrew Leech <andrew@alelec.net>
2024-12-18ci: Add caching of ccache for Zephyr.Angus Gratton
Similar to the ESP32 builds, but needs additional step to pass the ccache directory through to the Zephyr container. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-18ci: Pull the Zephyr CI docker image from GitHub container reg.Angus Gratton
This image is 15GB so in theory this may be faster, although in testing the improvement is either non-existent or marginal. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-18ci: Cache Zephyr workspace installation.Angus Gratton
Can save several minutes downloading the Zephyr docker image and/or cloning repo from GitHub. Cache keyed on the Zephyr version, which AFAIK is the only determinant for the workspace contents. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-18tests/extmod: Add test for uctypes.addressof function.Damien George
Signed-off-by: Damien George <damien@micropython.org>
2024-12-18extmod/moductypes: Fix large return values of addressof and INT_MAYBE.Damien George
So they don't return a negative number for an address (prior to this fix they would return negative addresses for values that were larger than the maximum small-int value). Signed-off-by: Damien George <damien@micropython.org>
2024-12-18stm32/extint: Fix EXTI IRQ handlers for H5 MCUs.Damien George
The existing EXTI IRQ handlers are moved from `stm32_it.c` to `extint.c` to keep them with related code. A macro is defined to make it easier to define the handler function that handles one line, and correct handlers added for STM32H5xx MCUs. Also, to prevent errors in the future, `MP_STATIC_ASSERT(<irqn> > 0)` is added to each handler function to check that the correct `IRQn` constant is used, which corresponds to the handler function name. Signed-off-by: Damien George <damien@micropython.org>
2024-12-17stm32/pin: Exclude Pin.cpu/Pin.board if they contain no entries.Damien George
Signed-off-by: Damien George <damien@micropython.org>
2024-12-17tools/boardgen.py: Provide macro defns for number of cpu/board pins.Damien George
So a port can use them if needed to exclude the Pin.cpu/Pin.board objects. Signed-off-by: Damien George <damien@micropython.org>
2024-12-17stm32/pin: Add config option to exclude Pin alternate function.Damien George
Signed-off-by: Damien George <damien@micropython.org>
2024-12-17stm32/pin: Add option to exclude legacy Pin methods and constants.Damien George
This is enabled by default, but disabled when MICROPY_PREVIEW_VERSION_2 is enabled. The intention is that these methods and constants are deprecated in MicroPython 2.x. Signed-off-by: Damien George <damien@micropython.org>
2024-12-17qemu/mpconfigport: Enable VFS reader, loading .mpy files and io.IOBase.Damien George
This allows importing from the VFS, and enables the following 7 additional tests: builtin_execfile, io_iobase, json_dump_iobase, import_mpy_invalid, import_mpy_native, import_mpy_native_gc, vfs_userfs. Signed-off-by: Damien George <damien@micropython.org>
2024-12-16tools/ci.sh: Re-enable vfs_posix tests on unix qemu MIPS CI.Damien George
These work now that _FILE_OFFSET_BITS=64. Signed-off-by: Damien George <damien@micropython.org>
2024-12-16unix,windows: Force _FILE_OFFSET_BITS=64 to fix 32-bit file ABI.Damien George
On 64-bit systems this should have no effect. On 32-bit systems it will force 64-bit file sizes and fixes directory listing on certain 32-bit ports. This option should work on pretty much all 32-bit systems these days. Signed-off-by: Damien George <damien@micropython.org>
2024-12-16esp32: Enable machine.USBDevice to configure USB at runtime.Sebastian Romero
This adds support for `machine.USBDevice` to S2 and S3 boards. Signed-off-by: Sebastian Romero <s.romero@arduino.cc>
2024-12-11tests/extmod_hardware: Add a test for machine.PWM freq and duty.Damien George
This adds a hardware test for `machine.PWM`. It requires a jumper wire between two pins, uses `machine.PWM` to output on one of them, and `machine.time_pulse_us()` to time the PWM on the other pin (some boards test more than one pair of pins). It times both the high and low duty cycle (and hence the frequency) for a range of PWM frequencies and duty cycles (including full on and full off). Currently supported on: - esp32 (needs a minor hack for initialisation, and some tests still fail) - esp8266 (passes for frequencies 1kHz and less) - mimxrt / Teensy 4.0 (passes) - rp2 (passes) - samd21 (passes for frequencies 2kHz and less) Signed-off-by: Damien George <damien@micropython.org>
2024-12-11stm32/boards/STM32F429DISC: Fix SDRAM configuration.iabdalkader
Define SDRAM frequency and refresh cycles. This was missed in commit 17808e7b749b269b58dcee67df599a0c61d455bd. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2024-12-10esp32: Simplify thread cleanup.Angus Gratton
Now we only support the case of !CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP, can simplify the cleanup code. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-10esp32: Remove IDF-version-specific sdkconfig.Angus Gratton
This reverts commit 27279e69b4d74b255bd8d8c5dd6668c97c942776 (plus removes some additional references to the SDKCONFIG_IDF_VERSION_SPECIFIC CMake variable.) Relevant sdkconfig options are added into sdkconfig.base now that IDF >=5.2.0 is required. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-10esp32: Drop support for ESP-IDF below V5.2.0.Angus Gratton
Specifically, remove all conditional compilation for these earlier versions and change the idf_component.yml specifiers to require >=5.2.0. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-10esp32/mpconfigport: Use the appropriate wait-for-interrupt opcode.Alessandro Gatti
When threading is disabled, the pending events handling code would wait for an incoming interrupt once there's no more work to do. This bit of code was Xtensa-specific and wouldn't compile on a RISC-V based MCU. This commit provides the RISC-V equivalent to that part of the code, allowing to make threadless MicroPython builds on RISC-V based MCUs. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-12-10esp32: Use capability defines to configure features.Andrew Leech
This updates esp32 code where appropriate to replace ifdef's based on a list of specific chips with a feature SOC_* definition. This should simplify adding new esp32-* chips in future, deferring chip feature support to the IDF. Signed-off-by: Andrew Leech <andrew@alelec.net>
2024-12-10py/mkrules.mk: Use partial clone for submodules if available.Andrew Leech
MicroPython relies on a number of submodules for third party and chip vendor libraries. Users need to check these out before building their desired ports and Github Actions CI here needs to clone them all multiple times for every build. Many of these are getting significantly larger over time, slowing down usage and consuming more disk space. Newer versions of git have features to avoid pulling all historic / blob data which can have a significant impact of total data use. This commit uses a standard feature of git to do a partial clone, with automatic fallback to previous behavior on error. Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
2024-12-10mimxrt/machine_rtc: Deprecate RTC.cancel in MicroPython v2.Alessandro Gatti
The current documentation for the `machine.RTC` class contains information about the `RTC.cancel` method for cancelling pending alarms. However only two ports (cc3200 and mimxrt) implement this functionality but under a different name: `RTC.alarm_cancel`. The mimxrt port also implements `RTC.cancel` but it is aliased to `RTC.alarm_cancel` anyway. To maintain naming consistency, this commit updates the documentation to officially define `RTC.alarm_cancel` as the method to call to cancel pending alarms and deprecates mimxrt's `RTC.cancel` implementation. `RTC.cancel` in the mimxrt port is thus scheduled for removal in MicroPython v2. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-12-10extmod/modplatform: Distinguish RISC-V 64 from RISC-V 32.Alessandro Gatti
This commit lets the platform module report a more accurate architecture name when running on a RISC-V 64 bits platform. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-12-10py/emitglue: Fix clear cache builtin warning on Clang for AArch32.Alessandro Gatti
This commit fixes a warning occurring on Clang when calling `__builtin___clear_cache` with non-void pointers for its start and end memory area locations. The code now uses a char pointer for the end location, and it still builds without warnings on GCC. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-12-10shared/runtime/gchelper_generic: Fix AArch32 build on Clang.Alessandro Gatti
This commit fixes a compile error happening on Clang when building the generic gchelper code for AArch32. Clang would raise a warning regarding undefined variable access when aliasing a variable to an existing CPU register. The fix is pretty crude but it works - it simply disables the warning in question for the AArch32 gchelper collection function. Care was taken to make sure the code would also compile on GCC without warnings of sorts. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2024-12-10py/misc: Fix msvc and C++ compatibility.stijn
Use an explicit cast to suppress the implicit conversion which started popping up in recent compiler versions (and wasn't there yet in 07bf3179). Signed-off-by: stijn <stijn@ignitron.net>
2024-12-10rp2: Pass V=1 or BUILD_VERBOSE to rp2 build.Angus Gratton
Similar to esp32. Previously rp2 could build verbose by passing VERBOSE=1, which is picked up by Makefiles generated from CMake. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-10esp32: Pass V=1 or BUILD_VERBOSE through to idf.py when building.Angus Gratton
Allows verbose build to work the same on esp32 port as other ports. To minimise copy/paste, split the BUILD_VERBOSE section of mkenv.mk out to its own verbose.mk and include this in the port Makefile. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-10esp32: Fix machine_touchpad compiling on IDFv5.3.Daniƫl van de Giessen
Signed-off-by: Damien George <damien@micropython.org>
2024-12-10esp32: Add basic espressif IDF v5.3 compatibility.Andrew Leech
Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au> Signed-off-by: Damien George <damien@micropython.org>
2024-12-10esp32: Fix link failure due to link library order.Angus Gratton
When a wrapped symbol is provided in its own file, it's possible for the linker to skip that file entirely and not return to it depending on the order of libraries passed on the linker command line. This is because these wrapped symbols create linker cycles (libmain_espXX depends on liblwip but liblwip now also depends on libmain for the wrapped functions in lwip_patch.c, for example.) Linker failure for symbols in lwip_patch.c was reproducible if mDNS was disabled in the board configuration. This commit adds an explicit undefined symbol for each file, to ensure the linker will add the wrapped objects on its first pass. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
2024-12-10mimxrt/mpconfigport: Update FATFS config to align with other ports.iabdalkader
Make this port use the same FATFS config as stm32, rp2, renesas-ra. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2024-12-10renesas-ra/mpconfigport: Switch FATFS LFN to type 2.iabdalkader
LFN type 2 uses the stack to allocate the internal working buffer for LFN, which is thread-safe and saves about 512 bytes of BSS memory (at the expense of needing that much memory on the stack). Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2024-12-10rp2/mpconfigport: Switch FATFS LFN to type 2.iabdalkader
LFN type 2 uses the stack to allocate the internal working buffer for LFN, which is thread-safe and saves about 512 bytes of BSS memory (at the expense of needing that much memory on the stack). Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2024-12-10stm32/mpconfigport: Switch FATFS LFN to type 2.iabdalkader
LFN type 2 uses the stack to allocate the internal working buffer for LFN, which is thread-safe and saves about 512 bytes of BSS memory (at the expense of needing that much memory on the stack). Signed-off-by: iabdalkader <i.abdalkader@gmail.com>