| Age | Commit message (Collapse) | Author |
|---|
|
This commit simplifies native functions' prologue code by not emitting a
jump opcode that goes over the function's constants pool if the pool is
empty.
The original code assumed the constants pool is never empty as large
32-bits constants are commonly used, but for inline assembler functions
that may not be the case. This meant that inline assembler functions
may start with an unneeded jump (along with its alignment byte), using
four bytes more than necessary.
This commit is limited to the "xtensa" target, as "xtensawin" doesn't
support inline assembler functions yet, so native functions' constant
pools are almost always guaranteed to hold one or more values.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit expands the Xtensa inline assembler to support most if not
all opcodes available on the ESP8266 and LX3 Xtensa cores.
This is meant as a stepping stone to add inline assembler support for
the ESP32 and its LX6 core, along to windowed-specific opcodes and
additional opcodes that are present only on the LX7 core (ESP32-S3 and
later).
New opcodes being added are covered by tests, and the provided tests
were expanded to also include opcodes available in the existing
implementation. Given that the ESP8266 space requirements are tighter
than ESP32's, certain opcodes that won't be commonly used have been put
behind a define to save some space in the general use case.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit fixes compilation errors occurring when enabling the Xtensa
code dumper inside mpy-cross.
The original code was meant to dump the code from an Xtensa device
itself, but for debugging the inline assembler this functionality was
also needed off-line. The changes involve solving a signed/unsigned
mismatch that was not much of a problem for the 8266's gcc version but
made modern compilers complain, and using the printf formatter for
pointers when it comes to printing code addresses.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit removes old raw printf calls happening inside certain branch
opcode emitters, indicating the target label is out of range for the
opcode. They have been replaced with a RuntimeError being raised in
these cases, using a parameterised qstr instead.
Whilst this technically breaks runtime behaviour expectations, the
generated code would not have worked anyway so it's better to catch
those cases early. This should be updated to always emit long jumps
unless jumps are backwards and short enough, following the other ports,
but that's something coming later.
This is actually needed because there are test files that do not work
when processed through mpy-cross and entirely converted to native code.
The original implementation would still generate mostly-valid code that
was bound to crash on the device, whilst this change would prevent
invalid code to even be emitted in the first place.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
In both the machine.UART and esp32.quickref sections.
Signed-off-by: robert-hh <robert@hammelrath.com>
|
|
Since the are ESP32 variants with 1, 2 or 4 hardware timers.
Signed-off-by: robert-hh <robert@hammelrath.com>
|
|
By showing the argument and refer to epoch instead of a fixed date. The
note about epoch lists the ports using the POSIX epoch.
Signed-off-by: robert-hh <robert@hammelrath.com>
|
|
Add support for the boards:
- SparkFun SAMD21 Dev Breakout
- SparkFun RedBoard Turbo
Both boards are SAMD21 based and actively sold by SparkFun.
Signed-off-by: robert-hh <robert@hammelrath.com>
|
|
With a fallback to default sizes if `PICO_FLASH_SIZE_BYTES` is not defined.
Signed-off-by: Dryw Wade <dryw.wade@sparkfun.com>
|
|
Adding a QSPI memory chip on a STM32G4 does not work due to some small
issues, which are fixed in this commit:
- Rename QUADSPI1_xxx alt-func names to QUADSPI_xxx, to match the static
names used in `qspi.c`.
- Enable `mpu.h` macros on G4.
- Don't include I- and D-cache invalidation on G4.
Signed-off-by: Damien George <damien@micropython.org>
|
|
Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
|
|
- Enable support for FLASH and IEEE802154 subg radio
- Requires Zephyr v3.8.0
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
|
|
This reverts commit 62e0fa04a7a6f9044db1bb0f20ea7a2e00599921.
Reverting as the only linker wrap needed for nrf port was removed
in the parent commit.
This work was funded through GitHub Sponsors.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
|
|
Previously MicroPython ports would linker-wrap dcd_event_handler
in order to schedule the USB task callback to run when needed.
TinyUSB 0.16 added proper support for an event hook to do the
same thing without the hacky linker wrapping.
This work was funded through GitHub Sponsors.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
|
|
The existing test for `math.e` and `math.pi` constants can fail on certain
targets if the functions `math.exp()` and/or `math.cos()` are not accurate
enough (eg out by an LSB of float precision). For example this test
currently fails on PYBD_SF6 which uses double precision floats (and that's
due to the `lib/libm_dbl/exp.c` implementation not being exact).
This commit changes this constant test so that it tests the actual constant
value, not the evaluation of `exp()` and `cos()` functions.
Signed-off-by: Damien George <damien@micropython.org>
|
|
Add board definition files for SparkFun IoT RedBoard ESP32.
Signed-off-by: Malcolm McKellips <malcolm.mckellips@sparkfun.com>
|
|
Signed-off-by: Damien George <damien@micropython.org>
|
|
Changes are:
- Refactor the open-drain macros, add GPIO_ENABLE/DISABLE_OPEN_DRAIN, and
move them to `mphalport.h`.
- Only use `uint64_t` for the open-drain mask if there are more than 32
GPIOs (saves code size).
- Ensure we're shifting a `uint64_t` by using 1ULL constants.
Signed-off-by: Phil Howard <github@gadgetoid.com>
|
|
Replace custom macros with Pico SDK functions, enabling support for RP2350B
variant chips with > 32 GPIOs.
Fixes issue #17241.
Signed-off-by: Phil Howard <github@gadgetoid.com>
|
|
Prevents lightsleep being woken up every 64ms to service LWIP timers, when:
1. No netif is up, and
2. No TCP sockets are active
The TCP socket check may not be strictly necessary, but without ticking the
tcp timer they won't ever time out by themselves.
This work was funded through GitHub Sponsors.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
|
|
This is a breaking change due to the signature change of `enable_irq()`.
Previously the signature was:
machine.enable_irq()
Now the signature matches other ports, and the docs, and is:
machine.enable_irq(state)
Where `state` is the return value from `machine.disable_irq()`.
Signed-off-by: Damien George <damien@micropython.org>
|
|
To workaround issues with JLink CDC.
Signed-off-by: Damien George <damien@micropython.org>
|
|
Some MCUs cannot write more than 255 bytes to the UART at once. Eg writing
256 bytes gets truncated to 0, writing 257 gets truncated to 1, etc.
Signed-off-by: Damien George <damien@micropython.org>
|
|
This commit adds an `attached_to_repl` property to each UART, and makes
sure that property is correctly set/unset when the UART is attached to or
detached from the REPL.
That property is then used to make sure incoming characters on the UART are
only checked for the interrupt character if the UART is attached to the
REPL. Otherwise a board without REPL on UART can have its code interrupted
if ctrl-C is received on the UART.
Also, put incoming UART characters on to `stdin_ringbuf` instead of the
UARTs ring buffer (the former is much larger than the latter).
Signed-off-by: Damien George <damien@micropython.org>
|
|
On nRF52, the physical SRAM is mapped to 0x20000000 for data access and
0x00800000 for instruction access. So, while native code is allocated and
written using addresses in the 0x20000000 range, it must execute from the
0x00800000 range.
This commit makes this work correctly on nRF52 MCUs by adjusting the
address.
Signed-off-by: Damien George <damien@micropython.org>
|
|
Allows both MICROPY_PERSISTENT_CODE_TRACK_FUN_DATA and MP_PLAT_COMMIT_EXEC
to be enabled at the same time.
Signed-off-by: Damien George <damien@micropython.org>
|
|
This commit performs some minor clean up for the code involved in Viper
load/store operations when said operations have an integer index.
Most platform-specific code blocks were able to generate correct opcodes
even when the index is 0, but they would still fall back to the general
case. The general case would still emit a shortened opcode sequence so
this commit does not alter the overall behaviour, but makes it easier to
extend platform-specific code whenever the full index range is going to
be handled rather than a subset of indices as it is now.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit lets the Thumb native emitter generate a proper opcode
sequence when calculating an indexed register offset for load/store
operations with said offset beight both greater than 65535 and not
able to be represented as a shifted 8-bit bitmask.
The original code would assume the scaled index would always fit in 16
bits and silently discard upper bits of the offset. Now an optimised
constant loading sequence is emitted instead, and the final offset is
also stored in the correct register in all cases.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit adds a series of test cases to exercise the Viper code
generator load/store emitting capabilities on certain boundary
conditions.
The new test cases check whether the emitted load/store code performs
correctly when dealing with specific memory offsets, which trigger
specific code generation sequences on different architectures.
Right now the cases are for unsigned offsets whose bitmasks span up to
5, 8, and 12 bits (respectively Arm/Thumb, Xtensa, RV32).
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit removes the ASM_LOAD_REG_REG and ASM_STORE_REG_REG generic
ASM API opcodes from all backends, as they are not used anymore in the
native emitter framework.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit cleans up the Viper code generation blocks for
register-indexed load and store operations.
An attempt is made to simplify the code in the common code generator
code block, by moving architecture-specific code to the appropriate
native generation backends whenever possible. This should make that
specific bit of code in the Viper generator clearer and easier to
maintain in the long term.
To achieve this, six generic assembler meta-opcodes have been
introduced, named `ASM_{LOAD,STORE}{8,16,32}_REG_REG_REG`. A
platform-independent implementation for those operations is provided, so
backends that cannot emit a shorter sequence for the requested operation
or are fine with the platform-independent implementation can just not
provide said meta-opcodes.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit lets the Viper code generator use optimised code sequence
for register-indexed load and store operations when generating Thumb
code.
Register-indexed load and store operations for Thumb now can take at
most two machine opcodes for halfword and word values, and just a single
machine opcode for byte values. The original implementation could
generate up to four opcodes in the worst case (dealing with word
values).
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
This commit lets the Viper code generator use optimised code sequences
for register-indexed load and store operations when generating Arm code.
The existing code defaulted to generic multi-operations code sequences
for Arm code on most cases. Now optimised implementations are provided
for register-indexed loads and stores of all data sizes, taking at most
two machine opcodes for each operation.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
esp32 port will disconnect if active(0) is called on a STA
interface, but rp2 port stays associated without this change.
This work was funded through GitHub Sponsors.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
|
|
This commit makes the JSON parser raise an exception when handling
objects or arrays whose declaration is incomplete, as in missing the
closing marker (brace or bracket) and if the missing marker would have
been the last non-whitespace character in the incoming string.
Since CPython's JSON parser would raise an exception in such a case,
unlike MicroPython's, this commit aligns MicroPython's behaviour with
CPython.
This commit fixes issue #17141.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
|
|
The output `_result.json` file generated by `run-tests.py` currently
contains a list of failed tests. This commit adds to the output a list of
passed and skipped tests, and so now provides full information about which
tests were run and what their results were.
Signed-off-by: Damien George <damien@micropython.org>
|
|
Signed-off-by: Jos Verlinde <Jos_Verlinde@hotmail.com>
|
|
Signed-off-by: Jos Verlinde <jos_verlinde@hotmail.com>
|
|
Add `mpremote fs tree` command to show a tree of the device's files. It:
- Shows a treeview from current path or specified path.
- Uses the graph chars ("├── ", "└── ") (not configurable).
- Has the options:
-v/--verbose adds the serial device name to the top of the tree
-s/--size add a size to the files
-h/--human add a human readable size to the files
Signed-off-by: Jos Verlinde <jos_verlinde@hotmail.com>
|
|
Support the new PHY_GENERIC device type, added in ESP-IDF v5.4.0 [1].
This PHY driver was added to ESP-IDF to support "generic"/oddball PHY
LAN chips like the JL1101, which offer no features beyond the bare
802.3 PHY standard and don't actually need a chip-specific driver (see
discussion at [2]).
[1] https://github.com/espressif/esp-idf/commit/0738314308ad36a73601ddb8bb82f1dcbfe1f550
[2] https://github.com/espressif/esp-eth-drivers/pull/28
Signed-off-by: Elvis Pfutzenreuter <epxx@epxx.co>
|
|
The default I2C init does not require setting SCL or SDA but the default
I2C0 pins for C3, S3 conflict with the espressif GPIO usage.
For the C3, pins 18/19 are for USB/JTAG. If used for I2C() they will cause
the REPL to hang on initialization of the I2C.
For the S3 pin 19 is allocated for USB/JTAG also but the defaults do not
seem to affect the REPL.
See related #16956.
Fixes issue #17103.
Signed-off-by: Rick Sorensen <rick.sorensen@gmail.com>
Signed-off-by: Angus Gratton <angus@redyak.com.au>
|
|
This adds a new function, `esp32.idf_task_info()`, that can be used to
retrieve task statistics which is useful for diagnosing issues where some
tasks are using up a lot of CPU time.
It's best used in conjunction with the `utop` module from micropython-lib.
Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>
|
|
This adds support for LAN8670 to the esp32 port. Enabled conditionally for
the esp32 target, if ESP-IDF version is new enough (v5.3 or newer).
Fixes issue #15731.
Signed-off-by: Damien George <damien@micropython.org>
Signed-off-by: Angus Gratton <angus@redyak.com.au>
|
|
This version of the IDF uses about 1KB more IRAM and 1KB more DRAM on most
boards, but 6.5KB more DRAM usage on the S3. It seems that's due to a lot
of small increases in many components.
Signed-off-by: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
|
|
Python threads (created via the `_thread` module) are backed by a FreeRTOS
task. Managing the deletion of the task can be tricky, and there are
currently some bugs with this in the esp32 port.
The actual crash seen was in FreeRTOS' `uxListRemove()`, and that's because
of two calls to `vTaskDelete()` for the same task: one in
`freertos_entry()` when the task ran to completion, and the other in
`mp_thread_deinit()`. The latter tried to delete the task a second time
because it was still in the linked list, because `vTaskPreDeletionHook()`
had not yet been called. And the reason `vTaskPreDeletionHook()` was yet
to be called is because the FreeRTOS idle task was starved.
This commit fixes that.
There are three things done by this commit:
- remove the `vTaskPreDeletionHook`, it's not needed anymore because task
stack memory is allocated by the IDF, not on the MicroPython heap
- when a task finishes it now removes itself from the linked list, just
before it deletes itself
- on soft reset, all tasks are deleted and removed from the linked list in
one swoop (while the mutex is held)
Signed-off-by: Damien George <damien@micropython.org>
|
|
Signed-off-by: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
|
|
Signed-off-by: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
|
|
This reduce inconsistencies between esp32 PWM and other ports:
1. duty_u16() high value is 2**16-1 == 65535
2. Invert PWM wave with invert=1 parameter
3. Enable PWM in light sleep mode
4. Allow PWM output and read pulse input simultaneously on the same Pin()
5. Code refactoring
Co-Authored-By: Angus Gratton <angus@redyak.com.au>
Co-Authored-By: robert-hh <robert@hammelrath.com>
Co-Authored-By: Andrew Leech <andrew.leech@planetinnovation.com.au>
Co-Authored-By: Yoann Darche <yoannd@hotmail.com>
Signed-off-by: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
|
|
This reduces inconsitencies between esp32 and other ports.
According to the discussion in #10817.
Signed-off-by: Ihor Nehrutsa <Ihor.Nehrutsa@gmail.com>
|
|
Previously, the navigation ended up messy when the (long) description of
the item became used as a 2nd level header, meaning that it was placed in
the navigation. Check for this when generating cpydiff so that new cases
don't sneak in unnoticed.
Signed-off-by: Jeff Epler <jepler@gmail.com>
|
