From b9523fd58c02dba74239015bf6b2a1983342a06b Mon Sep 17 00:00:00 2001 From: Chris Webb Date: Mon, 25 Aug 2025 15:29:40 +0100 Subject: docs: Document the cross-port Timer hard= option. Update the main machine.Timer specification, and any references to hard/soft interrupts in port-specific documentation. There is a separate copy of the machine.Timer documentation for the pyboard, so update that too to keep everything consistent. Signed-off-by: Chris Webb --- docs/esp32/quickref.rst | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'docs/esp32') diff --git a/docs/esp32/quickref.rst b/docs/esp32/quickref.rst index 2c667a0f0..25e52ec32 100644 --- a/docs/esp32/quickref.rst +++ b/docs/esp32/quickref.rst @@ -287,6 +287,10 @@ with a timer ID of 0, 0 and 1, or from 0 to 3 (inclusive):: The period is in milliseconds. When using UART.IRQ_RXIDLE, timer 0 is needed for the IRQ_RXIDLE mechanism and must not be used otherwise. +Timer callbacks are scheduled as soft interrupts on this port; hard +callbacks are not implemented. Specifying ``hard=True`` will raise +a ValueError. + Virtual timers are not currently supported on this port. .. _Pins_and_GPIO: -- cgit v1.2.3