diff options
| author | Greg Ungerer <gerg@snapgear.com> | 2003-05-25 03:32:59 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@home.transmeta.com> | 2003-05-25 03:32:59 -0700 |
| commit | 21e1374fbd64cc031385aa9eff27b9b74fa9e55f (patch) | |
| tree | 2adc89fa8cb71ea63833f2f2525952236975cdc3 | |
| parent | 81c830a4896279033ee98b8b741b6a72ae737053 (diff) | |
[PATCH] fix cache settings for m68knommu 5407 CLEOPATRA target
Correct the wrong cache setup used on the CLEOPATRA 5407 based board.
Specifically it enables precise exception mode and write buffering.
Original patch from Alessendra Rubini.
| -rw-r--r-- | arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S b/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S index 18ed9b2ad8ec..c28be59a53b2 100644 --- a/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S +++ b/arch/m68knommu/platform/5407/CLEOPATRA/crt0_ram.S @@ -118,8 +118,8 @@ _start: move.l #(0x00<<ACR_BASE_POS)+(0<<ACR_MASK_POS)+ACR_ENABLE+ACR_ANY+ACR_CM_CP,%d0 movec %d0,%ACR3 - /* Enable cache */ - move.l #0x86088400, %d0 + /* Enable cache */ + move.l #0xa4098400, %d0 /* Write buffer, dflt precise */ movec %d0,%CACR nop |