diff options
| author | Deepak Saxena <dsaxena@net.rmk.(none)> | 2004-11-18 22:55:44 +0000 |
|---|---|---|
| committer | Russell King <rmk@flint.arm.linux.org.uk> | 2004-11-18 22:55:44 +0000 |
| commit | 3f19bb6da4fc6dea8168e1c0338bc95bf588c2fb (patch) | |
| tree | 8b60481d614ddb58eddd2e314bd5ea68e09257c4 | |
| parent | 742420392ef7fd6c29e289f38e88cda309087a37 (diff) | |
[ARM PATCH] 2253/1: Fix IXP4xx PCI config cycle routines
Patch from Deepak Saxena
The IXP4xx PCI config cycle routines currently virtualize accesses
to device 0:0 to map to the host bridge itself. This is technically
incorrect b/c on certain boards we have an actual device wired to 0:0
and the existing code will not see these.
Signed-off-by: Deepak Saxena
Signed-off-by: Russell King
| -rw-r--r-- | arch/arm/mach-ixp4xx/common-pci.c | 30 |
1 files changed, 6 insertions, 24 deletions
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 03d85a8dab88..2c7067f27e38 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -238,9 +238,10 @@ static u32 byte_lane_enable_bits(u32 n, int size) return 0xffffffff; } -static int read_config(u8 bus_num, u16 devfn, int where, int size, u32 *value) +static int ixp4xx_pci_read_config(struct pci_bus *bus, u16 devfn, int where, int size, u32 *value) { u32 n, byte_enables, addr, data; + u8 bus_num = bus->number; pr_debug("read_config from %d size %d dev %d:%d:%d\n", where, size, bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn)); @@ -260,9 +261,10 @@ static int read_config(u8 bus_num, u16 devfn, int where, int size, u32 *value) return PCIBIOS_SUCCESSFUL; } -static int write_config(u8 bus_num, u16 devfn, int where, int size, u32 value) +static int ixp4xx_pci_write_config(struct pci_bus *bus, u16 devfn, int where, int size, u32 value) { u32 n, byte_enables, addr, data; + u8 bus_num = bus->number; pr_debug("write_config_byte %#x to %d size %d dev %d:%d:%d\n", value, where, size, bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn)); @@ -280,31 +282,11 @@ static int write_config(u8 bus_num, u16 devfn, int where, int size, u32 value) return PCIBIOS_SUCCESSFUL; } -/* - * Generalized PCI config access functions. - */ -static int ixp4xx_read_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *value) -{ - if (bus->number && !PCI_SLOT(devfn)) - return local_read_config(where, size, value); - return read_config(bus->number, devfn, where, size, value); -} - -static int ixp4xx_write_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 value) -{ - if (bus->number && !PCI_SLOT(devfn)) - return local_write_config(where, size, value); - return write_config(bus->number, devfn, where, size, value); -} - struct pci_ops ixp4xx_ops = { - .read = ixp4xx_read_config, - .write = ixp4xx_write_config, + .read = ixp4xx_pci_read_config, + .write = ixp4xx_pci_write_config, }; - /* * PCI abort handler */ |