summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRobert Jarzmik <robert.jarzmik@free.fr>2018-06-25 18:44:01 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-11-20 18:45:47 +0100
commit72e13203c56dfaf3a4f00a59f7c6da4ac2fa5b09 (patch)
tree5819227763f38e81bd1287f0868cd90dd84efcbe
parentfe9048c7bb38822aebb4cbefaa9c17833194a1a0 (diff)
ARM: dts: pxa: fix the rtc controller
[ Upstream commit 24a610eba32a80ed778ea79680b600c3fe73d7de ] The RTC controller is fed by an external fixed 32kHz clock. Yet the driver wants to acquire this clock, even though it doesn't make any use of it, ie. doesn't get the rate to make calculation. Therefore, use the exported 32.768kHz clock in the PXA clock tree to make the driver happy and working. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r--arch/arm/boot/dts/pxa25x.dtsi4
-rw-r--r--arch/arm/boot/dts/pxa27x.dtsi4
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi
index 95d59be97213..8494b5787170 100644
--- a/arch/arm/boot/dts/pxa25x.dtsi
+++ b/arch/arm/boot/dts/pxa25x.dtsi
@@ -80,6 +80,10 @@
#pwm-cells = <1>;
clocks = <&clks CLK_PWM1>;
};
+
+ rtc@40900000 {
+ clocks = <&clks CLK_OSC32k768>;
+ };
};
timer@40a00000 {
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 747f750f675d..2ab6986433c8 100644
--- a/arch/arm/boot/dts/pxa27x.dtsi
+++ b/arch/arm/boot/dts/pxa27x.dtsi
@@ -113,6 +113,10 @@
status = "disabled";
};
+
+ rtc@40900000 {
+ clocks = <&clks CLK_OSC32k768>;
+ };
};
clocks {