diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2014-06-26 23:55:41 +0800 |
|---|---|---|
| committer | Luis Henriques <luis.henriques@canonical.com> | 2015-03-03 14:30:52 +0000 |
| commit | 7bba27e9ca4789ffe5e66e8f019a8443acbed3ac (patch) | |
| tree | a7004532fde5767ba4fae7cd119a4e6e3b4c6210 | |
| parent | 3aa1e327028e3b510a5c166df593f8637b25abe4 (diff) | |
clk: sunxi: Support factor clocks with N factor starting not from 0
commit 9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1 upstream.
The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a
N multiplier factor that starts from 1, not 0.
This patch adds an option to the factor clk driver's config data
structures to specify the base value of N.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
| -rw-r--r-- | drivers/clk/sunxi/clk-factors.c | 2 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk-factors.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c index 3806d97e529b..2057c8ac648f 100644 --- a/drivers/clk/sunxi/clk-factors.c +++ b/drivers/clk/sunxi/clk-factors.c @@ -62,7 +62,7 @@ static unsigned long clk_factors_recalc_rate(struct clk_hw *hw, p = FACTOR_GET(config->pshift, config->pwidth, reg); /* Calculate the rate */ - rate = (parent_rate * n * (k + 1) >> p) / (m + 1); + rate = (parent_rate * (n + config->n_start) * (k + 1) >> p) / (m + 1); return rate; } diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h index 02e1a43ebac7..d2d0efa39379 100644 --- a/drivers/clk/sunxi/clk-factors.h +++ b/drivers/clk/sunxi/clk-factors.h @@ -15,6 +15,7 @@ struct clk_factors_config { u8 mwidth; u8 pshift; u8 pwidth; + u8 n_start; }; struct clk_factors { |