diff options
| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2025-09-16 21:35:03 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2025-09-17 18:21:10 -0700 |
| commit | a295b33b0faf43cd0d076f7e86ea90a777f6796e (patch) | |
| tree | 2e7e9ed4c70e2f810c2da9b000bd7f4e8088d135 | |
| parent | 30cf6a875e2986ff137feaf2a25620b01ad412ab (diff) | |
net: dsa: mv88e6xxx: remove unused 88E6165 register definitions
Remove the unused 88E6165 register definitions. For the port
registers, add a comment describing that each arrival and departure
offset is for a set of four registers that correspond with status,
two timestamp registers and the PTP sequence ID captured from the
packet.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/ptp.h | 45 |
1 files changed, 3 insertions, 42 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/ptp.h b/drivers/net/dsa/mv88e6xxx/ptp.h index a8dc34f1f8bf..529ac5d0907b 100644 --- a/drivers/net/dsa/mv88e6xxx/ptp.h +++ b/drivers/net/dsa/mv88e6xxx/ptp.h @@ -45,61 +45,22 @@ #define MV88E6352_TAI_TIME_HI 0x0f /* 6165 Global Control Registers */ -/* Offset 0x01: Message ID */ -#define MV88E6XXX_PTP_GC_MESSAGE_ID 0x01 - -/* Offset 0x02: Time Stamp Arrive Time */ -#define MV88E6XXX_PTP_GC_TS_ARR_PTR 0x02 - -/* Offset 0x03: Port Arrival Interrupt Enable */ -#define MV88E6XXX_PTP_GC_PORT_ARR_INT_EN 0x03 - -/* Offset 0x04: Port Departure Interrupt Enable */ -#define MV88E6XXX_PTP_GC_PORT_DEP_INT_EN 0x04 - -/* Offset 0x05: Configuration */ -#define MV88E6XXX_PTP_GC_CONFIG 0x05 -#define MV88E6XXX_PTP_GC_CONFIG_DIS_OVERWRITE BIT(1) -#define MV88E6XXX_PTP_GC_CONFIG_DIS_TS BIT(0) - -/* Offset 0x8: Interrupt Status */ -#define MV88E6XXX_PTP_GC_INT_STATUS 0x08 - /* Offset 0x9/0xa: Global Time */ #define MV88E6165_PTP_GC_TIME_LO 0x09 #define MV88E6165_PTP_GC_TIME_HI 0x0A -/* 6165 Per Port Registers */ +/* 6165 Per Port Registers. The arrival and departure registers are a + * common block consisting of status, two time registers and the sequence ID + */ /* Offset 0: Arrival Time 0 Status */ #define MV88E6165_PORT_PTP_ARR0_STS 0x00 -/* Offset 0x01/0x02: PTP Arrival 0 Time */ -#define MV88E6165_PORT_PTP_ARR0_TIME_LO 0x01 -#define MV88E6165_PORT_PTP_ARR0_TIME_HI 0x02 - -/* Offset 0x03: PTP Arrival 0 Sequence ID */ -#define MV88E6165_PORT_PTP_ARR0_SEQID 0x03 - /* Offset 0x04: PTP Arrival 1 Status */ #define MV88E6165_PORT_PTP_ARR1_STS 0x04 -/* Offset 0x05/0x6E: PTP Arrival 1 Time */ -#define MV88E6165_PORT_PTP_ARR1_TIME_LO 0x05 -#define MV88E6165_PORT_PTP_ARR1_TIME_HI 0x06 - -/* Offset 0x07: PTP Arrival 1 Sequence ID */ -#define MV88E6165_PORT_PTP_ARR1_SEQID 0x07 - /* Offset 0x08: PTP Departure Status */ #define MV88E6165_PORT_PTP_DEP_STS 0x08 -/* Offset 0x09/0x0a: PTP Deperture Time */ -#define MV88E6165_PORT_PTP_DEP_TIME_LO 0x09 -#define MV88E6165_PORT_PTP_DEP_TIME_HI 0x0a - -/* Offset 0x0b: PTP Departure Sequence ID */ -#define MV88E6165_PORT_PTP_DEP_SEQID 0x0b - /* Offset 0x0d: Port Status */ #define MV88E6164_PORT_STATUS 0x0d |