diff options
| author | Deepak Saxena <dsaxena@plexity.net> | 2004-08-08 22:17:45 -0700 |
|---|---|---|
| committer | Deepak Saxena <dsaxena@plexity.net> | 2004-08-08 22:17:45 -0700 |
| commit | aa25be38a5f8eb22ed7da8fd084c91babb8d7137 (patch) | |
| tree | 9079e42ac1dcfb31c9d241957b96477f814c47e7 | |
| parent | dbfa9ae5cd70a67d45b1f57be9b2d9b8568fae10 (diff) | |
[ARM] Add IXP2000 support to arch/arm/kernel
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
| -rw-r--r-- | arch/arm/kernel/debug.S | 30 | ||||
| -rw-r--r-- | arch/arm/kernel/entry-armv.S | 57 |
2 files changed, 87 insertions, 0 deletions
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index 822dbde5af8c..f027290155bd 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -464,6 +464,36 @@ .macro busyuart,rd,rx .endm +#elif defined(CONFIG_ARCH_IXP2000) + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0xc0000000 @ Physical base + movne \rx, #0xfe000000 @ virtual base + orrne \rx, \rx, #0x00f00000 + orr \rx, \rx, #0x00030000 +#ifdef __ARMEB__ + orr \rx, \rx, #0x00000003 +#endif + .endm + + .macro senduart,rd,rx + strb \rd, [\rx] + .endm + + .macro busyuart,rd,rx +1002: ldrb \rd, [\rx, #0x14] + tst \rd, #0x20 + beq 1002b + .endm + + .macro waituart,rd,rx + nop + nop + nop + .endm + #elif defined(CONFIG_ARCH_OMAP) .macro addruart,rx diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 7fe5c2d39efd..65251d5ff9f7 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -645,6 +645,60 @@ ENTRY(soft_irq_mask) .macro irq_prio_table .endm +#elif defined(CONFIG_ARCH_IXP2000) + + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + mov \irqnr, #0x0 @clear out irqnr as default + mov \base, #0xfe000000 + orr \base, \base, #0x00ff0000 + orr \base, \base, #0x0000a000 + orr \base, \base, #0x08 + ldr \irqstat, [\base] @ get interrupts + mov \tmp, #IXP2000_VALID_IRQ_MASK & 0xff000000 + orr \tmp, \tmp, #IXP2000_VALID_IRQ_MASK & 0x00ff0000 + orr \tmp, \tmp, #IXP2000_VALID_IRQ_MASK & 0x0000ff00 + orr \tmp, \tmp, #IXP2000_VALID_IRQ_MASK & 0x000000ff + and \irqstat, \irqstat, \tmp + + cmp \irqstat, #0 + beq 1001f + + clz \irqnr, \irqstat + mov \base, #31 + subs \irqnr, \base, \irqnr + + /* + * We handle PCIA and PCIB here so we don't have an + * extra layer of code just to check these two bits. + */ + cmp \irqnr, #IRQ_IXP2000_PCI + bne 1001f + + mov \base, #0xfe000000 + orr \base, \base, #0x00fd0000 + orr \base, \base, #0x0000e100 + orr \base, \base, #0x00000058 + ldr \irqstat, [\base] + + mov \tmp, #(1<<26) + tst \irqstat, \tmp + movne \irqnr, #IRQ_IXP2000_PCIA + bne 1001f + + mov \tmp, #(1<<27) + tst \irqstat, \tmp + movne \irqnr, #IRQ_IXP2000_PCIB + +1001: + .endm + + .macro irq_prio_table + .endm + #elif defined (CONFIG_ARCH_IXP4XX) .macro disable_fiq @@ -1520,6 +1574,9 @@ ENTRY(__trap_init) str r3, [r2], #4 cmp r0, r1 blt 1b +#ifdef CONFIG_BDI2000_XSCALE + bkpt 1 +#endif LOADREGS(fd, sp!, {r4 - r6, pc}) .data |