diff options
| author | Andrew Morton <akpm@osdl.org> | 2004-01-18 18:49:06 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@home.osdl.org> | 2004-01-18 18:49:06 -0800 |
| commit | b0c782a616bca09dc7b8948c55bade4d2677d0c1 (patch) | |
| tree | 72c59bf146ba0edb116176253f4fd88007160500 | |
| parent | 2b889c528a75f9352a2d9ec3eff34fd26eec71e5 (diff) | |
[PATCH] sn: Forget to check in the _reg file
From: Pat Gefre <pfg@sgi.com>
Forget to check in the _reg file
| -rw-r--r-- | arch/ia64/sn/io/sn2/pcibr/pcibr_reg.c | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/ia64/sn/io/sn2/pcibr/pcibr_reg.c b/arch/ia64/sn/io/sn2/pcibr/pcibr_reg.c new file mode 100644 index 000000000000..0a95fcfbe973 --- /dev/null +++ b/arch/ia64/sn/io/sn2/pcibr/pcibr_reg.c @@ -0,0 +1,70 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003 Silicon Graphics, Inc. All rights reserved. + */ + + +#include <linux/types.h> +#include <asm/sn/sgi.h> +#include <asm/sn/iograph.h> +#include <asm/sn/addrs.h> +#include <asm/sn/pci/pcibr.h> +#include <asm/sn/pci/pcibr_private.h> +#include <asm/sn/pci/pci_defs.h> + +#define IS_IOADDR(ptr) (!(((uint64_t)(ptr) & CAC_BASE) == CAC_BASE)) + +void +pcireg_intr_enable_bit_clr(void *ptr, uint64_t bits) +{ + pic_t *bridge; + + if ( IS_IOADDR(ptr) ) + bridge = (pic_t *)ptr; + else + bridge = (pic_t *)((pcibr_soft_t)(ptr))->bs_base; + bridge->p_int_enable &= ~bits; +} + +void +pcireg_intr_enable_bit_set(void *ptr, uint64_t bits) +{ + pic_t *bridge; + + if ( IS_IOADDR(ptr) ) + bridge = (pic_t *)ptr; + else + bridge = (pic_t *)((pcibr_soft_t)(ptr))->bs_base; + bridge->p_int_enable |= bits; +} + +void +pcireg_intr_addr_addr_set(void *ptr, int int_n, uint64_t addr) +{ + pic_t *bridge; + + if ( IS_IOADDR(ptr) ) + bridge = (pic_t *)ptr; + else + bridge = (pic_t *)((pcibr_soft_t)(ptr))->bs_base; + bridge->p_int_addr[int_n] &= ~(0x0000FFFFFFFFFFFF); + bridge->p_int_addr[int_n] |= (addr & 0x0000FFFFFFFFFFFF); +} + +/* + * Force Interrupt Register Access -- Write Only 0000_01C0 - 0000_01F8 + */ +void +pcireg_force_intr_set(void *ptr, int int_n) +{ + pic_t *bridge; + + if ( IS_IOADDR(ptr) ) + bridge = (pic_t *)ptr; + else + bridge = (pic_t *)((pcibr_soft_t)(ptr))->bs_base; + bridge->p_force_pin[int_n] = 1; +} |
