kbuild: Speed up new "make clean/mrproper"

Do as little as possible apart from calling sub-makes and calling 'rm',
which makes things go quite a bit faster.

3 files changed, 49 insertions, 2 deletions

diff --git a/Makefile b/Makefile
index 388e62bb287b..06c5c12b104d 100644
--- a/Makefile
+++ b/Makefile
@@ -142,7 +142,7 @@ NM		= $(CROSS_COMPILE)nm
 STRIP		= $(CROSS_COMPILE)strip
 OBJCOPY		= $(CROSS_COMPILE)objcopy
 OBJDUMP		= $(CROSS_COMPILE)objdump
-MAKEFILES	= .config
+#MAKEFILES	= .config
 GENKSYMS	= /sbin/genksyms
 DEPMOD		= /sbin/depmod
 KALLSYMS	= /sbin/kallsyms
@@ -698,7 +698,7 @@ MRPROPER_DIRS += \
 clean-dirs += $(ALL_SUBDIRS) Documentation/DocBook scripts
 
 $(addprefix _clean_,$(clean-dirs)):
-	+@$(call descend,$(patsubst _clean_%,%,$@), subdirclean)
+	$(MAKE) -rR -f scripts/Makefile.clean obj=$(patsubst _clean_%,%,$@)
 
 quiet_cmd_rmclean = RM  $$(CLEAN_FILES)
 cmd_rmclean	  = rm -f $(CLEAN_FILES)
diff --git a/Rules.make b/Rules.make
index 56e62f97f333..577f2c9ee83a 100644
--- a/Rules.make
+++ b/Rules.make
@@ -1,3 +1,6 @@
+
+ifndef no-rules.make
+
 #
 # This file contains rules which are shared between multiple Makefiles.
 #
@@ -623,3 +626,5 @@ ifeq ($(KBUILD_VERBOSE),1)
 descend = echo '$(MAKE) -f $(1)/Makefile $(2)';
 endif
 descend += $(MAKE) -f $(1)/Makefile obj=$(1) $(2)
+
+endif
diff --git a/scripts/Makefile.clean b/scripts/Makefile.clean
new file mode 100644
index 000000000000..fa809a7e88ad
--- /dev/null
+++ b/scripts/Makefile.clean
@@ -0,0 +1,42 @@
+
+src := $(obj)
+
+no-rules.make := 1
+
+.PHONY: __clean
+__clean:
+
+include $(obj)/Makefile
+
+__subdir-y	:= $(patsubst %/,%,$(filter %/, $(obj-y)))
+subdir-y	+= $(__subdir-y)
+__subdir-m	:= $(patsubst %/,%,$(filter %/, $(obj-m)))
+subdir-m	+= $(__subdir-m)
+__subdir-n	:= $(patsubst %/,%,$(filter %/, $(obj-n)))
+subdir-n	+= $(__subdir-n)
+__subdir-	:= $(patsubst %/,%,$(filter %/, $(obj-)))
+subdir-		+= $(__subdir-)
+
+subdir-ym	:= $(sort $(subdir-y) $(subdir-m))
+subdir-ymn      := $(sort $(subdir-ym) $(subdir-n) $(subdir-))
+
+EXTRA_TARGETS	:= $(addprefix $(obj)/,$(EXTRA_TARGETS))
+clean-files	:= $(addprefix $(obj)/,$(clean-files))
+host-progs	:= $(addprefix $(obj)/,$(host-progs))
+subdir-ymn	:= $(addprefix $(obj)/,$(subdir-ymn))
+
+__clean-files := $(wildcard $(EXTRA_TARGETS) $(host-progs) $(clean-files))
+
+__clean: $(subdir-ymn)
+ifneq ($(strip $(__clean-files) $(clean-rule)),)
+	rm -f $(__clean-files)
+	$(clean-rule)
+else
+	@/bin/true
+endif
+
+.PHONY: $(subdir-ymn)
+
+$(subdir-ymn):
+	$(MAKE) -rR -f scripts/Makefile.clean obj=$@
+