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authorGuido Barzini <gbarzini@virata.com>2002-07-28 01:40:53 +0100
committerRussell King <rmk@flint.arm.linux.org.uk>2002-07-28 01:40:53 +0100
commite861caac171fb06e09d040b6b817e47fa1a85e49 (patch)
tree111943eba02cf55463566f7ce9c5ae264ec6f4cc
parent36023e6d0144c57f08b3cb117d83507f644be410 (diff)
[ARM PATCH] 1179/1: ldm/stm alignement fixups: treat 920T the same as 922T
The check in do_alignment_ldmstm for addr and eaddr being the same is #ifdef'd out for the ARM922T because they aren't expected to be the same due to the different way the MMU sets addr. The ARM920T is just a 922T with more cache, and should be treated the same. I've checked on a real ARM920T and it does complain loudly every time it fixes up a misaligned ldm/stm unless this patch is applied. I suspect that the ARM926 should be treated the same way as well, but I can't find any relevant documentation on ARM's web-site, so have left it out.
-rw-r--r--arch/arm/mm/alignment.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 0b678b1d7fdd..76120ee59dea 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -399,13 +399,13 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
eaddr += 4;
/*
- * For alignment faults on the ARM922T the MMU makes
+ * For alignment faults on the ARM922T/ARM920T the MMU makes
* the FSR (and hence addr) equal to the updated base address
* of the multiple access rather than the restored value.
- * Switch this messsage off if we've got a ARM922, otherwise
+ * Switch this messsage off if we've got a ARM92[02], otherwise
* [ls]dm alignment faults are noisy!
*/
-#if !(defined CONFIG_CPU_ARM922T)
+#if !(defined CONFIG_CPU_ARM922T) && !(defined CONFIG_CPU_ARM920T)
/*
* This is a "hint" - we already have eaddr worked out by the
* processor for us.