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authorLucas Stach <l.stach@pengutronix.de>2016-01-25 16:49:57 -0600
committerBen Hutchings <ben@decadent.org.uk>2016-05-01 00:05:44 +0200
commitf5aa19a43aaba8be755936fa2dbe93404fcec169 (patch)
treef01376827f7b005de3bbfaf8bf5c15ccbb81fb8b
parent79a854239e3ad02b0a369f16767173ff546633a0 (diff)
PCI: imx6: Remove broken Gen2 workaround
commit a77c5422d7586003643377afdb9915e76d07d21c upstream. Remove the remnants of the workaround for erratum ERR005184 which was never completely implemented. The checks alone don't carry any value as we don't act properly on the result. A workaround should be added to the lane speed change in establish_link later. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
-rw-r--r--drivers/pci/host/pci-imx6.c17
1 files changed, 1 insertions, 16 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 7a4ae6361af1..d54cf5f49e1c 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -427,7 +427,7 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
static int imx6_pcie_link_up(struct pcie_port *pp)
{
- u32 rc, debug_r0, rx_valid;
+ u32 rc;
int count = 5;
/*
@@ -461,21 +461,6 @@ static int imx6_pcie_link_up(struct pcie_port *pp)
*/
usleep_range(1000, 2000);
}
- /*
- * From L0, initiate MAC entry to gen2 if EP/RC supports gen2.
- * Wait 2ms (LTSSM timeout is 24ms, PHY lock is ~5us in gen2).
- * If (MAC/LTSSM.state == Recovery.RcvrLock)
- * && (PHY/rx_valid==0) then pulse PHY/rx_reset. Transition
- * to gen2 is stuck
- */
- pcie_phy_read(pp->dbi_base, PCIE_PHY_RX_ASIC_OUT, &rx_valid);
- debug_r0 = readl(pp->dbi_base + PCIE_PHY_DEBUG_R0);
-
- if (rx_valid & 0x01)
- return 0;
-
- if ((debug_r0 & 0x3f) != 0x0d)
- return 0;
return 0;
}