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| author | Conor Dooley <conor.dooley@microchip.com> | 2023-04-05 22:20:55 +0100 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-04-05 22:23:17 +0100 |
| commit | 4cd4beb98fe5ac2c4bcb995ba6e82322be174abb (patch) | |
| tree | 5f511ff3d23f2c188631bbc8cb7e585de424d944 /Documentation/devicetree/bindings/interrupt-controller | |
| parent | e77da13b8e3626fc6d01287fba7c1eee4ebfe018 (diff) | |
| parent | 54baba33392d428a8be4942441a92a9b05cf537e (diff) | |
Merge branch 'riscv-jh7110_initial_dts' into riscv-dt-for-next
Merge Hal's series adding support for the new StarFive JH7110 SoC.
There's a few bindings here for core components that were not picked up
by the various maintainers for the subsystems (previously Palmer would
pick these up via the RISC-V tree) & the first two commits in the branch
are shared with the clk tree, since the dts depends on defines in the
dt-binding headers.
This is based on -rc2, as the board does not actually boot on -rc1
due to the bug Linus introduced.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
| -rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 63bc89e13480..4e98261f2948 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -59,6 +59,7 @@ properties: - enum: - sifive,fu540-c000-plic - starfive,jh7100-plic + - starfive,jh7110-plic - canaan,k210-plic - const: sifive,plic-1.0.0 - items: |