kbuild: Introduce $(obj), $(src)

For separate source and object directories, Rules.make needs
to know where the files live.

For all the normal variables, $(obj-[ymn]) etc, it can figure that
out by itself, but for explicit rules to generate files it needs
help. 

So there $(obj)/target.o indicates that this file lives in the 
object directory, as opposed to $(src)/target.c, which lives in
the source dir.

For now $(obj) = $(src) = ., but convert some Makefiles to it
already.

1 files changed, 24 insertions, 0 deletions

diff --git a/Rules.make b/Rules.make
index 59640a8a3082..f8d348dce3c1 100644
--- a/Rules.make
+++ b/Rules.make
@@ -22,6 +22,30 @@ else
   TOPDIR_REL := $(subst $(space),,$(foreach d,$(subst /, ,$(RELDIR)),../))
 endif
 
+# Some paths for the Makefiles to use
+# ---------------------------------------------------------------------------
+
+# Usage:
+#
+# $(obj)/target.o                     : target.o in the build dir
+# $(src)/target.c                     : target.c in the source dir
+# $(objtree)/include/linux/version.h  : Some file relative to the build
+#					dir root
+# $(srctree)/include/linux/module.h   : Some file relative to the source
+#				        dir root
+#
+# Those can only be used in the section after
+# include $(TOPDIR)/Rules.make, i.e for generated files and the like.
+# Intentionally.
+#
+# We don't support separate source / object yet, so these are just
+# placeholders for now
+
+obj := .
+src := .
+objtree := $(TOPDIR)
+srctree := $(TOPDIR)
+
 # Figure out what we need to build from the various variables
 # ===========================================================================