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authorTom Rini <trini@kernel.crashing.org>2002-09-18 11:18:20 +1000
committerPaul Mackerras <paulus@samba.org>2002-09-18 11:18:20 +1000
commit037bd2fdff2707eca2fb54515cb36b1517af0e9b (patch)
treefc34f99d1a0e227784d8621d7fa06b90bd35d26b /arch/ppc/boot/include
parent8c6c406e33719e56b1f2592b01554924b593b1f1 (diff)
PPC32: Boot wrapper updates.
The major changes here are: (1) Combine the pmac and chrp directories into a single `openfirmware' directory, since both use Open Firmware and the code was very similar. (2) Move the Open Firmware interfaces out to a `of1275' directory and put them in separate files so we only include the ones we need. This work is due to Leigh Brown. (3) On PReP and embedded, get the memory size from the memory controller. Don't try to ask Open Firmware even on PRePs which have it.
Diffstat (limited to 'arch/ppc/boot/include')
-rw-r--r--arch/ppc/boot/include/cpc700.h26
-rw-r--r--arch/ppc/boot/include/mpc10x.h67
-rw-r--r--arch/ppc/boot/include/of1275.h38
3 files changed, 131 insertions, 0 deletions
diff --git a/arch/ppc/boot/include/cpc700.h b/arch/ppc/boot/include/cpc700.h
new file mode 100644
index 000000000000..28cfcde44909
--- /dev/null
+++ b/arch/ppc/boot/include/cpc700.h
@@ -0,0 +1,26 @@
+
+#ifndef __PPC_BOOT_CPC700_H
+#define __PPC_BOOT_CPC700_H
+
+#define CPC700_MEM_CFGADDR 0xff500008
+#define CPC700_MEM_CFGDATA 0xff50000c
+
+#define CPC700_MB0SA 0x38
+#define CPC700_MB0EA 0x58
+#define CPC700_MB1SA 0x3c
+#define CPC700_MB1EA 0x5c
+#define CPC700_MB2SA 0x40
+#define CPC700_MB2EA 0x60
+#define CPC700_MB3SA 0x44
+#define CPC700_MB3EA 0x64
+#define CPC700_MB4SA 0x48
+#define CPC700_MB4EA 0x68
+
+static inline long
+cpc700_read_memreg(int reg)
+{
+ out_be32((volatile unsigned int *) CPC700_MEM_CFGADDR, reg);
+ return in_be32((volatile unsigned int *) CPC700_MEM_CFGDATA);
+}
+
+#endif
diff --git a/arch/ppc/boot/include/mpc10x.h b/arch/ppc/boot/include/mpc10x.h
new file mode 100644
index 000000000000..e71b667a683e
--- /dev/null
+++ b/arch/ppc/boot/include/mpc10x.h
@@ -0,0 +1,67 @@
+/*
+ * arch/ppc/boot/include/mpc10.h
+ *
+ * Common defines for the Motorola SPS MPC106/8240/107 Host bridge/Mem
+ * ctrl/EPIC/etc.
+ *
+ * Author: Tom Rini <trini@mvista.com>
+ *
+ * This is a heavily stripped down version of:
+ * include/asm-ppc/mpc10x.h
+ *
+ * Author: Mark A. Greer
+ * mgreer@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#ifndef __BOOT_MPC10X_H__
+#define __BOOT_MPC10X_H__
+
+/*
+ * The values here don't completely map everything but should work in most
+ * cases.
+ *
+ * MAP A (PReP Map)
+ * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff
+ * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff
+ * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000
+ * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
+ *
+ * MAP B (CHRP Map)
+ * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff
+ * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff
+ * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000
+ * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
+ */
+
+/* Define the type of map to use */
+#define MPC10X_MEM_MAP_A 1
+#define MPC10X_MEM_MAP_B 2
+
+/* Map A (PReP Map) Defines */
+#define MPC10X_MAPA_CNFG_ADDR 0x80000cf8
+#define MPC10X_MAPA_CNFG_DATA 0x80000cfc
+
+/* Map B (CHRP Map) Defines */
+#define MPC10X_MAPB_CNFG_ADDR 0xfec00000
+#define MPC10X_MAPB_CNFG_DATA 0xfee00000
+
+/* Define offsets for the memory controller registers in the config space */
+#define MPC10X_MCTLR_MEM_START_1 0x80 /* Banks 0-3 */
+#define MPC10X_MCTLR_MEM_START_2 0x84 /* Banks 4-7 */
+#define MPC10X_MCTLR_EXT_MEM_START_1 0x88 /* Banks 0-3 */
+#define MPC10X_MCTLR_EXT_MEM_START_2 0x8c /* Banks 4-7 */
+
+#define MPC10X_MCTLR_MEM_END_1 0x90 /* Banks 0-3 */
+#define MPC10X_MCTLR_MEM_END_2i 0x94 /* Banks 4-7 */
+#define MPC10X_MCTLR_EXT_MEM_END_1 0x98 /* Banks 0-3 */
+#define MPC10X_MCTLR_EXT_MEM_END_2 0x9c /* Banks 4-7 */
+
+#define MPC10X_MCTLR_MEM_BANK_ENABLES 0xa0
+
+#endif /* __BOOT_MPC10X_H__ */
diff --git a/arch/ppc/boot/include/of1275.h b/arch/ppc/boot/include/of1275.h
new file mode 100644
index 000000000000..6cd07e5f5653
--- /dev/null
+++ b/arch/ppc/boot/include/of1275.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) Paul Mackerras 1997.
+ * Copyright (C) Leigh Brown 2002.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+typedef void *prom_handle;
+typedef void *ihandle;
+typedef void *phandle;
+typedef int (*prom_entry)(void *);
+
+#define OF_INVALID_HANDLE ((prom_handle)-1UL)
+
+extern prom_entry of_prom_entry;
+
+/* function declarations */
+
+void * claim(unsigned int virt, unsigned int size, unsigned int align);
+void enter(void);
+void exit(void);
+phandle finddevice(const char *name);
+int getprop(phandle node, const char *name, void *buf, int buflen);
+void ofinit(prom_entry entry);
+int ofstdio(ihandle *stdin, ihandle *stdout, ihandle *stderr);
+int read(ihandle instance, void *buf, int buflen);
+void release(void *virt, unsigned int size);
+int write(ihandle instance, void *buf, int buflen);
+
+/* inlines */
+
+extern inline void pause(void)
+{
+ enter();
+}