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authorConor Dooley <conor.dooley@microchip.com>2023-04-05 22:20:55 +0100
committerConor Dooley <conor.dooley@microchip.com>2023-04-05 22:23:17 +0100
commit4cd4beb98fe5ac2c4bcb995ba6e82322be174abb (patch)
tree5f511ff3d23f2c188631bbc8cb7e585de424d944 /arch/riscv/kernel/stacktrace.c
parente77da13b8e3626fc6d01287fba7c1eee4ebfe018 (diff)
parent54baba33392d428a8be4942441a92a9b05cf537e (diff)
Merge branch 'riscv-jh7110_initial_dts' into riscv-dt-for-next
Merge Hal's series adding support for the new StarFive JH7110 SoC. There's a few bindings here for core components that were not picked up by the various maintainers for the subsystems (previously Palmer would pick these up via the RISC-V tree) & the first two commits in the branch are shared with the clk tree, since the dts depends on defines in the dt-binding headers. This is based on -rc2, as the board does not actually boot on -rc1 due to the bug Linus introduced. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv/kernel/stacktrace.c')
-rw-r--r--arch/riscv/kernel/stacktrace.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kernel/stacktrace.c b/arch/riscv/kernel/stacktrace.c
index f9a5a7c90ff0..64a9c093aef9 100644
--- a/arch/riscv/kernel/stacktrace.c
+++ b/arch/riscv/kernel/stacktrace.c
@@ -101,7 +101,7 @@ void notrace walk_stackframe(struct task_struct *task,
while (!kstack_end(ksp)) {
if (__kernel_text_address(pc) && unlikely(!fn(arg, pc)))
break;
- pc = (*ksp++) - 0x4;
+ pc = READ_ONCE_NOCHECK(*ksp++) - 0x4;
}
}