diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2019-08-27 00:42:06 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2019-08-27 00:42:06 +0200 |
| commit | a42e43c3de344bd2fa2e635bf3ffd4d9be73cf82 (patch) | |
| tree | d0a75c7b442c34c5b45fb57fc1237a8ed3935748 /drivers/clocksource/timer-npcm7xx.c | |
| parent | 3e2d94535adb2df15f3907e4b4c7cd8a5a4c2b5a (diff) | |
| parent | 19d608458f4f3bb3a1f89bd7e4814c3fd30dbec7 (diff) | |
Merge tag 'timers-v5.4' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clocksource/events updates from Daniel Lezcano:
- Remove dev_err() when used with platform_get_irq (Stephen Boyd)
- Add DT binding and new compatible for Allwinner sun4i (Maxime Ripard)
- Register the Atmel tcb clocksource for delays (Alexandre Belloni)
- Add a clock divider for the Freescale imx platforms and new timer node
in the DT (Anson Huang)
- Use DIV_ROUND_CLOSEST macro for the Renesas OSTM (Geert Uytterhoeven)
- Fix GENMASK and timer operation for the npcm timer (Avi Fishman)
- Fix timer-of showing an error message when EPROBE_DEFER is
returned (Jon Hunter)
- Add new SoC DT binding and match for Renesas timers (Magnus Damm)
Diffstat (limited to 'drivers/clocksource/timer-npcm7xx.c')
| -rw-r--r-- | drivers/clocksource/timer-npcm7xx.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/clocksource/timer-npcm7xx.c b/drivers/clocksource/timer-npcm7xx.c index 8a30da7f083b..9780ffd8010e 100644 --- a/drivers/clocksource/timer-npcm7xx.c +++ b/drivers/clocksource/timer-npcm7xx.c @@ -32,7 +32,7 @@ #define NPCM7XX_Tx_INTEN BIT(29) #define NPCM7XX_Tx_COUNTEN BIT(30) #define NPCM7XX_Tx_ONESHOT 0x0 -#define NPCM7XX_Tx_OPER GENMASK(27, 3) +#define NPCM7XX_Tx_OPER GENMASK(28, 27) #define NPCM7XX_Tx_MIN_PRESCALE 0x1 #define NPCM7XX_Tx_TDR_MASK_BITS 24 #define NPCM7XX_Tx_MAX_CNT 0xFFFFFF @@ -84,8 +84,6 @@ static int npcm7xx_timer_oneshot(struct clock_event_device *evt) val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0); val &= ~NPCM7XX_Tx_OPER; - - val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0); val |= NPCM7XX_START_ONESHOT_Tx; writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0); @@ -97,12 +95,11 @@ static int npcm7xx_timer_periodic(struct clock_event_device *evt) struct timer_of *to = to_timer_of(evt); u32 val; + writel(timer_of_period(to), timer_of_base(to) + NPCM7XX_REG_TICR0); + val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0); val &= ~NPCM7XX_Tx_OPER; - - writel(timer_of_period(to), timer_of_base(to) + NPCM7XX_REG_TICR0); val |= NPCM7XX_START_PERIODIC_Tx; - writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0); return 0; |