diff options
| author | Andrey Grodzovsky <andrey.grodzovsky@amd.com> | 2021-12-06 14:59:35 -0500 | 
|---|---|---|
| committer | Andrey Grodzovsky <andrey.grodzovsky@amd.com> | 2022-02-09 12:15:04 -0500 | 
| commit | 5fd8518d187ed03403a4d4f7f56f52c00b11c148 (patch) | |
| tree | 52eb7f73ebb898c8be2ea5f86eb7c10a968a0311 /drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |
| parent | a4c63cafa58b4bd9e15511bab77a4752b93d3aa0 (diff) | |
drm/amdgpu: Move scheduler init to after XGMI is ready
Before we initialize schedulers we must know which reset
domain are we in - for single device there iis a single
domain per device and so single wq per device. For XGMI
the reset domain spans the entire XGMI hive and so the
reset wq is per hive.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Link: https://www.spinics.net/lists/amd-gfx/msg74112.html
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 43 | 
1 files changed, 5 insertions, 38 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index 45977a72b5dd..5d13ed376ab4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c @@ -446,24 +446,18 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,   * for the requested ring.   *   * @ring: ring to init the fence driver on - * @num_hw_submission: number of entries on the hardware queue - * @sched_score: optional score atomic shared with other schedulers   *   * Init the fence driver for the requested ring (all asics).   * Helper function for amdgpu_fence_driver_init().   */ -int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring, -				  unsigned num_hw_submission, -				  atomic_t *sched_score) +int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring)  {  	struct amdgpu_device *adev = ring->adev; -	long timeout; -	int r;  	if (!adev)  		return -EINVAL; -	if (!is_power_of_2(num_hw_submission)) +	if (!is_power_of_2(ring->num_hw_submission))  		return -EINVAL;  	ring->fence_drv.cpu_addr = NULL; @@ -474,41 +468,14 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,  	timer_setup(&ring->fence_drv.fallback_timer, amdgpu_fence_fallback, 0); -	ring->fence_drv.num_fences_mask = num_hw_submission * 2 - 1; +	ring->fence_drv.num_fences_mask = ring->num_hw_submission * 2 - 1;  	spin_lock_init(&ring->fence_drv.lock); -	ring->fence_drv.fences = kcalloc(num_hw_submission * 2, sizeof(void *), +	ring->fence_drv.fences = kcalloc(ring->num_hw_submission * 2, sizeof(void *),  					 GFP_KERNEL); +  	if (!ring->fence_drv.fences)  		return -ENOMEM; -	/* No need to setup the GPU scheduler for rings that don't need it */ -	if (ring->no_scheduler) -		return 0; - -	switch (ring->funcs->type) { -	case AMDGPU_RING_TYPE_GFX: -		timeout = adev->gfx_timeout; -		break; -	case AMDGPU_RING_TYPE_COMPUTE: -		timeout = adev->compute_timeout; -		break; -	case AMDGPU_RING_TYPE_SDMA: -		timeout = adev->sdma_timeout; -		break; -	default: -		timeout = adev->video_timeout; -		break; -	} - -	r = drm_sched_init(&ring->sched, &amdgpu_sched_ops, -			   num_hw_submission, amdgpu_job_hang_limit, -			   timeout, NULL, sched_score, ring->name); -	if (r) { -		DRM_ERROR("Failed to create scheduler on ring %s.\n", -			  ring->name); -		return r; -	} -  	return 0;  } | 
