diff options
| author | Hawking Zhang <Hawking.Zhang@amd.com> | 2022-04-13 14:27:32 -0400 | 
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-05-04 10:43:54 -0400 | 
| commit | 3d879e81f0f9ed5d33b5eda0fe5226c884bb8073 (patch) | |
| tree | c062cb2a700020565d27a5e2113f964bb8c8755b /drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | |
| parent | 028c3fb37e705b8fa1448c23c42d1c89f48c07c5 (diff) | |
drm/amdgpu: add init support for GFX11 (v2)
Add initial support for GC version 11.  GC is
the graphics and compute block on the GPU.
v1: add initial gfx11 support (Wenhui)
v2: switch to new amdgpu_gfx_is_high_priority_compute_queue
    interface (Hawking)
v3: fix num_mec (Alex)
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 13 | 
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index 15749016d8cf..45522609d4b4 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h @@ -57,6 +57,9 @@ struct amdgpu_mec {  	u64			hpd_eop_gpu_addr;  	struct amdgpu_bo	*mec_fw_obj;  	u64			mec_fw_gpu_addr; +	struct amdgpu_bo	*mec_fw_data_obj; +	u64			mec_fw_data_gpu_addr; +  	u32 num_mec;  	u32 num_pipe_per_mec;  	u32 num_queue_per_pipe; @@ -245,6 +248,10 @@ struct amdgpu_pfp {  	struct amdgpu_bo		*pfp_fw_obj;  	uint64_t			pfp_fw_gpu_addr;  	uint32_t			*pfp_fw_ptr; + +	struct amdgpu_bo		*pfp_fw_data_obj; +	uint64_t			pfp_fw_data_gpu_addr; +	uint32_t			*pfp_fw_data_ptr;  };  struct amdgpu_ce { @@ -257,6 +264,11 @@ struct amdgpu_me {  	struct amdgpu_bo		*me_fw_obj;  	uint64_t			me_fw_gpu_addr;  	uint32_t			*me_fw_ptr; + +	struct amdgpu_bo		*me_fw_data_obj; +	uint64_t			me_fw_data_gpu_addr; +	uint32_t			*me_fw_data_ptr; +  	uint32_t			num_me;  	uint32_t			num_pipe_per_me;  	uint32_t			num_queue_per_pipe; @@ -277,6 +289,7 @@ struct amdgpu_gfx {  	struct amdgpu_kiq		kiq;  	struct amdgpu_imu		imu;  	struct amdgpu_scratch		scratch; +	bool				rs64_enable; /* firmware format */  	const struct firmware		*me_fw;	/* ME firmware */  	uint32_t			me_fw_version;  	const struct firmware		*pfp_fw; /* PFP firmware */  | 
