diff options
| author | Dennis Li <Dennis.Li@amd.com> | 2021-05-10 11:04:59 +0800 | 
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-05-10 18:09:37 -0400 | 
| commit | 011907fda3605177f4fc05bf08fcf0fceaabda49 (patch) | |
| tree | 601f72bd92f352fd6490c36f205d62432737c59b /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | 509b9a5b4865dee723296f143695a7774fc96c4a (diff) | |
drm/amdgpu: covert ras status to kernel errno
The original codes use ras status and kernl errno together in the same
function, which is a wrong code style.
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 43 | 
1 files changed, 7 insertions, 36 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index a94be181d066..4eebb97994d6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -586,29 +586,6 @@ struct ras_manager *amdgpu_ras_find_obj(struct amdgpu_device *adev,  }  /* obj end */ -static void amdgpu_ras_parse_status_code(struct amdgpu_device *adev, -					 const char* invoke_type, -					 const char* block_name, -					 enum ta_ras_status ret) -{ -	switch (ret) { -	case TA_RAS_STATUS__SUCCESS: -		return; -	case TA_RAS_STATUS__ERROR_RAS_NOT_AVAILABLE: -		dev_warn(adev->dev, -			"RAS WARN: %s %s currently unavailable\n", -			invoke_type, -			block_name); -		break; -	default: -		dev_err(adev->dev, -			"RAS ERROR: %s %s error failed ret 0x%X\n", -			invoke_type, -			block_name, -			ret); -	} -} -  /* feature ctl begin */  static int amdgpu_ras_is_feature_allowed(struct amdgpu_device *adev,  					 struct ras_common_if *head) @@ -703,15 +680,10 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev,  	if (!amdgpu_ras_intr_triggered()) {  		ret = psp_ras_enable_features(&adev->psp, info, enable);  		if (ret) { -			amdgpu_ras_parse_status_code(adev, -						     enable ? "enable":"disable", -						     ras_block_str(head->block), -						    (enum ta_ras_status)ret); -			if (ret == TA_RAS_STATUS__RESET_NEEDED) -				ret = -EAGAIN; -			else -				ret = -EINVAL; - +			dev_err(adev->dev, "ras %s %s failed %d\n", +				enable ? "enable":"disable", +				ras_block_str(head->block), +				ret);  			goto out;  		}  	} @@ -1056,10 +1028,9 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev,  		ret = -EINVAL;  	} -	amdgpu_ras_parse_status_code(adev, -				     "inject", -				     ras_block_str(info->head.block), -				     (enum ta_ras_status)ret); +	if (ret) +		dev_err(adev->dev, "ras inject %s failed %d\n", +			ras_block_str(info->head.block), ret);  	return ret;  } | 
