diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2017-04-26 23:40:37 -0400 | 
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-05-24 17:39:35 -0400 | 
| commit | 8ae1a33648969531d93008dda508f1715f1fdbf0 (patch) | |
| tree | 67a4926b6cb9745349448126d805e44fcc19573e /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | |
| parent | 2f590f8419c6abb6d87d89c99931a13404a7dbe1 (diff) | |
drm/amdgpu: add gpu_info firmware (v3)
Add a new gpu info firmware to store gpu specific configuration
data.  This allows us to store hw constants in a unified place.
v2: adjust structure and elements
v3: further restructure
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 25 | 
1 files changed, 25 insertions, 0 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h index 758f03a1770d..9f31c9d2ea9a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h @@ -113,6 +113,29 @@ struct sdma_firmware_header_v1_1 {  	uint32_t digest_size;  }; +/* gpu info payload */ +struct gpu_info_firmware_v1_0 { +	uint32_t gc_num_se; +	uint32_t gc_num_cu_per_sh; +	uint32_t gc_num_sh_per_se; +	uint32_t gc_num_rb_per_se; +	uint32_t gc_num_tccs; +	uint32_t gc_num_gprs; +	uint32_t gc_num_max_gs_thds; +	uint32_t gc_gs_table_depth; +	uint32_t gc_gsprim_buff_depth; +	uint32_t gc_parameter_cache_depth; +	uint32_t gc_double_offchip_lds_buffer; +	uint32_t gc_wave_size; +}; + +/* version_major=1, version_minor=0 */ +struct gpu_info_firmware_header_v1_0 { +	struct common_firmware_header header; +	uint16_t version_major; /* version */ +	uint16_t version_minor; /* version */ +}; +  /* header is fixed size */  union amdgpu_firmware_header {  	struct common_firmware_header common; @@ -124,6 +147,7 @@ union amdgpu_firmware_header {  	struct rlc_firmware_header_v2_0 rlc_v2_0;  	struct sdma_firmware_header_v1_0 sdma;  	struct sdma_firmware_header_v1_1 sdma_v1_1; +	struct gpu_info_firmware_header_v1_0 gpu_info;  	uint8_t raw[0x100];  }; @@ -184,6 +208,7 @@ void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr);  void amdgpu_ucode_print_gfx_hdr(const struct common_firmware_header *hdr);  void amdgpu_ucode_print_rlc_hdr(const struct common_firmware_header *hdr);  void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr); +void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr);  int amdgpu_ucode_validate(const struct firmware *fw);  bool amdgpu_ucode_hdr_version(union amdgpu_firmware_header *hdr,  				uint16_t hdr_major, uint16_t hdr_minor); | 
