diff options
| author | Ingo Molnar <mingo@kernel.org> | 2025-05-16 15:43:04 +0200 |
|---|---|---|
| committer | Dave Hansen <dave.hansen@linux.intel.com> | 2025-10-13 13:55:53 -0700 |
| commit | 83b0177a6c4889b3a6e865da5e21b2c9d97d0551 (patch) | |
| tree | bf37d926cd4947bacd56f5be2ecaf29f7389cfc7 /drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | |
| parent | f25785f9b088ed65089dd0d0034da52858417839 (diff) | |
x86/mm: Fix SMP ordering in switch_mm_irqs_off()
Stephen noted that it is possible to not have an smp_mb() between
the loaded_mm store and the tlb_gen load in switch_mm(), meaning the
ordering against flush_tlb_mm_range() goes out the window, and it
becomes possible for switch_mm() to not observe a recent tlb_gen
update and fail to flush the TLBs.
[ dhansen: merge conflict fixed by Ingo ]
Fixes: 209954cbc7d0 ("x86/mm/tlb: Update mm_cpumask lazily")
Reported-by: Stephen Dolan <sdolan@janestreet.com>
Closes: https://lore.kernel.org/all/CAHDw0oGd0B4=uuv8NGqbUQ_ZVmSheU2bN70e4QhFXWvuAZdt2w@mail.gmail.com/
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mes_userqueue.c')
0 files changed, 0 insertions, 0 deletions