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authorAlex Deucher <alexander.deucher@amd.com>2025-12-17 10:31:58 -0500
committerAlex Deucher <alexander.deucher@amd.com>2026-01-05 16:59:57 -0500
commit6ee1ee12ff334d50d346dc764b5bf0dd4d61ad7e (patch)
tree1160c1dbde373ae3b055151f5d8bbf79d672feb3 /drivers/gpu/drm/amd
parent637fd8dedf10f8961782c29482edffaff1ccc7e2 (diff)
drm/amdgpu: add queue reset support for jpeg 5.3
Enable queue reset for JPEG 5.3. Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
index 084e592fb838..1821dced936f 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
@@ -104,6 +104,8 @@ static int jpeg_v5_3_0_sw_init(struct amdgpu_ip_block *ip_block)
/* TODO: Add queue reset mask when FW fully supports it */
adev->jpeg.supported_reset =
amdgpu_get_soft_full_reset_mask(&adev->jpeg.inst[0].ring_dec[0]);
+ if (!amdgpu_sriov_vf(adev))
+ adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
r = amdgpu_jpeg_sysfs_reset_mask_init(adev);
if (r)
return r;
@@ -625,6 +627,22 @@ static int jpeg_v5_3_0_process_interrupt(struct amdgpu_device *adev,
return 0;
}
+static int jpeg_v5_3_0_ring_reset(struct amdgpu_ring *ring,
+ unsigned int vmid,
+ struct amdgpu_fence *timedout_fence)
+{
+ int r;
+
+ amdgpu_ring_reset_helper_begin(ring, timedout_fence);
+ r = jpeg_v5_3_0_stop(ring->adev);
+ if (r)
+ return r;
+ r = jpeg_v5_3_0_start(ring->adev);
+ if (r)
+ return r;
+ return amdgpu_ring_reset_helper_end(ring, timedout_fence);
+}
+
static const struct amd_ip_funcs jpeg_v5_3_0_ip_funcs = {
.name = "jpeg_v5_3_0",
.early_init = jpeg_v5_3_0_early_init,
@@ -668,6 +686,7 @@ static const struct amdgpu_ring_funcs jpeg_v5_3_0_dec_ring_vm_funcs = {
.emit_wreg = jpeg_v4_0_3_dec_ring_emit_wreg,
.emit_reg_wait = jpeg_v4_0_3_dec_ring_emit_reg_wait,
.emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,
+ .reset = jpeg_v5_3_0_ring_reset,
};
static void jpeg_v5_3_0_set_dec_ring_funcs(struct amdgpu_device *adev)