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authorAvadhut Naik <avadhut.naik@amd.com>2025-11-18 19:15:03 +0000
committerBorislav Petkov (AMD) <bp@alien8.de>2025-11-21 10:32:28 +0100
commit821f5fe4dbcb82357f0dfcfca3dd98f2b4097e53 (patch)
tree8808e97246091ef22bd5279fd206ae2d0e6ae9a9 /drivers/pci/controller/dwc/pcie-qcom-common.c
parenteeb3f76d73baed4c8ecc883e1eaafba3cb8aae1d (diff)
x86/mce: Add support for physical address valid bit
Starting with Zen6, AMD's Scalable MCA systems will incorporate two new bits in MCA_STATUS and MCA_CONFIG MSRs. These bits will indicate if a valid System Physical Address (SPA) is present in MCA_ADDR. PhysAddrValidSupported bit (MCA_CONFIG[11]) serves as the architectural indicator and states if PhysAddrV bit (MCA_STATUS[54]) is Reserved or if it indicates validity of SPA in MCA_ADDR. PhysAddrV bit (MCA_STATUS[54]) advertises if MCA_ADDR contains valid SPA or if it is implementation specific. Use and prefer MCA_STATUS[PhysAddrV] when checking for a usable address. Signed-off-by: Avadhut Naik <avadhut.naik@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20251118191731.181269-1-avadhut.naik@amd.com
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-common.c')
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