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| author | Chang S. Bae <chang.seok.bae@intel.com> | 2025-09-21 15:48:35 -0700 |
|---|---|---|
| committer | Borislav Petkov (AMD) <bp@alien8.de> | 2025-10-15 16:46:11 +0200 |
| commit | ed44a5625f304ff14d01acfa086e77b5262a842f (patch) | |
| tree | ab21181c3f93843373e528f1cf7cdfa3682d938e /drivers/pci/controller/dwc/pcie-qcom-common.c | |
| parent | 3a8660878839faadb4f1a6dd72c3179c1df56787 (diff) | |
x86/cpu/topology: Make primary thread mask available with SMP=n
cpu_primary_thread_mask is only defined when CONFIG_SMP=y. However, even
in UP kernels there is always exactly one CPU, which can reasonably be
treated as the primary thread.
Historically, topology_is_primary_thread() always returned true with
CONFIG_SMP=n. A recent commit:
4b455f59945aa ("cpu/SMT: Provide a default topology_is_primary_thread()")
replaced it with a generic implementation with the note:
"When disabling SMT, the primary thread of the SMT will remain
enabled/active. Architectures that have a special primary thread (e.g.
x86) need to override this function. ..."
For consistency and clarity, make the primary thread mask available
regardless of SMP, similar to cpu_possible_mask and cpu_present_mask.
Move __cpu_primary_thread_mask into common code to prevent build issues.
Let cpu_mark_primary_thread() configure the mask even for UP kernels,
alongside other masks. Then, topology_is_primary_thread() can
consistently reference it.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20250320234104.8288-1-chang.seok.bae@intel.com
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-common.c')
0 files changed, 0 insertions, 0 deletions
