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| author | Hakyeong Kim <hgkim05@coasia.com> | 2025-08-25 17:14:29 +0530 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-08-31 15:22:33 +0200 |
| commit | bd5336e3f7040f300b01702215b45e6267a400cc (patch) | |
| tree | 9f3986065c0403e978fcb0fa5289241dbfa0c802 /drivers/pci/controller/dwc/pcie-qcom-ep.c | |
| parent | 80770fccb7f60b0bc795852c154273e511f296a0 (diff) | |
clk: samsung: artpec-8: Add initial clock support for ARTPEC-8 SoC
Add initial clock support for Axis ARTPEC-8 SoC which is required
for enabling basic clock management.
Add clock support for below CMU (Clock Management Unit) blocks
in ARTPEC-8 SoC:
- CMU_CMU
- CMU_BUS
- CMU_CORE
- CMU_CPUCL
- CMU_FSYS
- CMU_IMEM
- CMU_PERI
Signed-off-by: Hakyeong Kim <hgkim05@coasia.com>
Signed-off-by: Varada Pavani <v.pavani@samsung.com>
Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Link: https://lore.kernel.org/r/20250825114436.46882-4-ravi.patel@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-ep.c')
0 files changed, 0 insertions, 0 deletions