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authorMichael Ellerman <mpe@ellerman.id.au>2022-10-31 17:37:21 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2022-10-31 17:37:21 +1100
commitf98b4d13717a58b15c00880d2ccd24972316b430 (patch)
treec3b50090ee3ef4b15b7874ae237d76710108674c /drivers/pci/controller/pci-tegra.c
parent65722736c3baf29e02e964a09e85c9ef71c48e8d (diff)
parent247f34f7b80357943234f93f247a1ae6b6c3a740 (diff)
Merge tag 'v6.1-rc2' into fixes
Merge rc2 into our fixes branch, which was based on rc1 but wasn't merged until rc3, so that for the remainder of the release our fixes branch will be based on rc2 for the purposes of resolving conflicts with other trees (if necessary).
Diffstat (limited to 'drivers/pci/controller/pci-tegra.c')
-rw-r--r--drivers/pci/controller/pci-tegra.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 24478ae5a345..8e323e93be91 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -415,6 +415,13 @@ static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset)
* address (access to which generates correct config transaction) falls in
* this 4 KiB region.
*/
+static unsigned int tegra_pcie_conf_offset(u8 bus, unsigned int devfn,
+ unsigned int where)
+{
+ return ((where & 0xf00) << 16) | (bus << 16) | (PCI_SLOT(devfn) << 11) |
+ (PCI_FUNC(devfn) << 8) | (where & 0xff);
+}
+
static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
unsigned int devfn,
int where)
@@ -436,9 +443,7 @@ static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
unsigned int offset;
u32 base;
- offset = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
- PCI_FUNC(devfn), where) &
- ~PCI_CONF1_ENABLE;
+ offset = tegra_pcie_conf_offset(bus->number, devfn, where);
/* move 4 KiB window to offset within the FPCI region */
base = 0xfe100000 + ((offset & ~(SZ_4K - 1)) >> 8);