Sync up.

author: James Simmons <jsimmons@maxwell.earthlink.net> 2002-07-21 21:42:33 -0700
committer: James Simmons <jsimmons@maxwell.earthlink.net> 2002-07-21 21:42:33 -0700
commit: 55bcabb270f83b6350e43c472829c65d8ff86829 (patch)
tree: dbc7ffd76fca5481f2bbffa0495952015117340a /drivers/video
parent: 975f679b6b9e7321503694de9ea739280374f741 (diff)
parent: 87520e1ea7fe1d4d8c01a06f65a88bba42884f33 (diff)
62 files changed, 29979 insertions, 26954 deletions
diff --git a/drivers/video/Config.help b/drivers/video/Config.help
index bdda1d0a0b24..955f62d3b77a 100644
--- a/drivers/video/Config.help
+++ b/drivers/video/Config.help
@@ -68,6 +68,12 @@ CONFIG_FB_PM2_CVPPC
   Say Y to enable support for the Amiga Phase 5 CVisionPPC BVisionPPC
   framebuffer cards.  Phase 5 is no longer with us, alas.
 
+CONFIG_FB_PM3
+  This is the frame buffer device driver for the 3DLabs Permedia3
+  chipset, used in Formac ProFormance III, 3DLabs Oxygen VX1 &
+  similar boards, 3DLabs Permedia3 Create!, Appian Jeronimo 2000
+  and maybe other boards.
+
 CONFIG_FB_AMIGA
   This is the frame buffer device driver for the builtin graphics
   chipset found in Amigas.
@@ -77,12 +83,6 @@ CONFIG_FB_AMIGA
   module will be called amifb.o. If you want to compile it as a
   module, say M here and read <file:Documentation/modules.txt>.
 
-CONFIG_FB_PM3
-  This is the frame buffer device driver for the 3DLabs Permedia3
-  chipset, used in Formac ProFormance III, 3DLabs Oxygen VX1 &
-  similar boards, 3DLabs Permedia3 Create!, Appian Jeronimo 2000
-  and maybe other boards.
-
 CONFIG_FB_AMIGA_OCS
   This enables support for the original Agnus and Denise video chips,
   found in the Amiga 1000 and most A500's and A2000's. If you intend
@@ -594,7 +594,7 @@ CONFIG_FB_IMSTT
   many Macintosh and compatible computers.
 
 CONFIG_FB_TX3912
-  The TX3912 is a Toshiba RISC processor based on the MIPS 3900 core
+  The TX3912 is a Toshiba RISC processor based on the MIPS 3900 core;
   see <http://www.toshiba.com/taec/components/Generic/risc/tx3912.htm>.
 
   Say Y here to enable kernel support for the on-board framebuffer.
@@ -716,17 +716,7 @@ CONFIG_FBCON_IPLAN2P8
   This is the low level frame buffer console driver for 8 interleaved
   bitplanes (256 colors) on Atari.
 
-CONFIG_FBCON_MAC
-  This is the low level frame buffer console driver for 1/2/4/8/16/32
-  bits per pixel packed pixels on Mac. It supports variable font
-  widths for low resolution screens.
-
 CONFIG_FBCON_HGA
   This is the low level frame buffer console driver for Hercules mono
   graphics cards.
 
-CONFIG_FBCON_VGA
-  This is the low level frame buffer console driver for VGA text mode;
-  it is used by frame buffer device drivers that support VGA text
-  mode.
-
diff --git a/drivers/video/Config.in b/drivers/video/Config.in
index 618e7e28ca9f..2d1967c6631d 100644
--- a/drivers/video/Config.in
+++ b/drivers/video/Config.in
@@ -227,41 +227,35 @@ if [ "$CONFIG_FB" = "y" ]; then
       tristate '    Atari interleaved bitplanes (4 planes) support' CONFIG_FBCON_IPLAN2P4
       tristate '    Atari interleaved bitplanes (8 planes) support' CONFIG_FBCON_IPLAN2P8
 #      tristate '    Atari interleaved bitplanes (16 planes) support' CONFIG_FBCON_IPLAN2P16
-      tristate '    Mac variable bpp packed pixels support' CONFIG_FBCON_MAC
       tristate '    VGA 16-color planar support' CONFIG_FBCON_VGA_PLANES
-      tristate '    VGA characters/attributes support' CONFIG_FBCON_VGA
       tristate '    HGA monochrome support (EXPERIMENTAL)' CONFIG_FBCON_HGA
    else
       # Guess what we need
       if [ "$CONFIG_FB_ACORN" = "y" -o "$CONFIG_FB_AMIGA" = "y" -o \
 	   "$CONFIG_FB_ATARI" = "y" -o "$CONFIG_FB_CYBER" = "y" -o \
-	   "$CONFIG_FB_MAC" = "y" -o "$CONFIG_FB_RETINAZ3" = "y" -o \
-	   "$CONFIG_FB_VIRGE" = "y" -o "$CONFIG_FB_CLGEN" = "y" -o \
-	   "$CONFIG_FB_BWTWO" = "y" ]; then 
+	   "$CONFIG_FB_BWTWO" = "y" -o "$CONFIG_FB_RETINAZ3" = "y" -o \
+	   "$CONFIG_FB_VIRGE" = "y" -o "$CONFIG_FB_CLGEN" = "y" ]; then
 	 define_tristate CONFIG_FBCON_MFB y
       else
 	 if [ "$CONFIG_FB_ACORN" = "m" -o "$CONFIG_FB_AMIGA" = "m" -o \
 	      "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_CYBER" = "m" -o \
-	      "$CONFIG_FB_MAC" = "m" -o "$CONFIG_FB_RETINAZ3" = "m" -o \
-	      "$CONFIG_FB_VIRGE" = "m" -o "$CONFIG_FB_CLGEN" = "m" -o \
-	      "$CONFIG_FB_BWTWO" = "m" ]; then 
+	      "$CONFIG_FB_BWTWO" = "m" -o "$CONFIG_FB_RETINAZ3" = "m" -o \
+	      "$CONFIG_FB_VIRGE" = "m" -o "$CONFIG_FB_CLGEN" = "m" ]; then 
 	    define_tristate CONFIG_FBCON_MFB m
 	 fi
       fi
-      if [ "$CONFIG_FB_ACORN" = "y" -o "$CONFIG_FB_MAC" = "y" -o \
-	   "$CONFIG_FB_SA1100" = "y" ]; then 
+      if [ "$CONFIG_FB_ACORN" = "y" ]; then 
 	 define_tristate CONFIG_FBCON_CFB2 y
 	 define_tristate CONFIG_FBCON_CFB4 y
       else
-	 if [ "$CONFIG_FB_ACORN" = "m" -o "$CONFIG_FB_MAC" = "m" -o \
-	      "$CONFIG_FB_SA1100" = "m" ]; then 
+	 if [ "$CONFIG_FB_ACORN" = "m" ]; then 
 	    define_tristate CONFIG_FBCON_CFB2 m
 	    define_tristate CONFIG_FBCON_CFB4 m
 	 fi
       fi
       if [ "$CONFIG_FB_ACORN" = "y" -o "$CONFIG_FB_ATARI" = "y" -o \
-	   "$CONFIG_FB_ATY" = "y" -o "$CONFIG_FB_MAC" = "y" -o \
-	   "$CONFIG_FB_OF" = "y" -o "$CONFIG_FB_TGA" = "y" -o \
+	   "$CONFIG_FB_P9100" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \
+	   "$CONFIG_FB_RADEON" = "y" -o "$CONFIG_FB_TGA" = "y" -o \
 	   "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_PM3" = "y" -o \
 	   "$CONFIG_FB_TCX" = "y" -o "$CONFIG_FB_CGTHREE" = "y" -o \
 	   "$CONFIG_FB_CONTROL" = "y" -o "$CONFIG_FB_CLGEN" = "y" -o \
@@ -270,15 +264,12 @@ if [ "$CONFIG_FB" = "y" ]; then
 	   "$CONFIG_FB_VALKYRIE" = "y" -o "$CONFIG_FB_PLATINUM" = "y" -o \
            "$CONFIG_FB_IGA" = "y" -o "$CONFIG_FB_MATROX" = "y" -o \
 	   "$CONFIG_FB_CT65550" = "y" -o "$CONFIG_FB_PM2" = "y" -o \
-	   "$CONFIG_FB_P9100" = "y" -o "$CONFIG_FB_ATY128" = "y" -o \
-	   "$CONFIG_FB_RIVA" = "y" -o "$CONFIG_FB_RADEON" = "y" -o \
-	   "$CONFIG_FB_SGIVW" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \
-	   "$CONFIG_FB_SA1100" = "y" ]; then 
+	   "$CONFIG_FB_ATY" = "y" ]; then 
 	 define_tristate CONFIG_FBCON_CFB8 y
       else
 	 if [ "$CONFIG_FB_ACORN" = "m" -o "$CONFIG_FB_ATARI" = "m" -o \
-	      "$CONFIG_FB_ATY" = "m" -o "$CONFIG_FB_MAC" = "m" -o \
-	      "$CONFIG_FB_OF" = "m" -o "$CONFIG_FB_TGA" = "m" -o \
+	      "$CONFIG_FB_P9100" = "m" -o "$CONFIG_FB_CYBER2000" = "m" -o \
+	      "$CONFIG_FB_RADEON" = "m" -o "$CONFIG_FB_TGA" = "m" -o \
 	      "$CONFIG_FB_SIS" = "m" -o "$CONFIG_FB_PM3" = "m" -o \
 	      "$CONFIG_FB_TCX" = "m" -o "$CONFIG_FB_CGTHREE" = "m" -o \
 	      "$CONFIG_FB_CONTROL" = "m" -o "$CONFIG_FB_CLGEN" = "m" -o \
@@ -286,40 +277,31 @@ if [ "$CONFIG_FB" = "y" ]; then
 	      "$CONFIG_FB_VIRGE" = "m" -o "$CONFIG_FB_CYBER" = "m" -o \
 	      "$CONFIG_FB_VALKYRIE" = "m" -o "$CONFIG_FB_PLATINUM" = "m" -o \
               "$CONFIG_FB_IGA" = "m" -o "$CONFIG_FB_MATROX" = "m" -o \
-	      "$CONFIG_FB_CT65550" = "m" -o "$CONFIG_FB_PM2" = "m" -o \
-	      "$CONFIG_FB_P9100" = "m" -o "$CONFIG_FB_ATY128" = "m" -o \
-	      "$CONFIG_FB_RIVA" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \
-	      "$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_CYBER2000" = "m" -o \
-	      "$CONFIG_FB_SA1100" = "m" ]; then 
+	      "$CONFIG_FB_CT65550" = "m" -o "$CONFIG_FB_PM2" = "m" ]; then
 	    define_tristate CONFIG_FBCON_CFB8 m
 	 fi
       fi
-      if [ "$CONFIG_FB_ATARI" = "y" -o "$CONFIG_FB_ATY" = "y" -o \
-	   "$CONFIG_FB_MAC" = "y" -o "$CONFIG_FB_PVR2" = "y" -o \
+      if [ "$CONFIG_FB_ATARI" = "y" -o "$CONFIG_FB_PM3" = "y" -o \
+	   "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_PVR2" = "y" -o \
 	   "$CONFIG_FB_TRIDENT" = "y" -o "$CONFIG_FB_TBOX" = "y" -o \
 	   "$CONFIG_FB_VOODOO1" = "y" -o "$CONFIG_FB_RADEON" = "y" -o \
 	   "$CONFIG_FB_CONTROL" = "y" -o "$CONFIG_FB_CLGEN" = "y" -o \
 	   "$CONFIG_FB_VIRGE" = "y" -o "$CONFIG_FB_CYBER" = "y" -o \
 	   "$CONFIG_FB_VALKYRIE" = "y" -o "$CONFIG_FB_PLATINUM" = "y" -o \
 	   "$CONFIG_FB_CT65550" = "y" -o "$CONFIG_FB_MATROX" = "y" -o \
-	   "$CONFIG_FB_PM2" = "y" -o "$CONFIG_FB_SGIVW" = "y" -o \
-	   "$CONFIG_FB_RIVA" = "y" -o "$CONFIG_FB_ATY128" = "y" -o \
-	   "$CONFIG_FB_CYBER2000" = "y" -o "$CONFIG_FB_PM3" = "y"  -o \
-	   "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_SA1100" = "y" ]; then 
+	   "$CONFIG_FB_PM2" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \
+	   "$CONFIG_FB_ATY" = "y" ]; then 
 	 define_tristate CONFIG_FBCON_CFB16 y
       else
-	 if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \
-	      "$CONFIG_FB_MAC" = "m" -o "$CONFIG_FB_PVR2" = "m" -o \
+	 if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_SIS" = "m" -o \
+	      "$CONFIG_FB_RADEON" = "m" -o "$CONFIG_FB_PVR2" = "m" -o \
 	      "$CONFIG_FB_TRIDENT" = "m" -o "$CONFIG_FB_TBOX" = "m" -o \
 	      "$CONFIG_FB_VOODOO1" = "m" -o "$CONFIG_FB_PM3" = "m" -o \
 	      "$CONFIG_FB_CONTROL" = "m" -o "$CONFIG_FB_CLGEN" = "m" -o \
 	      "$CONFIG_FB_VIRGE" = "m" -o "$CONFIG_FB_CYBER" = "m" -o \
 	      "$CONFIG_FB_VALKYRIE" = "m" -o "$CONFIG_FB_PLATINUM" = "m" -o \
 	      "$CONFIG_FB_CT65550" = "m" -o "$CONFIG_FB_MATROX" = "m" -o \
-	      "$CONFIG_FB_PM2" = "m" -o "$CONFIG_FB_SGIVW" = "m" -o \
-	      "$CONFIG_FB_RIVA" = "m" -o "$CONFIG_FB_ATY128" = "m" -o \
-	      "$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_SIS" = "m" -o \
-	      "$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_RADEON" = "m" ]; then 
+	      "$CONFIG_FB_PM2" = "m" -o "$CONFIG_FB_CYBER2000" = "m" ]; then 
 	    define_tristate CONFIG_FBCON_CFB16 m
 	 fi
       fi
@@ -340,26 +322,22 @@ if [ "$CONFIG_FB" = "y" ]; then
 	    define_tristate CONFIG_FBCON_CFB24 m
 	 fi
       fi
-      if [ "$CONFIG_FB_ATARI" = "y" -o "$CONFIG_FB_ATY" = "y" -o \
+      if [ "$CONFIG_FB_ATARI" = "y" -o "$CONFIG_FB_RADEON" = "y" -o \
 	   "$CONFIG_FB_VOODOO1" = "y" -o "$CONFIG_FB_TRIDENT" = "y" -o \
 	   "$CONFIG_FB_CONTROL" = "y" -o "$CONFIG_FB_CLGEN" = "y" -o \
 	   "$CONFIG_FB_TGA" = "y" -o "$CONFIG_FB_PLATINUM" = "y" -o \
 	   "$CONFIG_FB_MATROX" = "y" -o "$CONFIG_FB_PM2" = "y" -o \
-	   "$CONFIG_FB_RIVA" = "y" -o "$CONFIG_FB_ATY128" = "y" -o \
-	   "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_SGIVW" = "y" -o \
-	   "$CONFIG_FB_RADEON" = "y" -o "$CONFIG_FB_PVR2" = "y" -o \
-	   "$CONFIG_FB_PM3" = "y" ]; then
+	   "$CONFIG_FB_PVR2" = "y" -o "$CONFIG_FB_PM3" = "y" -o \
+	   "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_ATY" = "y" ]; then 
 	 define_tristate CONFIG_FBCON_CFB32 y
       else
-	 if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \
+	 if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \
 	      "$CONFIG_FB_VOODOO1" = "m" -o "$CONFIG_FB_TRIDENT" = "m" -o \
 	      "$CONFIG_FB_CONTROL" = "m" -o "$CONFIG_FB_CLGEN" = "m" -o \
 	      "$CONFIG_FB_TGA" = "m" -o "$CONFIG_FB_PLATINUM" = "m" -o \
 	      "$CONFIG_FB_MATROX" = "m" -o "$CONFIG_FB_PM2" = "m" -o \
-	      "$CONFIG_FB_RIVA" = "m" -o "$CONFIG_FB_ATY128" = "m" -o \
-	      "$CONFIG_FB_PM3" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \
-	      "$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_SIS" = "m" -o \
-	      "$CONFIG_FB_PVR2" = "m" ]; then
+	      "$CONFIG_FB_SIS" = "m" -o "$CONFIG_FB_PVR2" = "m" -o \
+	      "$CONFIG_FB_PM3" = "m" ]; then 
 	    define_tristate CONFIG_FBCON_CFB32 m
 	 fi
       fi
@@ -370,12 +348,18 @@ if [ "$CONFIG_FB" = "y" ]; then
 	   "$CONFIG_FB_VIRTUAL" = "y" -o "$CONFIG_FB_CLPS711X" = "y" -o \
 	   "$CONFIG_FB_PMAG_BA" = "y" -o "$CONFIG_FB_PMAGB_B" = "y" -o \
 	   "$CONFIG_FB_3DFX" = "y" -o "$CONFIG_FB_TX3912" = "y" -o \
-	   "$CONFIG_FB_MAXINE" = "y" -o "$CONFIG_FB_APOLLO" = "y" ]; then
+	   "$CONFIG_FB_MAXINE" = "y" -o "$CONFIG_FB_APOLLO" = "y" -o \
+	   "$CONFIG_FB_ATY128" = "y" -o "$CONFIG_FB_MAC" = "y" -o \
+	   "$CONFIG_FB_RIVA" = "y" -o "$CONFIG_FB_SA1100" = "y" -o \
+	   "$CONFIG_FB_OF" = "y" -o "$CONFIG_FB_SGIVW" = "y" -o \
+	   "$CONFIG_FB_ATY" = "y" ]; then
 	 define_tristate CONFIG_FBCON_ACCEL y
       else
 	 if [ "$CONFIG_FB_NEOMAGIC" = "m" -o "$CONFIG_FB_HIT" = "m" -o \
 	      "$CONFIG_FB_G364" = "m" -o "$CONFIG_FB_VIRTUAL" = "m" -o \
-	      "$CONFIG_FB_CLPS711X" = "m" -o "$CONFIG_FB_3DFX" = "m" ]; then 
+	      "$CONFIG_FB_CLPS711X" = "m" -o "$CONFIG_FB_3DFX" = "m" -o \
+	      "$CONFIG_FB_RIVA" = "m" -o "$CONFIG_FB_ATY128" = "m" -o \
+	      "$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_ATY" = "m" ]; then 
 	    define_tristate CONFIG_FBCON_ACCEL m
          fi       
       fi
@@ -401,13 +385,6 @@ if [ "$CONFIG_FB" = "y" ]; then
 #	    define_tristate CONFIG_FBCON_IPLAN2P16 m
 	 fi
       fi
-      if [ "$CONFIG_FB_MAC" = "y" ]; then
-	 define_tristate CONFIG_FBCON_MAC  y
-      else
-	 if [ "$CONFIG_FB_MAC" = "m" ]; then
-	    define_tristate CONFIG_FBCON_MAC  m
-	 fi
-      fi
       if [ "$CONFIG_FB_VGA16" = "y" ]; then
 	 define_tristate CONFIG_FBCON_VGA_PLANES y
       else
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 576ec85137a7..c4d719c06ab1 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -10,8 +10,8 @@ export-objs    	:= fbmem.o fbcmap.o fbcon.o fbmon.o modedb.o \
 		   fbcon-vga.o fbcon-iplan2p2.o fbcon-iplan2p4.o \
 		   fbcon-iplan2p8.o fbcon-vga-planes.o fbcon-cfb16.o \
 		   fbcon-cfb2.o fbcon-cfb24.o fbcon-cfb32.o fbcon-cfb4.o \
-		   fbcon-cfb8.o fbcon-mac.o fbcon-mfb.o \
-		   cyber2000fb.o sa1100fb.o fbcon-hga.o fbgen.o
+		   fbcon-cfb8.o fbcon-mfb.o fbcon-hga.o \
+		   cyber2000fb.o sa1100fb.o fbgen.o
 
 # Each configuration option enables a list of files.
 
@@ -56,9 +56,9 @@ obj-$(CONFIG_FB_ANAKIN)           += anakinfb.o cfbfillrect.o cfbcopyarea.o cfbi
 obj-$(CONFIG_FB_CLPS711X)         += clps711xfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
 obj-$(CONFIG_FB_CYBER)            += cyberfb.o
 obj-$(CONFIG_FB_CYBER2000)        += cyber2000fb.o
-obj-$(CONFIG_FB_SGIVW)            += sgivwfb.o
+obj-$(CONFIG_FB_SGIVW)            += sgivwfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
 obj-$(CONFIG_FB_3DFX)             += tdfxfb.o
-obj-$(CONFIG_FB_MAC)              += macfb.o macmodes.o
+obj-$(CONFIG_FB_MAC)              += macfb.o macmodes.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o 
 obj-$(CONFIG_FB_HP300)            += hpfb.o cfbfillrect.o cfbimgblt.o
 obj-$(CONFIG_FB_OF)               += offb.o
 obj-$(CONFIG_FB_IMSTT)            += imsttfb.o
@@ -94,7 +94,7 @@ obj-$(CONFIG_FB_ATY)		  += aty/
 obj-$(CONFIG_FB_SUN3)             += sun3fb.o
 obj-$(CONFIG_FB_BWTWO)            += bwtwofb.o
 obj-$(CONFIG_FB_HGA)              += hgafb.o  
-obj-$(CONFIG_FB_SA1100)           += sa1100fb.o
+obj-$(CONFIG_FB_SA1100)           += sa1100fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
 obj-$(CONFIG_FB_VIRTUAL)          += vfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o 
 obj-$(CONFIG_FB_HIT)              += hitfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
 obj-$(CONFIG_FB_E1355)            += epson1355fb.o
@@ -114,9 +114,7 @@ obj-$(CONFIG_FBCON_ILBM)          += fbcon-ilbm.o
 obj-$(CONFIG_FBCON_IPLAN2P2)      += fbcon-iplan2p2.o
 obj-$(CONFIG_FBCON_IPLAN2P4)      += fbcon-iplan2p4.o
 obj-$(CONFIG_FBCON_IPLAN2P8)      += fbcon-iplan2p8.o
-obj-$(CONFIG_FBCON_MAC)           += fbcon-mac.o
 obj-$(CONFIG_FBCON_MFB)           += fbcon-mfb.o
-obj-$(CONFIG_FBCON_VGA)           += fbcon-vga.o
 obj-$(CONFIG_FBCON_HGA)           += fbcon-hga.o
 obj-$(CONFIG_FBCON_STI)           += fbcon-sti.o
 obj-$(CONFIG_FBCON_ACCEL)	  += fbcon-accel.o
diff --git a/drivers/video/S3triofb.c b/drivers/video/S3triofb.c
index 874af6f0a863..336f501f0317 100644
--- a/drivers/video/S3triofb.c
+++ b/drivers/video/S3triofb.c
@@ -41,9 +41,6 @@
 #include <asm/prom.h>
 #include <asm/pci-bridge.h>
 #include <linux/pci.h>
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#endif
 
 #include <video/fbcon.h>
 #include <video/fbcon-cfb8.h>
@@ -540,22 +537,6 @@ static void __init s3triofb_of_init(struct device_node *dp)
     fb_info.setcmap = &s3triofbcon_setcmap;
 #endif
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-    if (!console_fb_info) {
-	display_info.height = fb_var.yres;
-	display_info.width = fb_var.xres;
-	display_info.depth = 8;
-	display_info.pitch = fb_fix.line_length;
-	display_info.mode = 0;
-	strncpy(display_info.name, dp->name, sizeof(display_info.name));
-	display_info.fb_address = (unsigned long)fb_fix.smem_start;
-	display_info.disp_reg_address = address + 0x1008000;
-	display_info.cmap_adr_address = address + 0x1008000 + 0x3c8;
-	display_info.cmap_data_address = address + 0x1008000 + 0x3c9;
-	console_fb_info = &fb_info;
-    }
-#endif /* CONFIG_FB_COMPAT_XPMAC) */
-
     fb_info.flags = FBINFO_FLAG_DEFAULT;
     if (register_framebuffer(&fb_info) < 0)
 	return;
diff --git a/drivers/video/amifb.c b/drivers/video/amifb.c
index f7ff06f62651..7bbd9b26cd86 100644
--- a/drivers/video/amifb.c
+++ b/drivers/video/amifb.c
@@ -61,7 +61,6 @@
 #include <asm/amigahw.h>
 #include <asm/amigaints.h>
 #include <asm/setup.h>
-#include <asm/io.h>
 
 #include <video/fbcon.h>
 #include <video/fbcon-afb.h>
@@ -1173,16 +1172,51 @@ static struct fb_ops amifb_ops = {
 	fb_set_cmap:	gen_set_cmap,
 	fb_setcolreg:	amifb_setcolreg,
 	fb_pan_display:	amifb_pan_display,
-	fb_blankL:	amifb_blank,
+	fb_blank:	amifb_blank,
 	fb_ioctl:	amifb_ioctl,
 };
 
+static void __init amifb_setup_mcap(char *spec)
+{
+	char *p;
+	int vmin, vmax, hmin, hmax;
+
+	/* Format for monitor capabilities is: <Vmin>;<Vmax>;<Hmin>;<Hmax>
+	 * <V*> vertical freq. in Hz
+	 * <H*> horizontal freq. in kHz
+	 */
+
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
+	vmin = simple_strtoul(p, NULL, 10);
+	if (vmin <= 0)
+		return;
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
+	vmax = simple_strtoul(p, NULL, 10);
+	if (vmax <= 0 || vmax <= vmin)
+		return;
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
+	hmin = 1000 * simple_strtoul(p, NULL, 10);
+	if (hmin <= 0)
+		return;
+	if (!(p = strsep(&spec, "")) || !*p)
+		return;
+	hmax = 1000 * simple_strtoul(p, NULL, 10);
+	if (hmax <= 0 || hmax <= hmin)
+		return;
+
+	fb_info.monspecs.vfmin = vmin;
+	fb_info.monspecs.vfmax = vmax;
+	fb_info.monspecs.hfmin = hmin;
+	fb_info.monspecs.hfmax = hmax;
+}
+
 int __init amifb_setup(char *options)
 {
 	char *this_opt;
-	char mcap_spec[80];
 
-	mcap_spec[0] = '\0';
 	fb_info.fontname[0] = '\0';
 
 	if (!options || !*options)
@@ -1199,7 +1233,7 @@ int __init amifb_setup(char *options)
 		} else if (!strcmp(this_opt, "ilbm"))
 			amifb_ilbm = 1;
 		else if (!strncmp(this_opt, "monitorcap:", 11))
-			strcpy(mcap_spec, this_opt+11);
+			amifb_setup_mcap(this_opt+11);
 		else if (!strncmp(this_opt, "font:", 5))
 			strcpy(fb_info.fontname, this_opt+5);
 		else if (!strncmp(this_opt, "fstart:", 7))
@@ -1211,43 +1245,6 @@ int __init amifb_setup(char *options)
 	if (min_fstrt < 48)
 		min_fstrt = 48;
 
-	if (*mcap_spec) {
-		char *p;
-		int vmin, vmax, hmin, hmax;
-
-	/* Format for monitor capabilities is: <Vmin>;<Vmax>;<Hmin>;<Hmax>
-	 * <V*> vertical freq. in Hz
-	 * <H*> horizontal freq. in kHz
-	 */
-
-		if (!(p = strsep(&mcap_spec, ";")) || !*p)
-			goto cap_invalid;
-		vmin = simple_strtoul(p, NULL, 10);
-		if (vmin <= 0)
-			goto cap_invalid;
-		if (!(p = strsep(&mcap_spec, ";")) || !*p)
-			goto cap_invalid;
-		vmax = simple_strtoul(p, NULL, 10);
-		if (vmax <= 0 || vmax <= vmin)
-			goto cap_invalid;
-		if (!(p = strsep(&mcap_spec, ";")) || !*p)
-			goto cap_invalid;
-		hmin = 1000 * simple_strtoul(p, NULL, 10);
-		if (hmin <= 0)
-			goto cap_invalid;
-		if (!(p = strsep(&mcap_spec, "")) || !*p)
-			goto cap_invalid;
-		hmax = 1000 * simple_strtoul(p, NULL, 10);
-		if (hmax <= 0 || hmax <= hmin)
-			goto cap_invalid;
-
-		fb_info.monspecs.vfmin = vmin;
-		fb_info.monspecs.vfmax = vmax;
-		fb_info.monspecs.hfmin = hmin;
-		fb_info.monspecs.hfmax = hmax;
-cap_invalid:
-		;
-	}
 	return 0;
 }
 
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c
index cc86c0b885b6..fb3bc329b9e1 100644
--- a/drivers/video/atafb.c
+++ b/drivers/video/atafb.c
@@ -2593,6 +2593,35 @@ atafb_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
 	return -EINVAL;
 }
 
+/* (un)blank/poweroff
+ * 0 = unblank
+ * 1 = blank
+ * 2 = suspend vsync
+ * 3 = suspend hsync
+ * 4 = off
+ */
+static int 
+atafb_blank(int blank, struct fb_info *info)
+{
+	unsigned short black[16];
+	struct fb_cmap cmap;
+	if (fbhw->blank && !fbhw->blank(blank))
+		return 1;
+	if (blank) {
+		memset(black, 0, 16*sizeof(unsigned short));
+		cmap.red=black;
+		cmap.green=black;
+		cmap.blue=black;
+		cmap.transp=NULL;
+		cmap.start=0;
+		cmap.len=16;
+		fb_set_cmap(&cmap, 1, info);
+	}
+	else
+		do_install_cmap(info->currcon, info);
+	return 0;
+}
+
 static struct fb_ops atafb_ops = {
 	owner:		THIS_MODULE,
 	fb_get_fix:	atafb_get_fix,
@@ -2660,35 +2689,6 @@ atafb_switch(int con, struct fb_info *info)
 	return 0;
 }
 
-/* (un)blank/poweroff
- * 0 = unblank
- * 1 = blank
- * 2 = suspend vsync
- * 3 = suspend hsync
- * 4 = off
- */
-static int 
-atafb_blank(int blank, struct fb_info *info)
-{
-	unsigned short black[16];
-	struct fb_cmap cmap;
-	if (fbhw->blank && !fbhw->blank(blank))
-		return 1;
-	if (blank) {
-		memset(black, 0, 16*sizeof(unsigned short));
-		cmap.red=black;
-		cmap.green=black;
-		cmap.blue=black;
-		cmap.transp=NULL;
-		cmap.start=0;
-		cmap.len=16;
-		fb_set_cmap(&cmap, 1, info);
-	}
-	else
-		do_install_cmap(info->currcon, info);
-	return 0;
-}
-
 int __init atafb_init(void)
 {
 	int pad;
@@ -2702,21 +2702,21 @@ int __init atafb_init(void)
 #ifdef ATAFB_EXT
 		if (external_addr) {
 			fbhw = &ext_switch;
-			fb_info.fb_setcolreg = &ext_setcolreg;
+			atafb_ops.fb_setcolreg = &ext_setcolreg;
 			break;
 		}
 #endif
 #ifdef ATAFB_TT
 		if (ATARIHW_PRESENT(TT_SHIFTER)) {
 			fbhw = &tt_switch;
-			fb_info.fb_setcolreg = &tt_setcolreg;
+			atafb_ops.fb_setcolreg = &tt_setcolreg;
 			break;
 		}
 #endif
 #ifdef ATAFB_FALCON
 		if (ATARIHW_PRESENT(VIDEL_SHIFTER)) {
 			fbhw = &falcon_switch;
-			fb_info.fb_setcolreg = &falcon_setcolreg;
+			atafb_ops.fb_setcolreg = &falcon_setcolreg;
 			request_irq(IRQ_AUTO_4, falcon_vbl_switcher, IRQ_TYPE_PRIO,
 			            "framebuffer/modeswitch", falcon_vbl_switcher);
 			break;
@@ -2726,11 +2726,11 @@ int __init atafb_init(void)
 		if (ATARIHW_PRESENT(STND_SHIFTER) ||
 		    ATARIHW_PRESENT(EXTD_SHIFTER)) {
 			fbhw = &st_switch;
-			fb_info.fb_setcolreg = &stste_setcolreg;
+			atafb_ops.fb_setcolreg = &stste_setcolreg;
 			break;
 		}
 		fbhw = &st_switch;
-		fb_info.fb_setcolreg = &stste_setcolreg;
+		atafb_ops.fb_setcolreg = &stste_setcolreg;
 		printk("Cannot determine video hardware; defaulting to ST(e)\n");
 #else /* ATAFB_STE */
 		/* no default driver included */
@@ -2824,103 +2824,10 @@ int __init atafb_init(void)
 	return 0;
 }
 
-int __init atafb_setup( char *options )
-{
-    char *this_opt;
-    int temp;
-    char ext_str[80], int_str[100];
-    char mcap_spec[80];
-    char user_mode[80];
-
-	ext_str[0]          =
-	int_str[0]          =
-	mcap_spec[0]        =
-	user_mode[0]        =
-	fb_info.fontname[0] = '\0';
-
-    if (!options || !*options)
-		return 0;
-    
-    while ((this_opt = strsep(options, ",")) != NULL) {	 
-	if (!*this_opt) continue;
-	if ((temp=get_video_mode(this_opt)))
-		default_par=temp;
-	else if (! strcmp(this_opt, "inverse"))
-		inverse=1;
-	else if (!strncmp(this_opt, "font:", 5))
-	   strcpy(fb_info.fontname, this_opt+5);
-	else if (! strncmp(this_opt, "hwscroll_",9)) {
-		hwscroll=simple_strtoul(this_opt+9, NULL, 10);
-		if (hwscroll < 0)
-			hwscroll = 0;
-		if (hwscroll > 200)
-			hwscroll = 200;
-	}
-#ifdef ATAFB_EXT
-	else if (!strcmp(this_opt,"mv300")) {
-		external_bitspercol = 8;
-		external_card_type = IS_MV300;
-	}
-	else if (!strncmp(this_opt,"external:",9))
-		strcpy(ext_str, this_opt+9);
-#endif
-	else if (!strncmp(this_opt,"internal:",9))
-		strcpy(int_str, this_opt+9);
-#ifdef ATAFB_FALCON
-	else if (!strncmp(this_opt, "eclock:", 7)) {
-		fext.f = simple_strtoul(this_opt+7, NULL, 10);
-		/* external pixelclock in kHz --> ps */
-		fext.t = 1000000000/fext.f;
-		fext.f *= 1000;
-	}
-	else if (!strncmp(this_opt, "monitorcap:", 11))
-		strcpy(mcap_spec, this_opt+11);
-#endif
-	else if (!strcmp(this_opt, "keep"))
-		DontCalcRes = 1;
-	else if (!strncmp(this_opt, "R", 1))
-		strcpy(user_mode, this_opt+1);
-    }
-
-    if (*int_str) {
-	/* Format to config extended internal video hardware like OverScan:
-	"internal:<xres>;<yres>;<xres_max>;<yres_max>;<offset>"
-	Explanation:
-	<xres>: x-resolution 
-	<yres>: y-resolution
-	The following are only needed if you have an overscan which
-	needs a black border:
-	<xres_max>: max. length of a line in pixels your OverScan hardware would allow
-	<yres_max>: max. number of lines your OverScan hardware would allow
-	<offset>: Offset from physical beginning to visible beginning
-		  of screen in bytes
-	*/
-	int xres;
-	char *p;
-
-	if (!(p = strsep(&int_str, ";")) || !*p) goto int_invalid;
-	xres = simple_strtoul(p, NULL, 10);
-	if (!(p = strsep(&int_str, ";")) || !*p) goto int_invalid;
-	sttt_xres=xres;
-	tt_yres=st_yres=simple_strtoul(p, NULL, 10);
-	if ((p=strsep(&int_str, ";")) && *p) {
-		sttt_xres_virtual=simple_strtoul(p, NULL, 10);
-	}
-	if ((p=strsep(&int_str, ";")) && *p) {
-		sttt_yres_virtual=simple_strtoul(p, NULL, 0);
-	}
-	if ((p=strsep(&int_str, ";")) && *p) {
-		ovsc_offset=simple_strtoul(p, NULL, 0);
-	}
-
-	if (ovsc_offset || (sttt_yres_virtual != st_yres))
-		use_hwscroll=0;
-      int_invalid:
-	;
-    }
 
 #ifdef ATAFB_EXT
-    if (*ext_str) {
+static void __init atafb_setup_ext(char *spec)
+{
 	int		xres, xres_virtual, yres, depth, planes;
 	unsigned long addr, len;
 	char *p;
@@ -2935,20 +2842,27 @@ int __init atafb_setup( char *options )
 	 *
 	 * Even xres_virtual is available, we neither support panning nor hw-scrolling!
 	 */
-	if (!(p = strsep(&ext_str, ";")) || !*p) goto ext_invalid;
+	if (!(p = strsep(&spec, ";")) || !*p)
+	    return;
 	xres_virtual = xres = simple_strtoul(p, NULL, 10);
-	if (xres <= 0) goto ext_invalid;
+	if (xres <= 0)
+	    return;
 
-	if (!(p = strsep(&ext_str, ";")) || !*p) goto ext_invalid;
+	if (!(p = strsep(&spec, ";")) || !*p)
+	    return;
 	yres = simple_strtoul(p, NULL, 10);
-	if (yres <= 0) goto ext_invalid;
+	if (yres <= 0)
+	    return;
 
-	if (!(p = strsep(&ext_str, ";")) || !*p) goto ext_invalid;
+	if (!(p = strsep(&spec, ";")) || !*p)
+	    return;
 	depth = simple_strtoul(p, NULL, 10);
 	if (depth != 1 && depth != 2 && depth != 4 && depth != 8 &&
-		depth != 16 && depth != 24) goto ext_invalid;
+		depth != 16 && depth != 24)
+	    return;
 
-	if (!(p = strsep(&ext_str, ";")) || !*p) goto ext_invalid;
+	if (!(p = strsep(&spec, ";")) || !*p)
+	    return;
 	if (*p == 'i')
 		planes = FB_TYPE_INTERLEAVED_PLANES;
 	else if (*p == 'p')
@@ -2958,37 +2872,38 @@ int __init atafb_setup( char *options )
 	else if (*p == 't')
 		planes = -1; /* true color */
 	else
-		goto ext_invalid;
+		return;
 
 
-	if (!(p = strsep(&ext_str, ";")) || !*p) goto ext_invalid;
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
 	addr = simple_strtoul(p, NULL, 0);
 
-	if (!(p = strsep(&ext_str, ";")) || !*p)
+	if (!(p = strsep(&spec, ";")) || !*p)
 		len = xres*yres*depth/8;
 	else
 		len = simple_strtoul(p, NULL, 0);
 
-	if ((p = strsep(&ext_str, ";")) && *p) {
+	if ((p = strsep(&spec, ";")) && *p) {
 		external_vgaiobase=simple_strtoul(p, NULL, 0);
 	}
 
-	if ((p = strsep(&ext_str, ";")) && *p) {
+	if ((p = strsep(&spec, ";")) && *p) {
 		external_bitspercol = simple_strtoul(p, NULL, 0);
 		if (external_bitspercol > 8)
 			external_bitspercol = 8;
 		else if (external_bitspercol < 1)
 			external_bitspercol = 1;
 	}
-	
-	if ((p = strsep(&ext_str, ";")) && *p) {
+
+	if ((p = strsep(&spec, ";")) && *p) {
 		if (!strcmp(p, "vga"))
 			external_card_type = IS_VGA;
 		if (!strcmp(p, "mv300"))
 			external_card_type = IS_MV300;
 	}
 
-	if ((p = strsep(&ext_str, ";")) && *p) {
+	if ((p = strsep(&spec, ";")) && *p) {
 		xres_virtual = simple_strtoul(p, NULL, 10);
 		if (xres_virtual < xres)
 			xres_virtual = xres;
@@ -3003,7 +2918,7 @@ int __init atafb_setup( char *options )
 	external_pmode = planes;
 	external_addr  = (void *)addr;
 	external_len   = len;
-		
+
 	if (external_card_type == IS_MV300)
 	  switch (external_depth) {
 	    case 1:
@@ -3016,14 +2931,52 @@ int __init atafb_setup( char *options )
 	      MV300_reg = MV300_reg_8bit;
 	      break;
 	    }
-
-      ext_invalid:
-	;
-    }
+}
 #endif /* ATAFB_EXT */
 
+
+static void __init atafb_setup_int(char *spec)
+{
+	/* Format to config extended internal video hardware like OverScan:
+	"internal:<xres>;<yres>;<xres_max>;<yres_max>;<offset>"
+	Explanation:
+	<xres>: x-resolution 
+	<yres>: y-resolution
+	The following are only needed if you have an overscan which
+	needs a black border:
+	<xres_max>: max. length of a line in pixels your OverScan hardware would allow
+	<yres_max>: max. number of lines your OverScan hardware would allow
+	<offset>: Offset from physical beginning to visible beginning
+		  of screen in bytes
+	*/
+	int xres;
+	char *p;
+
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
+	xres = simple_strtoul(p, NULL, 10);
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
+	sttt_xres=xres;
+	tt_yres=st_yres=simple_strtoul(p, NULL, 10);
+	if ((p=strsep(&spec, ";")) && *p) {
+		sttt_xres_virtual=simple_strtoul(p, NULL, 10);
+	}
+	if ((p=strsep(&spec, ";")) && *p) {
+		sttt_yres_virtual=simple_strtoul(p, NULL, 0);
+	}
+	if ((p=strsep(&spec, ";")) && *p) {
+		ovsc_offset=simple_strtoul(p, NULL, 0);
+	}
+
+	if (ovsc_offset || (sttt_yres_virtual != st_yres))
+		use_hwscroll=0;
+}
+
+
 #ifdef ATAFB_FALCON
-    if (*mcap_spec) {
+static void __init atafb_setup_mcap(char *spec)
+{
 	char *p;
 	int vmin, vmax, hmin, hmax;
 
@@ -3031,51 +2984,110 @@ int __init atafb_setup( char *options )
 	 * <V*> vertical freq. in Hz
 	 * <H*> horizontal freq. in kHz
 	 */
-	if (!(p = strsep(&mcap_spec, ";")) || !*p) goto cap_invalid;
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
 	vmin = simple_strtoul(p, NULL, 10);
-	if (vmin <= 0) goto cap_invalid;
-	if (!(p = strsep(&mcap_spec, ";")) || !*p) goto cap_invalid;
+	if (vmin <= 0)
+		return;
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
 	vmax = simple_strtoul(p, NULL, 10);
-	if (vmax <= 0 || vmax <= vmin) goto cap_invalid;
-	if (!(p = strsep(&mcap_spec, ";")) || !*p) goto cap_invalid;
+	if (vmax <= 0 || vmax <= vmin)
+		return;
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
 	hmin = 1000 * simple_strtoul(p, NULL, 10);
-	if (hmin <= 0) goto cap_invalid;
-	if (!(p = strsep(&mcap_spec, "")) || !*p) goto cap_invalid;
+	if (hmin <= 0)
+		return;
+	if (!(p = strsep(&spec, "")) || !*p)
+		return;
 	hmax = 1000 * simple_strtoul(p, NULL, 10);
-	if (hmax <= 0 || hmax <= hmin) goto cap_invalid;
+	if (hmax <= 0 || hmax <= hmin)
+		return;
 
 	fb_info.monspecs.vfmin = vmin;
 	fb_info.monspecs.vfmax = vmax;
 	fb_info.monspecs.hfmin = hmin;
 	fb_info.monspecs.hfmax = hmax;
-      cap_invalid:
-	;
-    }
-#endif
+}
+#endif /* ATAFB_FALCON */
 
-	if (*user_mode) {
-		/* Format of user defined video mode is: <xres>;<yres>;<depth>
-		 */
-		char *p;
-		int xres, yres, depth, temp;
-
-		if (!(p = strsep(&user_mode, ";")) || !*p) goto user_invalid;
-		xres = simple_strtoul(p, NULL, 10);
-		if (!(p = strsep(&user_mode, ";")) || !*p) goto user_invalid;
-		yres = simple_strtoul(p, NULL, 10);
-		if (!(p = strsep(&user_mode, "")) || !*p) goto user_invalid;
-		depth = simple_strtoul(p, NULL, 10);
-		if ((temp=get_video_mode("user0"))) {
-			default_par=temp;
-			atafb_predefined[default_par-1].xres = xres;
-			atafb_predefined[default_par-1].yres = yres;
-			atafb_predefined[default_par-1].bits_per_pixel = depth;
-		}
 
-	  user_invalid:
-		;
+static void __init atafb_setup_user(char *spec)
+{
+	/* Format of user defined video mode is: <xres>;<yres>;<depth>
+	 */
+	char *p;
+	int xres, yres, depth, temp;
+
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
+	xres = simple_strtoul(p, NULL, 10);
+	if (!(p = strsep(&spec, ";")) || !*p)
+		return;
+	yres = simple_strtoul(p, NULL, 10);
+	if (!(p = strsep(&spec, "")) || !*p)
+		return;
+	depth = simple_strtoul(p, NULL, 10);
+	if ((temp=get_video_mode("user0"))) {
+		default_par=temp;
+		atafb_predefined[default_par-1].xres = xres;
+		atafb_predefined[default_par-1].yres = yres;
+		atafb_predefined[default_par-1].bits_per_pixel = depth;
 	}
-	return 0;
+}
+
+int __init atafb_setup( char *options )
+{
+    char *this_opt;
+    int temp;
+
+    fb_info.fontname[0] = '\0';
+
+    if (!options || !*options)
+		return 0;
+    
+    while ((this_opt = strsep(&options, ",")) != NULL) {	 
+	if (!*this_opt) continue;
+	if ((temp=get_video_mode(this_opt)))
+		default_par=temp;
+	else if (! strcmp(this_opt, "inverse"))
+		inverse=1;
+	else if (!strncmp(this_opt, "font:", 5))
+	   strcpy(fb_info.fontname, this_opt+5);
+	else if (! strncmp(this_opt, "hwscroll_",9)) {
+		hwscroll=simple_strtoul(this_opt+9, NULL, 10);
+		if (hwscroll < 0)
+			hwscroll = 0;
+		if (hwscroll > 200)
+			hwscroll = 200;
+	}
+#ifdef ATAFB_EXT
+	else if (!strcmp(this_opt,"mv300")) {
+		external_bitspercol = 8;
+		external_card_type = IS_MV300;
+	}
+	else if (!strncmp(this_opt,"external:",9))
+		atafb_setup_ext(this_opt+9);
+#endif
+	else if (!strncmp(this_opt,"internal:",9))
+		atafb_setup_int(this_opt+9);
+#ifdef ATAFB_FALCON
+	else if (!strncmp(this_opt, "eclock:", 7)) {
+		fext.f = simple_strtoul(this_opt+7, NULL, 10);
+		/* external pixelclock in kHz --> ps */
+		fext.t = 1000000000/fext.f;
+		fext.f *= 1000;
+	}
+	else if (!strncmp(this_opt, "monitorcap:", 11))
+		atafb_setup_mcap(this_opt+11);
+#endif
+	else if (!strcmp(this_opt, "keep"))
+		DontCalcRes = 1;
+	else if (!strncmp(this_opt, "R", 1))
+		atafb_setup_user(this_opt+1);
+    }
+    return 0;
 }
 
 #ifdef MODULE
diff --git a/drivers/video/aty/Makefile b/drivers/video/aty/Makefile
index 68dfb5696d28..747a0f887e6e 100644
--- a/drivers/video/aty/Makefile
+++ b/drivers/video/aty/Makefile
@@ -3,7 +3,7 @@ export-objs    :=  atyfb_base.o mach64_accel.o
 
 obj-$(CONFIG_FB_ATY) += atyfb.o
 
-atyfb-y				:= atyfb_base.o mach64_accel.o
+atyfb-y				:= atyfb_base.o mach64_accel.o ../cfbimgblt.o
 atyfb-$(CONFIG_FB_ATY_GX)	+= mach64_gx.o
 atyfb-$(CONFIG_FB_ATY_CT)	+= mach64_ct.o mach64_cursor.o
 atyfb-objs			:= $(atyfb-y)
diff --git a/drivers/video/aty/atyfb.h b/drivers/video/aty/atyfb.h
index 75826bf3b405..309ac8c87a5f 100644
--- a/drivers/video/aty/atyfb.h
+++ b/drivers/video/aty/atyfb.h
@@ -1,4 +1,3 @@
-
 /*
  *  ATI Frame Buffer Device Driver Core Definitions
  */
@@ -11,137 +10,109 @@
      */
 
 struct crtc {
-    u32 vxres;
-    u32 vyres;
-    u32 xoffset;
-    u32 yoffset;
-    u32 bpp;
-    u32 h_tot_disp;
-    u32 h_sync_strt_wid;
-    u32 v_tot_disp;
-    u32 v_sync_strt_wid;
-    u32 off_pitch;
-    u32 gen_cntl;
-    u32 dp_pix_width;	/* acceleration */
-    u32 dp_chain_mask;	/* acceleration */
+	u32 vxres;
+	u32 vyres;
+	u32 xoffset;
+	u32 yoffset;
+	u32 bpp;
+	u32 h_tot_disp;
+	u32 h_sync_strt_wid;
+	u32 v_tot_disp;
+	u32 v_sync_strt_wid;
+	u32 off_pitch;
+	u32 gen_cntl;
+	u32 dp_pix_width;	/* acceleration */
+	u32 dp_chain_mask;	/* acceleration */
 };
 
 struct pll_514 {
-    u8 m;
-    u8 n;
+	u8 m;
+	u8 n;
 };
 
-struct pll_18818
-{
-    u32 program_bits;
-    u32 locationAddr;
-    u32 period_in_ps;
-    u32 post_divider;
+struct pll_18818 {
+	u32 program_bits;
+	u32 locationAddr;
+	u32 period_in_ps;
+	u32 post_divider;
 };
 
 struct pll_ct {
-    u8 pll_ref_div;
-    u8 pll_gen_cntl;
-    u8 mclk_fb_div;
-    u8 pll_vclk_cntl;
-    u8 vclk_post_div;
-    u8 vclk_fb_div;
-    u8 pll_ext_cntl;
-    u32 dsp_config;	/* Mach64 GTB DSP */
-    u32 dsp_on_off;	/* Mach64 GTB DSP */
-    u8 mclk_post_div_real;
-    u8 vclk_post_div_real;
+	u8 pll_ref_div;
+	u8 pll_gen_cntl;
+	u8 mclk_fb_div;
+	u8 pll_vclk_cntl;
+	u8 vclk_post_div;
+	u8 vclk_fb_div;
+	u8 pll_ext_cntl;
+	u32 dsp_config;		/* Mach64 GTB DSP */
+	u32 dsp_on_off;		/* Mach64 GTB DSP */
+	u8 mclk_post_div_real;
+	u8 vclk_post_div_real;
 };
 
 union aty_pll {
-    struct pll_ct ct;
-    struct pll_514 ibm514;
-    struct pll_18818 ics2595;
+	struct pll_ct ct;
+	struct pll_514 ibm514;
+	struct pll_18818 ics2595;
 };
 
-
     /*
      *  The hardware parameters for each card
      */
 
-struct atyfb_par {
-    struct crtc crtc;
-    union aty_pll pll;
-    u32 accel_flags;
-};
-
 struct aty_cursor {
-    int	enable;
-    int on;
-    int vbl_cnt;
-    int blink_rate;
-    u32 offset;
-    struct {
-        u16 x, y;
-    } pos, hot, size;
-    u32 color[2];
-    u8 bits[8][64];
-    u8 mask[8][64];
-    u8 *ram;
-    struct timer_list *timer;
+	int enable;
+	int on;
+	int vbl_cnt;
+	int blink_rate;
+	u32 offset;
+	struct {
+		u16 x, y;
+	} pos, hot, size;
+	u32 color[2];
+	u8 bits[8][64];
+	u8 mask[8][64];
+	u8 *ram;
+	struct timer_list *timer;
 };
 
-struct fb_info_aty {
-    struct fb_info fb_info;
-    struct fb_info_aty *next;
-    unsigned long ati_regbase_phys;
-    unsigned long ati_regbase;
-    unsigned long frame_buffer_phys;
-    unsigned long frame_buffer;
-    unsigned long clk_wr_offset;
-    struct pci_mmap_map *mmap_map;
-    struct aty_cursor *cursor;
-    struct aty_cmap_regs *aty_cmap_regs;
-    struct { u8 red, green, blue, pad; } palette[256];
-    struct atyfb_par default_par;
-    struct atyfb_par current_par;
-    u32 features;
-    u32 total_vram;
-    u32 ref_clk_per;
-    u32 pll_per;
-    u32 mclk_per;
-    u8 bus_type;
-    u8 ram_type;
-    u8 mem_refresh_rate;
-    const struct aty_dac_ops *dac_ops;
-    const struct aty_pll_ops *pll_ops;
-    struct display disp;
-    struct display_switch dispsw;
-    union {
-#ifdef FBCON_HAS_CFB16
-	u16 cfb16[16];
-#endif
-#ifdef FBCON_HAS_CFB24
-	u32 cfb24[16];
-#endif
-#ifdef FBCON_HAS_CFB32
-	u32 cfb32[16];
-#endif
-    } fbcon_cmap;
-    u8 blitter_may_be_busy;
+struct atyfb_par {
+	struct aty_cmap_regs *aty_cmap_regs;
+	const struct aty_dac_ops *dac_ops;
+	const struct aty_pll_ops *pll_ops;
+	struct aty_cursor *cursor;
+	unsigned long ati_regbase;
+	unsigned long clk_wr_offset;
+	struct crtc crtc;
+	union aty_pll pll;
+	u32 features;
+	u32 ref_clk_per;
+	u32 pll_per;
+	u32 mclk_per;
+	u8 bus_type;
+	u8 ram_type;
+	u8 mem_refresh_rate;
+	u8 blitter_may_be_busy;
+	u32 accel_flags;
 #ifdef __sparc__
-    u8 mmaped;
-    int open;
-    int vtconsole;
-    int consolecnt;
+	struct pci_mmap_map *mmap_map;
+	int consolecnt;
+	int vtconsole;
+	u8 mmaped;
+	int open;
 #endif
 #ifdef CONFIG_PMAC_PBOOK
-    unsigned char *save_framebuffer;
-    unsigned long save_pll[64];
+	unsigned char *save_framebuffer;
+	unsigned long save_pll[64];
 #endif
 };
-
-
+    
     /*
      *  ATI Mach64 features
      */
 
-#define M64_HAS(feature)	((info)->features & (M64F_##feature))
+#define M64_HAS(feature)	((par)->features & (M64F_##feature))
 
 #define M64F_RESET_3D		0x00000001
 #define M64F_MAGIC_FIFO		0x00000002
@@ -169,63 +140,63 @@ struct fb_info_aty {
      *  Register access
      */
 
-static inline u32 aty_ld_le32(int regindex,
-			      const struct fb_info_aty *info)
+static inline u32 aty_ld_le32(int regindex, const struct atyfb_par *par)
 {
-    /* Hack for bloc 1, should be cleanly optimized by compiler */
-    if (regindex >= 0x400)
-    	regindex -= 0x800;
+	/* Hack for bloc 1, should be cleanly optimized by compiler */
+	if (regindex >= 0x400)
+		regindex -= 0x800;
 
 #if defined(__mc68000__)
-    return le32_to_cpu(*((volatile u32 *)(info->ati_regbase+regindex)));
+	return
+	    le32_to_cpu(*((volatile u32 *) (par->ati_regbase + regindex)));
 #else
-    return readl (info->ati_regbase + regindex);
+	return readl(par->ati_regbase + regindex);
 #endif
 }
 
 static inline void aty_st_le32(int regindex, u32 val,
-			       const struct fb_info_aty *info)
+			       const struct atyfb_par *par)
 {
-    /* Hack for bloc 1, should be cleanly optimized by compiler */
-    if (regindex >= 0x400)
-    	regindex -= 0x800;
+	/* Hack for bloc 1, should be cleanly optimized by compiler */
+	if (regindex >= 0x400)
+		regindex -= 0x800;
 
 #if defined(__mc68000__)
-    *((volatile u32 *)(info->ati_regbase+regindex)) = cpu_to_le32(val);
+	*((volatile u32 *) (par->ati_regbase + regindex)) =
+	    cpu_to_le32(val);
 #else
-    writel (val, info->ati_regbase + regindex);
+	writel(val, par->ati_regbase + regindex);
 #endif
 }
 
-static inline u8 aty_ld_8(int regindex,
-			  const struct fb_info_aty *info)
+static inline u8 aty_ld_8(int regindex, const struct atyfb_par *par)
 {
-    /* Hack for bloc 1, should be cleanly optimized by compiler */
-    if (regindex >= 0x400)
-    	regindex -= 0x800;
+	/* Hack for bloc 1, should be cleanly optimized by compiler */
+	if (regindex >= 0x400)
+		regindex -= 0x800;
 
-    return readb (info->ati_regbase + regindex);
+	return readb(par->ati_regbase + regindex);
 }
 
 static inline void aty_st_8(int regindex, u8 val,
-			    const struct fb_info_aty *info)
+			    const struct atyfb_par *par)
 {
-    /* Hack for bloc 1, should be cleanly optimized by compiler */
-    if (regindex >= 0x400)
-    	regindex -= 0x800;
+	/* Hack for bloc 1, should be cleanly optimized by compiler */
+	if (regindex >= 0x400)
+		regindex -= 0x800;
 
-    writeb (val, info->ati_regbase + regindex);
+	writeb(val, par->ati_regbase + regindex);
 }
 
-static inline u8 aty_ld_pll(int offset, const struct fb_info_aty *info)
+static inline u8 aty_ld_pll(int offset, const struct atyfb_par *par)
 {
-    u8 res;
+	u8 res;
 
-    /* write addr byte */
-    aty_st_8(CLOCK_CNTL + 1, (offset << 2), info);
-    /* read the register value */
-    res = aty_ld_8(CLOCK_CNTL + 2, info);
-    return res;
+	/* write addr byte */
+	aty_st_8(CLOCK_CNTL + 1, (offset << 2), par);
+	/* read the register value */
+	res = aty_ld_8(CLOCK_CNTL + 2, par);
+	return res;
 }
 
 
@@ -234,15 +205,15 @@ static inline u8 aty_ld_pll(int offset, const struct fb_info_aty *info)
      */
 
 struct aty_dac_ops {
-    int (*set_dac)(const struct fb_info_aty *info, const union aty_pll *pll,
-		   u32 bpp, u32 accel);
+	int (*set_dac) (const struct fb_info * info,
+			const union aty_pll * pll, u32 bpp, u32 accel);
 };
 
-extern const struct aty_dac_ops aty_dac_ibm514;		/* IBM RGB514 */
+extern const struct aty_dac_ops aty_dac_ibm514;	/* IBM RGB514 */
 extern const struct aty_dac_ops aty_dac_ati68860b;	/* ATI 68860-B */
 extern const struct aty_dac_ops aty_dac_att21c498;	/* AT&T 21C498 */
 extern const struct aty_dac_ops aty_dac_unsupported;	/* unsupported */
-extern const struct aty_dac_ops aty_dac_ct;		/* Integrated */
+extern const struct aty_dac_ops aty_dac_ct;	/* Integrated */
 
 
     /*
@@ -250,25 +221,26 @@ extern const struct aty_dac_ops aty_dac_ct;		/* Integrated */
      */
 
 struct aty_pll_ops {
-    int (*var_to_pll)(const struct fb_info_aty *info, u32 vclk_per, u8 bpp,
-		      union aty_pll *pll);
-    u32 (*pll_to_var)(const struct fb_info_aty *info,
-	    	      const union aty_pll *pll);
-    void (*set_pll)(const struct fb_info_aty *info, const union aty_pll *pll);
+	int (*var_to_pll) (const struct fb_info * info, u32 vclk_per,
+			   u8 bpp, union aty_pll * pll);
+	 u32(*pll_to_var) (const struct fb_info * info,
+			   const union aty_pll * pll);
+	void (*set_pll) (const struct fb_info * info,
+			 const union aty_pll * pll);
 };
 
 extern const struct aty_pll_ops aty_pll_ati18818_1;	/* ATI 18818 */
 extern const struct aty_pll_ops aty_pll_stg1703;	/* STG 1703 */
-extern const struct aty_pll_ops aty_pll_ch8398;		/* Chrontel 8398 */
+extern const struct aty_pll_ops aty_pll_ch8398;	/* Chrontel 8398 */
 extern const struct aty_pll_ops aty_pll_att20c408;	/* AT&T 20C408 */
-extern const struct aty_pll_ops aty_pll_ibm514;		/* IBM RGB514 */
+extern const struct aty_pll_ops aty_pll_ibm514;	/* IBM RGB514 */
 extern const struct aty_pll_ops aty_pll_unsupported;	/* unsupported */
-extern const struct aty_pll_ops aty_pll_ct;		/* Integrated */
+extern const struct aty_pll_ops aty_pll_ct;	/* Integrated */
 
 
-extern void aty_set_pll_ct(const struct fb_info_aty *info,
+extern void aty_set_pll_ct(const struct fb_info *info,
 			   const union aty_pll *pll);
-extern void aty_calc_pll_ct(const struct fb_info_aty *info,
+extern void aty_calc_pll_ct(const struct fb_info *info,
 			    struct pll_ct *pll);
 
 
@@ -276,10 +248,10 @@ extern void aty_calc_pll_ct(const struct fb_info_aty *info,
      *  Hardware cursor support
      */
 
-extern struct aty_cursor *aty_init_cursor(struct fb_info_aty *fb);
+extern struct aty_cursor *aty_init_cursor(struct fb_info *info);
 extern void atyfb_cursor(struct display *p, int mode, int x, int y);
-extern void aty_set_cursor_color(struct fb_info_aty *fb);
-extern void aty_set_cursor_shape(struct fb_info_aty *fb);
+extern void aty_set_cursor_color(struct fb_info *info);
+extern void aty_set_cursor_shape(struct fb_info *info);
 extern int atyfb_set_font(struct display *d, int width, int height);
 
 
@@ -287,25 +259,23 @@ extern int atyfb_set_font(struct display *d, int width, int height);
      *  Hardware acceleration
      */
 
-static inline void wait_for_fifo(u16 entries, const struct fb_info_aty *info)
+static inline void wait_for_fifo(u16 entries, const struct atyfb_par *par)
 {
-    while ((aty_ld_le32(FIFO_STAT, info) & 0xffff) >
-	   ((u32)(0x8000 >> entries)));
+	while ((aty_ld_le32(FIFO_STAT, par) & 0xffff) >
+	       ((u32) (0x8000 >> entries)));
 }
 
-static inline void wait_for_idle(struct fb_info_aty *info)
+static inline void wait_for_idle(struct atyfb_par *par)
 {
-    wait_for_fifo(16, info);
-    while ((aty_ld_le32(GUI_STAT, info) & 1)!= 0);
-    info->blitter_may_be_busy = 0;
+	wait_for_fifo(16, par);
+	while ((aty_ld_le32(GUI_STAT, par) & 1) != 0);
+	par->blitter_may_be_busy = 0;
 }
 
-extern void aty_reset_engine(const struct fb_info_aty *info);
-extern void aty_init_engine(const struct atyfb_par *par,
-			    struct fb_info_aty *info);
-extern void aty_rectfill(int dstx, int dsty, u_int width, u_int height,
-			 u_int color, struct fb_info_aty *info);
-
+extern void aty_reset_engine(const struct atyfb_par *par);
+extern void aty_init_engine(struct atyfb_par *par,
+			    struct fb_info *info);
+extern void atyfb_fillrect(struct fb_info *info, struct fb_fillrect *rect);
 
     /*
      *  Text console acceleration
@@ -315,4 +285,3 @@ extern const struct display_switch fbcon_aty8;
 extern const struct display_switch fbcon_aty16;
 extern const struct display_switch fbcon_aty24;
 extern const struct display_switch fbcon_aty32;
-
diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c
index 32ec5e0a2085..7682c503409e 100644
--- a/drivers/video/aty/atyfb_base.c
+++ b/drivers/video/aty/atyfb_base.c
@@ -71,7 +71,7 @@
 #include <video/fbcon-cfb24.h>
 #include <video/fbcon-cfb32.h>
 
-#include "mach64.h"
+#include <video/mach64.h>
 #include "atyfb.h"
 
 #ifdef __powerpc__
@@ -93,9 +93,6 @@
 #ifdef CONFIG_NVRAM
 #include <linux/nvram.h>
 #endif
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#endif
 #ifdef CONFIG_PMAC_BACKLIGHT
 #include <asm/backlight.h>
 #endif
@@ -121,21 +118,28 @@
      */
 
 struct aty_cmap_regs {
-    u8 windex;
-    u8 lut;
-    u8 mask;
-    u8 rindex;
-    u8 cntl;
+	u8 windex;
+	u8 lut;
+	u8 mask;
+	u8 rindex;
+	u8 cntl;
 };
 
 struct pci_mmap_map {
-    unsigned long voff;
-    unsigned long poff;
-    unsigned long size;
-    unsigned long prot_flag;
-    unsigned long prot_mask;
+	unsigned long voff;
+	unsigned long poff;
+	unsigned long size;
+	unsigned long prot_flag;
+	unsigned long prot_mask;
 };
 
+static struct fb_fix_screeninfo atyfb_fix __initdata = {
+	id:		"ATY Mach64",
+	type:		FB_TYPE_PACKED_PIXELS,
+	visual:		FB_VISUAL_PSEUDOCOLOR,
+	xpanstep:	8,
+	ypanstep:	1,
+};
 
     /*
      *  Frame buffer device API
@@ -144,20 +148,16 @@ struct pci_mmap_map {
 static int atyfb_open(struct fb_info *info, int user);
 static int atyfb_release(struct fb_info *info, int user);
 static int atyfb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			 struct fb_info *fb);
+			 struct fb_info *info);
 static int atyfb_get_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *fb);
+			 struct fb_info *info);
 static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *fb);
+			 struct fb_info *info);
 static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-			 u_int transp, struct fb_info *fb);
+			   u_int transp, struct fb_info *info);
 static int atyfb_pan_display(struct fb_var_screeninfo *var, int con,
-			     struct fb_info *fb);
-static int atyfb_blank(int blank, struct fb_info *fb);
-static int atyfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info);
-static int atyfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info);
+			     struct fb_info *info);
+static int atyfb_blank(int blank, struct fb_info *info);
 static int atyfb_ioctl(struct inode *inode, struct file *file, u_int cmd,
 		       u_long arg, int con, struct fb_info *info);
 #ifdef __sparc__
@@ -171,45 +171,42 @@ static int atyfb_rasterimg(struct fb_info *info, int start);
      *  Interface to the low level console driver
      */
 
-static int atyfbcon_switch(int con, struct fb_info *fb);
-static int atyfbcon_updatevar(int con, struct fb_info *fb);
+static int atyfbcon_updatevar(int con, struct fb_info *info);
 
     /*
      *  Internal routines
      */
 
-static int aty_init(struct fb_info_aty *info, const char *name);
+static int aty_init(struct fb_info *info, const char *name);
 #ifdef CONFIG_ATARI
 static int store_video_par(char *videopar, unsigned char m64_num);
 #endif
 
-static void aty_set_crtc(const struct fb_info_aty *info,
+static void aty_set_crtc(const struct atyfb_par *par,
 			 const struct crtc *crtc);
-static int aty_var_to_crtc(const struct fb_info_aty *info,
+static int aty_var_to_crtc(const struct fb_info *info,
 			   const struct fb_var_screeninfo *var,
 			   struct crtc *crtc);
 static int aty_crtc_to_var(const struct crtc *crtc,
 			   struct fb_var_screeninfo *var);
 
-static void atyfb_set_par(const struct atyfb_par *par,
-			  struct fb_info_aty *info);
+static void atyfb_set_par(struct atyfb_par *par,
+			  struct fb_info *info);
 static int atyfb_decode_var(const struct fb_var_screeninfo *var,
 			    struct atyfb_par *par,
-			    const struct fb_info_aty *info);
+			    const struct fb_info *info);
 static int atyfb_encode_var(struct fb_var_screeninfo *var,
 			    const struct atyfb_par *par,
-			    const struct fb_info_aty *info);
+			    const struct fb_info *info);
 static void set_off_pitch(struct atyfb_par *par,
-			  const struct fb_info_aty *info);
+			  const struct fb_info *info);
 static int encode_fix(struct fb_fix_screeninfo *fix,
 		      const struct atyfb_par *par,
-		      const struct fb_info_aty *info);
-static void atyfb_set_dispsw(struct display *disp, struct fb_info_aty *info,
-			     int bpp, int accel);
-static int atyfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
-			 u_int *transp, struct fb_info *fb);
+		      const struct fb_info *info);
+static void atyfb_set_dispsw(struct display *disp,
+			     struct fb_info *info);
 #ifdef CONFIG_PPC
-static int read_aty_sense(const struct fb_info_aty *info);
+static int read_aty_sense(const struct fb_info *info);
 #endif
 
 
@@ -219,26 +216,26 @@ static int read_aty_sense(const struct fb_info_aty *info);
 
 int atyfb_init(void);
 #ifndef MODULE
-int atyfb_setup(char*);
+int atyfb_setup(char *);
 #endif
 
 static struct fb_ops atyfb_ops = {
-	owner:		THIS_MODULE,
-	fb_open:	atyfb_open,
-	fb_release:	atyfb_release,
-	fb_get_fix:	atyfb_get_fix,
-	fb_get_var:	atyfb_get_var,
-	fb_set_var:	atyfb_set_var,
-	fb_get_cmap:	atyfb_get_cmap,
-	fb_set_cmap:	atyfb_set_cmap,
-	fb_setcolreg:	atyfb_setcolreg,
-	fb_pan_display:	atyfb_pan_display,
-	fb_blank:	atyfb_blank,
-	fb_ioctl:	atyfb_ioctl,
+	owner:THIS_MODULE,
+	fb_open:atyfb_open,
+	fb_release:atyfb_release,
+	fb_get_fix:atyfb_get_fix,
+	fb_get_var:atyfb_get_var,
+	fb_set_var:atyfb_set_var,
+	fb_get_cmap:gen_get_cmap,
+	fb_set_cmap:gen_set_cmap,
+	fb_setcolreg:atyfb_setcolreg,
+	fb_pan_display:atyfb_pan_display,
+	fb_blank:atyfb_blank,
+	fb_ioctl:atyfb_ioctl,
 #ifdef __sparc__
-	fb_mmap:	atyfb_mmap,
+	fb_mmap:atyfb_mmap,
 #endif
-	fb_rasterimg:	atyfb_rasterimg,
+	fb_rasterimg:atyfb_rasterimg,
 };
 
 static char atyfb_name[16] = "ATY Mach64";
@@ -288,7 +285,8 @@ static char m64n_gtc_ba[] __initdata = "3D RAGE PRO (BGA, AGP)";
 static char m64n_gtc_ba1[] __initdata = "3D RAGE PRO (BGA, AGP, 1x only)";
 static char m64n_gtc_bp[] __initdata = "3D RAGE PRO (BGA, PCI)";
 static char m64n_gtc_pp[] __initdata = "3D RAGE PRO (PQFP, PCI)";
-static char m64n_gtc_ppl[] __initdata = "3D RAGE PRO (PQFP, PCI, limited 3D)";
+static char m64n_gtc_ppl[] __initdata =
+    "3D RAGE PRO (PQFP, PCI, limited 3D)";
 static char m64n_xl[] __initdata = "3D RAGE (XL)";
 static char m64n_ltp_a[] __initdata = "3D RAGE LT PRO (AGP)";
 static char m64n_ltp_p[] __initdata = "3D RAGE LT PRO (PCI)";
@@ -297,63 +295,132 @@ static char m64n_mob_a[] __initdata = "3D RAGE Mobility (AGP)";
 
 
 static struct {
-    u16 pci_id, chip_type;
-    u8 rev_mask, rev_val;
-    const char *name;
-    int pll, mclk;
-    u32 features;
+	u16 pci_id, chip_type;
+	u8 rev_mask, rev_val;
+	const char *name;
+	int pll, mclk;
+	u32 features;
 } aty_chips[] __initdata = {
 #ifdef CONFIG_FB_ATY_GX
-    /* Mach64 GX */
-    { 0x4758, 0x00d7, 0x00, 0x00, m64n_gx,      135,  50, M64F_GX },
-    { 0x4358, 0x0057, 0x00, 0x00, m64n_cx,      135,  50, M64F_GX },
-#endif /* CONFIG_FB_ATY_GX */
-
+	/* Mach64 GX */
+	{
+	0x4758, 0x00d7, 0x00, 0x00, m64n_gx, 135, 50, M64F_GX}, {
+	0x4358, 0x0057, 0x00, 0x00, m64n_cx, 135, 50, M64F_GX},
+#endif				/* CONFIG_FB_ATY_GX */
 #ifdef CONFIG_FB_ATY_CT
-    /* Mach64 CT */
-    { 0x4354, 0x4354, 0x00, 0x00, m64n_ct,      135,  60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO },
-    { 0x4554, 0x4554, 0x00, 0x00, m64n_et,      135,  60, M64F_CT | M64F_INTEGRATED | M64F_CT_BUS | M64F_MAGIC_FIFO },
-
-    /* Mach64 VT */
-    { 0x5654, 0x5654, 0xc7, 0x00, m64n_vta3,    170,  67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 },
-    { 0x5654, 0x5654, 0xc7, 0x40, m64n_vta4,    200,  67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_MAGIC_POSTDIV },
-    { 0x5654, 0x5654, 0x00, 0x00, m64n_vtb,     200,  67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 },
-    { 0x5655, 0x5655, 0x00, 0x00, m64n_vtb,     200,  67, M64F_VT | M64F_INTEGRATED | M64F_VT_BUS | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL },
-    { 0x5656, 0x5656, 0x00, 0x00, m64n_vt4,     230,  83, M64F_VT | M64F_INTEGRATED | M64F_GTB_DSP },
-
-    /* Mach64 GT (3D RAGE) */
-    { 0x4754, 0x4754, 0x07, 0x00, m64n_gt,      135,  63, M64F_GT | M64F_INTEGRATED | M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_EXTRA_BRIGHT },
-    { 0x4754, 0x4754, 0x07, 0x01, m64n_gt,      170,  67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-    { 0x4754, 0x4754, 0x07, 0x02, m64n_gt,      200,  67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-    { 0x4755, 0x4755, 0x00, 0x00, m64n_gtb,     200,  67, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-    { 0x4756, 0x4756, 0x00, 0x00, m64n_iic_p,   230,  83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-    { 0x4757, 0x4757, 0x00, 0x00, m64n_iic_a,   230,  83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-    { 0x475a, 0x475a, 0x00, 0x00, m64n_iic_a,   230,  83, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-
-    /* Mach64 LT */
-    { 0x4c54, 0x4c54, 0x00, 0x00, m64n_lt,      135,  63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP },
-    { 0x4c47, 0x4c47, 0x00, 0x00, m64n_ltg,     230,  63, M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_LT_SLEEP | M64F_G3_PB_1024x768 },
-
-    /* Mach64 GTC (3D RAGE PRO) */
-    { 0x4742, 0x4742, 0x00, 0x00, m64n_gtc_ba,  230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-    { 0x4744, 0x4744, 0x00, 0x00, m64n_gtc_ba1, 230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-    { 0x4749, 0x4749, 0x00, 0x00, m64n_gtc_bp,  230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_MAGIC_VRAM_SIZE },
-    { 0x4750, 0x4750, 0x00, 0x00, m64n_gtc_pp,  230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-    { 0x4751, 0x4751, 0x00, 0x00, m64n_gtc_ppl, 230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT },
-
-    /* 3D RAGE XL */
-    { 0x4752, 0x4752, 0x00, 0x00, m64n_xl, 230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_XL_DLL },
-
-    /* Mach64 LT PRO */
-    { 0x4c42, 0x4c42, 0x00, 0x00, m64n_ltp_a,   230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP },
-    { 0x4c44, 0x4c44, 0x00, 0x00, m64n_ltp_p,   230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP },
-    { 0x4c49, 0x4c49, 0x00, 0x00, m64n_ltp_p,   230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_EXTRA_BRIGHT | M64F_G3_PB_1_1 | M64F_G3_PB_1024x768 },
-    { 0x4c50, 0x4c50, 0x00, 0x00, m64n_ltp_p,   230, 100, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP },
-
-    /* 3D RAGE Mobility */
-    { 0x4c4d, 0x4c4d, 0x00, 0x00, m64n_mob_p,   230,  50, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS },
-    { 0x4c4e, 0x4c4e, 0x00, 0x00, m64n_mob_a,   230,  50, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_MOBIL_BUS },
-#endif /* CONFIG_FB_ATY_CT */
+	    /* Mach64 CT */
+	{
+	0x4354, 0x4354, 0x00, 0x00, m64n_ct, 135, 60,
+		    M64F_CT | M64F_INTEGRATED | M64F_CT_BUS |
+		    M64F_MAGIC_FIFO}, {
+	0x4554, 0x4554, 0x00, 0x00, m64n_et, 135, 60,
+		    M64F_CT | M64F_INTEGRATED | M64F_CT_BUS |
+		    M64F_MAGIC_FIFO},
+	    /* Mach64 VT */
+	{
+	0x5654, 0x5654, 0xc7, 0x00, m64n_vta3, 170, 67,
+		    M64F_VT | M64F_INTEGRATED | M64F_VT_BUS |
+		    M64F_MAGIC_FIFO | M64F_FIFO_24}, {
+	0x5654, 0x5654, 0xc7, 0x40, m64n_vta4, 200, 67,
+		    M64F_VT | M64F_INTEGRATED | M64F_VT_BUS |
+		    M64F_MAGIC_FIFO | M64F_FIFO_24 | M64F_MAGIC_POSTDIV}, {
+	0x5654, 0x5654, 0x00, 0x00, m64n_vtb, 200, 67,
+		    M64F_VT | M64F_INTEGRATED | M64F_VT_BUS |
+		    M64F_GTB_DSP | M64F_FIFO_24}, {
+	0x5655, 0x5655, 0x00, 0x00, m64n_vtb, 200, 67,
+		    M64F_VT | M64F_INTEGRATED | M64F_VT_BUS |
+		    M64F_GTB_DSP | M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL}, {
+	0x5656, 0x5656, 0x00, 0x00, m64n_vt4, 230, 83,
+		    M64F_VT | M64F_INTEGRATED | M64F_GTB_DSP},
+	    /* Mach64 GT (3D RAGE) */
+	{
+	0x4754, 0x4754, 0x07, 0x00, m64n_gt, 135, 63,
+		    M64F_GT | M64F_INTEGRATED | M64F_MAGIC_FIFO |
+		    M64F_FIFO_24 | M64F_EXTRA_BRIGHT}, {
+	0x4754, 0x4754, 0x07, 0x01, m64n_gt, 170, 67,
+		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
+		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT}, {
+	0x4754, 0x4754, 0x07, 0x02, m64n_gt, 200, 67,
+		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
+		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT}, {
+	0x4755, 0x4755, 0x00, 0x00, m64n_gtb, 200, 67,
+		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
+		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT}, {
+	0x4756, 0x4756, 0x00, 0x00, m64n_iic_p, 230, 83,
+		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
+		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT}, {
+	0x4757, 0x4757, 0x00, 0x00, m64n_iic_a, 230, 83,
+		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
+		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT}, {
+	0x475a, 0x475a, 0x00, 0x00, m64n_iic_a, 230, 83,
+		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
+		    M64F_FIFO_24 | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT},
+	    /* Mach64 LT */
+	{
+	0x4c54, 0x4c54, 0x00, 0x00, m64n_lt, 135, 63,
+		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP}, {
+	0x4c47, 0x4c47, 0x00, 0x00, m64n_ltg, 230, 63,
+		    M64F_GT | M64F_INTEGRATED | M64F_GTB_DSP |
+		    M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT |
+		    M64F_LT_SLEEP | M64F_G3_PB_1024x768},
+	    /* Mach64 GTC (3D RAGE PRO) */
+	{
+	0x4742, 0x4742, 0x00, 0x00, m64n_gtc_ba, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT}, {
+	0x4744, 0x4744, 0x00, 0x00, m64n_gtc_ba1, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT}, {
+	0x4749, 0x4749, 0x00, 0x00, m64n_gtc_bp, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT | M64F_MAGIC_VRAM_SIZE}, {
+	0x4750, 0x4750, 0x00, 0x00, m64n_gtc_pp, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT}, {
+	0x4751, 0x4751, 0x00, 0x00, m64n_gtc_ppl, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT},
+	    /* 3D RAGE XL */
+	{
+	0x4752, 0x4752, 0x00, 0x00, m64n_xl, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL |
+		    M64F_EXTRA_BRIGHT | M64F_XL_DLL},
+	    /* Mach64 LT PRO */
+	{
+	0x4c42, 0x4c42, 0x00, 0x00, m64n_ltp_a, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP}, {
+	0x4c44, 0x4c44, 0x00, 0x00, m64n_ltp_p, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP}, {
+	0x4c49, 0x4c49, 0x00, 0x00, m64n_ltp_p, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_EXTRA_BRIGHT |
+		    M64F_G3_PB_1_1 | M64F_G3_PB_1024x768}, {
+	0x4c50, 0x4c50, 0x00, 0x00, m64n_ltp_p, 230, 100,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP},
+	    /* 3D RAGE Mobility */
+	{
+	0x4c4d, 0x4c4d, 0x00, 0x00, m64n_mob_p, 230, 50,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_MOBIL_BUS}, {
+	0x4c4e, 0x4c4e, 0x00, 0x00, m64n_mob_a, 230, 50,
+		    M64F_GT | M64F_INTEGRATED | M64F_RESET_3D |
+		    M64F_GTB_DSP | M64F_MOBIL_BUS},
+#endif				/* CONFIG_FB_ATY_CT */
 };
 
 static char ram_dram[] __initdata = "DRAM";
@@ -365,19 +432,21 @@ static char ram_wram[] __initdata = "WRAM";
 static char ram_off[] __initdata = "OFF";
 static char ram_resv[] __initdata = "RESV";
 
+static u32 pseudo_palette[17];
+
 #ifdef CONFIG_FB_ATY_GX
 static char *aty_gx_ram[8] __initdata = {
-    ram_dram, ram_vram, ram_vram, ram_dram,
-    ram_dram, ram_vram, ram_vram, ram_resv
+	ram_dram, ram_vram, ram_vram, ram_dram,
+	ram_dram, ram_vram, ram_vram, ram_resv
 };
-#endif /* CONFIG_FB_ATY_GX */
+#endif				/* CONFIG_FB_ATY_GX */
 
 #ifdef CONFIG_FB_ATY_CT
 static char *aty_ct_ram[8] __initdata = {
-    ram_off, ram_dram, ram_edo, ram_edo,
-    ram_sdram, ram_sgram, ram_wram, ram_resv
+	ram_off, ram_dram, ram_edo, ram_edo,
+	ram_sdram, ram_sgram, ram_wram, ram_resv
 };
-#endif /* CONFIG_FB_ATY_CT */
+#endif				/* CONFIG_FB_ATY_CT */
 
 
 #if defined(CONFIG_PPC)
@@ -386,65 +455,65 @@ static char *aty_ct_ram[8] __initdata = {
      *  Apple monitor sense
      */
 
-static int __init read_aty_sense(const struct fb_info_aty *info)
+static int __init read_aty_sense(const struct fb_info *info)
 {
-    int sense, i;
-
-    aty_st_le32(GP_IO, 0x31003100, info);	/* drive outputs high */
-    __delay(200);
-    aty_st_le32(GP_IO, 0, info);		/* turn off outputs */
-    __delay(2000);
-    i = aty_ld_le32(GP_IO, info);		/* get primary sense value */
-    sense = ((i & 0x3000) >> 3) | (i & 0x100);
-
-    /* drive each sense line low in turn and collect the other 2 */
-    aty_st_le32(GP_IO, 0x20000000, info);	/* drive A low */
-    __delay(2000);
-    i = aty_ld_le32(GP_IO, info);
-    sense |= ((i & 0x1000) >> 7) | ((i & 0x100) >> 4);
-    aty_st_le32(GP_IO, 0x20002000, info);	/* drive A high again */
-    __delay(200);
-
-    aty_st_le32(GP_IO, 0x10000000, info);	/* drive B low */
-    __delay(2000);
-    i = aty_ld_le32(GP_IO, info);
-    sense |= ((i & 0x2000) >> 10) | ((i & 0x100) >> 6);
-    aty_st_le32(GP_IO, 0x10001000, info);	/* drive B high again */
-    __delay(200);
-
-    aty_st_le32(GP_IO, 0x01000000, info);	/* drive C low */
-    __delay(2000);
-    sense |= (aty_ld_le32(GP_IO, info) & 0x3000) >> 12;
-    aty_st_le32(GP_IO, 0, info);		/* turn off outputs */
-
-    return sense;
+	int sense, i;
+
+	aty_st_le32(GP_IO, 0x31003100, info);	/* drive outputs high */
+	__delay(200);
+	aty_st_le32(GP_IO, 0, info);	/* turn off outputs */
+	__delay(2000);
+	i = aty_ld_le32(GP_IO, info);	/* get primary sense value */
+	sense = ((i & 0x3000) >> 3) | (i & 0x100);
+
+	/* drive each sense line low in turn and collect the other 2 */
+	aty_st_le32(GP_IO, 0x20000000, info);	/* drive A low */
+	__delay(2000);
+	i = aty_ld_le32(GP_IO, info);
+	sense |= ((i & 0x1000) >> 7) | ((i & 0x100) >> 4);
+	aty_st_le32(GP_IO, 0x20002000, info);	/* drive A high again */
+	__delay(200);
+
+	aty_st_le32(GP_IO, 0x10000000, info);	/* drive B low */
+	__delay(2000);
+	i = aty_ld_le32(GP_IO, info);
+	sense |= ((i & 0x2000) >> 10) | ((i & 0x100) >> 6);
+	aty_st_le32(GP_IO, 0x10001000, info);	/* drive B high again */
+	__delay(200);
+
+	aty_st_le32(GP_IO, 0x01000000, info);	/* drive C low */
+	__delay(2000);
+	sense |= (aty_ld_le32(GP_IO, info) & 0x3000) >> 12;
+	aty_st_le32(GP_IO, 0, info);	/* turn off outputs */
+
+	return sense;
 }
 
-#endif /* defined(CONFIG_PPC) */
+#endif				/* defined(CONFIG_PPC) */
 
 #if defined(CONFIG_PMAC_PBOOK) || defined(CONFIG_PMAC_BACKLIGHT)
-static void aty_st_lcd(int index, u32 val, const struct fb_info_aty *info)
+static void aty_st_lcd(int index, u32 val, const struct fb_info *info)
 {
-    unsigned long temp;
+	unsigned long temp;
 
-    /* write addr byte */
-    temp = aty_ld_le32(LCD_INDEX, info);
-    aty_st_le32(LCD_INDEX, (temp & ~LCD_INDEX_MASK) | index, info);
-    /* write the register value */
-    aty_st_le32(LCD_DATA, val, info);
+	/* write addr byte */
+	temp = aty_ld_le32(LCD_INDEX, info);
+	aty_st_le32(LCD_INDEX, (temp & ~LCD_INDEX_MASK) | index, info);
+	/* write the register value */
+	aty_st_le32(LCD_DATA, val, info);
 }
 
-static u32 aty_ld_lcd(int index, const struct fb_info_aty *info)
+static u32 aty_ld_lcd(int index, const struct fb_info *info)
 {
-    unsigned long temp;
+	unsigned long temp;
 
-    /* write addr byte */
-    temp = aty_ld_le32(LCD_INDEX, info);
-    aty_st_le32(LCD_INDEX, (temp & ~LCD_INDEX_MASK) | index, info);
-    /* read the register value */
-    return aty_ld_le32(LCD_DATA, info);
+	/* write addr byte */
+	temp = aty_ld_le32(LCD_INDEX, info);
+	aty_st_le32(LCD_INDEX, (temp & ~LCD_INDEX_MASK) | index, info);
+	/* read the register value */
+	return aty_ld_le32(LCD_DATA, info);
 }
-#endif /* CONFIG_PMAC_PBOOK || CONFIG_PMAC_BACKLIGHT */
+#endif				/* CONFIG_PMAC_PBOOK || CONFIG_PMAC_BACKLIGHT */
 
 /* ------------------------------------------------------------------------- */
 
@@ -452,436 +521,429 @@ static u32 aty_ld_lcd(int index, const struct fb_info_aty *info)
      *  CRTC programming
      */
 
-static void aty_set_crtc(const struct fb_info_aty *info,
+static void aty_set_crtc(const struct atyfb_par *par,
 			 const struct crtc *crtc)
 {
-    aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_tot_disp, info);
-    aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, info);
-    aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_tot_disp, info);
-    aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid, info);
-    aty_st_le32(CRTC_VLINE_CRNT_VLINE, 0, info);
-    aty_st_le32(CRTC_OFF_PITCH, crtc->off_pitch, info);
-    aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl, info);
+	aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_tot_disp, par);
+	aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, par);
+	aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_tot_disp, par);
+	aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid, par);
+	aty_st_le32(CRTC_VLINE_CRNT_VLINE, 0, par);
+	aty_st_le32(CRTC_OFF_PITCH, crtc->off_pitch, par);
+	aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl, par);
 }
 
-static int aty_var_to_crtc(const struct fb_info_aty *info,
+static int aty_var_to_crtc(const struct fb_info *info,
 			   const struct fb_var_screeninfo *var,
 			   struct crtc *crtc)
 {
-    u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp;
-    u32 left, right, upper, lower, hslen, vslen, sync, vmode;
-    u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
-    u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
-    u32 pix_width, dp_pix_width, dp_chain_mask;
-
-    /* input */
-    xres = var->xres;
-    yres = var->yres;
-    vxres = var->xres_virtual;
-    vyres = var->yres_virtual;
-    xoffset = var->xoffset;
-    yoffset = var->yoffset;
-    bpp = var->bits_per_pixel;
-    left = var->left_margin;
-    right = var->right_margin;
-    upper = var->upper_margin;
-    lower = var->lower_margin;
-    hslen = var->hsync_len;
-    vslen = var->vsync_len;
-    sync = var->sync;
-    vmode = var->vmode;
-
-    /* convert (and round up) and validate */
-    xres = (xres+7) & ~7;
-    xoffset = (xoffset+7) & ~7;
-    vxres = (vxres+7) & ~7;
-    if (vxres < xres+xoffset)
-	vxres = xres+xoffset;
-    h_disp = xres/8-1;
-    if (h_disp > 0xff)
-	FAIL("h_disp too large");
-    h_sync_strt = h_disp+(right/8);
-    if (h_sync_strt > 0x1ff)
-	FAIL("h_sync_start too large");
-    h_sync_dly = right & 7;
-    h_sync_wid = (hslen+7)/8;
-    if (h_sync_wid > 0x1f)
-	FAIL("h_sync_wid too large");
-    h_total = h_sync_strt+h_sync_wid+(h_sync_dly+left+7)/8;
-    if (h_total > 0x1ff)
-	FAIL("h_total too large");
-    h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
-
-    if (vyres < yres+yoffset)
-	vyres = yres+yoffset;
-    v_disp = yres-1;
-    if (v_disp > 0x7ff)
-	FAIL("v_disp too large");
-    v_sync_strt = v_disp+lower;
-    if (v_sync_strt > 0x7ff)
-	FAIL("v_sync_strt too large");
-    v_sync_wid = vslen;
-    if (v_sync_wid > 0x1f)
-	FAIL("v_sync_wid too large");
-    v_total = v_sync_strt+v_sync_wid+upper;
-    if (v_total > 0x7ff)
-	FAIL("v_total too large");
-    v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
-
-    c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? CRTC_CSYNC_EN : 0;
-
-    if (bpp <= 8) {
-	bpp = 8;
-	pix_width = CRTC_PIX_WIDTH_8BPP;
-	dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
-	dp_chain_mask = 0x8080;
-    } else if (bpp <= 16) {
-	bpp = 16;
-	pix_width = CRTC_PIX_WIDTH_15BPP;
-	dp_pix_width = HOST_15BPP | SRC_15BPP | DST_15BPP |
-		       BYTE_ORDER_LSB_TO_MSB;
-	dp_chain_mask = 0x4210;
-    } else if (bpp <= 24 && M64_HAS(INTEGRATED)) {
-	bpp = 24;
-	pix_width = CRTC_PIX_WIDTH_24BPP;
-	dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
-	dp_chain_mask = 0x8080;
-    } else if (bpp <= 32) {
-	bpp = 32;
-	pix_width = CRTC_PIX_WIDTH_32BPP;
-	dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
-		       BYTE_ORDER_LSB_TO_MSB;
-	dp_chain_mask = 0x8080;
-    } else
-	FAIL("invalid bpp");
-
-    if (vxres*vyres*bpp/8 > info->total_vram)
-	FAIL("not enough video RAM");
-
-    if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
-	FAIL("invalid vmode");
-
-    /* output */
-    crtc->vxres = vxres;
-    crtc->vyres = vyres;
-    crtc->xoffset = xoffset;
-    crtc->yoffset = yoffset;
-    crtc->bpp = bpp;
-    crtc->h_tot_disp = h_total | (h_disp<<16);
-    crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly<<8) |
-			    ((h_sync_strt & 0x100)<<4) | (h_sync_wid<<16) |
-			    (h_sync_pol<<21);
-    crtc->v_tot_disp = v_total | (v_disp<<16);
-    crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid<<16) | (v_sync_pol<<21);
-    crtc->off_pitch = ((yoffset*vxres+xoffset)*bpp/64) | (vxres<<19);
-    crtc->gen_cntl = pix_width | c_sync | CRTC_EXT_DISP_EN | CRTC_ENABLE;
-    if (M64_HAS(MAGIC_FIFO)) {
-	/* Not VTB/GTB */
-	/* FIXME: magic FIFO values */
-	crtc->gen_cntl |= aty_ld_le32(CRTC_GEN_CNTL, info) & 0x000e0000;
-    }
-    crtc->dp_pix_width = dp_pix_width;
-    crtc->dp_chain_mask = dp_chain_mask;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp;
+	u32 left, right, upper, lower, hslen, vslen, sync, vmode;
+	u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid,
+	    h_sync_pol;
+	u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
+	u32 pix_width, dp_pix_width, dp_chain_mask;
+
+	/* input */
+	xres = var->xres;
+	yres = var->yres;
+	vxres = var->xres_virtual;
+	vyres = var->yres_virtual;
+	xoffset = var->xoffset;
+	yoffset = var->yoffset;
+	bpp = var->bits_per_pixel;
+	left = var->left_margin;
+	right = var->right_margin;
+	upper = var->upper_margin;
+	lower = var->lower_margin;
+	hslen = var->hsync_len;
+	vslen = var->vsync_len;
+	sync = var->sync;
+	vmode = var->vmode;
+
+	/* convert (and round up) and validate */
+	xres = (xres + 7) & ~7;
+	xoffset = (xoffset + 7) & ~7;
+	vxres = (vxres + 7) & ~7;
+	if (vxres < xres + xoffset)
+		vxres = xres + xoffset;
+	h_disp = xres / 8 - 1;
+	if (h_disp > 0xff)
+		FAIL("h_disp too large");
+	h_sync_strt = h_disp + (right / 8);
+	if (h_sync_strt > 0x1ff)
+		FAIL("h_sync_start too large");
+	h_sync_dly = right & 7;
+	h_sync_wid = (hslen + 7) / 8;
+	if (h_sync_wid > 0x1f)
+		FAIL("h_sync_wid too large");
+	h_total = h_sync_strt + h_sync_wid + (h_sync_dly + left + 7) / 8;
+	if (h_total > 0x1ff)
+		FAIL("h_total too large");
+	h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
+
+	if (vyres < yres + yoffset)
+		vyres = yres + yoffset;
+	v_disp = yres - 1;
+	if (v_disp > 0x7ff)
+		FAIL("v_disp too large");
+	v_sync_strt = v_disp + lower;
+	if (v_sync_strt > 0x7ff)
+		FAIL("v_sync_strt too large");
+	v_sync_wid = vslen;
+	if (v_sync_wid > 0x1f)
+		FAIL("v_sync_wid too large");
+	v_total = v_sync_strt + v_sync_wid + upper;
+	if (v_total > 0x7ff)
+		FAIL("v_total too large");
+	v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
+
+	c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? CRTC_CSYNC_EN : 0;
+
+	if (bpp <= 8) {
+		bpp = 8;
+		pix_width = CRTC_PIX_WIDTH_8BPP;
+		dp_pix_width =
+		    HOST_8BPP | SRC_8BPP | DST_8BPP |
+		    BYTE_ORDER_LSB_TO_MSB;
+		dp_chain_mask = 0x8080;
+	} else if (bpp <= 16) {
+		bpp = 16;
+		pix_width = CRTC_PIX_WIDTH_15BPP;
+		dp_pix_width = HOST_15BPP | SRC_15BPP | DST_15BPP |
+		    BYTE_ORDER_LSB_TO_MSB;
+		dp_chain_mask = 0x4210;
+	} else if (bpp <= 24 && M64_HAS(INTEGRATED)) {
+		bpp = 24;
+		pix_width = CRTC_PIX_WIDTH_24BPP;
+		dp_pix_width =
+		    HOST_8BPP | SRC_8BPP | DST_8BPP |
+		    BYTE_ORDER_LSB_TO_MSB;
+		dp_chain_mask = 0x8080;
+	} else if (bpp <= 32) {
+		bpp = 32;
+		pix_width = CRTC_PIX_WIDTH_32BPP;
+		dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
+		    BYTE_ORDER_LSB_TO_MSB;
+		dp_chain_mask = 0x8080;
+	} else
+		FAIL("invalid bpp");
+
+	if (vxres * vyres * bpp / 8 > info->fix.smem_len)
+		FAIL("not enough video RAM");
+
+	if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
+		FAIL("invalid vmode");
+
+	/* output */
+	crtc->vxres = vxres;
+	crtc->vyres = vyres;
+	crtc->xoffset = xoffset;
+	crtc->yoffset = yoffset;
+	crtc->bpp = bpp;
+	crtc->h_tot_disp = h_total | (h_disp << 16);
+	crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly << 8) |
+	    ((h_sync_strt & 0x100) << 4) | (h_sync_wid << 16) |
+	    (h_sync_pol << 21);
+	crtc->v_tot_disp = v_total | (v_disp << 16);
+	crtc->v_sync_strt_wid =
+	    v_sync_strt | (v_sync_wid << 16) | (v_sync_pol << 21);
+	crtc->off_pitch =
+	    ((yoffset * vxres + xoffset) * bpp / 64) | (vxres << 19);
+	crtc->gen_cntl =
+	    pix_width | c_sync | CRTC_EXT_DISP_EN | CRTC_ENABLE;
+	if (M64_HAS(MAGIC_FIFO)) {
+		/* Not VTB/GTB */
+		/* FIXME: magic FIFO values */
+		crtc->gen_cntl |=
+		    aty_ld_le32(CRTC_GEN_CNTL, par) & 0x000e0000;
+	}
+	crtc->dp_pix_width = dp_pix_width;
+	crtc->dp_chain_mask = dp_chain_mask;
 
-    return 0;
+	return 0;
 }
 
 
 static int aty_crtc_to_var(const struct crtc *crtc,
 			   struct fb_var_screeninfo *var)
 {
-    u32 xres, yres, bpp, left, right, upper, lower, hslen, vslen, sync;
-    u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
-    u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
-    u32 pix_width;
-
-    /* input */
-    h_total = crtc->h_tot_disp & 0x1ff;
-    h_disp = (crtc->h_tot_disp>>16) & 0xff;
-    h_sync_strt = (crtc->h_sync_strt_wid & 0xff) |
-		  ((crtc->h_sync_strt_wid>>4) & 0x100);
-    h_sync_dly = (crtc->h_sync_strt_wid>>8) & 0x7;
-    h_sync_wid = (crtc->h_sync_strt_wid>>16) & 0x1f;
-    h_sync_pol = (crtc->h_sync_strt_wid>>21) & 0x1;
-    v_total = crtc->v_tot_disp & 0x7ff;
-    v_disp = (crtc->v_tot_disp>>16) & 0x7ff;
-    v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;
-    v_sync_wid = (crtc->v_sync_strt_wid>>16) & 0x1f;
-    v_sync_pol = (crtc->v_sync_strt_wid>>21) & 0x1;
-    c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;
-    pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;
-
-    /* convert */
-    xres = (h_disp+1)*8;
-    yres = v_disp+1;
-    left = (h_total-h_sync_strt-h_sync_wid)*8-h_sync_dly;
-    right = (h_sync_strt-h_disp)*8+h_sync_dly;
-    hslen = h_sync_wid*8;
-    upper = v_total-v_sync_strt-v_sync_wid;
-    lower = v_sync_strt-v_disp;
-    vslen = v_sync_wid;
-    sync = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) |
-	   (v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) |
-	   (c_sync ? FB_SYNC_COMP_HIGH_ACT : 0);
-
-    switch (pix_width) {
+	u32 xres, yres, bpp, left, right, upper, lower, hslen, vslen, sync;
+	u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid,
+	    h_sync_pol;
+	u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
+	u32 pix_width;
+
+	/* input */
+	h_total = crtc->h_tot_disp & 0x1ff;
+	h_disp = (crtc->h_tot_disp >> 16) & 0xff;
+	h_sync_strt = (crtc->h_sync_strt_wid & 0xff) |
+	    ((crtc->h_sync_strt_wid >> 4) & 0x100);
+	h_sync_dly = (crtc->h_sync_strt_wid >> 8) & 0x7;
+	h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x1f;
+	h_sync_pol = (crtc->h_sync_strt_wid >> 21) & 0x1;
+	v_total = crtc->v_tot_disp & 0x7ff;
+	v_disp = (crtc->v_tot_disp >> 16) & 0x7ff;
+	v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;
+	v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f;
+	v_sync_pol = (crtc->v_sync_strt_wid >> 21) & 0x1;
+	c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;
+	pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;
+
+	/* convert */
+	xres = (h_disp + 1) * 8;
+	yres = v_disp + 1;
+	left = (h_total - h_sync_strt - h_sync_wid) * 8 - h_sync_dly;
+	right = (h_sync_strt - h_disp) * 8 + h_sync_dly;
+	hslen = h_sync_wid * 8;
+	upper = v_total - v_sync_strt - v_sync_wid;
+	lower = v_sync_strt - v_disp;
+	vslen = v_sync_wid;
+	sync = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) |
+	    (v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) |
+	    (c_sync ? FB_SYNC_COMP_HIGH_ACT : 0);
+
+	switch (pix_width) {
 #if 0
 	case CRTC_PIX_WIDTH_4BPP:
-	    bpp = 4;
-	    var->red.offset = 0;
-	    var->red.length = 8;
-	    var->green.offset = 0;
-	    var->green.length = 8;
-	    var->blue.offset = 0;
-	    var->blue.length = 8;
-	    var->transp.offset = 0;
-	    var->transp.length = 0;
-	    break;
+		bpp = 4;
+		var->red.offset = 0;
+		var->red.length = 8;
+		var->green.offset = 0;
+		var->green.length = 8;
+		var->blue.offset = 0;
+		var->blue.length = 8;
+		var->transp.offset = 0;
+		var->transp.length = 0;
+		break;
 #endif
 	case CRTC_PIX_WIDTH_8BPP:
-	    bpp = 8;
-	    var->red.offset = 0;
-	    var->red.length = 8;
-	    var->green.offset = 0;
-	    var->green.length = 8;
-	    var->blue.offset = 0;
-	    var->blue.length = 8;
-	    var->transp.offset = 0;
-	    var->transp.length = 0;
-	    break;
+		bpp = 8;
+		var->red.offset = 0;
+		var->red.length = 8;
+		var->green.offset = 0;
+		var->green.length = 8;
+		var->blue.offset = 0;
+		var->blue.length = 8;
+		var->transp.offset = 0;
+		var->transp.length = 0;
+		break;
 	case CRTC_PIX_WIDTH_15BPP:	/* RGB 555 */
-	    bpp = 16;
-	    var->red.offset = 10;
-	    var->red.length = 5;
-	    var->green.offset = 5;
-	    var->green.length = 5;
-	    var->blue.offset = 0;
-	    var->blue.length = 5;
-	    var->transp.offset = 0;
-	    var->transp.length = 0;
-	    break;
+		bpp = 16;
+		var->red.offset = 10;
+		var->red.length = 5;
+		var->green.offset = 5;
+		var->green.length = 5;
+		var->blue.offset = 0;
+		var->blue.length = 5;
+		var->transp.offset = 0;
+		var->transp.length = 0;
+		break;
 #if 0
 	case CRTC_PIX_WIDTH_16BPP:	/* RGB 565 */
-	    bpp = 16;
-	    var->red.offset = 11;
-	    var->red.length = 5;
-	    var->green.offset = 5;
-	    var->green.length = 6;
-	    var->blue.offset = 0;
-	    var->blue.length = 5;
-	    var->transp.offset = 0;
-	    var->transp.length = 0;
-	    break;
+		bpp = 16;
+		var->red.offset = 11;
+		var->red.length = 5;
+		var->green.offset = 5;
+		var->green.length = 6;
+		var->blue.offset = 0;
+		var->blue.length = 5;
+		var->transp.offset = 0;
+		var->transp.length = 0;
+		break;
 #endif
 	case CRTC_PIX_WIDTH_24BPP:	/* RGB 888 */
-	    bpp = 24;
-	    var->red.offset = 16;
-	    var->red.length = 8;
-	    var->green.offset = 8;
-	    var->green.length = 8;
-	    var->blue.offset = 0;
-	    var->blue.length = 8;
-	    var->transp.offset = 0;
-	    var->transp.length = 0;
-	    break;
+		bpp = 24;
+		var->red.offset = 16;
+		var->red.length = 8;
+		var->green.offset = 8;
+		var->green.length = 8;
+		var->blue.offset = 0;
+		var->blue.length = 8;
+		var->transp.offset = 0;
+		var->transp.length = 0;
+		break;
 	case CRTC_PIX_WIDTH_32BPP:	/* ARGB 8888 */
-	    bpp = 32;
-	    var->red.offset = 16;
-	    var->red.length = 8;
-	    var->green.offset = 8;
-	    var->green.length = 8;
-	    var->blue.offset = 0;
-	    var->blue.length = 8;
-	    var->transp.offset = 24;
-	    var->transp.length = 8;
-	    break;
+		bpp = 32;
+		var->red.offset = 16;
+		var->red.length = 8;
+		var->green.offset = 8;
+		var->green.length = 8;
+		var->blue.offset = 0;
+		var->blue.length = 8;
+		var->transp.offset = 24;
+		var->transp.length = 8;
+		break;
 	default:
-	    FAIL("Invalid pixel width");
-    }
+		FAIL("Invalid pixel width");
+	}
 
-    /* output */
-    var->xres = xres;
-    var->yres = yres;
-    var->xres_virtual = crtc->vxres;
-    var->yres_virtual = crtc->vyres;
-    var->bits_per_pixel = bpp;
-    var->xoffset = crtc->xoffset;
-    var->yoffset = crtc->yoffset;
-    var->left_margin = left;
-    var->right_margin = right;
-    var->upper_margin = upper;
-    var->lower_margin = lower;
-    var->hsync_len = hslen;
-    var->vsync_len = vslen;
-    var->sync = sync;
-    var->vmode = FB_VMODE_NONINTERLACED;
-
-    return 0;
+	/* output */
+	var->xres = xres;
+	var->yres = yres;
+	var->xres_virtual = crtc->vxres;
+	var->yres_virtual = crtc->vyres;
+	var->bits_per_pixel = bpp;
+	var->xoffset = crtc->xoffset;
+	var->yoffset = crtc->yoffset;
+	var->left_margin = left;
+	var->right_margin = right;
+	var->upper_margin = upper;
+	var->lower_margin = lower;
+	var->hsync_len = hslen;
+	var->vsync_len = vslen;
+	var->sync = sync;
+	var->vmode = FB_VMODE_NONINTERLACED;
+
+	return 0;
 }
 
 /* ------------------------------------------------------------------------- */
 
-static void atyfb_set_par(const struct atyfb_par *par,
-			  struct fb_info_aty *info)
+static void atyfb_set_par(struct atyfb_par *par,
+			  struct fb_info *info)
 {
-    u32 i;
-    int accelmode;
-    u8 tmp;
-
-    accelmode = par->accel_flags;  /* hack */
-
-    info->current_par = *par;
-
-    if (info->blitter_may_be_busy)
-	wait_for_idle(info);
-    tmp = aty_ld_8(CRTC_GEN_CNTL + 3, info);
-    aty_set_crtc(info, &par->crtc);
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, 0, info);
-					/* better call aty_StrobeClock ?? */
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, CLOCK_STROBE, info);
-
-    info->dac_ops->set_dac(info, &par->pll, par->crtc.bpp, accelmode);
-    info->pll_ops->set_pll(info, &par->pll);
-
-    if (!M64_HAS(INTEGRATED)) {
-	/* Don't forget MEM_CNTL */
-	i = aty_ld_le32(MEM_CNTL, info) & 0xf0ffffff;
-	switch (par->crtc.bpp) {
-	    case 8:
-		i |= 0x02000000;
-		break;
-	    case 16:
-		i |= 0x03000000;
-		break;
-	    case 32:
-		i |= 0x06000000;
-		break;
-	}
-	aty_st_le32(MEM_CNTL, i, info);
-    } else {
-	i = aty_ld_le32(MEM_CNTL, info) & 0xf00fffff;
-	if (!M64_HAS(MAGIC_POSTDIV))
-	    i |= info->mem_refresh_rate << 20;
-	switch (par->crtc.bpp) {
-	    case 8:
-	    case 24:
-		i |= 0x00000000;
-		break;
-	    case 16:
-		i |= 0x04000000;
-		break;
-	    case 32:
-		i |= 0x08000000;
-		break;
-	}
-	if (M64_HAS(CT_BUS)) {
-	    aty_st_le32(DAC_CNTL, 0x87010184, info);
-	    aty_st_le32(BUS_CNTL, 0x680000f9, info);
-	} else if (M64_HAS(VT_BUS)) {
-	    aty_st_le32(DAC_CNTL, 0x87010184, info);
-	    aty_st_le32(BUS_CNTL, 0x680000f9, info);
-	}  else if (M64_HAS(MOBIL_BUS)) {
-	    aty_st_le32(DAC_CNTL, 0x80010102, info);
-	    aty_st_le32(BUS_CNTL, 0x7b33a040, info);
+	u32 i;
+	int accelmode;
+	u8 tmp;
+
+	accelmode = par->accel_flags;	/* hack */
+
+	if (par->blitter_may_be_busy)
+		wait_for_idle(par);
+	tmp = aty_ld_8(CRTC_GEN_CNTL + 3, par);
+	aty_set_crtc(par, &par->crtc);
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, 0, par);
+	/* better call aty_StrobeClock ?? */
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, CLOCK_STROBE, par);
+
+	par->dac_ops->set_dac(info, &par->pll, par->crtc.bpp, accelmode);
+	par->pll_ops->set_pll(info, &par->pll);
+
+	if (!M64_HAS(INTEGRATED)) {
+		/* Don't forget MEM_CNTL */
+		i = aty_ld_le32(MEM_CNTL, par) & 0xf0ffffff;
+		switch (par->crtc.bpp) {
+		case 8:
+			i |= 0x02000000;
+			break;
+		case 16:
+			i |= 0x03000000;
+			break;
+		case 32:
+			i |= 0x06000000;
+			break;
+		}
+		aty_st_le32(MEM_CNTL, i, par);
 	} else {
-	    /* GT */
-	    aty_st_le32(DAC_CNTL, 0x86010102, info);
-	    aty_st_le32(BUS_CNTL, 0x7b23a040, info);
-	    aty_st_le32(EXT_MEM_CNTL,
-			aty_ld_le32(EXT_MEM_CNTL, info) | 0x5000001, info);
+		i = aty_ld_le32(MEM_CNTL, par) & 0xf00fffff;
+		if (!M64_HAS(MAGIC_POSTDIV))
+			i |= par->mem_refresh_rate << 20;
+		switch (par->crtc.bpp) {
+		case 8:
+		case 24:
+			i |= 0x00000000;
+			break;
+		case 16:
+			i |= 0x04000000;
+			break;
+		case 32:
+			i |= 0x08000000;
+			break;
+		}
+		if (M64_HAS(CT_BUS)) {
+			aty_st_le32(DAC_CNTL, 0x87010184, par);
+			aty_st_le32(BUS_CNTL, 0x680000f9, par);
+		} else if (M64_HAS(VT_BUS)) {
+			aty_st_le32(DAC_CNTL, 0x87010184, par);
+			aty_st_le32(BUS_CNTL, 0x680000f9, par);
+		} else if (M64_HAS(MOBIL_BUS)) {
+			aty_st_le32(DAC_CNTL, 0x80010102, par);
+			aty_st_le32(BUS_CNTL, 0x7b33a040, par);
+		} else {
+			/* GT */
+			aty_st_le32(DAC_CNTL, 0x86010102, par);
+			aty_st_le32(BUS_CNTL, 0x7b23a040, par);
+			aty_st_le32(EXT_MEM_CNTL,
+				    aty_ld_le32(EXT_MEM_CNTL,
+						par) | 0x5000001, par);
+		}
+		aty_st_le32(MEM_CNTL, i, par);
 	}
-	aty_st_le32(MEM_CNTL, i, info);
-    }
-    aty_st_8(DAC_MASK, 0xff, info);
+	aty_st_8(DAC_MASK, 0xff, par);
 
-    /* Initialize the graphics engine */
-    if (par->accel_flags & FB_ACCELF_TEXT)
-	aty_init_engine(par, info);
+	/* Initialize the graphics engine */
+	if (par->accel_flags & FB_ACCELF_TEXT)
+		aty_init_engine(par, info);
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-    if (!console_fb_info || console_fb_info == &info->fb_info) {
-	struct fb_var_screeninfo var;
-	int vmode, cmode;
-	display_info.height = ((par->crtc.v_tot_disp>>16) & 0x7ff)+1;
-	display_info.width = (((par->crtc.h_tot_disp>>16) & 0xff)+1)*8;
-	display_info.depth = par->crtc.bpp;
-	display_info.pitch = par->crtc.vxres*par->crtc.bpp/8;
-	atyfb_encode_var(&var, par, info);
-	if (mac_var_to_vmode(&var, &vmode, &cmode))
-	    display_info.mode = 0;
-	else
-	    display_info.mode = vmode;
-	strcpy(display_info.name, atyfb_name);
-	display_info.fb_address = info->frame_buffer_phys;
-	display_info.cmap_adr_address = info->ati_regbase_phys+0xc0;
-	display_info.cmap_data_address = info->ati_regbase_phys+0xc1;
-	display_info.disp_reg_address = info->ati_regbase_phys;
-    }
-#endif /* CONFIG_FB_COMPAT_XPMAC */
 #ifdef CONFIG_BOOTX_TEXT
-	btext_update_display(info->frame_buffer_phys,
-			(((par->crtc.h_tot_disp>>16) & 0xff)+1)*8,
-			((par->crtc.v_tot_disp>>16) & 0x7ff)+1,
-			par->crtc.bpp,
-			par->crtc.vxres*par->crtc.bpp/8);
-#endif /* CONFIG_BOOTX_TEXT */
+	btext_update_display(info->fix.smem_start,
+			     (((par->crtc.h_tot_disp >> 16) & 0xff) +
+			      1) * 8,
+			     ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1,
+			     par->crtc.bpp,
+			     par->crtc.vxres * par->crtc.bpp / 8);
+#endif				/* CONFIG_BOOTX_TEXT */
 }
 
 static int atyfb_decode_var(const struct fb_var_screeninfo *var,
 			    struct atyfb_par *par,
-			    const struct fb_info_aty *info)
+			    const struct fb_info *info)
 {
-    int err;
+	int err;
 
-    if ((err = aty_var_to_crtc(info, var, &par->crtc)) ||
-	(err = info->pll_ops->var_to_pll(info, var->pixclock, par->crtc.bpp,
-		    			 &par->pll)))
-	return err;
+	if ((err = aty_var_to_crtc(info, var, &par->crtc)) ||
+	    (err =
+	     par->pll_ops->var_to_pll(info, var->pixclock, par->crtc.bpp,
+				       &par->pll)))
+		return err;
 
-    if (var->accel_flags & FB_ACCELF_TEXT)
-	par->accel_flags = FB_ACCELF_TEXT;
-    else
-	par->accel_flags = 0;
+	if (var->accel_flags & FB_ACCELF_TEXT)
+		par->accel_flags = FB_ACCELF_TEXT;
+	else
+		par->accel_flags = 0;
 
-#if 0 /* fbmon is not done. uncomment for 2.5.x -brad */
-    if (!fbmon_valid_timings(var->pixclock, htotal, vtotal, info))
-	return -EINVAL;
+#if 0				/* fbmon is not done. uncomment for 2.5.x -brad */
+	if (!fbmon_valid_timings(var->pixclock, htotal, vtotal, info))
+		return -EINVAL;
 #endif
 
-    return 0;
+	return 0;
 }
 
 static int atyfb_encode_var(struct fb_var_screeninfo *var,
 			    const struct atyfb_par *par,
-			    const struct fb_info_aty *info)
+			    const struct fb_info *info)
 {
-    int err;
+	int err;
 
-    memset(var, 0, sizeof(struct fb_var_screeninfo));
+	memset(var, 0, sizeof(struct fb_var_screeninfo));
 
-    if ((err = aty_crtc_to_var(&par->crtc, var)))
-	return err;
-    var->pixclock = info->pll_ops->pll_to_var(info, &par->pll);
+	if ((err = aty_crtc_to_var(&par->crtc, var)))
+		return err;
+	var->pixclock = par->pll_ops->pll_to_var(info, &par->pll);
 
-    var->height = -1;
-    var->width = -1;
-    var->accel_flags = par->accel_flags;
+	var->height = -1;
+	var->width = -1;
+	var->accel_flags = par->accel_flags;
 
-    return 0;
+	return 0;
 }
 
 
 
 static void set_off_pitch(struct atyfb_par *par,
-			  const struct fb_info_aty *info)
+			  const struct fb_info *info)
 {
-    u32 xoffset = par->crtc.xoffset;
-    u32 yoffset = par->crtc.yoffset;
-    u32 vxres = par->crtc.vxres;
-    u32 bpp = par->crtc.bpp;
-
-    par->crtc.off_pitch = ((yoffset*vxres+xoffset)*bpp/64) | (vxres<<19);
-    aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, info);
+	u32 xoffset = par->crtc.xoffset;
+	u32 yoffset = par->crtc.yoffset;
+	u32 vxres = par->crtc.vxres;
+	u32 bpp = par->crtc.bpp;
+
+	par->crtc.off_pitch =
+	    ((yoffset * vxres + xoffset) * bpp / 64) | (vxres << 19);
+	aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, par);
 }
 
 
@@ -890,138 +952,117 @@ static void set_off_pitch(struct atyfb_par *par,
      */
 
 static int atyfb_open(struct fb_info *info, int user)
-
 {
 #ifdef __sparc__
-    struct fb_info_aty *fb = (struct fb_info_aty *)info;
-
-    if (user) {
-	fb->open++;
-	fb->mmaped = 0;
-	fb->vtconsole = -1;
-    } else {
-	fb->consolecnt++;
-    }
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+
+	if (user) {
+		par->open++;
+		par->mmaped = 0;
+		par->vtconsole = -1;
+	} else {
+		par->consolecnt++;
+	}
 #endif
-    return(0);
+	return (0);
 }
 
 struct fb_var_screeninfo default_var = {
-    /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
-    640, 480, 640, 480, 0, 0, 8, 0,
-    {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
-    0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
-    0, FB_VMODE_NONINTERLACED
+	/* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
+	640, 480, 640, 480, 0, 0, 8, 0,
+	{0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
+	0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
+	0, FB_VMODE_NONINTERLACED
 };
 
 static int atyfb_release(struct fb_info *info, int user)
 {
 #ifdef __sparc__
-    struct fb_info_aty *fb = (struct fb_info_aty *)info;
-
-    if (user) {
-	fb->open--;
-	mdelay(1);
-	wait_for_idle(fb);
-	if (!fb->open) {
-		int was_mmaped = fb->mmaped;
-
-		fb->mmaped = 0;
-		if (fb->vtconsole != -1)
-			vt_cons[fb->vtconsole]->vc_mode = KD_TEXT;
-		fb->vtconsole = -1;
-
-		if (was_mmaped) {
-			struct fb_var_screeninfo var;
-
-			/* Now reset the default display config, we have no
-			 * idea what the program(s) which mmap'd the chip did
-			 * to the configuration, nor whether it restored it
-			 * correctly.
-			 */
-			var = default_var;
-			if (noaccel)
-				var.accel_flags &= ~FB_ACCELF_TEXT;
-			else
-				var.accel_flags |= FB_ACCELF_TEXT;
-			if (var.yres == var.yres_virtual) {
-				u32 vram = (fb->total_vram - (PAGE_SIZE << 2));
-				var.yres_virtual = ((vram * 8) / var.bits_per_pixel) /
-					var.xres_virtual;
-				if (var.yres_virtual < var.yres)
-					var.yres_virtual = var.yres;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;	
+
+	if (user) {
+		par->open--;
+		mdelay(1);
+		wait_for_idle(par);
+		if (!par->open) {
+			int was_mmaped = par->mmaped;
+
+			par->mmaped = 0;
+			if (par->vtconsole != -1)
+				vt_cons[par->vtconsole]->vc_mode = KD_TEXT;
+			par->vtconsole = -1;
+
+			if (was_mmaped) {
+				struct fb_var_screeninfo var;
+
+				/* Now reset the default display config, we have no
+				 * idea what the program(s) which mmap'd the chip did
+				 * to the configuration, nor whether it restored it
+				 * correctly.
+				 */
+				var = default_var;
+				if (noaccel)
+					var.accel_flags &= ~FB_ACCELF_TEXT;
+				else
+					var.accel_flags |= FB_ACCELF_TEXT;
+				if (var.yres == var.yres_virtual) {
+					u32 vram =
+					    (info->fix.smem_len -
+					     (PAGE_SIZE << 2));
+					var.yres_virtual =
+					    ((vram * 8) /
+					     var.bits_per_pixel) /
+					    var.xres_virtual;
+					if (var.yres_virtual < var.yres)
+						var.yres_virtual =
+						    var.yres;
+				}
+				atyfb_set_var(&var, -1, info);
 			}
-			atyfb_set_var(&var, -1, &fb->fb_info);
 		}
+	} else {
+		par->consolecnt--;
 	}
-    } else {
-	fb->consolecnt--;
-    }
 #endif
-    return(0);
+	return (0);
 }
 
 
 static int encode_fix(struct fb_fix_screeninfo *fix,
 		      const struct atyfb_par *par,
-		      const struct fb_info_aty *info)
+		      const struct fb_info *info)
 {
-    memset(fix, 0, sizeof(struct fb_fix_screeninfo));
-
-    strcpy(fix->id, atyfb_name);
-    fix->smem_start = info->frame_buffer_phys;
-    fix->smem_len = (u32)info->total_vram;
-
-    /*
-     *  Reg Block 0 (CT-compatible block) is at ati_regbase_phys
-     *  Reg Block 1 (multimedia extensions) is at ati_regbase_phys-0x400
-     */
-    if (M64_HAS(GX)) {
-	fix->mmio_start = info->ati_regbase_phys;
-	fix->mmio_len = 0x400;
-	fix->accel = FB_ACCEL_ATI_MACH64GX;
-    } else if (M64_HAS(CT)) {
-	fix->mmio_start = info->ati_regbase_phys;
-	fix->mmio_len = 0x400;
-	fix->accel = FB_ACCEL_ATI_MACH64CT;
-    } else if (M64_HAS(VT)) {
-	fix->mmio_start = info->ati_regbase_phys-0x400;
-	fix->mmio_len = 0x800;
-	fix->accel = FB_ACCEL_ATI_MACH64VT;
-    } else /* if (M64_HAS(GT)) */ {
-	fix->mmio_start = info->ati_regbase_phys-0x400;
-	fix->mmio_len = 0x800;
-	fix->accel = FB_ACCEL_ATI_MACH64GT;
-    }
-    fix->type = FB_TYPE_PACKED_PIXELS;
-    fix->type_aux = 0;
-    fix->line_length = par->crtc.vxres*par->crtc.bpp/8;
-    fix->visual = par->crtc.bpp <= 8 ? FB_VISUAL_PSEUDOCOLOR
-				     : FB_VISUAL_DIRECTCOLOR;
-    fix->ywrapstep = 0;
-    fix->xpanstep = 8;
-    fix->ypanstep = 1;
-
-    return 0;
+	memset(fix, 0, sizeof(struct fb_fix_screeninfo));
+
+	strcpy(fix->id, atyfb_name);
+	fix->smem_start = info->fix.smem_start;
+	fix->smem_len = info->fix.smem_len;
+	fix->mmio_start = info->fix.mmio_start;
+	fix->mmio_len = info->fix.mmio_len;
+	fix->accel = info->fix.accel;
+	fix->type = info->fix.type;
+	fix->type_aux = info->fix.type_aux;
+	fix->line_length = par->crtc.vxres * par->crtc.bpp / 8;
+	fix->visual = par->crtc.bpp <= 8 ? FB_VISUAL_PSEUDOCOLOR
+	    : FB_VISUAL_DIRECTCOLOR;
+	fix->ywrapstep = info->fix.ywrapstep;
+	fix->xpanstep = info->fix.xpanstep;
+	fix->ypanstep = info->fix.ypanstep;
+	return 0;
 }
 
-
     /*
      *  Get the Fixed Part of the Display
      */
 
 static int atyfb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			 struct fb_info *fb)
+			 struct fb_info *info)
 {
-    const struct fb_info_aty *info = (struct fb_info_aty *)fb;
-    struct atyfb_par par;
-
-    if (con == -1)
-	par = info->default_par;
-    else
-	atyfb_decode_var(&fb_display[con].var, &par, info);
-    encode_fix(fix, &par, info);
-    return 0;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+
+	atyfb_decode_var(&fb_display[con].var, par, info);
+	encode_fix(fix, par, info);
+	return 0;
 }
 
 
@@ -1030,58 +1071,48 @@ static int atyfb_get_fix(struct fb_fix_screeninfo *fix, int con,
      */
 
 static int atyfb_get_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *fb)
+			 struct fb_info *info)
 {
-    const struct fb_info_aty *info = (struct fb_info_aty *)fb;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
 
-    if (con == -1)
-	atyfb_encode_var(var, &info->default_par, info);
-    else
-	*var = fb_display[con].var;
-    return 0;
+	if (con == -1)
+		atyfb_encode_var(var, par, info);
+	else
+		*var = fb_display[con].var;
+	return 0;
 }
 
 
-static void atyfb_set_dispsw(struct display *disp, struct fb_info_aty *info,
-			     int bpp, int accel)
+static void atyfb_set_dispsw(struct display *disp,
+			     struct fb_info *info)
 {
-	    switch (bpp) {
-#ifdef FBCON_HAS_CFB8
-		case 8:
-		    info->dispsw = accel ? fbcon_aty8 : fbcon_cfb8;
-		    disp->dispsw = &info->dispsw;
-		    break;
-#endif
-#ifdef FBCON_HAS_CFB16
-		case 16:
-		    info->dispsw = accel ? fbcon_aty16 : fbcon_cfb16;
-		    disp->dispsw = &info->dispsw;
-		    disp->dispsw_data = info->fbcon_cmap.cfb16;
-		    break;
-#endif
-#ifdef FBCON_HAS_CFB24
-		case 24:
-		    info->dispsw = accel ? fbcon_aty24 : fbcon_cfb24;
-		    disp->dispsw = &info->dispsw;
-		    disp->dispsw_data = info->fbcon_cmap.cfb24;
-		    break;
-#endif
-#ifdef FBCON_HAS_CFB32
-		case 32:
-		    info->dispsw = accel ? fbcon_aty32 : fbcon_cfb32;
-		    disp->dispsw = &info->dispsw;
-		    disp->dispsw_data = info->fbcon_cmap.cfb32;
-		    break;
-#endif
-		default:
-		    disp->dispsw = &fbcon_dummy;
-	    }
+	switch (info->var.bits_per_pixel) {
+	case 8:
+		disp->dispsw = &fbcon_aty8;
+		break;
+	case 16:
+		disp->dispsw = &fbcon_aty16;
+		disp->dispsw_data = info->pseudo_palette;
+		break;
+	case 24:
+		disp->dispsw = &fbcon_aty24;
+		disp->dispsw_data = info->pseudo_palette;
+		break;
+	case 32:
+		disp->dispsw = &fbcon_aty32;
+		disp->dispsw_data = info->pseudo_palette;
+		break;
+	default:
+		disp->dispsw = &fbcon_dummy;
+	}
 #ifdef CONFIG_FB_ATY_CT
-	    if (info->cursor) {
-		info->dispsw.cursor = atyfb_cursor;
-		info->dispsw.set_font = atyfb_set_font;
-	    }
-#endif /* CONFIG_FB_ATY_CT */
+/*
+	if (info->cursor) {
+		&disp->dispsw.cursor = atyfb_cursor;
+		&disp->dispsw.set_font = atyfb_set_font;
+	}
+*/
+#endif			/* CONFIG_FB_ATY_CT */
 }
 
 
@@ -1090,68 +1121,70 @@ static void atyfb_set_dispsw(struct display *disp, struct fb_info_aty *info,
      */
 
 static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *fb)
+			 struct fb_info *info)
 {
-    struct fb_info_aty *info = (struct fb_info_aty *)fb;
-    struct atyfb_par par;
-    struct display *display;
-    int oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel, accel, err;
-    int activate = var->activate;
-
-    if (con >= 0)
-	display = &fb_display[con];
-    else
-	display = fb->disp;	/* used during initialization */
-
-    if ((err = atyfb_decode_var(var, &par, info)))
-	return err;
-
-    atyfb_encode_var(var, &par, (struct fb_info_aty *)info);
-
-    if ((activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
-	oldxres = display->var.xres;
-	oldyres = display->var.yres;
-	oldvxres = display->var.xres_virtual;
-	oldvyres = display->var.yres_virtual;
-	oldbpp = display->var.bits_per_pixel;
-	oldaccel = display->var.accel_flags;
-	display->var = *var;
-	accel = var->accel_flags & FB_ACCELF_TEXT;
-	if (oldxres != var->xres || oldyres != var->yres ||
-	    oldvxres != var->xres_virtual || oldvyres != var->yres_virtual ||
-	    oldbpp != var->bits_per_pixel || oldaccel != var->accel_flags) {
-	    struct fb_fix_screeninfo fix;
-
-	    encode_fix(&fix, &par, info);
-	    fb->screen_base = (char *)info->frame_buffer;
-	    display->visual = fix.visual;
-	    display->type = fix.type;
-	    display->type_aux = fix.type_aux;
-	    display->ypanstep = fix.ypanstep;
-	    display->ywrapstep = fix.ywrapstep;
-	    display->line_length = fix.line_length;
-	    display->can_soft_blank = 1;
-	    display->inverse = 0;
-	    if (accel)
-	    	display->scrollmode = (info->bus_type == PCI) ? SCROLL_YNOMOVE : 0;
-	    else
-	    	display->scrollmode = SCROLL_YREDRAW;
-	    if (info->fb_info.changevar)
-		(*info->fb_info.changevar)(con);
-	}
-	if (!info->fb_info.display_fg ||
-	    info->fb_info.display_fg->vc_num == con) {
-	    atyfb_set_par(&par, info);
-	    atyfb_set_dispsw(display, info, par.crtc.bpp, accel);
-	}
-	if (oldbpp != var->bits_per_pixel) {
-	    if ((err = fb_alloc_cmap(&display->cmap, 0, 0)))
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	struct display *display;
+	int oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel, accel,
+	    err;
+	int activate = var->activate;
+
+	if (con >= 0)
+		display = &fb_display[con];
+	else
+		display = info->disp;	/* used during initialization */
+
+	if ((err = atyfb_decode_var(var, par, info)))
 		return err;
-	    do_install_cmap(con, &info->fb_info);
-	}
-    }
 
-    return 0;
+	atyfb_encode_var(var, par, info);
+
+	if ((activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
+		oldxres = display->var.xres;
+		oldyres = display->var.yres;
+		oldvxres = display->var.xres_virtual;
+		oldvyres = display->var.yres_virtual;
+		oldbpp = display->var.bits_per_pixel;
+		oldaccel = display->var.accel_flags;
+		display->var = *var;
+		accel = var->accel_flags & FB_ACCELF_TEXT;
+		if (oldxres != var->xres || oldyres != var->yres ||
+		    oldvxres != var->xres_virtual
+		    || oldvyres != var->yres_virtual
+		    || oldbpp != var->bits_per_pixel
+		    || oldaccel != var->accel_flags) {
+			struct fb_fix_screeninfo fix;
+
+			encode_fix(&fix, par, info);
+			display->visual = fix.visual;
+			display->type = fix.type;
+			display->type_aux = fix.type_aux;
+			display->ypanstep = fix.ypanstep;
+			display->ywrapstep = fix.ywrapstep;
+			display->line_length = fix.line_length;
+			display->can_soft_blank = 1;
+			display->inverse = 0;
+			if (accel)
+				display->scrollmode =
+				    (par->bus_type ==
+				     PCI) ? SCROLL_YNOMOVE : 0;
+			else
+				display->scrollmode = SCROLL_YREDRAW;
+			if (info->changevar)
+				(*info->changevar) (con);
+		}
+		if (!info->display_fg ||
+		    info->display_fg->vc_num == con) {
+			atyfb_set_par(par, info);
+			atyfb_set_dispsw(display, info);
+		}
+		if (oldbpp != var->bits_per_pixel) {
+			if ((err = fb_alloc_cmap(&display->cmap, 0, 0)))
+				return err;
+			do_install_cmap(con, info);
+		}
+	}
+	return 0;
 }
 
 
@@ -1162,85 +1195,40 @@ static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
      */
 
 static int atyfb_pan_display(struct fb_var_screeninfo *var, int con,
-			     struct fb_info *fb)
+			     struct fb_info *info)
 {
-    struct fb_info_aty *info = (struct fb_info_aty *)fb;
-    u32 xres, yres, xoffset, yoffset;
-    struct atyfb_par *par = &info->current_par;
-
-    xres = (((par->crtc.h_tot_disp>>16) & 0xff)+1)*8;
-    yres = ((par->crtc.v_tot_disp>>16) & 0x7ff)+1;
-    xoffset = (var->xoffset+7) & ~7;
-    yoffset = var->yoffset;
-    if (xoffset+xres > par->crtc.vxres || yoffset+yres > par->crtc.vyres)
-	return -EINVAL;
-    par->crtc.xoffset = xoffset;
-    par->crtc.yoffset = yoffset;
-    set_off_pitch(par, info);
-    return 0;
-}
-
-    /*
-     *  Get the Colormap
-     */
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 xres, yres, xoffset, yoffset;
 
-static int atyfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info)
-{
-    if (!info->display_fg || con == info->display_fg->vc_num) /* current console? */
-	return fb_get_cmap(cmap, kspc, atyfb_getcolreg, info);
-    else if (fb_display[con].cmap.len) /* non default colormap? */
-	fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
-    else {
-	int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
-	fb_copy_cmap(fb_default_cmap(size), cmap, kspc ? 0 : 2);
-    }
-    return 0;
-}
-
-    /*
-     *  Set the Colormap
-     */
-
-static int atyfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info)
-{
-    int err;
-    struct display *disp;
-
-    if (con >= 0)
-    	disp = &fb_display[con];
-    else
-        disp = info->disp;
-    if (!disp->cmap.len) {	/* no colormap allocated? */
-	int size = disp->var.bits_per_pixel == 16 ? 32 : 256;
-	if ((err = fb_alloc_cmap(&disp->cmap, size, 0)))
-	    return err;
-    }
-    if (!info->display_fg || con == info->display_fg->vc_num)			/* current console? */
-	return fb_set_cmap(cmap, kspc, info);
-    else
-	fb_copy_cmap(cmap, &disp->cmap, kspc ? 0 : 1);
-    return 0;
+	xres = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8;
+	yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1;
+	xoffset = (var->xoffset + 7) & ~7;
+	yoffset = var->yoffset;
+	if (xoffset + xres > par->crtc.vxres
+	    || yoffset + yres > par->crtc.vyres)
+		return -EINVAL;
+	par->crtc.xoffset = xoffset;
+	par->crtc.yoffset = yoffset;
+	set_off_pitch(par, info);
+	return 0;
 }
 
-
 #ifdef DEBUG
 #define ATYIO_CLKR		0x41545900	/* ATY\00 */
 #define ATYIO_CLKW		0x41545901	/* ATY\01 */
 
 struct atyclk {
-    u32 ref_clk_per;
-    u8 pll_ref_div;
-    u8 mclk_fb_div;
-    u8 mclk_post_div;		/* 1,2,3,4,8 */
-    u8 vclk_fb_div;
-    u8 vclk_post_div;		/* 1,2,3,4,6,8,12 */
-    u32 dsp_xclks_per_row;	/* 0-16383 */
-    u32 dsp_loop_latency;	/* 0-15 */
-    u32 dsp_precision;		/* 0-7 */
-    u32 dsp_on;			/* 0-2047 */
-    u32 dsp_off;		/* 0-2047 */
+	u32 ref_clk_per;
+	u8 pll_ref_div;
+	u8 mclk_fb_div;
+	u8 mclk_post_div;	/* 1,2,3,4,8 */
+	u8 vclk_fb_div;
+	u8 vclk_post_div;	/* 1,2,3,4,6,8,12 */
+	u32 dsp_xclks_per_row;	/* 0-16383 */
+	u32 dsp_loop_latency;	/* 0-15 */
+	u32 dsp_precision;	/* 0-7 */
+	u32 dsp_on;		/* 0-2047 */
+	u32 dsp_off;		/* 0-2047 */
 };
 
 #define ATYIO_FEATR		0x41545902	/* ATY\02 */
@@ -1248,114 +1236,122 @@ struct atyclk {
 #endif
 
 static int atyfb_ioctl(struct inode *inode, struct file *file, u_int cmd,
-		       u_long arg, int con, struct fb_info *info2)
+		       u_long arg, int con, struct fb_info *info)
 {
 #if defined(__sparc__) || (defined(DEBUG) && defined(CONFIG_FB_ATY_CT))
-    struct fb_info_aty *info = (struct fb_info_aty *)info2;
-#endif /* __sparc__ || DEBUG */
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+#endif				/* __sparc__ || DEBUG */
 #ifdef __sparc__
-    struct fbtype fbtyp;
-    struct display *disp;
+	struct fbtype fbtyp;
+	struct display *disp;
 
-    if (con >= 0)
-    	disp = &fb_display[con];
-    else
-        disp = info2->disp;
+	if (con >= 0)
+		disp = &fb_display[con];
+	else
+		disp = info2->disp;
 #endif
 
-    switch (cmd) {
+	switch (cmd) {
 #ifdef __sparc__
-    case FBIOGTYPE:
-	fbtyp.fb_type = FBTYPE_PCI_GENERIC;
-	fbtyp.fb_width = info->current_par.crtc.vxres;
-	fbtyp.fb_height = info->current_par.crtc.vyres;
-	fbtyp.fb_depth = info->current_par.crtc.bpp;
-	fbtyp.fb_cmsize = disp->cmap.len;
-	fbtyp.fb_size = info->total_vram;
-	if (copy_to_user((struct fbtype *)arg, &fbtyp, sizeof(fbtyp)))
-		return -EFAULT;
-	break;
-#endif /* __sparc__ */
+	case FBIOGTYPE:
+		fbtyp.fb_type = FBTYPE_PCI_GENERIC;
+		fbtyp.fb_width = par->crtc.vxres;
+		fbtyp.fb_height = par->crtc.vyres;
+		fbtyp.fb_depth = par->crtc.bpp;
+		fbtyp.fb_cmsize = disp->cmap.len;
+		fbtyp.fb_size = info->fix.smem_len;
+		if (copy_to_user
+		    ((struct fbtype *) arg, &fbtyp, sizeof(fbtyp)))
+			return -EFAULT;
+		break;
+#endif				/* __sparc__ */
 #if defined(DEBUG) && defined(CONFIG_FB_ATY_CT)
-    case ATYIO_CLKR:
-	if (M64_HAS(INTEGRATED)) {
-	    struct atyclk clk;
-	    union aty_pll *pll = &info->current_par.pll;
-	    u32 dsp_config = pll->ct.dsp_config;
-	    u32 dsp_on_off = pll->ct.dsp_on_off;
-	    clk.ref_clk_per = info->ref_clk_per;
-	    clk.pll_ref_div = pll->ct.pll_ref_div;
-	    clk.mclk_fb_div = pll->ct.mclk_fb_div;
-	    clk.mclk_post_div = pll->ct.mclk_post_div_real;
-	    clk.vclk_fb_div = pll->ct.vclk_fb_div;
-	    clk.vclk_post_div = pll->ct.vclk_post_div_real;
-	    clk.dsp_xclks_per_row = dsp_config & 0x3fff;
-	    clk.dsp_loop_latency = (dsp_config>>16) & 0xf;
-	    clk.dsp_precision = (dsp_config>>20) & 7;
-	    clk.dsp_on = dsp_on_off & 0x7ff;
-	    clk.dsp_off = (dsp_on_off>>16) & 0x7ff;
-	    if (copy_to_user((struct atyclk *)arg, &clk, sizeof(clk)))
-		    return -EFAULT;
-	} else
-	    return -EINVAL;
-	break;
-    case ATYIO_CLKW:
-	if (M64_HAS(INTEGRATED)) {
-	    struct atyclk clk;
-	    union aty_pll *pll = &info->current_par.pll;
-	    if (copy_from_user(&clk, (struct atyclk *)arg, sizeof(clk)))
-		    return -EFAULT;
-	    info->ref_clk_per = clk.ref_clk_per;
-	    pll->ct.pll_ref_div = clk.pll_ref_div;
-	    pll->ct.mclk_fb_div = clk.mclk_fb_div;
-	    pll->ct.mclk_post_div_real = clk.mclk_post_div;
-	    pll->ct.vclk_fb_div = clk.vclk_fb_div;
-	    pll->ct.vclk_post_div_real = clk.vclk_post_div;
-	    pll->ct.dsp_config = (clk.dsp_xclks_per_row & 0x3fff) |
-				 ((clk.dsp_loop_latency & 0xf)<<16) |
-				 ((clk.dsp_precision & 7)<<20);
-	    pll->ct.dsp_on_off = (clk.dsp_on & 0x7ff) |
-				 ((clk.dsp_off & 0x7ff)<<16);
-	    aty_calc_pll_ct(info, &pll->ct);
-	    aty_set_pll_ct(info, pll);
-	} else
-	    return -EINVAL;
-	break;
-    case ATYIO_FEATR:
-	if (get_user(info->features, (u32 *)arg))
-	    return -EFAULT;
-	break;
-    case ATYIO_FEATW:
-	if (put_user(info->features, (u32 *)arg))
-	    return -EFAULT;
-	break;
-#endif /* DEBUG && CONFIG_FB_ATY_CT */
-    default:
-	return -EINVAL;
-    }
-    return 0;
+	case ATYIO_CLKR:
+		if (M64_HAS(INTEGRATED)) {
+			struct atyclk clk;
+			union aty_pll *pll = par->pll;
+			u32 dsp_config = pll->ct.dsp_config;
+			u32 dsp_on_off = pll->ct.dsp_on_off;
+			clk.ref_clk_per = par->ref_clk_per;
+			clk.pll_ref_div = pll->ct.pll_ref_div;
+			clk.mclk_fb_div = pll->ct.mclk_fb_div;
+			clk.mclk_post_div = pll->ct.mclk_post_div_real;
+			clk.vclk_fb_div = pll->ct.vclk_fb_div;
+			clk.vclk_post_div = pll->ct.vclk_post_div_real;
+			clk.dsp_xclks_per_row = dsp_config & 0x3fff;
+			clk.dsp_loop_latency = (dsp_config >> 16) & 0xf;
+			clk.dsp_precision = (dsp_config >> 20) & 7;
+			clk.dsp_on = dsp_on_off & 0x7ff;
+			clk.dsp_off = (dsp_on_off >> 16) & 0x7ff;
+			if (copy_to_user
+			    ((struct atyclk *) arg, &clk, sizeof(clk)))
+				return -EFAULT;
+		} else
+			return -EINVAL;
+		break;
+	case ATYIO_CLKW:
+		if (M64_HAS(INTEGRATED)) {
+			struct atyclk clk;
+			union aty_pll *pll = par->pll;
+			if (copy_from_user
+			    (&clk, (struct atyclk *) arg, sizeof(clk)))
+				return -EFAULT;
+			par->ref_clk_per = clk.ref_clk_per;
+			pll->ct.pll_ref_div = clk.pll_ref_div;
+			pll->ct.mclk_fb_div = clk.mclk_fb_div;
+			pll->ct.mclk_post_div_real = clk.mclk_post_div;
+			pll->ct.vclk_fb_div = clk.vclk_fb_div;
+			pll->ct.vclk_post_div_real = clk.vclk_post_div;
+			pll->ct.dsp_config =
+			    (clk.
+			     dsp_xclks_per_row & 0x3fff) | ((clk.
+							     dsp_loop_latency
+							     & 0xf) << 16)
+			    | ((clk.dsp_precision & 7) << 20);
+			pll->ct.dsp_on_off =
+			    (clk.
+			     dsp_on & 0x7ff) | ((clk.
+						 dsp_off & 0x7ff) << 16);
+			aty_calc_pll_ct(info, &pll->ct);
+			aty_set_pll_ct(info, pll);
+		} else
+			return -EINVAL;
+		break;
+	case ATYIO_FEATR:
+		if (get_user(par->features, (u32 *) arg))
+			return -EFAULT;
+		break;
+	case ATYIO_FEATW:
+		if (put_user(par->features, (u32 *) arg))
+			return -EFAULT;
+		break;
+#endif				/* DEBUG && CONFIG_FB_ATY_CT */
+	default:
+		return -EINVAL;
+	}
+	return 0;
 }
 
 static int atyfb_rasterimg(struct fb_info *info, int start)
 {
-    struct fb_info_aty *fb = (struct fb_info_aty *)info;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
 
-    if (fb->blitter_may_be_busy)
-	wait_for_idle(fb);
-    return 0;
+	if (par->blitter_may_be_busy)
+		wait_for_idle(par);
+	return 0;
 }
 
 #ifdef __sparc__
 static int atyfb_mmap(struct fb_info *info, struct file *file,
 		      struct vm_area_struct *vma)
 {
-	struct fb_info_aty *fb = (struct fb_info_aty *)info;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
 	unsigned int size, page, map_size = 0;
 	unsigned long map_offset = 0;
 	unsigned long off;
 	int i;
 
-	if (!fb->mmap_map)
+	if (!par->mmap_map)
 		return -ENXIO;
 
 	if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
@@ -1367,18 +1363,18 @@ static int atyfb_mmap(struct fb_info *info, struct file *file,
 	/* To stop the swapper from even considering these pages. */
 	vma->vm_flags |= (VM_SHM | VM_LOCKED);
 
-	if (((vma->vm_pgoff == 0) && (size == fb->total_vram)) ||
-	    ((off == fb->total_vram) && (size == PAGE_SIZE)))
+	if (((vma->vm_pgoff == 0) && (size == info->fix.smem_len)) ||
+	    ((off == info->fix.smem_len) && (size == PAGE_SIZE)))
 		off += 0x8000000000000000UL;
 
 	vma->vm_pgoff = off >> PAGE_SHIFT;	/* propagate off changes */
 
 	/* Each page, see which map applies */
-	for (page = 0; page < size; ) {
+	for (page = 0; page < size;) {
 		map_size = 0;
-		for (i = 0; fb->mmap_map[i].size; i++) {
-			unsigned long start = fb->mmap_map[i].voff;
-			unsigned long end = start + fb->mmap_map[i].size;
+		for (i = 0; par->mmap_map[i].size; i++) {
+			unsigned long start = par->mmap_map[i].voff;
+			unsigned long end = start + par->mmap_map[i].size;
 			unsigned long offset = off + page;
 
 			if (start > offset)
@@ -1386,8 +1382,9 @@ static int atyfb_mmap(struct fb_info *info, struct file *file,
 			if (offset >= end)
 				continue;
 
-			map_size = fb->mmap_map[i].size - (offset - start);
-			map_offset = fb->mmap_map[i].poff + (offset - start);
+			map_size = par->mmap_map[i].size - (offset - start);
+			map_offset =
+			    par->mmap_map[i].poff + (offset - start);
 			break;
 		}
 		if (!map_size) {
@@ -1397,8 +1394,9 @@ static int atyfb_mmap(struct fb_info *info, struct file *file,
 		if (page + map_size > size)
 			map_size = size - page;
 
-		pgprot_val(vma->vm_page_prot) &= ~(fb->mmap_map[i].prot_mask);
-		pgprot_val(vma->vm_page_prot) |= fb->mmap_map[i].prot_flag;
+		pgprot_val(vma->vm_page_prot) &=
+		    ~(par->mmap_map[i].prot_mask);
+		pgprot_val(vma->vm_page_prot) |= par->mmap_map[i].prot_flag;
 
 		if (remap_page_range(vma, vma->vm_start + page, map_offset,
 				     map_size, vma->vm_page_prot))
@@ -1412,14 +1410,15 @@ static int atyfb_mmap(struct fb_info *info, struct file *file,
 
 	vma->vm_flags |= VM_IO;
 
-	if (!fb->mmaped) {
+	if (!par->mmaped) {
 		int lastconsole = 0;
 
 		if (info->display_fg)
 			lastconsole = info->display_fg->vc_num;
-		fb->mmaped = 1;
-		if (fb->consolecnt && fb_display[lastconsole].fb_info == info) {
-			fb->vtconsole = lastconsole;
+		par->mmaped = 1;
+		if (par->consolecnt
+		    && fb_display[lastconsole].fb_info == info) {
+			par->vtconsole = lastconsole;
 			vt_cons[lastconsole]->vc_mode = KD_GRAPHICS;
 		}
 	}
@@ -1427,15 +1426,14 @@ static int atyfb_mmap(struct fb_info *info, struct file *file,
 }
 
 static struct {
-	u32	yoffset;
-	u8	r[2][256];
-	u8	g[2][256];
-	u8	b[2][256];
+	u32 yoffset;
+	u8 r[2][256];
+	u8 g[2][256];
+	u8 b[2][256];
 } atyfb_save;
 
-static void atyfb_save_palette(struct fb_info *fb, int enter)
+static void atyfb_save_palette(struct fb_info *info, int enter)
 {
-	struct fb_info_aty *info = (struct fb_info_aty *)fb;
 	int i, tmp;
 
 	for (i = 0; i < 256; i++) {
@@ -1445,20 +1443,23 @@ static void atyfb_save_palette(struct fb_info *fb, int enter)
 		aty_st_8(DAC_CNTL, tmp, info);
 		aty_st_8(DAC_MASK, 0xff, info);
 
-		writeb(i, &info->aty_cmap_regs->rindex);
-		atyfb_save.r[enter][i] = readb(&info->aty_cmap_regs->lut);
-		atyfb_save.g[enter][i] = readb(&info->aty_cmap_regs->lut);
-		atyfb_save.b[enter][i] = readb(&info->aty_cmap_regs->lut);
-		writeb(i, &info->aty_cmap_regs->windex);
-		writeb(atyfb_save.r[1-enter][i], &info->aty_cmap_regs->lut);
-		writeb(atyfb_save.g[1-enter][i], &info->aty_cmap_regs->lut);
-		writeb(atyfb_save.b[1-enter][i], &info->aty_cmap_regs->lut);
+		writeb(i, &par->aty_cmap_regs->rindex);
+		atyfb_save.r[enter][i] = readb(&par->aty_cmap_regs->lut);
+		atyfb_save.g[enter][i] = readb(&par->aty_cmap_regs->lut);
+		atyfb_save.b[enter][i] = readb(&par->aty_cmap_regs->lut);
+		writeb(i, &par->aty_cmap_regs->windex);
+		writeb(atyfb_save.r[1 - enter][i],
+		       &par->aty_cmap_regs->lut);
+		writeb(atyfb_save.g[1 - enter][i],
+		       &par->aty_cmap_regs->lut);
+		writeb(atyfb_save.b[1 - enter][i],
+		       &par->aty_cmap_regs->lut);
 	}
 }
 
 static void atyfb_palette(int enter)
 {
-	struct fb_info_aty *info;
+	struct fb_info *info;
 	struct atyfb_par *par;
 	struct display *d;
 	int i;
@@ -1470,8 +1471,8 @@ static void atyfb_palette(int enter)
 		    d->fb_info->display_fg &&
 		    d->fb_info->display_fg->vc_num == i) {
 			atyfb_save_palette(d->fb_info, enter);
-			info = (struct fb_info_aty *)d->fb_info;
-			par = &info->current_par;
+			info = d->fb_info;
+			par = (struct atyfb_par *) info->par;
 			if (enter) {
 				atyfb_save.yoffset = par->crtc.yoffset;
 				par->crtc.yoffset = 0;
@@ -1484,13 +1485,13 @@ static void atyfb_palette(int enter)
 		}
 	}
 }
-#endif /* __sparc__ */
+#endif				/* __sparc__ */
 
 
 
 #ifdef CONFIG_PMAC_PBOOK
 
-static struct fb_info_aty* first_display = NULL;
+static struct fb_info *first_display = NULL;
 
 /* Power management routines. Those are used for PowerBook sleep.
  *
@@ -1498,16 +1499,16 @@ static struct fb_info_aty* first_display = NULL;
  * management registers. There's is some confusion about which
  * chipID is a Rage LT or LT pro :(
  */
-static int aty_power_mgmt_LT(int sleep, struct fb_info_aty *info)
+static int aty_power_mgmt_LT(int sleep, struct fb_info *info)
 {
- 	unsigned int pm;
+	unsigned int pm;
 	int timeout;
-	
+
 	pm = aty_ld_le32(POWER_MANAGEMENT_LG, info);
 	pm = (pm & ~PWR_MGT_MODE_MASK) | PWR_MGT_MODE_REG;
 	aty_st_le32(POWER_MANAGEMENT_LG, pm, info);
 	pm = aty_ld_le32(POWER_MANAGEMENT_LG, info);
-	
+
 	timeout = 200000;
 	if (sleep) {
 		/* Sleep */
@@ -1527,14 +1528,15 @@ static int aty_power_mgmt_LT(int sleep, struct fb_info_aty *info)
 			udelay(10);
 			if ((--timeout) == 0)
 				break;
-		} while ((pm & PWR_MGT_STATUS_MASK) != PWR_MGT_STATUS_SUSPEND);
+		} while ((pm & PWR_MGT_STATUS_MASK) !=
+			 PWR_MGT_STATUS_SUSPEND);
 	} else {
 		/* Wakeup */
 		pm &= ~PWR_MGT_ON;
 		aty_st_le32(POWER_MANAGEMENT_LG, pm, info);
 		pm = aty_ld_le32(POWER_MANAGEMENT_LG, info);
 		udelay(10);
-		pm |=  (PWR_BLON | AUTO_PWR_UP);
+		pm |= (PWR_BLON | AUTO_PWR_UP);
 		pm &= ~SUSPEND_NOW;
 		aty_st_le32(POWER_MANAGEMENT_LG, pm, info);
 		pm = aty_ld_le32(POWER_MANAGEMENT_LG, info);
@@ -1553,11 +1555,11 @@ static int aty_power_mgmt_LT(int sleep, struct fb_info_aty *info)
 	return timeout ? PBOOK_SLEEP_OK : PBOOK_SLEEP_REFUSE;
 }
 
-static int aty_power_mgmt_LTPro(int sleep, struct fb_info_aty *info)
+static int aty_power_mgmt_LTPro(int sleep, struct fb_info *info)
 {
- 	unsigned int pm;
+	unsigned int pm;
 	int timeout;
-	
+
 	pm = aty_ld_lcd(POWER_MANAGEMENT, info);
 	pm = (pm & ~PWR_MGT_MODE_MASK) | PWR_MGT_MODE_REG;
 	aty_st_lcd(POWER_MANAGEMENT, pm, info);
@@ -1582,7 +1584,8 @@ static int aty_power_mgmt_LTPro(int sleep, struct fb_info_aty *info)
 			mdelay(1);
 			if ((--timeout) == 0)
 				break;
-		} while ((pm & PWR_MGT_STATUS_MASK) != PWR_MGT_STATUS_SUSPEND);
+		} while ((pm & PWR_MGT_STATUS_MASK) !=
+			 PWR_MGT_STATUS_SUSPEND);
 	} else {
 		/* Wakeup */
 		pm &= ~PWR_MGT_ON;
@@ -1597,7 +1600,7 @@ static int aty_power_mgmt_LTPro(int sleep, struct fb_info_aty *info)
 		pm |= PWR_MGT_ON;
 		aty_st_lcd(POWER_MANAGEMENT, pm, info);
 		do {
-			pm = aty_ld_lcd(POWER_MANAGEMENT, info);			
+			pm = aty_ld_lcd(POWER_MANAGEMENT, info);
 			mdelay(1);
 			if ((--timeout) == 0)
 				break;
@@ -1607,10 +1610,10 @@ static int aty_power_mgmt_LTPro(int sleep, struct fb_info_aty *info)
 	return timeout ? PBOOK_SLEEP_OK : PBOOK_SLEEP_REFUSE;
 }
 
-static int aty_power_mgmt(int sleep, struct fb_info_aty *info)
+static int aty_power_mgmt(int sleep, struct fb_info *info)
 {
-    return M64_HAS(LT_SLEEP) ? aty_power_mgmt_LT(sleep, info)
-			     : aty_power_mgmt_LTPro(sleep, info);
+	return M64_HAS(LT_SLEEP) ? aty_power_mgmt_LT(sleep, info)
+	    : aty_power_mgmt_LTPro(sleep, info);
 }
 
 /*
@@ -1619,8 +1622,9 @@ static int aty_power_mgmt(int sleep, struct fb_info_aty *info)
  */
 static int aty_sleep_notify(struct pmu_sleep_notifier *self, int when)
 {
-	struct fb_info_aty *info;
- 	int result;
+	struct fb_info *info;
+	struct atyfb_par *par = (struct atyfb_par *) info->fb.par;
+	int result;
 
 	result = PBOOK_SLEEP_OK;
 
@@ -1628,35 +1632,35 @@ static int aty_sleep_notify(struct pmu_sleep_notifier *self, int when)
 		struct fb_fix_screeninfo fix;
 		int nb;
 
-		atyfb_get_fix(&fix, fg_console, (struct fb_info *)info);
+		atyfb_get_fix(&fix, fg_console, info);
 		nb = fb_display[fg_console].var.yres * fix.line_length;
 
 		switch (when) {
 		case PBOOK_SLEEP_REQUEST:
-			info->save_framebuffer = vmalloc(nb);
-			if (info->save_framebuffer == NULL)
+			par->save_framebuffer = vmalloc(nb);
+			if (par->save_framebuffer == NULL)
 				return PBOOK_SLEEP_REFUSE;
 			break;
 		case PBOOK_SLEEP_REJECT:
-			if (info->save_framebuffer) {
-				vfree(info->save_framebuffer);
-				info->save_framebuffer = 0;
+			if (par->save_framebuffer) {
+				vfree(par->save_framebuffer);
+				par->save_framebuffer = 0;
 			}
 			break;
 		case PBOOK_SLEEP_NOW:
-			if (info->blitter_may_be_busy)
-				wait_for_idle(info);
+			if (par->blitter_may_be_busy)
+				wait_for_idle(par);
 			/* Stop accel engine (stop bus mastering) */
-			if (info->current_par.accel_flags & FB_ACCELF_TEXT)
+			if (par->accel_flags & FB_ACCELF_TEXT)
 				aty_reset_engine(info);
 
-			/* Backup fb content */	
-			if (info->save_framebuffer)
-				memcpy_fromio(info->save_framebuffer,
-				       (void *)info->frame_buffer, nb);
+			/* Backup fb content */
+			if (par->save_framebuffer)
+				memcpy_fromio(par->save_framebuffer,
+					      (void *) info->screen_base, nb);
 
 			/* Blank display and LCD */
-			atyfb_blank(VESA_POWERDOWN+1, (struct fb_info *)info);
+			atyfb_blank(VESA_POWERDOWN + 1, info);
 
 			/* Set chip to "suspend" mode */
 			result = aty_power_mgmt(1, info);
@@ -1665,16 +1669,16 @@ static int aty_sleep_notify(struct pmu_sleep_notifier *self, int when)
 			/* Wakeup chip */
 			result = aty_power_mgmt(0, info);
 
-			/* Restore fb content */			
-			if (info->save_framebuffer) {
-				memcpy_toio((void *)info->frame_buffer,
-				       info->save_framebuffer, nb);
-				vfree(info->save_framebuffer);
-				info->save_framebuffer = 0;
+			/* Restore fb content */
+			if (par->save_framebuffer) {
+				memcpy_toio((void *) info->screen_base,
+					    par->save_framebuffer, nb);
+				vfree(par->save_framebuffer);
+				par->save_framebuffer = 0;
 			}
 			/* Restore display */
-			atyfb_set_par(&info->current_par, info);
-			atyfb_blank(0, (struct fb_info *)info);
+			atyfb_set_par(par->par, info);
+			atyfb_blank(0, info);
 			break;
 		}
 	}
@@ -1682,9 +1686,9 @@ static int aty_sleep_notify(struct pmu_sleep_notifier *self, int when)
 }
 
 static struct pmu_sleep_notifier aty_sleep_notifier = {
-        aty_sleep_notify, SLEEP_LEVEL_VIDEO,
+	aty_sleep_notify, SLEEP_LEVEL_VIDEO,
 };
-#endif /* CONFIG_PMAC_PBOOK */
+#endif				/* CONFIG_PMAC_PBOOK */
 
 #ifdef CONFIG_PMAC_BACKLIGHT
 
@@ -1697,12 +1701,11 @@ static int backlight_conv[] = {
 	0x9a, 0xa7, 0xb4, 0xc1, 0xcf, 0xdc, 0xe9, 0xff
 };
 
-static int
-aty_set_backlight_enable(int on, int level, void* data)
+static int aty_set_backlight_enable(int on, int level, void *data)
 {
-	struct fb_info_aty *info = (struct fb_info_aty *)data;
+	struct fb_info *info = (struct fb_info *) data;
 	unsigned int reg = aty_ld_lcd(LCD_MISC_CNTL, info);
-	
+
 	reg |= (BLMOD_EN | BIASMOD_EN);
 	if (on && level > BACKLIGHT_OFF) {
 		reg &= ~BIAS_MOD_LEVEL_MASK;
@@ -1716,8 +1719,7 @@ aty_set_backlight_enable(int on, int level, void* data)
 	return 0;
 }
 
-static int
-aty_set_backlight_level(int level, void* data)
+static int aty_set_backlight_level(int level, void *data)
 {
 	return aty_set_backlight_enable(1, level, data);
 }
@@ -1726,7 +1728,7 @@ static struct backlight_controller aty_backlight_controller = {
 	aty_set_backlight_enable,
 	aty_set_backlight_level
 };
-#endif /* CONFIG_PMAC_BACKLIGHT */
+#endif				/* CONFIG_PMAC_BACKLIGHT */
 
 
 
@@ -1734,994 +1736,1072 @@ static struct backlight_controller aty_backlight_controller = {
      *  Initialisation
      */
 
-static struct fb_info_aty *fb_list = NULL;
+static struct fb_info *fb_list = NULL;
 
-static int __init aty_init(struct fb_info_aty *info, const char *name)
+static int __init aty_init(struct fb_info *info, const char *name)
 {
-    u32 chip_id;
-    u32 i;
-    int j, k;
-    struct fb_var_screeninfo var;
-    struct display *disp;
-    u16 type;
-    u8 rev;
-    const char *chipname = NULL, *ramname = NULL, *xtal;
-    int pll, mclk, gtb_memsize;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	const char *chipname = NULL, *ramname = NULL, *xtal;
+	int j, pll, mclk, gtb_memsize;
+	struct fb_var_screeninfo var;
+	struct display *disp;
+	u32 chip_id, i;
+	u16 type;
+	u8 rev;
 #if defined(CONFIG_PPC)
-    int sense;
+	int sense;
 #endif
-    u8 pll_ref_div;
-
-    info->aty_cmap_regs = (struct aty_cmap_regs *)(info->ati_regbase+0xc0);
-    chip_id = aty_ld_le32(CONFIG_CHIP_ID, info);
-    type = chip_id & CFG_CHIP_TYPE;
-    rev = (chip_id & CFG_CHIP_REV)>>24;
-    for (j = 0; j < (sizeof(aty_chips)/sizeof(*aty_chips)); j++)
-	if (type == aty_chips[j].chip_type &&
-	    (rev & aty_chips[j].rev_mask) == aty_chips[j].rev_val) {
-	    chipname = aty_chips[j].name;
-	    pll = aty_chips[j].pll;
-	    mclk = aty_chips[j].mclk;
-	    info->features = aty_chips[j].features;
-	    goto found;
-	}
-    printk("atyfb: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
-    return 0;
+	u8 pll_ref_div;
+
+	par->aty_cmap_regs =
+	    (struct aty_cmap_regs *) (par->ati_regbase + 0xc0);
+	chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);
+	type = chip_id & CFG_CHIP_TYPE;
+	rev = (chip_id & CFG_CHIP_REV) >> 24;
+	for (j = 0; j < (sizeof(aty_chips) / sizeof(*aty_chips)); j++)
+		if (type == aty_chips[j].chip_type &&
+		    (rev & aty_chips[j].rev_mask) ==
+		    aty_chips[j].rev_val) {
+			chipname = aty_chips[j].name;
+			pll = aty_chips[j].pll;
+			mclk = aty_chips[j].mclk;
+			par->features = aty_chips[j].features;
+			goto found;
+		}
+	printk("atyfb: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
+	return 0;
 
-found:
-    printk("atyfb: %s [0x%04x rev 0x%02x] ", chipname, type, rev);
+      found:
+	printk("atyfb: %s [0x%04x rev 0x%02x] ", chipname, type, rev);
 #ifdef CONFIG_FB_ATY_GX
-    if (!M64_HAS(INTEGRATED)) {
-	u32 stat0;
-	u8 dac_type, dac_subtype, clk_type;
-	stat0 = aty_ld_le32(CONFIG_STAT0, info);
-	info->bus_type = (stat0 >> 0) & 0x07;
-	info->ram_type = (stat0 >> 3) & 0x07;
-	ramname = aty_gx_ram[info->ram_type];
-	/* FIXME: clockchip/RAMDAC probing? */
-	dac_type = (aty_ld_le32(DAC_CNTL, info) >> 16) & 0x07;
+	if (!M64_HAS(INTEGRATED)) {
+		u32 stat0;
+		u8 dac_type, dac_subtype, clk_type;
+		stat0 = aty_ld_le32(CONFIG_STAT0, info);
+		par->bus_type = (stat0 >> 0) & 0x07;
+		par->ram_type = (stat0 >> 3) & 0x07;
+		ramname = aty_gx_ram[par->ram_type];
+		/* FIXME: clockchip/RAMDAC probing? */
+		dac_type = (aty_ld_le32(DAC_CNTL, par) >> 16) & 0x07;
 #ifdef CONFIG_ATARI
-	clk_type = CLK_ATI18818_1;
-	dac_type = (stat0 >> 9) & 0x07;
-	if (dac_type == 0x07)
-	    dac_subtype = DAC_ATT20C408;
-	else
-	    dac_subtype = (aty_ld_8(SCRATCH_REG1 + 1, info) & 0xF0) | dac_type;
+		clk_type = CLK_ATI18818_1;
+		dac_type = (stat0 >> 9) & 0x07;
+		if (dac_type == 0x07)
+			dac_subtype = DAC_ATT20C408;
+		else
+			dac_subtype =
+			    (aty_ld_8(SCRATCH_REG1 + 1, par) & 0xF0) |
+			    dac_type;
 #else
-	dac_type = DAC_IBMRGB514;
-	dac_subtype = DAC_IBMRGB514;
-	clk_type = CLK_IBMRGB514;
+		dac_type = DAC_IBMRGB514;
+		dac_subtype = DAC_IBMRGB514;
+		clk_type = CLK_IBMRGB514;
 #endif
-	switch (dac_subtype) {
-	    case DAC_IBMRGB514:
-		info->dac_ops = &aty_dac_ibm514;
-		break;
-	    case DAC_ATI68860_B:
-	    case DAC_ATI68860_C:
-		info->dac_ops = &aty_dac_ati68860b;
-		break;
-	    case DAC_ATT20C408:
-	    case DAC_ATT21C498:
-		info->dac_ops = &aty_dac_att21c498;
-		break;
-	    default:
-		printk(" atyfb_set_par: DAC type not implemented yet!\n");
-		info->dac_ops = &aty_dac_unsupported;
-		break;
-	}
-	switch (clk_type) {
-	    case CLK_ATI18818_1:
-		info->pll_ops = &aty_pll_ati18818_1;
-		break;
-	    case CLK_STG1703:
-		info->pll_ops = &aty_pll_stg1703;
-		break;
-	    case CLK_CH8398:
-		info->pll_ops = &aty_pll_ch8398;
-		break;
-	    case CLK_ATT20C408:
-		info->pll_ops = &aty_pll_att20c408;
-		break;
-	    case CLK_IBMRGB514:
-		info->pll_ops = &aty_pll_ibm514;
-		break;
-	    default:
-		printk(" atyfb_set_par: CLK type not implemented yet!");
-		info->pll_ops = &aty_pll_unsupported;
-		break;
+		switch (dac_subtype) {
+		case DAC_IBMRGB514:
+			par->dac_ops = &aty_dac_ibm514;
+			break;
+		case DAC_ATI68860_B:
+		case DAC_ATI68860_C:
+			par->dac_ops = &aty_dac_ati68860b;
+			break;
+		case DAC_ATT20C408:
+		case DAC_ATT21C498:
+			par->dac_ops = &aty_dac_att21c498;
+			break;
+		default:
+			printk
+			    (" atyfb_set_par: DAC type not implemented yet!\n");
+			par->dac_ops = &aty_dac_unsupported;
+			break;
+		}
+		switch (clk_type) {
+		case CLK_ATI18818_1:
+			par->pll_ops = &aty_pll_ati18818_1;
+			break;
+		case CLK_STG1703:
+			par->pll_ops = &aty_pll_stg1703;
+			break;
+		case CLK_CH8398:
+			par->pll_ops = &aty_pll_ch8398;
+			break;
+		case CLK_ATT20C408:
+			par->pll_ops = &aty_pll_att20c408;
+			break;
+		case CLK_IBMRGB514:
+			par->pll_ops = &aty_pll_ibm514;
+			break;
+		default:
+			printk
+			    (" atyfb_set_par: CLK type not implemented yet!");
+			par->pll_ops = &aty_pll_unsupported;
+			break;
+		}
 	}
-    }
-#endif /* CONFIG_FB_ATY_GX */
+#endif				/* CONFIG_FB_ATY_GX */
 #ifdef CONFIG_FB_ATY_CT
-    if (M64_HAS(INTEGRATED)) {
-	info->bus_type = PCI;
-	info->ram_type = (aty_ld_le32(CONFIG_STAT0, info) & 0x07);
-	ramname = aty_ct_ram[info->ram_type];
-	info->dac_ops = &aty_dac_ct;
-	info->pll_ops = &aty_pll_ct;
-	/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
-	if (mclk == 67 && info->ram_type < SDRAM)
-	    mclk = 63;
-    }
-#endif /* CONFIG_FB_ATY_CT */
-
-    info->ref_clk_per = 1000000000000ULL/14318180;
-    xtal = "14.31818";
-    if (M64_HAS(GTB_DSP) && (pll_ref_div = aty_ld_pll(PLL_REF_DIV, info))) {
-	int diff1, diff2;
-	diff1 = 510*14/pll_ref_div-pll;
-	diff2 = 510*29/pll_ref_div-pll;
-	if (diff1 < 0)
-	    diff1 = -diff1;
-	if (diff2 < 0)
-	    diff2 = -diff2;
-	if (diff2 < diff1) {
-	    info->ref_clk_per = 1000000000000ULL/29498928;
-	    xtal = "29.498928";
+	if (M64_HAS(INTEGRATED)) {
+		par->bus_type = PCI;
+		par->ram_type = (aty_ld_le32(CONFIG_STAT0, par) & 0x07);
+		ramname = aty_ct_ram[par->ram_type];
+		par->dac_ops = &aty_dac_ct;
+		par->pll_ops = &aty_pll_ct;
+		/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
+		if (mclk == 67 && par->ram_type < SDRAM)
+			mclk = 63;
+	}
+#endif				/* CONFIG_FB_ATY_CT */
+
+	par->ref_clk_per = 1000000000000ULL / 14318180;
+	xtal = "14.31818";
+	if (M64_HAS(GTB_DSP)
+	    && (pll_ref_div = aty_ld_pll(PLL_REF_DIV, par))) {
+		int diff1, diff2;
+		diff1 = 510 * 14 / pll_ref_div - pll;
+		diff2 = 510 * 29 / pll_ref_div - pll;
+		if (diff1 < 0)
+			diff1 = -diff1;
+		if (diff2 < 0)
+			diff2 = -diff2;
+		if (diff2 < diff1) {
+			par->ref_clk_per = 1000000000000ULL / 29498928;
+			xtal = "29.498928";
+		}
 	}
-    }
 
-    i = aty_ld_le32(MEM_CNTL, info);
-    gtb_memsize = M64_HAS(GTB_DSP);
-    if (gtb_memsize)
-	switch (i & 0xF) {	/* 0xF used instead of MEM_SIZE_ALIAS */
-	    case MEM_SIZE_512K:
-		info->total_vram = 0x80000;
-		break;
-	    case MEM_SIZE_1M:
-		info->total_vram = 0x100000;
-		break;
-	    case MEM_SIZE_2M_GTB:
-		info->total_vram = 0x200000;
-		break;
-	    case MEM_SIZE_4M_GTB:
-		info->total_vram = 0x400000;
-		break;
-	    case MEM_SIZE_6M_GTB:
-		info->total_vram = 0x600000;
-		break;
-	    case MEM_SIZE_8M_GTB:
-		info->total_vram = 0x800000;
-		break;
-	    default:
-		info->total_vram = 0x80000;
+	i = aty_ld_le32(MEM_CNTL, par);
+	gtb_memsize = M64_HAS(GTB_DSP);
+	if (gtb_memsize)
+		switch (i & 0xF) {	/* 0xF used instead of MEM_SIZE_ALIAS */
+		case MEM_SIZE_512K:
+			info->fix.smem_len = 0x80000;
+			break;
+		case MEM_SIZE_1M:
+			info->fix.smem_len = 0x100000;
+			break;
+		case MEM_SIZE_2M_GTB:
+			info->fix.smem_len = 0x200000;
+			break;
+		case MEM_SIZE_4M_GTB:
+			info->fix.smem_len = 0x400000;
+			break;
+		case MEM_SIZE_6M_GTB:
+			info->fix.smem_len = 0x600000;
+			break;
+		case MEM_SIZE_8M_GTB:
+			info->fix.smem_len = 0x800000;
+			break;
+		default:
+			info->fix.smem_len = 0x80000;
+	} else
+		switch (i & MEM_SIZE_ALIAS) {
+		case MEM_SIZE_512K:
+			info->fix.smem_len = 0x80000;
+			break;
+		case MEM_SIZE_1M:
+			info->fix.smem_len = 0x100000;
+			break;
+		case MEM_SIZE_2M:
+			info->fix.smem_len = 0x200000;
+			break;
+		case MEM_SIZE_4M:
+			info->fix.smem_len = 0x400000;
+			break;
+		case MEM_SIZE_6M:
+			info->fix.smem_len = 0x600000;
+			break;
+		case MEM_SIZE_8M:
+			info->fix.smem_len = 0x800000;
+			break;
+		default:
+			info->fix.smem_len = 0x80000;
+		}
+
+	if (M64_HAS(MAGIC_VRAM_SIZE)) {
+		if (aty_ld_le32(CONFIG_STAT1, par) & 0x40000000)
+			info->fix.smem_len += 0x400000;
 	}
-    else
-	switch (i & MEM_SIZE_ALIAS) {
-	    case MEM_SIZE_512K:
-		info->total_vram = 0x80000;
-		break;
-	    case MEM_SIZE_1M:
-		info->total_vram = 0x100000;
-		break;
-	    case MEM_SIZE_2M:
-		info->total_vram = 0x200000;
-		break;
-	    case MEM_SIZE_4M:
-		info->total_vram = 0x400000;
-		break;
-	    case MEM_SIZE_6M:
-		info->total_vram = 0x600000;
-		break;
-	    case MEM_SIZE_8M:
-		info->total_vram = 0x800000;
-		break;
-	    default:
-		info->total_vram = 0x80000;
+
+	if (default_vram) {
+		info->fix.smem_len = default_vram * 1024;
+		i = i & ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS);
+		if (info->fix.smem_len <= 0x80000)
+			i |= MEM_SIZE_512K;
+		else if (info->fix.smem_len <= 0x100000)
+			i |= MEM_SIZE_1M;
+		else if (info->fix.smem_len <= 0x200000)
+			i |= gtb_memsize ? MEM_SIZE_2M_GTB : MEM_SIZE_2M;
+		else if (info->fix.smem_len <= 0x400000)
+			i |= gtb_memsize ? MEM_SIZE_4M_GTB : MEM_SIZE_4M;
+		else if (info->fix.smem_len <= 0x600000)
+			i |= gtb_memsize ? MEM_SIZE_6M_GTB : MEM_SIZE_6M;
+		else
+			i |= gtb_memsize ? MEM_SIZE_8M_GTB : MEM_SIZE_8M;
+		aty_st_le32(MEM_CNTL, i, par);
 	}
 
-    if (M64_HAS(MAGIC_VRAM_SIZE)) {
-	if (aty_ld_le32(CONFIG_STAT1, info) & 0x40000000)
-	  info->total_vram += 0x400000;
-    }
+	/*
+	 *  Reg Block 0 (CT-compatible block) is at mmio_start 
+	 *  Reg Block 1 (multimedia extensions) is at mmio_start - 0x400
+	 */
+	if (M64_HAS(GX)) {
+		info->fix.mmio_len = 0x400;
+		info->fix.accel = FB_ACCEL_ATI_MACH64GX;
+	} else if (M64_HAS(CT)) {
+		info->fix.mmio_len = 0x400;
+		info->fix.accel = FB_ACCEL_ATI_MACH64CT;
+	} else if (M64_HAS(VT)) {
+		info->fix.mmio_start = -0x400;
+		info->fix.mmio_len = 0x800;
+		info->fix.accel = FB_ACCEL_ATI_MACH64VT;
+	} else {		/* if (M64_HAS(GT)) */
+
+		info->fix.mmio_start = -0x400;
+		info->fix.mmio_len = 0x800;
+		info->fix.accel = FB_ACCEL_ATI_MACH64GT;
+	}
 
-    if (default_vram) {
-	info->total_vram = default_vram*1024;
-	i = i & ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS);
-	if (info->total_vram <= 0x80000)
-	    i |= MEM_SIZE_512K;
-	else if (info->total_vram <= 0x100000)
-	    i |= MEM_SIZE_1M;
-	else if (info->total_vram <= 0x200000)
-	    i |= gtb_memsize ? MEM_SIZE_2M_GTB : MEM_SIZE_2M;
-	else if (info->total_vram <= 0x400000)
-	    i |= gtb_memsize ? MEM_SIZE_4M_GTB : MEM_SIZE_4M;
-	else if (info->total_vram <= 0x600000)
-	    i |= gtb_memsize ? MEM_SIZE_6M_GTB : MEM_SIZE_6M;
+	if (default_pll)
+		pll = default_pll;
+	if (default_mclk)
+		mclk = default_mclk;
+
+	printk("%d%c %s, %s MHz XTAL, %d MHz PLL, %d Mhz MCLK\n",
+	       info->fix.smem_len ==
+	       0x80000 ? 512 : (info->fix.smem_len >> 20),
+	       info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname,
+	       xtal, pll, mclk);
+
+	if (mclk < 44)
+		par->mem_refresh_rate = 0;	/* 000 = 10 Mhz - 43 Mhz */
+	else if (mclk < 50)
+		par->mem_refresh_rate = 1;	/* 001 = 44 Mhz - 49 Mhz */
+	else if (mclk < 55)
+		par->mem_refresh_rate = 2;	/* 010 = 50 Mhz - 54 Mhz */
+	else if (mclk < 66)
+		par->mem_refresh_rate = 3;	/* 011 = 55 Mhz - 65 Mhz */
+	else if (mclk < 75)
+		par->mem_refresh_rate = 4;	/* 100 = 66 Mhz - 74 Mhz */
+	else if (mclk < 80)
+		par->mem_refresh_rate = 5;	/* 101 = 75 Mhz - 79 Mhz */
+	else if (mclk < 100)
+		par->mem_refresh_rate = 6;	/* 110 = 80 Mhz - 100 Mhz */
 	else
-	    i |= gtb_memsize ? MEM_SIZE_8M_GTB : MEM_SIZE_8M;
-	aty_st_le32(MEM_CNTL, i, info);
-    }
-    if (default_pll)
-	pll = default_pll;
-    if (default_mclk)
-	mclk = default_mclk;
-
-    printk("%d%c %s, %s MHz XTAL, %d MHz PLL, %d Mhz MCLK\n",
-    	   info->total_vram == 0x80000 ? 512 : (info->total_vram >> 20),
-    	   info->total_vram == 0x80000 ? 'K' : 'M', ramname, xtal, pll, mclk);
-
-    if (mclk < 44)
-	info->mem_refresh_rate = 0;	/* 000 = 10 Mhz - 43 Mhz */
-    else if (mclk < 50)
-	info->mem_refresh_rate = 1;	/* 001 = 44 Mhz - 49 Mhz */
-    else if (mclk < 55)
-	info->mem_refresh_rate = 2;	/* 010 = 50 Mhz - 54 Mhz */
-    else if (mclk < 66)
-	info->mem_refresh_rate = 3;	/* 011 = 55 Mhz - 65 Mhz */
-    else if (mclk < 75)
-	info->mem_refresh_rate = 4;	/* 100 = 66 Mhz - 74 Mhz */
-    else if (mclk < 80)
-	info->mem_refresh_rate = 5;	/* 101 = 75 Mhz - 79 Mhz */
-    else if (mclk < 100)
-	info->mem_refresh_rate = 6;	/* 110 = 80 Mhz - 100 Mhz */
-    else
-	info->mem_refresh_rate = 7;	/* 111 = 100 Mhz and above */
-    info->pll_per = 1000000/pll;
-    info->mclk_per = 1000000/mclk;
+		par->mem_refresh_rate = 7;	/* 111 = 100 Mhz and above */
+	par->pll_per = 1000000 / pll;
+	par->mclk_per = 1000000 / mclk;
 
 #ifdef DEBUG
-    if (M64_HAS(INTEGRATED)) {
-	int i;
-	printk("BUS_CNTL DAC_CNTL MEM_CNTL EXT_MEM_CNTL CRTC_GEN_CNTL "
-	       "DSP_CONFIG DSP_ON_OFF\n"
-	       "%08x %08x %08x %08x     %08x      %08x   %08x\n"
-	       "PLL",
-	       aty_ld_le32(BUS_CNTL, info), aty_ld_le32(DAC_CNTL, info),
-	       aty_ld_le32(MEM_CNTL, info), aty_ld_le32(EXT_MEM_CNTL, info),
-	       aty_ld_le32(CRTC_GEN_CNTL, info), aty_ld_le32(DSP_CONFIG, info),
-	       aty_ld_le32(DSP_ON_OFF, info));
-	for (i = 0; i < 16; i++)
-	    printk(" %02x", aty_ld_pll(i, info));
-	printk("\n");
-    }
+	if (M64_HAS(INTEGRATED)) {
+		int i;
+		printk
+		    ("BUS_CNTL DAC_CNTL MEM_CNTL EXT_MEM_CNTL CRTC_GEN_CNTL "
+		     "DSP_CONFIG DSP_ON_OFF\n"
+		     "%08x %08x %08x %08x     %08x      %08x   %08x\n"
+		     "PLL", aty_ld_le32(BUS_CNTL, par),
+		     aty_ld_le32(DAC_CNTL, par), aty_ld_le32(MEM_CNTL,
+							     par),
+		     aty_ld_le32(EXT_MEM_CNTL, par),
+		     aty_ld_le32(CRTC_GEN_CNTL, par),
+		     aty_ld_le32(DSP_CONFIG, par), aty_ld_le32(DSP_ON_OFF,
+							       par));
+		for (i = 0; i < 16; i++)
+			printk(" %02x", aty_ld_pll(i, par));
+		printk("\n");
+	}
 #endif
 
-    /*
-     *  Last page of 8 MB (4 MB on ISA) aperture is MMIO
-     *  FIXME: we should use the auxiliary aperture instead so we can access
-     *  the full 8 MB of video RAM on 8 MB boards
-     */
-    if (info->total_vram == 0x800000 ||
-	(info->bus_type == ISA && info->total_vram == 0x400000))
-	    info->total_vram -= GUI_RESERVE;
-
-    /* Clear the video memory */
-    fb_memset((void *)info->frame_buffer, 0, info->total_vram);
-
-    disp = &info->disp;
-
-    strcpy(info->fb_info.modename, atyfb_name);
-    info->fb_info.node = NODEV;
-    info->fb_info.fbops = &atyfb_ops;
-    info->fb_info.disp = disp;
-    info->fb_info.currcon = -1;  	
-    strcpy(info->fb_info.fontname, fontname);
-    info->fb_info.changevar = NULL;
-    info->fb_info.switch_con = &atyfbcon_switch;
-    info->fb_info.updatevar = &atyfbcon_updatevar;
-    info->fb_info.flags = FBINFO_FLAG_DEFAULT;
+	/*
+	 *  Last page of 8 MB (4 MB on ISA) aperture is MMIO
+	 *  FIXME: we should use the auxiliary aperture instead so we can access
+	 *  the full 8 MB of video RAM on 8 MB boards
+	 */
+	if (info->fix.smem_len == 0x800000 ||
+	    (par->bus_type == ISA 
+	     && info->fix.smem_len == 0x400000))
+		info->fix.smem_len -= GUI_RESERVE;
+
+	/* Clear the video memory */
+	fb_memset((void *) info->screen_base, 0,
+		  info->fix.smem_len);
+
+	disp = info->disp;
+
+	strcpy(info->modename, atyfb_name);
+	info->node = NODEV;
+	info->fbops = &atyfb_ops;
+	info->disp = disp;
+	info->pseudo_palette = pseudo_palette;
+	info->currcon = -1;
+	strcpy(info->fontname, fontname);
+	info->changevar = NULL;
+	info->switch_con = gen_switch;
+	info->updatevar = &atyfbcon_updatevar;
+	info->flags = FBINFO_FLAG_DEFAULT;
 
 #ifdef CONFIG_PMAC_BACKLIGHT
-    if (M64_HAS(G3_PB_1_1) && machine_is_compatible("PowerBook1,1")) {
-	/* these bits let the 101 powerbook wake up from sleep -- paulus */
-	aty_st_lcd(POWER_MANAGEMENT, aty_ld_lcd(POWER_MANAGEMENT, info)
-		| (USE_F32KHZ | TRISTATE_MEM_EN), info);
-    }
-    if (M64_HAS(MOBIL_BUS))
-	register_backlight_controller(&aty_backlight_controller, info, "ati");
-#endif /* CONFIG_PMAC_BACKLIGHT */
+	if (M64_HAS(G3_PB_1_1) && machine_is_compatible("PowerBook1,1")) {
+		/* these bits let the 101 powerbook wake up from sleep -- paulus */
+		aty_st_lcd(POWER_MANAGEMENT,
+			   aty_ld_lcd(POWER_MANAGEMENT, par)
+			   | (USE_F32KHZ | TRISTATE_MEM_EN), par);
+	}
+	if (M64_HAS(MOBIL_BUS))
+		register_backlight_controller(&aty_backlight_controller,
+					      info, "ati");
+#endif				/* CONFIG_PMAC_BACKLIGHT */
 
 #ifdef MODULE
-    var = default_var;
-#else /* !MODULE */
-    memset(&var, 0, sizeof(var));
+	var = default_var;
+#else				/* !MODULE */
+	memset(&var, 0, sizeof(var));
 #ifdef CONFIG_PPC
-    if (_machine == _MACH_Pmac) {
-	    /*
-	     *  FIXME: The NVRAM stuff should be put in a Mac-specific file, as it
-	     *         applies to all Mac video cards
-	     */
-	    if (mode_option) {
-		if (!mac_find_mode(&var, &info->fb_info, mode_option, 8))
-		    var = default_var;
-	    } else {
+	if (_machine == _MACH_Pmac) {
+		/*
+		 *  FIXME: The NVRAM stuff should be put in a Mac-specific file, as it
+		 *         applies to all Mac video cards
+		 */
+		if (mode_option) {
+			if (!mac_find_mode
+			    (&var, info, mode_option, 8))
+				var = default_var;
+		} else {
 #ifdef CONFIG_NVRAM
-		if (default_vmode == VMODE_NVRAM) {
-		    default_vmode = nvram_read_byte(NV_VMODE);
-		    if (default_vmode <= 0 || default_vmode > VMODE_MAX)
-			default_vmode = VMODE_CHOOSE;
-		}
+			if (default_vmode == VMODE_NVRAM) {
+				default_vmode = nvram_read_byte(NV_VMODE);
+				if (default_vmode <= 0
+				    || default_vmode > VMODE_MAX)
+					default_vmode = VMODE_CHOOSE;
+			}
 #endif
-		if (default_vmode == VMODE_CHOOSE) {
-		    if (M64_HAS(G3_PB_1024x768))
-			/* G3 PowerBook with 1024x768 LCD */
-			default_vmode = VMODE_1024_768_60;
-		    else if (machine_is_compatible("iMac"))
-			default_vmode = VMODE_1024_768_75;
-		    else if (machine_is_compatible("PowerBook2,1"))
-			/* iBook with 800x600 LCD */
-			default_vmode = VMODE_800_600_60;
-		    else
-			default_vmode = VMODE_640_480_67;
-		    sense = read_aty_sense(info);
-		    printk(KERN_INFO "atyfb: monitor sense=%x, mode %d\n",
-			   sense, mac_map_monitor_sense(sense));
-		}
-		if (default_vmode <= 0 || default_vmode > VMODE_MAX)
-		    default_vmode = VMODE_640_480_60;
+			if (default_vmode == VMODE_CHOOSE) {
+				if (M64_HAS(G3_PB_1024x768))
+					/* G3 PowerBook with 1024x768 LCD */
+					default_vmode = VMODE_1024_768_60;
+				else if (machine_is_compatible("iMac"))
+					default_vmode = VMODE_1024_768_75;
+				else if (machine_is_compatible
+					 ("PowerBook2,1"))
+					/* iBook with 800x600 LCD */
+					default_vmode = VMODE_800_600_60;
+				else
+					default_vmode = VMODE_640_480_67;
+				sense = read_aty_sense(info);
+				printk(KERN_INFO
+				       "atyfb: monitor sense=%x, mode %d\n",
+				       sense,
+				       mac_map_monitor_sense(sense));
+			}
+			if (default_vmode <= 0
+			    || default_vmode > VMODE_MAX)
+				default_vmode = VMODE_640_480_60;
 #ifdef CONFIG_NVRAM
-		if (default_cmode == CMODE_NVRAM)
-		    default_cmode = nvram_read_byte(NV_CMODE);
+			if (default_cmode == CMODE_NVRAM)
+				default_cmode = nvram_read_byte(NV_CMODE);
 #endif
-		if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
-		    default_cmode = CMODE_8;
-		if (mac_vmode_to_var(default_vmode, default_cmode, &var))
-		    var = default_var;
-	    }
-    }
-    else if (!fb_find_mode(&var, &info->fb_info, mode_option, NULL, 0, NULL, 8))
-	var = default_var;
-#else /* !CONFIG_PPC */
+			if (default_cmode < CMODE_8
+			    || default_cmode > CMODE_32)
+				default_cmode = CMODE_8;
+			if (mac_vmode_to_var
+			    (default_vmode, default_cmode, &var))
+				var = default_var;
+		}
+	} else
+	    if (!fb_find_mode
+		(&var, info, mode_option, NULL, 0, NULL, 8))
+		var = default_var;
+#else				/* !CONFIG_PPC */
 #ifdef __sparc__
-    if (mode_option) {
-    	if (!fb_find_mode(&var, &info->fb_info, mode_option, NULL, 0, NULL, 8))
-	    var = default_var;
-    } else
-	var = default_var;
+	if (mode_option) {
+		if (!fb_find_mode
+		    (&var, info, mode_option, NULL, 0, NULL, 8))
+			var = default_var;
+	} else
+		var = default_var;
 #else
-    if (!fb_find_mode(&var, &info->fb_info, mode_option, NULL, 0, NULL, 8))
-	var = default_var;
-#endif /* !__sparc__ */
-#endif /* !CONFIG_PPC */
-#endif /* !MODULE */
-    if (noaccel)
-        var.accel_flags &= ~FB_ACCELF_TEXT;
-    else
-        var.accel_flags |= FB_ACCELF_TEXT;
-
-    if (var.yres == var.yres_virtual) {
-	u32 vram = (info->total_vram - (PAGE_SIZE << 2));
-	var.yres_virtual = ((vram * 8) / var.bits_per_pixel) / var.xres_virtual;
-	if (var.yres_virtual < var.yres)
-		var.yres_virtual = var.yres;
-    }
-
-    if (atyfb_decode_var(&var, &info->default_par, info)) {
-	printk("atyfb: can't set default video mode\n");
-	return 0;
-    }
+	if (!fb_find_mode
+	    (&var, info, mode_option, NULL, 0, NULL, 8))
+		var = default_var;
+#endif				/* !__sparc__ */
+#endif				/* !CONFIG_PPC */
+#endif				/* !MODULE */
+	if (noaccel)
+		var.accel_flags &= ~FB_ACCELF_TEXT;
+	else
+		var.accel_flags |= FB_ACCELF_TEXT;
+
+	if (var.yres == var.yres_virtual) {
+		u32 vram = (info->fix.smem_len - (PAGE_SIZE << 2));
+		var.yres_virtual =
+		    ((vram * 8) / var.bits_per_pixel) / var.xres_virtual;
+		if (var.yres_virtual < var.yres)
+			var.yres_virtual = var.yres;
+	}
 
+	if (atyfb_decode_var(&var, par, info)) {
+		printk("atyfb: can't set default video mode\n");
+		return 0;
+	}
 #ifdef __sparc__
-    atyfb_save_palette(&info->fb_info, 0);
+	atyfb_save_palette(info, 0);
 #endif
-    for (j = 0; j < 16; j++) {
-	k = color_table[j];
-	info->palette[j].red = default_red[k];
-	info->palette[j].green = default_grn[k];
-	info->palette[j].blue = default_blu[k];
-    }
 
 #ifdef CONFIG_FB_ATY_CT
-    if (curblink && M64_HAS(INTEGRATED)) {
-	info->cursor = aty_init_cursor(info);
-	if (info->cursor) {
-	    info->dispsw.cursor = atyfb_cursor;
-	    info->dispsw.set_font = atyfb_set_font;
+	if (curblink && M64_HAS(INTEGRATED)) {
+		par->cursor = aty_init_cursor(info);
+		if (par->cursor) {
+			/*
+			disp->dispsw.cursor = atyfb_cursor;
+			disp->dispsw.set_font = atyfb_set_font;
+			*/
+		}
 	}
-    }
-#endif /* CONFIG_FB_ATY_CT */
+#endif				/* CONFIG_FB_ATY_CT */
+	info->var = var;
 
-    atyfb_set_var(&var, -1, &info->fb_info);
+	fb_alloc_cmap(&info->cmap, 256, 0);
 
-    if (register_framebuffer(&info->fb_info) < 0)
-	return 0;
+	atyfb_set_var(&var, -1, info);
 
-    info->next = fb_list;
-    fb_list = info;
+	if (register_framebuffer(info) < 0)
+		return 0;
 
-    printk("fb%d: %s frame buffer device on %s\n",
-	   GET_FB_IDX(info->fb_info.node), atyfb_name, name);
-    return 1;
+	fb_list = info;
+
+	printk("fb%d: %s frame buffer device on %s\n",
+	       GET_FB_IDX(info->node), atyfb_name, name);
+	return 1;
 }
 
 int __init atyfb_init(void)
 {
 #if defined(CONFIG_PCI)
-    struct pci_dev *pdev = NULL;
-    struct fb_info_aty *info;
-    unsigned long addr, res_start, res_size;
-    int i;
+	struct pci_dev *pdev = NULL;
+	struct fb_info *info;
+	unsigned long addr, res_start, res_size;
+	int i;
 #ifdef __sparc__
-    extern void (*prom_palette) (int);
-    extern int con_is_present(void);
-    struct pcidev_cookie *pcp;
-    char prop[128];
-    int node, len, j;
-    u32 mem, chip_id;
-
-    /* Do not attach when we have a serial console. */
-    if (!con_is_present())
-	return -ENXIO;
+	extern void (*prom_palette) (int);
+	extern int con_is_present(void);
+	struct pcidev_cookie *pcp;
+	char prop[128];
+	int node, len, j;
+	u32 mem, chip_id;
+
+	/* Do not attach when we have a serial console. */
+	if (!con_is_present())
+		return -ENXIO;
 #else
-    u16 tmp;
+	u16 tmp;
 #endif
+	struct atyfb_par *default_par;
+
+	while ((pdev =
+		pci_find_device(PCI_VENDOR_ID_ATI, PCI_ANY_ID, pdev))) {
+		if ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
+			struct resource *rp;
+
+			for (i =
+			     sizeof(aty_chips) / sizeof(*aty_chips) - 1;
+			     i >= 0; i--)
+				if (pdev->device == aty_chips[i].pci_id)
+					break;
+			if (i < 0)
+				continue;
 
-    while ((pdev = pci_find_device(PCI_VENDOR_ID_ATI, PCI_ANY_ID, pdev))) {
-	if ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
-	    struct resource *rp;
-
-	    for (i = sizeof(aty_chips)/sizeof(*aty_chips)-1; i >= 0; i--)
-		if (pdev->device == aty_chips[i].pci_id)
-		    break;
-	    if (i < 0)
-		continue;
+			info =
+			    kmalloc(sizeof(struct fb_info) +
+				    sizeof(struct display), GFP_ATOMIC);
+			if (!info) {
+				printk
+				    ("atyfb_init: can't alloc fb_info\n");
+				return -ENXIO;
+			}
+			memset(info, 0,
+			       sizeof(struct fb_info) +
+			       sizeof(struct display));
+
+			default_par =
+			    kmalloc(sizeof(struct atyfb_par), GFP_ATOMIC);
+			if (!default_par) {
+				printk
+				    ("atyfb_init: can't alloc atyfb_par\n");
+				kfree(info);
+				return -ENXIO;
+			}
+			memset(default_par, 0, sizeof(struct atyfb_par));
 
-	    info = kmalloc(sizeof(struct fb_info_aty), GFP_ATOMIC);
-	    if (!info) {
-		printk("atyfb_init: can't alloc fb_info_aty\n");
-		return -ENXIO;
-	    }
-	    memset(info, 0, sizeof(struct fb_info_aty));
+			info->disp = (struct display *) (info + 1);
+			info->par = default_par;
 
-	    rp = &pdev->resource[0];
-	    if (rp->flags & IORESOURCE_IO)
-		    rp = &pdev->resource[1];
-	    addr = rp->start;
-	    if (!addr)
-		continue;
+			rp = &pdev->resource[0];
+			if (rp->flags & IORESOURCE_IO)
+				rp = &pdev->resource[1];
+			addr = rp->start;
+			if (!addr)
+				continue;
 
-	    res_start = rp->start;
-	    res_size = rp->end-rp->start+1;
-	    if (!request_mem_region(res_start, res_size, "atyfb"))
-		continue;
+			res_start = rp->start;
+			res_size = rp->end - rp->start + 1;
+			if (!request_mem_region
+			    (res_start, res_size, "atyfb"))
+				continue;
 
 #ifdef __sparc__
-	    /*
-	     * Map memory-mapped registers.
-	     */
-	    info->ati_regbase = addr + 0x7ffc00UL;
-	    info->ati_regbase_phys = addr + 0x7ffc00UL;
-
-	    /*
-	     * Map in big-endian aperture.
-	     */
-	    info->frame_buffer = (unsigned long) addr + 0x800000UL;
-	    info->frame_buffer_phys = addr + 0x800000UL;
-
-	    /*
-	     * Figure mmap addresses from PCI config space.
-	     * Split Framebuffer in big- and little-endian halfs.
-	     */
-	    for (i = 0; i < 6 && pdev->resource[i].start; i++)
-		/* nothing */;
-	    j = i + 4;
-
-	    info->mmap_map = kmalloc(j * sizeof(*info->mmap_map), GFP_ATOMIC);
-	    if (!info->mmap_map) {
-		printk("atyfb_init: can't alloc mmap_map\n");
-		kfree(info);
-		release_mem_region(res_start, res_size);
-		return -ENXIO;
-	    }
-	    memset(info->mmap_map, 0, j * sizeof(*info->mmap_map));
-
-	    for (i = 0, j = 2; i < 6 && pdev->resource[i].start; i++) {
-		struct resource *rp = &pdev->resource[i];
-		int io, breg = PCI_BASE_ADDRESS_0 + (i << 2);
-		unsigned long base;
-		u32 size, pbase;
-
-		base = rp->start;
-
-		io = (rp->flags & IORESOURCE_IO);
-
-		size = rp->end - base + 1;
-
-		pci_read_config_dword(pdev, breg, &pbase);
-
-		if (io)
-			size &= ~1;
-
-		/*
-		 * Map the framebuffer a second time, this time without
-		 * the braindead _PAGE_IE setting. This is used by the
-		 * fixed Xserver, but we need to maintain the old mapping
-		 * to stay compatible with older ones...
-		 */
-		if (base == addr) {
-		    info->mmap_map[j].voff = (pbase + 0x10000000) & PAGE_MASK;
-		    info->mmap_map[j].poff = base & PAGE_MASK;
-		    info->mmap_map[j].size = (size + ~PAGE_MASK) & PAGE_MASK;
-		    info->mmap_map[j].prot_mask = _PAGE_CACHE;
-		    info->mmap_map[j].prot_flag = _PAGE_E;
-		    j++;
-		}
+			/*
+			 * Map memory-mapped registers.
+			 */
+			par->ati_regbase = addr + 0x7ffc00UL;
+			info->fix.mmio_start = addr + 0x7ffc00UL;
 
-		/*
-		 * Here comes the old framebuffer mapping with _PAGE_IE
-		 * set for the big endian half of the framebuffer...
-		 */
-		if (base == addr) {
-		    info->mmap_map[j].voff = (pbase + 0x800000) & PAGE_MASK;
-		    info->mmap_map[j].poff = (base+0x800000) & PAGE_MASK;
-		    info->mmap_map[j].size = 0x800000;
-		    info->mmap_map[j].prot_mask = _PAGE_CACHE;
-		    info->mmap_map[j].prot_flag = _PAGE_E|_PAGE_IE;
-		    size -= 0x800000;
-		    j++;
-		}
+			/*
+			 * Map in big-endian aperture.
+			 */
+			info->screen_base =
+			    (unsigned long) addr + 0x800000UL;
+			info->fix.smem_start = addr + 0x800000UL;
 
-		info->mmap_map[j].voff = pbase & PAGE_MASK;
-		info->mmap_map[j].poff = base & PAGE_MASK;
-		info->mmap_map[j].size = (size + ~PAGE_MASK) & PAGE_MASK;
-		info->mmap_map[j].prot_mask = _PAGE_CACHE;
-		info->mmap_map[j].prot_flag = _PAGE_E;
-		j++;
-	    }
-
-	    if (pdev->device != XL_CHIP_ID) {
-		    /*
-		     * Fix PROMs idea of MEM_CNTL settings...
-		     */
-		    mem = aty_ld_le32(MEM_CNTL, info);
-		    chip_id = aty_ld_le32(CONFIG_CHIP_ID, info);
-		    if (((chip_id & CFG_CHIP_TYPE) == VT_CHIP_ID) &&
-			!((chip_id >> 24) & 1)) {
-			switch (mem & 0x0f) {
-			    case 3:
-				mem = (mem & ~(0x0f)) | 2;
-				break;
-			    case 7:
-				mem = (mem & ~(0x0f)) | 3;
-				break;
-			    case 9:
-				mem = (mem & ~(0x0f)) | 4;
-				break;
-			    case 11:
-				mem = (mem & ~(0x0f)) | 5;
-				break;
-			    default:
-				break;
+			/*
+			 * Figure mmap addresses from PCI config space.
+			 * Split Framebuffer in big- and little-endian halfs.
+			 */
+			for (i = 0; i < 6 && pdev->resource[i].start; i++)
+				/* nothing */ ;
+			j = i + 4;
+
+			default_par->mmap_map =
+			    kmalloc(j * sizeof(*default_par->mmap_map),
+				    GFP_ATOMIC);
+			if (!default_par->mmap_map) {
+				printk
+				    ("atyfb_init: can't alloc mmap_map\n");
+				kfree(info);
+				release_mem_region(res_start, res_size);
+				return -ENXIO;
+			}
+			memset(default_par->mmap_map, 0,
+			       j * sizeof(*default_par->mmap_map));
+
+			for (i = 0, j = 2;
+			     i < 6 && pdev->resource[i].start; i++) {
+				struct resource *rp = &pdev->resource[i];
+				int io, breg =
+				    PCI_BASE_ADDRESS_0 + (i << 2);
+				unsigned long base;
+				u32 size, pbase;
+
+				base = rp->start;
+
+				io = (rp->flags & IORESOURCE_IO);
+
+				size = rp->end - base + 1;
+
+				pci_read_config_dword(pdev, breg, &pbase);
+
+				if (io)
+					size &= ~1;
+
+				/*
+				 * Map the framebuffer a second time, this time without
+				 * the braindead _PAGE_IE setting. This is used by the
+				 * fixed Xserver, but we need to maintain the old mapping
+				 * to stay compatible with older ones...
+				 */
+				if (base == addr) {
+					default_par->mmap_map[j].voff =
+					    (pbase +
+					     0x10000000) & PAGE_MASK;
+					default_par->mmap_map[j].poff =
+					    base & PAGE_MASK;
+					default_par->mmap_map[j].size =
+					    (size +
+					     ~PAGE_MASK) & PAGE_MASK;
+					default_par->mmap_map[j].prot_mask =
+					    _PAGE_CACHE;
+					default_par->mmap_map[j].prot_flag =
+					    _PAGE_E;
+					j++;
+				}
+
+				/*
+				 * Here comes the old framebuffer mapping with _PAGE_IE
+				 * set for the big endian half of the framebuffer...
+				 */
+				if (base == addr) {
+					default_par->mmap_map[j].voff =
+					    (pbase + 0x800000) & PAGE_MASK;
+					default_par->mmap_map[j].poff =
+					    (base + 0x800000) & PAGE_MASK;
+					default_par->mmap_map[j].size = 0x800000;
+					default_par->mmap_map[j].prot_mask =
+					    _PAGE_CACHE;
+					default_par->mmap_map[j].prot_flag =
+					    _PAGE_E | _PAGE_IE;
+					size -= 0x800000;
+					j++;
+				}
+
+				default_par->mmap_map[j].voff = pbase & PAGE_MASK;
+				default_par->mmap_map[j].poff = base & PAGE_MASK;
+				default_par->mmap_map[j].size =
+				    (size + ~PAGE_MASK) & PAGE_MASK;
+				default_par->mmap_map[j].prot_mask = _PAGE_CACHE;
+				default_par->mmap_map[j].prot_flag = _PAGE_E;
+				j++;
 			}
-			if ((aty_ld_le32(CONFIG_STAT0, info) & 7) >= SDRAM)
-				mem &= ~(0x00700000);
-		    }
-		    mem &= ~(0xcf80e000);	/* Turn off all undocumented bits. */
-		    aty_st_le32(MEM_CNTL, mem, info);
-	    }
-
-	    /*
-	     * If this is the console device, we will set default video
-	     * settings to what the PROM left us with.
-	     */
-	    node = prom_getchild(prom_root_node);
-	    node = prom_searchsiblings(node, "aliases");
-	    if (node) {
-		len = prom_getproperty(node, "screen", prop, sizeof(prop));
-		if (len > 0) {
-		    prop[len] = '\0';
-		    node = prom_finddevice(prop);
-		} else {
-		    node = 0;
-		}
-	    }
-
-	    pcp = pdev->sysdata;
-	    if (node == pcp->prom_node) {
-
-		struct fb_var_screeninfo *var = &default_var;
-		unsigned int N, P, Q, M, T, R;
-		u32 v_total, h_total;
-		struct crtc crtc;
-		u8 pll_regs[16];
-		u8 clock_cntl;
-
-		crtc.vxres = prom_getintdefault(node, "width", 1024);
-		crtc.vyres = prom_getintdefault(node, "height", 768);
-		crtc.bpp = prom_getintdefault(node, "depth", 8);
-		crtc.xoffset = crtc.yoffset = 0;
-		crtc.h_tot_disp = aty_ld_le32(CRTC_H_TOTAL_DISP, info);
-		crtc.h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, info);
-		crtc.v_tot_disp = aty_ld_le32(CRTC_V_TOTAL_DISP, info);
-		crtc.v_sync_strt_wid = aty_ld_le32(CRTC_V_SYNC_STRT_WID, info);
-		crtc.gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, info);
-		aty_crtc_to_var(&crtc, var);
-
-		h_total = var->xres + var->right_margin +
-			  var->hsync_len + var->left_margin;
-		v_total = var->yres + var->lower_margin +
-			  var->vsync_len + var->upper_margin;
-
-		/*
-		 * Read the PLL to figure actual Refresh Rate.
-		 */
-    		clock_cntl = aty_ld_8(CLOCK_CNTL, info);
-		/* printk("atyfb: CLOCK_CNTL: %02x\n", clock_cntl); */
-		for (i = 0; i < 16; i++)
-			pll_regs[i] = aty_ld_pll(i, info);
-
-		/*
-		 * PLL Reference Divider M:
-		 */
-		M = pll_regs[2];
-
-		/*
-		 * PLL Feedback Divider N (Dependant on CLOCK_CNTL):
-		 */
-		N = pll_regs[7 + (clock_cntl & 3)];
-
-		/*
-		 * PLL Post Divider P (Dependant on CLOCK_CNTL):
-		 */
-		P = 1 << (pll_regs[6] >> ((clock_cntl & 3) << 1));
-
-		/*
-		 * PLL Divider Q:
-		 */
-		Q = N / P;
-
-		/*
-		 * Target Frequency:
-		 *
-		 *      T * M
-		 * Q = -------
-		 *      2 * R
-		 *
-		 * where R is XTALIN (= 14318 or 29498 kHz).
-		 */
-		if (pdev->device == XL_CHIP_ID)
-			R = 29498;
-		else
-			R = 14318;
 
-		T = 2 * Q * R / M;
+			if (pdev->device != XL_CHIP_ID) {
+				/*
+				 * Fix PROMs idea of MEM_CNTL settings...
+				 */
+				mem = aty_ld_le32(MEM_CNTL, info);
+				chip_id =
+				    aty_ld_le32(CONFIG_CHIP_ID, info);
+				if (((chip_id & CFG_CHIP_TYPE) ==
+				     VT_CHIP_ID)
+				    && !((chip_id >> 24) & 1)) {
+					switch (mem & 0x0f) {
+					case 3:
+						mem = (mem & ~(0x0f)) | 2;
+						break;
+					case 7:
+						mem = (mem & ~(0x0f)) | 3;
+						break;
+					case 9:
+						mem = (mem & ~(0x0f)) | 4;
+						break;
+					case 11:
+						mem = (mem & ~(0x0f)) | 5;
+						break;
+					default:
+						break;
+					}
+					if ((aty_ld_le32
+					     (CONFIG_STAT0,
+					      info) & 7) >= SDRAM)
+						mem &= ~(0x00700000);
+				}
+				mem &= ~(0xcf80e000);	/* Turn off all undocumented bits. */
+				aty_st_le32(MEM_CNTL, mem, info);
+			}
 
-		default_var.pixclock = 1000000000 / T;
-	    }
-#else /* __sparc__ */
+			/*
+			 * If this is the console device, we will set default video
+			 * settings to what the PROM left us with.
+			 */
+			node = prom_getchild(prom_root_node);
+			node = prom_searchsiblings(node, "aliases");
+			if (node) {
+				len =
+				    prom_getproperty(node, "screen", prop,
+						     sizeof(prop));
+				if (len > 0) {
+					prop[len] = '\0';
+					node = prom_finddevice(prop);
+				} else {
+					node = 0;
+				}
+			}
 
-	    info->ati_regbase_phys = 0x7ff000 + addr;
-	    info->ati_regbase = (unsigned long)
-				ioremap(info->ati_regbase_phys, 0x1000);
+			pcp = pdev->sysdata;
+			if (node == pcp->prom_node) {
+
+				struct fb_var_screeninfo *var =
+				    &default_var;
+				unsigned int N, P, Q, M, T, R;
+				u32 v_total, h_total;
+				struct crtc crtc;
+				u8 pll_regs[16];
+				u8 clock_cntl;
+
+				crtc.vxres =
+				    prom_getintdefault(node, "width",
+						       1024);
+				crtc.vyres =
+				    prom_getintdefault(node, "height",
+						       768);
+				crtc.bpp =
+				    prom_getintdefault(node, "depth", 8);
+				crtc.xoffset = crtc.yoffset = 0;
+				crtc.h_tot_disp =
+				    aty_ld_le32(CRTC_H_TOTAL_DISP, info);
+				crtc.h_sync_strt_wid =
+				    aty_ld_le32(CRTC_H_SYNC_STRT_WID,
+						info);
+				crtc.v_tot_disp =
+				    aty_ld_le32(CRTC_V_TOTAL_DISP, info);
+				crtc.v_sync_strt_wid =
+				    aty_ld_le32(CRTC_V_SYNC_STRT_WID,
+						info);
+				crtc.gen_cntl =
+				    aty_ld_le32(CRTC_GEN_CNTL, info);
+				aty_crtc_to_var(&crtc, var);
+
+				h_total = var->xres + var->right_margin +
+				    var->hsync_len + var->left_margin;
+				v_total = var->yres + var->lower_margin +
+				    var->vsync_len + var->upper_margin;
+
+				/*
+				 * Read the PLL to figure actual Refresh Rate.
+				 */
+				clock_cntl = aty_ld_8(CLOCK_CNTL, info);
+				/* printk("atyfb: CLOCK_CNTL: %02x\n", clock_cntl); */
+				for (i = 0; i < 16; i++)
+					pll_regs[i] = aty_ld_pll(i, info);
+
+				/*
+				 * PLL Reference Divider M:
+				 */
+				M = pll_regs[2];
+
+				/*
+				 * PLL Feedback Divider N (Dependant on CLOCK_CNTL):
+				 */
+				N = pll_regs[7 + (clock_cntl & 3)];
+
+				/*
+				 * PLL Post Divider P (Dependant on CLOCK_CNTL):
+				 */
+				P = 1 << (pll_regs[6] >>
+					  ((clock_cntl & 3) << 1));
+
+				/*
+				 * PLL Divider Q:
+				 */
+				Q = N / P;
+
+				/*
+				 * Target Frequency:
+				 *
+				 *      T * M
+				 * Q = -------
+				 *      2 * R
+				 *
+				 * where R is XTALIN (= 14318 or 29498 kHz).
+				 */
+				if (pdev->device == XL_CHIP_ID)
+					R = 29498;
+				else
+					R = 14318;
+
+				T = 2 * Q * R / M;
+
+				default_var.pixclock = 1000000000 / T;
+			}
+#else				/* __sparc__ */
 
-	    if(!info->ati_regbase) {
-		    kfree(info);
-		    release_mem_region(res_start, res_size);
-		    return -ENOMEM;
-	    }
+			info->fix.mmio_start = 0x7ff000 + addr;
+			default_par->ati_regbase = (unsigned long)
+			    ioremap(info->fix.mmio_start, 0x1000);
 
-	    info->ati_regbase_phys += 0xc00;
-	    info->ati_regbase += 0xc00;
+			if (!default_par->ati_regbase) {
+				kfree(default_par);
+				kfree(info);
+				release_mem_region(res_start, res_size);
+				return -ENOMEM;
+			}
 
-	    /*
-	     * Enable memory-space accesses using config-space
-	     * command register.
-	     */
-	    pci_read_config_word(pdev, PCI_COMMAND, &tmp);
-	    if (!(tmp & PCI_COMMAND_MEMORY)) {
-		tmp |= PCI_COMMAND_MEMORY;
-		pci_write_config_word(pdev, PCI_COMMAND, tmp);
-	    }
+			info->fix.mmio_start += 0xc00;
+			default_par->ati_regbase += 0xc00;
 
+			/*
+			 * Enable memory-space accesses using config-space
+			 * command register.
+			 */
+			pci_read_config_word(pdev, PCI_COMMAND, &tmp);
+			if (!(tmp & PCI_COMMAND_MEMORY)) {
+				tmp |= PCI_COMMAND_MEMORY;
+				pci_write_config_word(pdev, PCI_COMMAND,
+						      tmp);
+			}
 #ifdef __BIG_ENDIAN
-	    /* Use the big-endian aperture */
-	    addr += 0x800000;
+			/* Use the big-endian aperture */
+			addr += 0x800000;
 #endif
 
-	    /* Map in frame buffer */
-	    info->frame_buffer_phys = addr;
-	    info->frame_buffer = (unsigned long)ioremap(addr, 0x800000);
-
-	    if(!info->frame_buffer) {
-		    kfree(info);
-		    release_mem_region(res_start, res_size);
-		    return -ENXIO;
-	    }
-
-#endif /* __sparc__ */
+			/* Map in frame buffer */
+			info->fix.smem_start = addr;
+			info->screen_base =
+			    (char *) ioremap(addr, 0x800000);
 
-	    if (!aty_init(info, "PCI")) {
-		if (info->mmap_map)
-		    kfree(info->mmap_map);
-		kfree(info);
-		release_mem_region(res_start, res_size);
-		return -ENXIO;
-	    }
+			if (!info->screen_base) {
+				kfree(info);
+				release_mem_region(res_start, res_size);
+				return -ENXIO;
+			}
+#endif				/* __sparc__ */
 
+			if (!aty_init(info, "PCI")) {
+#ifdef __sparc__	
+				if (default_par->mmap_map)
+					kfree(default_par->mmap_map);
+#endif
+				kfree(info);
+				release_mem_region(res_start, res_size);
+				return -ENXIO;
+			}
 #ifdef __sparc__
-	    if (!prom_palette)
-		prom_palette = atyfb_palette;
-
-	    /*
-	     * Add /dev/fb mmap values.
-	     */
-	    info->mmap_map[0].voff = 0x8000000000000000UL;
-	    info->mmap_map[0].poff = info->frame_buffer & PAGE_MASK;
-	    info->mmap_map[0].size = info->total_vram;
-	    info->mmap_map[0].prot_mask = _PAGE_CACHE;
-	    info->mmap_map[0].prot_flag = _PAGE_E;
-	    info->mmap_map[1].voff = info->mmap_map[0].voff + info->total_vram;
-	    info->mmap_map[1].poff = info->ati_regbase & PAGE_MASK;
-	    info->mmap_map[1].size = PAGE_SIZE;
-	    info->mmap_map[1].prot_mask = _PAGE_CACHE;
-	    info->mmap_map[1].prot_flag = _PAGE_E;
-#endif /* __sparc__ */
+			if (!prom_palette)
+				prom_palette = atyfb_palette;
+
+			/*
+			 * Add /dev/fb mmap values.
+			 */
+			par->mmap_map[0].voff = 0x8000000000000000UL;
+			par->mmap_map[0].poff =
+			    info->screen_base & PAGE_MASK;
+			par->mmap_map[0].size =
+			    info->fix.smem_len;
+			par->mmap_map[0].prot_mask = _PAGE_CACHE;
+			par->mmap_map[0].prot_flag = _PAGE_E;
+			par->mmap_map[1].voff =
+			    par->mmap_map[0].voff +
+			    info->fix.smem_len;
+			par->mmap_map[1].poff =
+			    par->ati_regbase & PAGE_MASK;
+			par->mmap_map[1].size = PAGE_SIZE;
+			par->mmap_map[1].prot_mask = _PAGE_CACHE;
+			par->mmap_map[1].prot_flag = _PAGE_E;
+#endif				/* __sparc__ */
 
 #ifdef CONFIG_PMAC_PBOOK
-	    if (first_display == NULL)
-		    pmu_register_sleep_notifier(&aty_sleep_notifier);
-	    info->next = first_display;
-	    first_display = info;
+			if (first_display == NULL)
+				pmu_register_sleep_notifier
+				    (&aty_sleep_notifier);
+			/* FIXME info->next = first_display; */
+			first_display = info;
 #endif
-
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	    if (!console_fb_info)
-		console_fb_info = &info->fb_info;
-#endif /* CONFIG_FB_COMPAT_XPMAC */
+		}
 	}
-    }
 
 #elif defined(CONFIG_ATARI)
-    u32 clock_r;
-    int m64_num;
-    struct fb_info_aty *info;
-
-    for (m64_num = 0; m64_num < mach64_count; m64_num++) {
-	if (!phys_vmembase[m64_num] || !phys_size[m64_num] ||
-	    !phys_guiregbase[m64_num]) {
-	    printk(" phys_*[%d] parameters not set => returning early. \n",
-		   m64_num);
-	    continue;
-	}
-
-	info = kmalloc(sizeof(struct fb_info_aty), GFP_ATOMIC);
-	if (!info) {
-	    printk("atyfb_init: can't alloc fb_info_aty\n");
-	    return -ENOMEM;
-	}
-	memset(info, 0, sizeof(struct fb_info_aty));
-
-	/*
-	 *  Map the video memory (physical address given) to somewhere in the
-	 *  kernel address space.
-	 */
-	info->frame_buffer = ioremap(phys_vmembase[m64_num], phys_size[m64_num]);
-	info->frame_buffer_phys = info->frame_buffer;  /* Fake! */
-	info->ati_regbase = ioremap(phys_guiregbase[m64_num], 0x10000)+0xFC00ul;
-	info->ati_regbase_phys = info->ati_regbase;  /* Fake! */
+	u32 clock_r;
+	int m64_num;
+	struct fb_info *info;
+
+	for (m64_num = 0; m64_num < mach64_count; m64_num++) {
+		if (!phys_vmembase[m64_num] || !phys_size[m64_num] ||
+		    !phys_guiregbase[m64_num]) {
+			printk
+			    (" phys_*[%d] parameters not set => returning early. \n",
+			     m64_num);
+			continue;
+		}
 
-	aty_st_le32(CLOCK_CNTL, 0x12345678, info);
-	clock_r = aty_ld_le32(CLOCK_CNTL, info);
+		info = kmalloc(sizeof(struct fb_info), GFP_ATOMIC);
+		if (!info) {
+			printk("atyfb_init: can't alloc fb_info\n");
+			return -ENOMEM;
+		}
+		memset(info, 0, sizeof(struct fb_info));
 
-	switch (clock_r & 0x003F) {
-	    case 0x12:
-		info->clk_wr_offset = 3;  /*  */
-		break;
-	    case 0x34:
-		info->clk_wr_offset = 2;  /* Medusa ST-IO ISA Adapter etc. */
-		break;
-	    case 0x16:
-		info->clk_wr_offset = 1;  /*  */
-		break;
-	    case 0x38:
-		info->clk_wr_offset = 0;  /* Panther 1 ISA Adapter (Gerald) */
-		break;
-	}
+		/*
+		 *  Map the video memory (physical address given) to somewhere in the
+		 *  kernel address space.
+		 */
+		info->screen_base =
+		    ioremap(phys_vmembase[m64_num], phys_size[m64_num]);
+		info->fix.smem_start = info->screen_base;	/* Fake! */
+		par->ati_regbase =
+		    ioremap(phys_guiregbase[m64_num], 0x10000) + 0xFC00ul;
+		info->fix.mmio_start = par->ati_regbase; /* Fake! */
+
+		aty_st_le32(CLOCK_CNTL, 0x12345678, info);
+		clock_r = aty_ld_le32(CLOCK_CNTL, info);
+
+		switch (clock_r & 0x003F) {
+		case 0x12:
+			par->clk_wr_offset = 3;	/*  */
+			break;
+		case 0x34:
+			par->clk_wr_offset = 2;	/* Medusa ST-IO ISA Adapter etc. */
+			break;
+		case 0x16:
+			par->clk_wr_offset = 1;	/*  */
+			break;
+		case 0x38:
+			par->clk_wr_offset = 0;	/* Panther 1 ISA Adapter (Gerald) */
+			break;
+		}
 
-	if (!aty_init(info, "ISA bus")) {
-	    kfree(info);
-	    /* This is insufficient! kernel_map has added two large chunks!! */
-	    return -ENXIO;
+		if (!aty_init(info, "ISA bus")) {
+			kfree(info);
+			/* This is insufficient! kernel_map has added two large chunks!! */
+			return -ENXIO;
+		}
 	}
-    }
-#endif /* CONFIG_ATARI */
-    return 0;
+#endif				/* CONFIG_ATARI */
+	return 0;
 }
 
 #ifndef MODULE
 int __init atyfb_setup(char *options)
 {
-    char *this_opt;
-
-    if (!options || !*options)
-	return 0;
-
-    while ((this_opt = strsep(&options, ",")) != NULL) {
-	if (!strncmp(this_opt, "font:", 5)) {
-		char *p;
-		int i;
-
-		p = this_opt + 5;
-		for (i = 0; i < sizeof(fontname) - 1; i++)
-			if (!*p || *p == ' ' || *p == ',')
-				break;
-		memcpy(fontname, this_opt + 5, i);
-		fontname[i] = 0;
-	} else if (!strncmp(this_opt, "noblink", 7)) {
-		curblink = 0;
-	} else if (!strncmp(this_opt, "noaccel", 7)) {
-		noaccel = 1;
-	} else if (!strncmp(this_opt, "vram:", 5))
-		default_vram = simple_strtoul(this_opt+5, NULL, 0);
-	else if (!strncmp(this_opt, "pll:", 4))
-		default_pll = simple_strtoul(this_opt+4, NULL, 0);
-	else if (!strncmp(this_opt, "mclk:", 5))
-		default_mclk = simple_strtoul(this_opt+5, NULL, 0);
+	char *this_opt;
+
+	if (!options || !*options)
+		return 0;
+
+	while ((this_opt = strsep(&options, ",")) != NULL) {
+		if (!strncmp(this_opt, "font:", 5)) {
+			char *p;
+			int i;
+
+			p = this_opt + 5;
+			for (i = 0; i < sizeof(fontname) - 1; i++)
+				if (!*p || *p == ' ' || *p == ',')
+					break;
+			memcpy(fontname, this_opt + 5, i);
+			fontname[i] = 0;
+		} else if (!strncmp(this_opt, "noblink", 7)) {
+			curblink = 0;
+		} else if (!strncmp(this_opt, "noaccel", 7)) {
+			noaccel = 1;
+		} else if (!strncmp(this_opt, "vram:", 5))
+			default_vram =
+			    simple_strtoul(this_opt + 5, NULL, 0);
+		else if (!strncmp(this_opt, "pll:", 4))
+			default_pll =
+			    simple_strtoul(this_opt + 4, NULL, 0);
+		else if (!strncmp(this_opt, "mclk:", 5))
+			default_mclk =
+			    simple_strtoul(this_opt + 5, NULL, 0);
 #ifdef CONFIG_PPC
-	else if (!strncmp(this_opt, "vmode:", 6)) {
-	    unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
-	    if (vmode > 0 && vmode <= VMODE_MAX)
-		default_vmode = vmode;
-	} else if (!strncmp(this_opt, "cmode:", 6)) {
-	    unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
-	    switch (cmode) {
-		case 0:
-		case 8:
-		    default_cmode = CMODE_8;
-		    break;
-		case 15:
-		case 16:
-		    default_cmode = CMODE_16;
-		    break;
-		case 24:
-		case 32:
-		    default_cmode = CMODE_32;
-		    break;
-	    }
-	}
+		else if (!strncmp(this_opt, "vmode:", 6)) {
+			unsigned int vmode =
+			    simple_strtoul(this_opt + 6, NULL, 0);
+			if (vmode > 0 && vmode <= VMODE_MAX)
+				default_vmode = vmode;
+		} else if (!strncmp(this_opt, "cmode:", 6)) {
+			unsigned int cmode =
+			    simple_strtoul(this_opt + 6, NULL, 0);
+			switch (cmode) {
+			case 0:
+			case 8:
+				default_cmode = CMODE_8;
+				break;
+			case 15:
+			case 16:
+				default_cmode = CMODE_16;
+				break;
+			case 24:
+			case 32:
+				default_cmode = CMODE_32;
+				break;
+			}
+		}
 #endif
 #ifdef CONFIG_ATARI
-	/*
-	 * Why do we need this silly Mach64 argument?
-	 * We are already here because of mach64= so its redundant.
-	 */
-	else if (MACH_IS_ATARI && (!strncmp(this_opt, "Mach64:", 7))) {
-	    static unsigned char m64_num;
-	    static char mach64_str[80];
-	    strncpy(mach64_str, this_opt+7, 80);
-	    if (!store_video_par(mach64_str, m64_num)) {
-		m64_num++;
-		mach64_count = m64_num;
-	    }
-	}
+		/*
+		 * Why do we need this silly Mach64 argument?
+		 * We are already here because of mach64= so its redundant.
+		 */
+		else if (MACH_IS_ATARI
+			 && (!strncmp(this_opt, "Mach64:", 7))) {
+			static unsigned char m64_num;
+			static char mach64_str[80];
+			strncpy(mach64_str, this_opt + 7, 80);
+			if (!store_video_par(mach64_str, m64_num)) {
+				m64_num++;
+				mach64_count = m64_num;
+			}
+		}
 #endif
-	else
-	    mode_option = this_opt;
-    }
-    return 0;
+		else
+			mode_option = this_opt;
+	}
+	return 0;
 }
-#endif /* !MODULE */
+#endif				/* !MODULE */
 
 #ifdef CONFIG_ATARI
 static int __init store_video_par(char *video_str, unsigned char m64_num)
 {
-    char *p;
-    unsigned long vmembase, size, guiregbase;
-
-    printk("store_video_par() '%s' \n", video_str);
-
-    if (!(p = strsep(&video_str, ";")) || !*p)
-	goto mach64_invalid;
-    vmembase = simple_strtoul(p, NULL, 0);
-    if (!(p = strsep(&video_str, ";")) || !*p)
-	goto mach64_invalid;
-    size = simple_strtoul(p, NULL, 0);
-    if (!(p = strsep(&video_str, ";")) || !*p)
-	goto mach64_invalid;
-    guiregbase = simple_strtoul(p, NULL, 0);
-
-    phys_vmembase[m64_num] = vmembase;
-    phys_size[m64_num] = size;
-    phys_guiregbase[m64_num] = guiregbase;
-    printk(" stored them all: $%08lX $%08lX $%08lX \n", vmembase, size,
-	   guiregbase);
-    return 0;
-
-mach64_invalid:
-    phys_vmembase[m64_num]   = 0;
-    return -1;
-}
-#endif /* CONFIG_ATARI */
-
-static int atyfbcon_switch(int con, struct fb_info *fb)
-{
-    struct fb_info_aty *info = (struct fb_info_aty *)fb;
-    struct atyfb_par par;
+	char *p;
+	unsigned long vmembase, size, guiregbase;
+
+	printk("store_video_par() '%s' \n", video_str);
+
+	if (!(p = strsep(&video_str, ";")) || !*p)
+		goto mach64_invalid;
+	vmembase = simple_strtoul(p, NULL, 0);
+	if (!(p = strsep(&video_str, ";")) || !*p)
+		goto mach64_invalid;
+	size = simple_strtoul(p, NULL, 0);
+	if (!(p = strsep(&video_str, ";")) || !*p)
+		goto mach64_invalid;
+	guiregbase = simple_strtoul(p, NULL, 0);
+
+	phys_vmembase[m64_num] = vmembase;
+	phys_size[m64_num] = size;
+	phys_guiregbase[m64_num] = guiregbase;
+	printk(" stored them all: $%08lX $%08lX $%08lX \n", vmembase, size,
+	       guiregbase);
+	return 0;
 
-    /* Do we have to save the colormap? */
-    if (fb_display[fb->currcon].cmap.len)
-	fb_get_cmap(&fb_display[fb->currcon].cmap, 1, atyfb_getcolreg, fb);
+      mach64_invalid:
+	phys_vmembase[m64_num] = 0;
+	return -1;
+}
+#endif				/* CONFIG_ATARI */
 
+/*
 #ifdef CONFIG_FB_ATY_CT
-    /* Erase HW Cursor */
-    if (info->cursor && (fb->currcon >= 0))
-	atyfb_cursor(&fb_display[fb->currcon], CM_ERASE,
-		     info->cursor->pos.x, info->cursor->pos.y);
-#endif /* CONFIG_FB_ATY_CT */
-
-    fb->currcon = con;
-
-    atyfb_decode_var(&fb_display[con].var, &par, info);
-    atyfb_set_par(&par, info);
-    atyfb_set_dispsw(&fb_display[con], info, par.crtc.bpp,
-		     par.accel_flags & FB_ACCELF_TEXT);
-
-    /* Install new colormap */
-    do_install_cmap(con, fb);
+   * Erase HW Cursor *
+    if (par->cursor && (info->currcon >= 0))
+	atyfb_cursor(&fb_display[par->currcon], CM_ERASE,
+		     par->cursor->pos.x, par->cursor->pos.y);
+#endif * CONFIG_FB_ATY_CT *
 
 #ifdef CONFIG_FB_ATY_CT
-    /* Install hw cursor */
-    if (info->cursor) {
+    * Install hw cursor *
+    if (par->cursor) {
 	aty_set_cursor_color(info);
 	aty_set_cursor_shape(info);
     }
-#endif /* CONFIG_FB_ATY_CT */
-    return 1;
-}
+#endif * CONFIG_FB_ATY_CT */
 
     /*
      *  Blank the display.
      */
 
-static int atyfb_blank(int blank, struct fb_info *fb)
+static int atyfb_blank(int blank, struct fb_info *info)
 {
-    struct fb_info_aty *info = (struct fb_info_aty *)fb;
-    u8 gen_cntl;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u8 gen_cntl;
 
 #ifdef CONFIG_PMAC_BACKLIGHT
-    if ((_machine == _MACH_Pmac) && blank)
-    	set_backlight_enable(0);
-#endif /* CONFIG_PMAC_BACKLIGHT */
-
-    gen_cntl = aty_ld_8(CRTC_GEN_CNTL, info);
-    if (blank > 0)
-	switch (blank-1) {
-	    case VESA_NO_BLANKING:
-		gen_cntl |= 0x40;
-		break;
-	    case VESA_VSYNC_SUSPEND:
-		gen_cntl |= 0x8;
-		break;
-	    case VESA_HSYNC_SUSPEND:
-		gen_cntl |= 0x4;
-		break;
-	    case VESA_POWERDOWN:
-		gen_cntl |= 0x4c;
-		break;
-	}
-    else
-	gen_cntl &= ~(0x4c);
-    aty_st_8(CRTC_GEN_CNTL, gen_cntl, info);
+	if ((_machine == _MACH_Pmac) && blank)
+		set_backlight_enable(0);
+#endif				/* CONFIG_PMAC_BACKLIGHT */
+
+	gen_cntl = aty_ld_8(CRTC_GEN_CNTL, par);
+	if (blank > 0)
+		switch (blank - 1) {
+		case VESA_NO_BLANKING:
+			gen_cntl |= 0x40;
+			break;
+		case VESA_VSYNC_SUSPEND:
+			gen_cntl |= 0x8;
+			break;
+		case VESA_HSYNC_SUSPEND:
+			gen_cntl |= 0x4;
+			break;
+		case VESA_POWERDOWN:
+			gen_cntl |= 0x4c;
+			break;
+	} else
+		gen_cntl &= ~(0x4c);
+	aty_st_8(CRTC_GEN_CNTL, gen_cntl, par);
 
 #ifdef CONFIG_PMAC_BACKLIGHT
-    if ((_machine == _MACH_Pmac) && !blank)
-    	set_backlight_enable(1);
-#endif /* CONFIG_PMAC_BACKLIGHT */
-    return 0;	
-}
-
-
-    /*
-     *  Read a single color register and split it into
-     *  colors/transparent. Return != 0 for invalid regno.
-     */
-
-static int atyfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
-			   u_int *transp, struct fb_info *fb)
-{
-    struct fb_info_aty *info = (struct fb_info_aty *)fb;
-
-    if (regno > 255)
-	return 1;
-    *red = (info->palette[regno].red<<8) | info->palette[regno].red;
-    *green = (info->palette[regno].green<<8) | info->palette[regno].green;
-    *blue = (info->palette[regno].blue<<8) | info->palette[regno].blue;
-    *transp = 0;
-    return 0;
+	if ((_machine == _MACH_Pmac) && !blank)
+		set_backlight_enable(1);
+#endif				/* CONFIG_PMAC_BACKLIGHT */
+	return 0;
 }
 
-
     /*
      *  Set a single color register. The values supplied are already
      *  rounded down to the hardware's capabilities (according to the
@@ -2729,98 +2809,87 @@ static int atyfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
      */
 
 static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-			   u_int transp, struct fb_info *fb)
+			   u_int transp, struct fb_info *info)
 {
-    struct fb_info_aty *info = (struct fb_info_aty *)fb;
-    int i, scale;
-
-    if (regno > 255)
-	return 1;
-    red >>= 8;
-    green >>= 8;
-    blue >>= 8;
-    info->palette[regno].red = red;
-    info->palette[regno].green = green;
-    info->palette[regno].blue = blue;
-    i = aty_ld_8(DAC_CNTL, info) & 0xfc;
-    if (M64_HAS(EXTRA_BRIGHT))
-	i |= 0x2;	/*DAC_CNTL|0x2 turns off the extra brightness for gt*/
-    aty_st_8(DAC_CNTL, i, info);
-    aty_st_8(DAC_MASK, 0xff, info);
-    scale = (M64_HAS(INTEGRATED) && info->current_par.crtc.bpp == 16) ? 3 : 0;
-    writeb(regno << scale, &info->aty_cmap_regs->windex);
-    writeb(red, &info->aty_cmap_regs->lut);
-    writeb(green, &info->aty_cmap_regs->lut);
-    writeb(blue, &info->aty_cmap_regs->lut);
-    if (regno < 16)
-	switch (info->current_par.crtc.bpp) {
-#ifdef FBCON_HAS_CFB16
-	    case 16:
-		info->fbcon_cmap.cfb16[regno] = (regno << 10) | (regno << 5) |
-						regno;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB24
-	    case 24:
-		info->fbcon_cmap.cfb24[regno] = (regno << 16) | (regno << 8) |
-						regno;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB32
-	    case 32:
-		i = (regno << 8) | regno;
-		info->fbcon_cmap.cfb32[regno] = (i << 16) | i;
-		break;
-#endif
-	    }
-    return 0;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	int i, scale;
+
+	if (regno > 255)
+		return 1;
+	red >>= 8;
+	green >>= 8;
+	blue >>= 8;
+	i = aty_ld_8(DAC_CNTL, par) & 0xfc;
+	if (M64_HAS(EXTRA_BRIGHT))
+		i |= 0x2;	/*DAC_CNTL|0x2 turns off the extra brightness for gt */
+	aty_st_8(DAC_CNTL, i, par);
+	aty_st_8(DAC_MASK, 0xff, par);
+	scale = (M64_HAS(INTEGRATED) && par->crtc.bpp == 16) ? 3 : 0;
+	writeb(regno << scale, &par->aty_cmap_regs->windex);
+	writeb(red, &par->aty_cmap_regs->lut);
+	writeb(green, &par->aty_cmap_regs->lut);
+	writeb(blue, &par->aty_cmap_regs->lut);
+	if (regno < 16)
+		switch (par->crtc.bpp) {
+		case 16:
+			((u16 *) (info->pseudo_palette))[regno] =
+			    (regno << 10) | (regno << 5) | regno;
+			break;
+		case 24:
+			((u32 *) (info->pseudo_palette))[regno] =
+			    (regno << 16) | (regno << 8) | regno;
+			break;
+		case 32:
+			i = (regno << 8) | regno;
+			((u32 *) (info->pseudo_palette))[regno] =
+			    (i << 16) | i;
+			break;
+		}
+	return 0;
 }
 
     /*
      *  Update the `var' structure (called by fbcon.c)
      */
 
-static int atyfbcon_updatevar(int con, struct fb_info *fb)
+static int atyfbcon_updatevar(int con, struct fb_info *info)
 {
-    struct fb_info_aty *info = (struct fb_info_aty *)fb;
-    struct atyfb_par *par = &info->current_par;
-    struct display *p = &fb_display[con];
-    struct vc_data *conp = p->conp;
-    u32 yres, yoffset, sy, height;
-
-    yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1;
-    yoffset = fb_display[con].var.yoffset;
-
-    sy = (conp->vc_rows + p->yscroll) * fontheight(p);
-    height = yres - conp->vc_rows * fontheight(p);
-
-    if (height && (yoffset + yres > sy)) {
-	u32 xres, xoffset;
-	u32 bgx;
-
-	xres = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8;
-	xoffset = fb_display[con].var.xoffset;
-
-
-	bgx = attr_bgcol_ec(p, conp);
-	bgx |= (bgx << 8);
-	bgx |= (bgx << 16);
-
-	if (sy + height > par->crtc.vyres) {
-	    wait_for_fifo(1, info);
-	    aty_st_le32(SC_BOTTOM, sy + height - 1, info);
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	struct display *p = &fb_display[con];
+	struct vc_data *conp = p->conp;
+	u32 yres, yoffset, sy, height;
+
+	yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1;
+	yoffset = fb_display[con].var.yoffset;
+
+	sy = (conp->vc_rows + p->yscroll) * fontheight(p);
+	height = yres - conp->vc_rows * fontheight(p);
+
+	if (height && (yoffset + yres > sy)) {
+		struct fb_fillrect area;
+
+		area.dx = fb_display[con].var.xoffset;
+		area.dy = sy;
+		area.height = height;
+		area.width = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8;
+		area.color = attr_bgcol_ec(p, conp);
+		area.rop = ROP_COPY;
+
+		if (sy + height > par->crtc.vyres) {
+			wait_for_fifo(1, par);
+			aty_st_le32(SC_BOTTOM, sy + height - 1, par);
+		}
+		atyfb_fillrect(info, &area);
 	}
-	aty_rectfill(xoffset, sy, xres, height, bgx, info);
-    }
-
 #ifdef CONFIG_FB_ATY_CT
-    if (info->cursor && (yoffset + yres <= sy))
-	atyfb_cursor(p, CM_ERASE, info->cursor->pos.x, info->cursor->pos.y);
-#endif /* CONFIG_FB_ATY_CT */
+	if (par->cursor && (yoffset + yres <= sy))
+		atyfb_cursor(p, CM_ERASE, par->cursor->pos.x,
+			     par->cursor->pos.y);
+#endif				/* CONFIG_FB_ATY_CT */
 
-    info->current_par.crtc.yoffset = yoffset;
-    set_off_pitch(&info->current_par, info);
-    return 0;
+	par->crtc.yoffset = yoffset;
+	set_off_pitch(par, info);
+	return 0;
 }
 
 
@@ -2828,40 +2897,37 @@ static int atyfbcon_updatevar(int con, struct fb_info *fb)
 #ifdef MODULE
 int __init init_module(void)
 {
-    atyfb_init();
-    return fb_list ? 0 : -ENXIO;
+	atyfb_init();
+	return fb_list ? 0 : -ENXIO;
 }
 
 void cleanup_module(void)
 {
-    while (fb_list) {
-	struct fb_info_aty *info = fb_list;
-	fb_list = info->next;
-
-	unregister_framebuffer(&info->fb_info);
+	struct fb_info *info = fb_list;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;		
+	unregister_framebuffer(info);
 
 #ifndef __sparc__
-	if (info->ati_regbase)
-	    iounmap((void *)info->ati_regbase);
-	if (info->frame_buffer)
-	    iounmap((void *)info->frame_buffer);
+	if (par->ati_regbase)
+		iounmap((void *) par->ati_regbase);
+	if (info->screen_base)
+		iounmap((void *) info->screen_base);
 #ifdef __BIG_ENDIAN
 	if (info->cursor && info->cursor->ram)
-	    iounmap(info->cursor->ram);
+		iounmap(info->cursor->ram);
 #endif
 #endif
 
 	if (info->cursor) {
-	    if (info->cursor->timer)
-		kfree(info->cursor->timer);
-	    kfree(info->cursor);
+		if (info->cursor->timer)
+			kfree(info->cursor->timer);
+		kfree(info->cursor);
 	}
 #ifdef __sparc__
-	if (info->mmap_map)
-	    kfree(info->mmap_map);
+	if (par->mmap_map)
+		kfree(par->mmap_map);
 #endif
 	kfree(info);
-    }
 }
 
 #endif
diff --git a/drivers/video/aty/mach64.h b/drivers/video/aty/mach64.h
deleted file mode 100644
index 8ca47b74ac7e..000000000000
--- a/drivers/video/aty/mach64.h
+++ /dev/null
@@ -1,1158 +0,0 @@
-/*
- * ATI Mach64 Register Definitions
- *
- * Copyright (C) 1997 Michael AK Tesch
- *  written with much help from Jon Howell
- *
- * Updated for 3D RAGE PRO and 3D RAGE Mobility by Geert Uytterhoeven
- *	
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-/*
- * most of the rest of this file comes from ATI sample code
- */
-#ifndef REGMACH64_H
-#define REGMACH64_H
-
-/* NON-GUI MEMORY MAPPED Registers - expressed in BYTE offsets */
-
-/* Accelerator CRTC */
-#define CRTC_H_TOTAL_DISP	0x0000	/* Dword offset 0_00 */
-#define CRTC2_H_TOTAL_DISP	0x0000	/* Dword offset 0_00 */
-#define CRTC_H_SYNC_STRT_WID	0x0004	/* Dword offset 0_01 */
-#define CRTC2_H_SYNC_STRT_WID	0x0004	/* Dword offset 0_01 */
-#define CRTC_H_SYNC_STRT	0x0004
-#define CRTC2_H_SYNC_STRT	0x0004
-#define CRTC_H_SYNC_DLY		0x0005
-#define CRTC2_H_SYNC_DLY	0x0005
-#define CRTC_H_SYNC_WID		0x0006
-#define CRTC2_H_SYNC_WID	0x0006
-#define CRTC_V_TOTAL_DISP	0x0008	/* Dword offset 0_02 */
-#define CRTC2_V_TOTAL_DISP	0x0008	/* Dword offset 0_02 */
-#define CRTC_V_TOTAL		0x0008
-#define CRTC2_V_TOTAL		0x0008
-#define CRTC_V_DISP		0x000A
-#define CRTC2_V_DISP		0x000A
-#define CRTC_V_SYNC_STRT_WID	0x000C	/* Dword offset 0_03 */
-#define CRTC2_V_SYNC_STRT_WID	0x000C	/* Dword offset 0_03 */
-#define CRTC_V_SYNC_STRT	0x000C
-#define CRTC2_V_SYNC_STRT	0x000C
-#define CRTC_V_SYNC_WID		0x000E
-#define CRTC2_V_SYNC_WID	0x000E
-#define CRTC_VLINE_CRNT_VLINE	0x0010	/* Dword offset 0_04 */
-#define CRTC2_VLINE_CRNT_VLINE	0x0010	/* Dword offset 0_04 */
-#define CRTC_OFF_PITCH		0x0014	/* Dword offset 0_05 */
-#define CRTC_OFFSET		0x0014
-#define CRTC_PITCH		0x0016
-#define CRTC_INT_CNTL		0x0018	/* Dword offset 0_06 */
-#define CRTC_GEN_CNTL		0x001C	/* Dword offset 0_07 */
-#define CRTC_PIX_WIDTH		0x001D
-#define CRTC_FIFO		0x001E
-#define CRTC_EXT_DISP		0x001F
-
-/* Memory Buffer Control */
-#define DSP_CONFIG		0x0020	/* Dword offset 0_08 */
-#define PM_DSP_CONFIG		0x0020	/* Dword offset 0_08 (Mobility Only) */
-#define DSP_ON_OFF		0x0024	/* Dword offset 0_09 */
-#define PM_DSP_ON_OFF		0x0024	/* Dword offset 0_09 (Mobility Only) */
-#define TIMER_CONFIG		0x0028	/* Dword offset 0_0A */
-#define MEM_BUF_CNTL		0x002C	/* Dword offset 0_0B */
-#define MEM_ADDR_CONFIG		0x0034	/* Dword offset 0_0D */
-
-/* Accelerator CRTC */
-#define CRT_TRAP		0x0038	/* Dword offset 0_0E */
-
-#define I2C_CNTL_0		0x003C	/* Dword offset 0_0F */
-
-/* Overscan */
-#define OVR_CLR			0x0040	/* Dword offset 0_10 */
-#define OVR2_CLR		0x0040	/* Dword offset 0_10 */
-#define OVR_WID_LEFT_RIGHT	0x0044	/* Dword offset 0_11 */
-#define OVR2_WID_LEFT_RIGHT	0x0044	/* Dword offset 0_11 */
-#define OVR_WID_TOP_BOTTOM	0x0048	/* Dword offset 0_12 */
-#define OVR2_WID_TOP_BOTTOM	0x0048	/* Dword offset 0_12 */
-
-/* Memory Buffer Control */
-#define VGA_DSP_CONFIG		0x004C	/* Dword offset 0_13 */
-#define PM_VGA_DSP_CONFIG	0x004C	/* Dword offset 0_13 (Mobility Only) */
-#define VGA_DSP_ON_OFF		0x0050	/* Dword offset 0_14 */
-#define PM_VGA_DSP_ON_OFF	0x0050	/* Dword offset 0_14 (Mobility Only) */
-#define DSP2_CONFIG		0x0054	/* Dword offset 0_15 */
-#define PM_DSP2_CONFIG		0x0054	/* Dword offset 0_15 (Mobility Only) */
-#define DSP2_ON_OFF		0x0058	/* Dword offset 0_16 */
-#define PM_DSP2_ON_OFF		0x0058	/* Dword offset 0_16 (Mobility Only) */
-
-/* Accelerator CRTC */
-#define CRTC2_OFF_PITCH		0x005C	/* Dword offset 0_17 */
-
-/* Hardware Cursor */
-#define CUR_CLR0		0x0060	/* Dword offset 0_18 */
-#define CUR2_CLR0		0x0060	/* Dword offset 0_18 */
-#define CUR_CLR1		0x0064	/* Dword offset 0_19 */
-#define CUR2_CLR1		0x0064	/* Dword offset 0_19 */
-#define CUR_OFFSET		0x0068	/* Dword offset 0_1A */
-#define CUR2_OFFSET		0x0068	/* Dword offset 0_1A */
-#define CUR_HORZ_VERT_POSN	0x006C	/* Dword offset 0_1B */
-#define CUR2_HORZ_VERT_POSN	0x006C	/* Dword offset 0_1B */
-#define CUR_HORZ_VERT_OFF	0x0070	/* Dword offset 0_1C */
-#define CUR2_HORZ_VERT_OFF	0x0070	/* Dword offset 0_1C */
-
-#define CONFIG_PANEL_LG		0x0074	/* Dword offset 0_1D */
-
-/* General I/O Control */
-#define GP_IO			0x0078	/* Dword offset 0_1E */
-
-/* Test and Debug */
-#define HW_DEBUG		0x007C	/* Dword offset 0_1F */
-
-/* Scratch Pad and Test */
-#define SCRATCH_REG0		0x0080	/* Dword offset 0_20 */
-#define SCRATCH_REG1		0x0084	/* Dword offset 0_21 */
-#define SCRATCH_REG2		0x0088	/* Dword offset 0_22 */
-#define SCRATCH_REG3		0x008C	/* Dword offset 0_23 */
-
-/* Clock Control */
-#define CLOCK_CNTL		0x0090	/* Dword offset 0_24 */
-#define CLOCK_SEL_CNTL		0x0090	/* Dword offset 0_24 */
-
-/* Configuration */
-#define CONFIG_STAT1		0x0094	/* Dword offset 0_25 */
-#define CONFIG_STAT2		0x0098	/* Dword offset 0_26 */
-
-/* Bus Control */
-#define BUS_CNTL		0x00A0	/* Dword offset 0_28 */
-
-#define LCD_INDEX		0x00A4	/* Dword offset 0_29 */
-#define LCD_DATA		0x00A8	/* Dword offset 0_2A */
-
-/* Memory Control */
-#define EXT_MEM_CNTL		0x00AC	/* Dword offset 0_2B */
-#define MEM_CNTL		0x00B0	/* Dword offset 0_2C */
-#define MEM_VGA_WP_SEL		0x00B4	/* Dword offset 0_2D */
-#define MEM_VGA_RP_SEL		0x00B8	/* Dword offset 0_2E */
-
-#define I2C_CNTL_1		0x00BC	/* Dword offset 0_2F */
-
-/* DAC Control */
-#define DAC_REGS		0x00C0	/* Dword offset 0_30 */
-#define DAC_W_INDEX		0x00C0	/* Dword offset 0_30 */
-#define DAC_DATA		0x00C1	/* Dword offset 0_30 */
-#define DAC_MASK		0x00C2	/* Dword offset 0_30 */
-#define DAC_R_INDEX		0x00C3	/* Dword offset 0_30 */
-#define DAC_CNTL		0x00C4	/* Dword offset 0_31 */
-
-#define EXT_DAC_REGS		0x00C8	/* Dword offset 0_32 */
-
-/* Test and Debug */
-#define GEN_TEST_CNTL		0x00D0	/* Dword offset 0_34 */
-
-/* Custom Macros */
-#define CUSTOM_MACRO_CNTL	0x00D4	/* Dword offset 0_35 */
-
-#define LCD_GEN_CNTL_LG		0x00D4	/* Dword offset 0_35 */
-
-#define POWER_MANAGEMENT_LG	0x00D8	/* Dword offset 0_36 (LG) */
-
-/* Configuration */
-#define CONFIG_CNTL		0x00DC	/* Dword offset 0_37 (CT, ET, VT) */
-#define CONFIG_CHIP_ID		0x00E0	/* Dword offset 0_38 */
-#define CONFIG_STAT0		0x00E4	/* Dword offset 0_39 */
-
-/* Test and Debug */
-#define CRC_SIG			0x00E8	/* Dword offset 0_3A */
-#define CRC2_SIG		0x00E8	/* Dword offset 0_3A */
-
-
-/* GUI MEMORY MAPPED Registers */
-
-/* Draw Engine Destination Trajectory */
-#define DST_OFF_PITCH		0x0100	/* Dword offset 0_40 */
-#define DST_X			0x0104	/* Dword offset 0_41 */
-#define DST_Y			0x0108	/* Dword offset 0_42 */
-#define DST_Y_X			0x010C	/* Dword offset 0_43 */
-#define DST_WIDTH		0x0110	/* Dword offset 0_44 */
-#define DST_HEIGHT		0x0114	/* Dword offset 0_45 */
-#define DST_HEIGHT_WIDTH	0x0118	/* Dword offset 0_46 */
-#define DST_X_WIDTH		0x011C	/* Dword offset 0_47 */
-#define DST_BRES_LNTH		0x0120	/* Dword offset 0_48 */
-#define DST_BRES_ERR		0x0124	/* Dword offset 0_49 */
-#define DST_BRES_INC		0x0128	/* Dword offset 0_4A */
-#define DST_BRES_DEC		0x012C	/* Dword offset 0_4B */
-#define DST_CNTL		0x0130	/* Dword offset 0_4C */
-#define DST_Y_X__ALIAS__	0x0134	/* Dword offset 0_4D */
-#define TRAIL_BRES_ERR		0x0138	/* Dword offset 0_4E */
-#define TRAIL_BRES_INC		0x013C	/* Dword offset 0_4F */
-#define TRAIL_BRES_DEC		0x0140	/* Dword offset 0_50 */
-#define LEAD_BRES_LNTH		0x0144	/* Dword offset 0_51 */
-#define Z_OFF_PITCH		0x0148	/* Dword offset 0_52 */
-#define Z_CNTL			0x014C	/* Dword offset 0_53 */
-#define ALPHA_TST_CNTL		0x0150	/* Dword offset 0_54 */
-#define SECONDARY_STW_EXP	0x0158	/* Dword offset 0_56 */
-#define SECONDARY_S_X_INC	0x015C	/* Dword offset 0_57 */
-#define SECONDARY_S_Y_INC	0x0160	/* Dword offset 0_58 */
-#define SECONDARY_S_START	0x0164	/* Dword offset 0_59 */
-#define SECONDARY_W_X_INC	0x0168	/* Dword offset 0_5A */
-#define SECONDARY_W_Y_INC	0x016C	/* Dword offset 0_5B */
-#define SECONDARY_W_START	0x0170	/* Dword offset 0_5C */
-#define SECONDARY_T_X_INC	0x0174	/* Dword offset 0_5D */
-#define SECONDARY_T_Y_INC	0x0178	/* Dword offset 0_5E */
-#define SECONDARY_T_START	0x017C	/* Dword offset 0_5F */
-
-/* Draw Engine Source Trajectory */
-#define SRC_OFF_PITCH		0x0180	/* Dword offset 0_60 */
-#define SRC_X			0x0184	/* Dword offset 0_61 */
-#define SRC_Y			0x0188	/* Dword offset 0_62 */
-#define SRC_Y_X			0x018C	/* Dword offset 0_63 */
-#define SRC_WIDTH1		0x0190	/* Dword offset 0_64 */
-#define SRC_HEIGHT1		0x0194	/* Dword offset 0_65 */
-#define SRC_HEIGHT1_WIDTH1	0x0198	/* Dword offset 0_66 */
-#define SRC_X_START		0x019C	/* Dword offset 0_67 */
-#define SRC_Y_START		0x01A0	/* Dword offset 0_68 */
-#define SRC_Y_X_START		0x01A4	/* Dword offset 0_69 */
-#define SRC_WIDTH2		0x01A8	/* Dword offset 0_6A */
-#define SRC_HEIGHT2		0x01AC	/* Dword offset 0_6B */
-#define SRC_HEIGHT2_WIDTH2	0x01B0	/* Dword offset 0_6C */
-#define SRC_CNTL		0x01B4	/* Dword offset 0_6D */
-
-#define SCALE_OFF		0x01C0	/* Dword offset 0_70 */
-#define SECONDARY_SCALE_OFF	0x01C4	/* Dword offset 0_71 */
-
-#define TEX_0_OFF		0x01C0	/* Dword offset 0_70 */
-#define TEX_1_OFF		0x01C4	/* Dword offset 0_71 */
-#define TEX_2_OFF		0x01C8	/* Dword offset 0_72 */
-#define TEX_3_OFF		0x01CC	/* Dword offset 0_73 */
-#define TEX_4_OFF		0x01D0	/* Dword offset 0_74 */
-#define TEX_5_OFF		0x01D4	/* Dword offset 0_75 */
-#define TEX_6_OFF		0x01D8	/* Dword offset 0_76 */
-#define TEX_7_OFF		0x01DC	/* Dword offset 0_77 */
-
-#define SCALE_WIDTH		0x01DC	/* Dword offset 0_77 */
-#define SCALE_HEIGHT		0x01E0	/* Dword offset 0_78 */
-
-#define TEX_8_OFF		0x01E0	/* Dword offset 0_78 */
-#define TEX_9_OFF		0x01E4	/* Dword offset 0_79 */
-#define TEX_10_OFF		0x01E8	/* Dword offset 0_7A */
-#define S_Y_INC			0x01EC	/* Dword offset 0_7B */
-
-#define SCALE_PITCH		0x01EC	/* Dword offset 0_7B */
-#define SCALE_X_INC		0x01F0	/* Dword offset 0_7C */
-
-#define RED_X_INC		0x01F0	/* Dword offset 0_7C */
-#define GREEN_X_INC		0x01F4	/* Dword offset 0_7D */
-
-#define SCALE_Y_INC		0x01F4	/* Dword offset 0_7D */
-#define SCALE_VACC		0x01F8	/* Dword offset 0_7E */
-#define SCALE_3D_CNTL		0x01FC	/* Dword offset 0_7F */
-
-/* Host Data */
-#define HOST_DATA0		0x0200	/* Dword offset 0_80 */
-#define HOST_DATA1		0x0204	/* Dword offset 0_81 */
-#define HOST_DATA2		0x0208	/* Dword offset 0_82 */
-#define HOST_DATA3		0x020C	/* Dword offset 0_83 */
-#define HOST_DATA4		0x0210	/* Dword offset 0_84 */
-#define HOST_DATA5		0x0214	/* Dword offset 0_85 */
-#define HOST_DATA6		0x0218	/* Dword offset 0_86 */
-#define HOST_DATA7		0x021C	/* Dword offset 0_87 */
-#define HOST_DATA8		0x0220	/* Dword offset 0_88 */
-#define HOST_DATA9		0x0224	/* Dword offset 0_89 */
-#define HOST_DATAA		0x0228	/* Dword offset 0_8A */
-#define HOST_DATAB		0x022C	/* Dword offset 0_8B */
-#define HOST_DATAC		0x0230	/* Dword offset 0_8C */
-#define HOST_DATAD		0x0234	/* Dword offset 0_8D */
-#define HOST_DATAE		0x0238	/* Dword offset 0_8E */
-#define HOST_DATAF		0x023C	/* Dword offset 0_8F */
-#define HOST_CNTL		0x0240	/* Dword offset 0_90 */
-
-/* GUI Bus Mastering */
-#define BM_HOSTDATA		0x0244	/* Dword offset 0_91 */
-#define BM_ADDR			0x0248	/* Dword offset 0_92 */
-#define BM_DATA			0x0248	/* Dword offset 0_92 */
-#define BM_GUI_TABLE_CMD	0x024C	/* Dword offset 0_93 */
-
-/* Pattern */
-#define PAT_REG0		0x0280	/* Dword offset 0_A0 */
-#define PAT_REG1		0x0284	/* Dword offset 0_A1 */
-#define PAT_CNTL		0x0288	/* Dword offset 0_A2 */
-
-/* Scissors */
-#define SC_LEFT			0x02A0	/* Dword offset 0_A8 */
-#define SC_RIGHT		0x02A4	/* Dword offset 0_A9 */
-#define SC_LEFT_RIGHT		0x02A8	/* Dword offset 0_AA */
-#define SC_TOP			0x02AC	/* Dword offset 0_AB */
-#define SC_BOTTOM		0x02B0	/* Dword offset 0_AC */
-#define SC_TOP_BOTTOM		0x02B4	/* Dword offset 0_AD */
-
-/* Data Path */
-#define USR1_DST_OFF_PITCH	0x02B8	/* Dword offset 0_AE */
-#define USR2_DST_OFF_PITCH	0x02BC	/* Dword offset 0_AF */
-#define DP_BKGD_CLR		0x02C0	/* Dword offset 0_B0 */
-#define DP_FOG_CLR		0x02C4	/* Dword offset 0_B1 */
-#define DP_FRGD_CLR		0x02C4	/* Dword offset 0_B1 */
-#define DP_WRITE_MASK		0x02C8	/* Dword offset 0_B2 */
-#define DP_CHAIN_MASK		0x02CC	/* Dword offset 0_B3 */
-#define DP_PIX_WIDTH		0x02D0	/* Dword offset 0_B4 */
-#define DP_MIX			0x02D4	/* Dword offset 0_B5 */
-#define DP_SRC			0x02D8	/* Dword offset 0_B6 */
-#define DP_FRGD_CLR_MIX		0x02DC	/* Dword offset 0_B7 */
-#define DP_FRGD_BKGD_CLR	0x02E0	/* Dword offset 0_B8 */
-
-/* Draw Engine Destination Trajectory */
-#define DST_X_Y			0x02E8	/* Dword offset 0_BA */
-#define DST_WIDTH_HEIGHT	0x02EC	/* Dword offset 0_BB */
-
-/* Data Path */
-#define USR_DST_PICTH		0x02F0	/* Dword offset 0_BC */
-#define DP_SET_GUI_ENGINE2	0x02F8	/* Dword offset 0_BE */
-#define DP_SET_GUI_ENGINE	0x02FC	/* Dword offset 0_BF */
-
-/* Color Compare */
-#define CLR_CMP_CLR		0x0300	/* Dword offset 0_C0 */
-#define CLR_CMP_MASK		0x0304	/* Dword offset 0_C1 */
-#define CLR_CMP_CNTL		0x0308	/* Dword offset 0_C2 */
-
-/* Command FIFO */
-#define FIFO_STAT		0x0310	/* Dword offset 0_C4 */
-
-#define CONTEXT_MASK		0x0320	/* Dword offset 0_C8 */
-#define CONTEXT_LOAD_CNTL	0x032C	/* Dword offset 0_CB */
-
-/* Engine Control */
-#define GUI_TRAJ_CNTL		0x0330	/* Dword offset 0_CC */
-
-/* Engine Status/FIFO */
-#define GUI_STAT		0x0338	/* Dword offset 0_CE */
-
-#define TEX_PALETTE_INDEX	0x0340	/* Dword offset 0_D0 */
-#define STW_EXP			0x0344	/* Dword offset 0_D1 */
-#define LOG_MAX_INC		0x0348	/* Dword offset 0_D2 */
-#define S_X_INC			0x034C	/* Dword offset 0_D3 */
-#define S_Y_INC__ALIAS__	0x0350	/* Dword offset 0_D4 */
-
-#define SCALE_PITCH__ALIAS__	0x0350	/* Dword offset 0_D4 */
-
-#define S_START			0x0354	/* Dword offset 0_D5 */
-#define W_X_INC			0x0358	/* Dword offset 0_D6 */
-#define W_Y_INC			0x035C	/* Dword offset 0_D7 */
-#define W_START			0x0360	/* Dword offset 0_D8 */
-#define T_X_INC			0x0364	/* Dword offset 0_D9 */
-#define T_Y_INC			0x0368	/* Dword offset 0_DA */
-
-#define SECONDARY_SCALE_PITCH	0x0368	/* Dword offset 0_DA */
-
-#define T_START			0x036C	/* Dword offset 0_DB */
-#define TEX_SIZE_PITCH		0x0370	/* Dword offset 0_DC */
-#define TEX_CNTL		0x0374	/* Dword offset 0_DD */
-#define SECONDARY_TEX_OFFSET	0x0378	/* Dword offset 0_DE */
-#define TEX_PALETTE		0x037C	/* Dword offset 0_DF */
-
-#define SCALE_PITCH_BOTH	0x0380	/* Dword offset 0_E0 */
-#define SECONDARY_SCALE_OFF_ACC	0x0384	/* Dword offset 0_E1 */
-#define SCALE_OFF_ACC		0x0388	/* Dword offset 0_E2 */
-#define SCALE_DST_Y_X		0x038C	/* Dword offset 0_E3 */
-
-/* Draw Engine Destination Trajectory */
-#define COMPOSITE_SHADOW_ID	0x0398	/* Dword offset 0_E6 */
-
-#define SECONDARY_SCALE_X_INC	0x039C	/* Dword offset 0_E7 */
-
-#define SPECULAR_RED_X_INC	0x039C	/* Dword offset 0_E7 */
-#define SPECULAR_RED_Y_INC	0x03A0	/* Dword offset 0_E8 */
-#define SPECULAR_RED_START	0x03A4	/* Dword offset 0_E9 */
-
-#define SECONDARY_SCALE_HACC	0x03A4	/* Dword offset 0_E9 */
-
-#define SPECULAR_GREEN_X_INC	0x03A8	/* Dword offset 0_EA */
-#define SPECULAR_GREEN_Y_INC	0x03AC	/* Dword offset 0_EB */
-#define SPECULAR_GREEN_START	0x03B0	/* Dword offset 0_EC */
-#define SPECULAR_BLUE_X_INC	0x03B4	/* Dword offset 0_ED */
-#define SPECULAR_BLUE_Y_INC	0x03B8	/* Dword offset 0_EE */
-#define SPECULAR_BLUE_START	0x03BC	/* Dword offset 0_EF */
-
-#define SCALE_X_INC__ALIAS__	0x03C0	/* Dword offset 0_F0 */
-
-#define RED_X_INC__ALIAS__	0x03C0	/* Dword offset 0_F0 */
-#define RED_Y_INC		0x03C4	/* Dword offset 0_F1 */
-#define RED_START		0x03C8	/* Dword offset 0_F2 */
-
-#define SCALE_HACC		0x03C8	/* Dword offset 0_F2 */
-#define SCALE_Y_INC__ALIAS__	0x03CC	/* Dword offset 0_F3 */
-
-#define GREEN_X_INC__ALIAS__	0x03CC	/* Dword offset 0_F3 */
-#define GREEN_Y_INC		0x03D0	/* Dword offset 0_F4 */
-
-#define SECONDARY_SCALE_Y_INC	0x03D0	/* Dword offset 0_F4 */
-#define SECONDARY_SCALE_VACC	0x03D4	/* Dword offset 0_F5 */
-
-#define GREEN_START		0x03D4	/* Dword offset 0_F5 */
-#define BLUE_X_INC		0x03D8	/* Dword offset 0_F6 */
-#define BLUE_Y_INC		0x03DC	/* Dword offset 0_F7 */
-#define BLUE_START		0x03E0	/* Dword offset 0_F8 */
-#define Z_X_INC			0x03E4	/* Dword offset 0_F9 */
-#define Z_Y_INC			0x03E8	/* Dword offset 0_FA */
-#define Z_START			0x03EC	/* Dword offset 0_FB */
-#define ALPHA_X_INC		0x03F0	/* Dword offset 0_FC */
-#define FOG_X_INC		0x03F0	/* Dword offset 0_FC */
-#define ALPHA_Y_INC		0x03F4	/* Dword offset 0_FD */
-#define FOG_Y_INC		0x03F4	/* Dword offset 0_FD */
-#define ALPHA_START		0x03F8	/* Dword offset 0_FE */
-#define FOG_START		0x03F8	/* Dword offset 0_FE */
-
-#define OVERLAY_Y_X_START		0x0400	/* Dword offset 1_00 */
-#define OVERLAY_Y_X_END			0x0404	/* Dword offset 1_01 */
-#define OVERLAY_VIDEO_KEY_CLR		0x0408	/* Dword offset 1_02 */
-#define OVERLAY_VIDEO_KEY_MSK		0x040C	/* Dword offset 1_03 */
-#define OVERLAY_GRAPHICS_KEY_CLR	0x0410	/* Dword offset 1_04 */
-#define OVERLAY_GRAPHICS_KEY_MSK	0x0414	/* Dword offset 1_05 */
-#define OVERLAY_KEY_CNTL		0x0418	/* Dword offset 1_06 */
-
-#define OVERLAY_SCALE_INC	0x0420	/* Dword offset 1_08 */
-#define OVERLAY_SCALE_CNTL	0x0424	/* Dword offset 1_09 */
-#define SCALER_HEIGHT_WIDTH	0x0428	/* Dword offset 1_0A */
-#define SCALER_TEST		0x042C	/* Dword offset 1_0B */
-#define SCALER_BUF0_OFFSET	0x0434	/* Dword offset 1_0D */
-#define SCALER_BUF1_OFFSET	0x0438	/* Dword offset 1_0E */
-#define SCALE_BUF_PITCH		0x043C	/* Dword offset 1_0F */
-
-#define CAPTURE_START_END	0x0440	/* Dword offset 1_10 */
-#define CAPTURE_X_WIDTH		0x0444	/* Dword offset 1_11 */
-#define VIDEO_FORMAT		0x0448	/* Dword offset 1_12 */
-#define VBI_START_END		0x044C	/* Dword offset 1_13 */
-#define CAPTURE_CONFIG		0x0450	/* Dword offset 1_14 */
-#define TRIG_CNTL		0x0454	/* Dword offset 1_15 */
-
-#define OVERLAY_EXCLUSIVE_HORZ	0x0458	/* Dword offset 1_16 */
-#define OVERLAY_EXCLUSIVE_VERT	0x045C	/* Dword offset 1_17 */
-
-#define VAL_WIDTH		0x0460	/* Dword offset 1_18 */
-#define CAPTURE_DEBUG		0x0464	/* Dword offset 1_19 */
-#define VIDEO_SYNC_TEST		0x0468	/* Dword offset 1_1A */
-
-/* GenLocking */
-#define SNAPSHOT_VH_COUNTS	0x0470	/* Dword offset 1_1C */
-#define SNAPSHOT_F_COUNT	0x0474	/* Dword offset 1_1D */
-#define N_VIF_COUNT		0x0478	/* Dword offset 1_1E */
-#define SNAPSHOT_VIF_COUNT	0x047C	/* Dword offset 1_1F */
-
-#define CAPTURE_BUF0_OFFSET	0x0480	/* Dword offset 1_20 */
-#define CAPTURE_BUF1_OFFSET	0x0484	/* Dword offset 1_21 */
-#define CAPTURE_BUF_PITCH	0x0488	/* Dword offset 1_22 */
-
-/* GenLocking */
-#define SNAPSHOT2_VH_COUNTS	0x04B0	/* Dword offset 1_2C */
-#define SNAPSHOT2_F_COUNT	0x04B4	/* Dword offset 1_2D */
-#define N_VIF2_COUNT		0x04B8	/* Dword offset 1_2E */
-#define SNAPSHOT2_VIF_COUNT	0x04BC	/* Dword offset 1_2F */
-
-#define MPP_CONFIG		0x04C0	/* Dword offset 1_30 */
-#define MPP_STROBE_SEQ		0x04C4	/* Dword offset 1_31 */
-#define MPP_ADDR		0x04C8	/* Dword offset 1_32 */
-#define MPP_DATA		0x04CC	/* Dword offset 1_33 */
-#define TVO_CNTL		0x0500	/* Dword offset 1_40 */
-
-/* Test and Debug */
-#define CRT_HORZ_VERT_LOAD	0x0544	/* Dword offset 1_51 */
-
-/* AGP */
-#define AGP_BASE		0x0548	/* Dword offset 1_52 */
-#define AGP_CNTL		0x054C	/* Dword offset 1_53 */
-
-#define SCALER_COLOUR_CNTL	0x0550	/* Dword offset 1_54 */
-#define SCALER_H_COEFF0		0x0554	/* Dword offset 1_55 */
-#define SCALER_H_COEFF1		0x0558	/* Dword offset 1_56 */
-#define SCALER_H_COEFF2		0x055C	/* Dword offset 1_57 */
-#define SCALER_H_COEFF3		0x0560	/* Dword offset 1_58 */
-#define SCALER_H_COEFF4		0x0564	/* Dword offset 1_59 */
-
-/* Command FIFO */
-#define GUI_CMDFIFO_DEBUG	0x0570	/* Dword offset 1_5C */
-#define GUI_CMDFIFO_DATA	0x0574	/* Dword offset 1_5D */
-#define GUI_CNTL		0x0578	/* Dword offset 1_5E */
-
-/* Bus Mastering */
-#define BM_FRAME_BUF_OFFSET	0x0580	/* Dword offset 1_60 */
-#define BM_SYSTEM_MEM_ADDR	0x0584	/* Dword offset 1_61 */
-#define BM_COMMAND		0x0588	/* Dword offset 1_62 */
-#define BM_STATUS		0x058C	/* Dword offset 1_63 */
-#define BM_GUI_TABLE		0x05B8	/* Dword offset 1_6E */
-#define BM_SYSTEM_TABLE		0x05BC	/* Dword offset 1_6F */
-
-#define SCALER_BUF0_OFFSET_U	0x05D4	/* Dword offset 1_75 */
-#define SCALER_BUF0_OFFSET_V	0x05D8	/* Dword offset 1_76 */
-#define SCALER_BUF1_OFFSET_U	0x05DC	/* Dword offset 1_77 */
-#define SCALER_BUF1_OFFSET_V	0x05E0	/* Dword offset 1_78 */
-
-/* Setup Engine */
-#define VERTEX_1_S		0x0640	/* Dword offset 1_90 */
-#define VERTEX_1_T		0x0644	/* Dword offset 1_91 */
-#define VERTEX_1_W		0x0648	/* Dword offset 1_92 */
-#define VERTEX_1_SPEC_ARGB	0x064C	/* Dword offset 1_93 */
-#define VERTEX_1_Z		0x0650	/* Dword offset 1_94 */
-#define VERTEX_1_ARGB		0x0654	/* Dword offset 1_95 */
-#define VERTEX_1_X_Y		0x0658	/* Dword offset 1_96 */
-#define ONE_OVER_AREA		0x065C	/* Dword offset 1_97 */
-#define VERTEX_2_S		0x0660	/* Dword offset 1_98 */
-#define VERTEX_2_T		0x0664	/* Dword offset 1_99 */
-#define VERTEX_2_W		0x0668	/* Dword offset 1_9A */
-#define VERTEX_2_SPEC_ARGB	0x066C	/* Dword offset 1_9B */
-#define VERTEX_2_Z		0x0670	/* Dword offset 1_9C */
-#define VERTEX_2_ARGB		0x0674	/* Dword offset 1_9D */
-#define VERTEX_2_X_Y		0x0678	/* Dword offset 1_9E */
-#define ONE_OVER_AREA		0x065C	/* Dword offset 1_9F */
-#define VERTEX_3_S		0x0680	/* Dword offset 1_A0 */
-#define VERTEX_3_T		0x0684	/* Dword offset 1_A1 */
-#define VERTEX_3_W		0x0688	/* Dword offset 1_A2 */
-#define VERTEX_3_SPEC_ARGB	0x068C	/* Dword offset 1_A3 */
-#define VERTEX_3_Z		0x0690	/* Dword offset 1_A4 */
-#define VERTEX_3_ARGB		0x0694	/* Dword offset 1_A5 */
-#define VERTEX_3_X_Y		0x0698	/* Dword offset 1_A6 */
-#define ONE_OVER_AREA		0x065C	/* Dword offset 1_A7 */
-#define VERTEX_1_S		0x0640	/* Dword offset 1_AB */
-#define VERTEX_1_T		0x0644	/* Dword offset 1_AC */
-#define VERTEX_1_W		0x0648	/* Dword offset 1_AD */
-#define VERTEX_2_S		0x0660	/* Dword offset 1_AE */
-#define VERTEX_2_T		0x0664	/* Dword offset 1_AF */
-#define VERTEX_2_W		0x0668	/* Dword offset 1_B0 */
-#define VERTEX_3_SECONDARY_S	0x06C0	/* Dword offset 1_B0 */
-#define VERTEX_3_S		0x0680	/* Dword offset 1_B1 */
-#define VERTEX_3_SECONDARY_T	0x06C4	/* Dword offset 1_B1 */
-#define VERTEX_3_T		0x0684	/* Dword offset 1_B2 */
-#define VERTEX_3_SECONDARY_W	0x06C8	/* Dword offset 1_B2 */
-#define VERTEX_3_W		0x0688	/* Dword offset 1_B3 */
-#define VERTEX_1_SPEC_ARGB	0x064C	/* Dword offset 1_B4 */
-#define VERTEX_2_SPEC_ARGB	0x066C	/* Dword offset 1_B5 */
-#define VERTEX_3_SPEC_ARGB	0x068C	/* Dword offset 1_B6 */
-#define VERTEX_1_Z		0x0650	/* Dword offset 1_B7 */
-#define VERTEX_2_Z		0x0670	/* Dword offset 1_B8 */
-#define VERTEX_3_Z		0x0690	/* Dword offset 1_B9 */
-#define VERTEX_1_ARGB		0x0654	/* Dword offset 1_BA */
-#define VERTEX_2_ARGB		0x0674	/* Dword offset 1_BB */
-#define VERTEX_3_ARGB		0x0694	/* Dword offset 1_BC */
-#define VERTEX_1_X_Y		0x0658	/* Dword offset 1_BD */
-#define VERTEX_2_X_Y		0x0678	/* Dword offset 1_BE */
-#define VERTEX_3_X_Y		0x0698	/* Dword offset 1_BF */
-#define ONE_OVER_AREA_UC	0x0700	/* Dword offset 1_C0 */
-#define SETUP_CNTL		0x0704	/* Dword offset 1_C1 */
-#define VERTEX_1_SECONDARY_S	0x0728	/* Dword offset 1_CA */
-#define VERTEX_1_SECONDARY_T	0x072C	/* Dword offset 1_CB */
-#define VERTEX_1_SECONDARY_W	0x0730	/* Dword offset 1_CC */
-#define VERTEX_2_SECONDARY_S	0x0734	/* Dword offset 1_CD */
-#define VERTEX_2_SECONDARY_T	0x0738	/* Dword offset 1_CE */
-#define VERTEX_2_SECONDARY_W	0x073C	/* Dword offset 1_CF */
-
-
-#define GTC_3D_RESET_DELAY	3	/* 3D engine reset delay in ms */
-
-/* CRTC control values (mostly CRTC_GEN_CNTL) */
-
-#define CRTC_H_SYNC_NEG		0x00200000
-#define CRTC_V_SYNC_NEG		0x00200000
-
-#define CRTC_DBL_SCAN_EN	0x00000001
-#define CRTC_INTERLACE_EN	0x00000002
-#define CRTC_HSYNC_DIS		0x00000004
-#define CRTC_VSYNC_DIS		0x00000008
-#define CRTC_CSYNC_EN		0x00000010
-#define CRTC_PIX_BY_2_EN	0x00000020	/* unused on RAGE */
-#define CRTC_DISPLAY_DIS	0x00000040
-#define CRTC_VGA_XOVERSCAN	0x00000040
-
-#define CRTC_PIX_WIDTH_MASK	0x00000700
-#define CRTC_PIX_WIDTH_4BPP	0x00000100
-#define CRTC_PIX_WIDTH_8BPP	0x00000200
-#define CRTC_PIX_WIDTH_15BPP	0x00000300
-#define CRTC_PIX_WIDTH_16BPP	0x00000400
-#define CRTC_PIX_WIDTH_24BPP	0x00000500
-#define CRTC_PIX_WIDTH_32BPP	0x00000600
-
-#define CRTC_BYTE_PIX_ORDER	0x00000800
-#define CRTC_PIX_ORDER_MSN_LSN	0x00000000
-#define CRTC_PIX_ORDER_LSN_MSN	0x00000800
-
-#define CRTC_FIFO_LWM		0x000f0000
-
-#define VGA_128KAP_PAGING	0x00100000
-#define VFC_SYNC_TRISTATE	0x00200000
-#define CRTC_LOCK_REGS		0x00400000
-#define CRTC_SYNC_TRISTATE	0x00800000
-
-#define CRTC_EXT_DISP_EN	0x01000000
-#define CRTC_ENABLE		0x02000000
-#define CRTC_DISP_REQ_ENB	0x04000000
-#define VGA_ATI_LINEAR		0x08000000
-#define CRTC_VSYNC_FALL_EDGE	0x10000000
-#define VGA_TEXT_132		0x20000000
-#define VGA_XCRT_CNT_EN		0x40000000
-#define VGA_CUR_B_TEST		0x80000000
-
-#define CRTC_CRNT_VLINE		0x07f00000
-#define CRTC_VBLANK		0x00000001
-
-
-/* DAC control values */
-
-#define DAC_EXT_SEL_RS2		0x01
-#define DAC_EXT_SEL_RS3		0x02
-#define DAC_8BIT_EN		0x00000100
-#define DAC_PIX_DLY_MASK	0x00000600
-#define DAC_PIX_DLY_0NS		0x00000000
-#define DAC_PIX_DLY_2NS		0x00000200
-#define DAC_PIX_DLY_4NS		0x00000400
-#define DAC_BLANK_ADJ_MASK	0x00001800
-#define DAC_BLANK_ADJ_0		0x00000000
-#define DAC_BLANK_ADJ_1		0x00000800
-#define DAC_BLANK_ADJ_2		0x00001000
-
-
-/* Mix control values */
-
-#define MIX_NOT_DST		0x0000
-#define MIX_0			0x0001
-#define MIX_1			0x0002
-#define MIX_DST			0x0003
-#define MIX_NOT_SRC		0x0004
-#define MIX_XOR			0x0005
-#define MIX_XNOR		0x0006
-#define MIX_SRC			0x0007
-#define MIX_NAND		0x0008
-#define MIX_NOT_SRC_OR_DST	0x0009
-#define MIX_SRC_OR_NOT_DST	0x000a
-#define MIX_OR			0x000b
-#define MIX_AND			0x000c
-#define MIX_SRC_AND_NOT_DST	0x000d
-#define MIX_NOT_SRC_AND_DST	0x000e
-#define MIX_NOR			0x000f
-
-/* Maximum engine dimensions */
-#define ENGINE_MIN_X		0
-#define ENGINE_MIN_Y		0
-#define ENGINE_MAX_X		4095
-#define ENGINE_MAX_Y		16383
-
-/* Mach64 engine bit constants - these are typically ORed together */
-
-/* BUS_CNTL register constants */
-#define BUS_FIFO_ERR_ACK	0x00200000
-#define BUS_HOST_ERR_ACK	0x00800000
-
-/* GEN_TEST_CNTL register constants */
-#define GEN_OVR_OUTPUT_EN	0x20
-#define HWCURSOR_ENABLE		0x80
-#define GUI_ENGINE_ENABLE	0x100
-#define BLOCK_WRITE_ENABLE	0x200
-
-/* DSP_CONFIG register constants */
-#define DSP_XCLKS_PER_QW	0x00003fff
-#define DSP_LOOP_LATENCY	0x000f0000
-#define DSP_PRECISION		0x00700000
-
-/* DSP_ON_OFF register constants */
-#define DSP_OFF			0x000007ff
-#define DSP_ON			0x07ff0000
-
-/* CLOCK_CNTL register constants */
-#define CLOCK_SEL		0x0f
-#define CLOCK_DIV		0x30
-#define CLOCK_DIV1		0x00
-#define CLOCK_DIV2		0x10
-#define CLOCK_DIV4		0x20
-#define CLOCK_STROBE		0x40
-#define PLL_WR_EN		0x02
-
-/* PLL register indices */
-#define MPLL_CNTL		0x00
-#define VPLL_CNTL		0x01
-#define PLL_REF_DIV		0x02
-#define PLL_GEN_CNTL		0x03
-#define MCLK_FB_DIV		0x04
-#define PLL_VCLK_CNTL		0x05
-#define VCLK_POST_DIV		0x06
-#define VCLK0_FB_DIV		0x07
-#define VCLK1_FB_DIV		0x08
-#define VCLK2_FB_DIV		0x09
-#define VCLK3_FB_DIV		0x0A
-#define PLL_EXT_CNTL		0x0B
-#define DLL_CNTL		0x0C
-#define DLL1_CNTL		0x0C
-#define VFC_CNTL		0x0D
-#define PLL_TEST_CNTL		0x0E
-#define PLL_TEST_COUNT		0x0F
-#define LVDS_CNTL0		0x10
-#define LVDS_CNTL1		0x11
-#define AGP1_CNTL		0x12
-#define AGP2_CNTL		0x13
-#define DLL2_CNTL		0x14
-#define SCLK_FB_DIV		0x15
-#define SPLL_CNTL1		0x16
-#define SPLL_CNTL2		0x17
-#define APLL_STRAPS		0x18
-#define EXT_VPLL_CNTL		0x19
-#define EXT_VPLL_REF_DIV	0x1A
-#define EXT_VPLL_FB_DIV		0x1B
-#define EXT_VPLL_MSB		0x1C
-#define HTOTAL_CNTL		0x1D
-#define BYTE_CLK_CNTL		0x1E
-#define TV_PLL_CNTL1		0x1F
-#define TV_PLL_CNTL2		0x20
-#define TV_PLL_CNTL		0x21
-#define EXT_TV_PLL		0x22
-#define V2PLL_CNTL		0x23
-#define PLL_V2CLK_CNTL		0x24
-#define EXT_V2PLL_REF_DIV	0x25
-#define EXT_V2PLL_FB_DIV	0x26
-#define EXT_V2PLL_MSB		0x27
-#define HTOTAL2_CNTL		0x28
-#define PLL_YCLK_CNTL		0x29
-#define PM_DYN_CLK_CNTL		0x2A
-
-/* Fields in PLL registers */
-#define PLL_PC_GAIN		0x07
-#define PLL_VC_GAIN		0x18
-#define PLL_DUTY_CYC		0xE0
-#define PLL_OVERRIDE		0x01
-#define PLL_MCLK_RST		0x02
-#define OSC_EN			0x04
-#define EXT_CLK_EN		0x08
-#define MCLK_SRC_SEL		0x70
-#define EXT_CLK_CNTL		0x80
-#define VCLK_SRC_SEL		0x03
-#define PLL_VCLK_RST		0x04
-#define VCLK_INVERT		0x08
-#define VCLK0_POST		0x03
-#define VCLK1_POST		0x0C
-#define VCLK2_POST		0x30
-#define VCLK3_POST		0xC0
-
-/* CONFIG_CNTL register constants */
-#define APERTURE_4M_ENABLE	1
-#define APERTURE_8M_ENABLE	2
-#define VGA_APERTURE_ENABLE	4
-
-/* CONFIG_STAT0 register constants (GX, CX) */
-#define CFG_BUS_TYPE		0x00000007
-#define CFG_MEM_TYPE		0x00000038
-#define CFG_INIT_DAC_TYPE	0x00000e00
-
-/* CONFIG_STAT0 register constants (CT, ET, VT) */
-#define CFG_MEM_TYPE_xT		0x00000007
-
-#define ISA			0
-#define EISA			1
-#define LOCAL_BUS		6
-#define PCI			7
-
-/* Memory types for GX, CX */
-#define DRAMx4			0
-#define VRAMx16			1
-#define VRAMx16ssr		2
-#define DRAMx16			3
-#define GraphicsDRAMx16		4
-#define EnhancedVRAMx16		5
-#define EnhancedVRAMx16ssr	6
-
-/* Memory types for CT, ET, VT, GT */
-#define DRAM			1
-#define EDO			2
-#define PSEUDO_EDO		3
-#define SDRAM			4
-#define SGRAM			5
-#define WRAM			6
-
-#define DAC_INTERNAL		0x00
-#define DAC_IBMRGB514		0x01
-#define DAC_ATI68875		0x02
-#define DAC_TVP3026_A		0x72
-#define DAC_BT476		0x03
-#define DAC_BT481		0x04
-#define DAC_ATT20C491		0x14
-#define DAC_SC15026		0x24
-#define DAC_MU9C1880		0x34
-#define DAC_IMSG174		0x44
-#define DAC_ATI68860_B		0x05
-#define DAC_ATI68860_C		0x15
-#define DAC_TVP3026_B		0x75
-#define DAC_STG1700		0x06
-#define DAC_ATT498		0x16
-#define DAC_STG1702		0x07
-#define DAC_SC15021		0x17
-#define DAC_ATT21C498		0x27
-#define DAC_STG1703		0x37
-#define DAC_CH8398		0x47
-#define DAC_ATT20C408		0x57
-
-#define CLK_ATI18818_0		0
-#define CLK_ATI18818_1		1
-#define CLK_STG1703		2
-#define CLK_CH8398		3
-#define CLK_INTERNAL		4
-#define CLK_ATT20C408		5
-#define CLK_IBMRGB514		6
-
-/* MEM_CNTL register constants */
-#define MEM_SIZE_ALIAS		0x00000007
-#define MEM_SIZE_512K		0x00000000
-#define MEM_SIZE_1M		0x00000001
-#define MEM_SIZE_2M		0x00000002
-#define MEM_SIZE_4M		0x00000003
-#define MEM_SIZE_6M		0x00000004
-#define MEM_SIZE_8M		0x00000005
-#define MEM_SIZE_ALIAS_GTB	0x0000000F
-#define MEM_SIZE_2M_GTB		0x00000003
-#define MEM_SIZE_4M_GTB		0x00000007
-#define MEM_SIZE_6M_GTB		0x00000009
-#define MEM_SIZE_8M_GTB		0x0000000B
-#define MEM_BNDRY		0x00030000
-#define MEM_BNDRY_0K		0x00000000
-#define MEM_BNDRY_256K		0x00010000
-#define MEM_BNDRY_512K		0x00020000
-#define MEM_BNDRY_1M		0x00030000
-#define MEM_BNDRY_EN		0x00040000
-
-/* ATI PCI constants */
-#define PCI_ATI_VENDOR_ID	0x1002
-
-
-/* CONFIG_CHIP_ID register constants */
-#define CFG_CHIP_TYPE		0x0000FFFF
-#define CFG_CHIP_CLASS		0x00FF0000
-#define CFG_CHIP_REV		0xFF000000
-#define CFG_CHIP_MAJOR		0x07000000
-#define CFG_CHIP_FND_ID		0x38000000
-#define CFG_CHIP_MINOR		0xC0000000
-
-
-/* Chip IDs read from CONFIG_CHIP_ID */
-
-/* mach64GX family */
-#define GX_CHIP_ID	0xD7	/* mach64GX (ATI888GX00) */
-#define CX_CHIP_ID	0x57	/* mach64CX (ATI888CX00) */
-
-#define GX_PCI_ID	0x4758	/* mach64GX (ATI888GX00) */
-#define CX_PCI_ID	0x4358	/* mach64CX (ATI888CX00) */
-
-/* mach64CT family */
-#define CT_CHIP_ID	0x4354	/* mach64CT (ATI264CT) */
-#define ET_CHIP_ID	0x4554	/* mach64ET (ATI264ET) */
-
-/* mach64CT family / mach64VT class */
-#define VT_CHIP_ID	0x5654	/* mach64VT (ATI264VT) */
-#define VU_CHIP_ID	0x5655	/* mach64VTB (ATI264VTB) */
-#define VV_CHIP_ID	0x5656	/* mach64VT4 (ATI264VT4) */
-
-/* mach64CT family / mach64GT (3D RAGE) class */
-#define LB_CHIP_ID	0x4c42	/* RAGE LT PRO, AGP */
-#define LD_CHIP_ID	0x4c44	/* RAGE LT PRO */
-#define LG_CHIP_ID	0x4c47	/* RAGE LT */
-#define LI_CHIP_ID	0x4c49	/* RAGE LT PRO */
-#define LP_CHIP_ID	0x4c50	/* RAGE LT PRO */
-#define LT_CHIP_ID	0x4c54	/* RAGE LT */
-#define XL_CHIP_ID	0x4752	/* RAGE (XL) */
-#define GT_CHIP_ID	0x4754	/* RAGE (GT) */
-#define GU_CHIP_ID	0x4755	/* RAGE II/II+ (GTB) */
-#define GV_CHIP_ID	0x4756	/* RAGE IIC, PCI */
-#define GW_CHIP_ID	0x4757	/* RAGE IIC, AGP */
-#define GZ_CHIP_ID	0x475a	/* RAGE IIC, AGP */
-#define GB_CHIP_ID	0x4742	/* RAGE PRO, BGA, AGP 1x and 2x */
-#define GD_CHIP_ID	0x4744	/* RAGE PRO, BGA, AGP 1x only */
-#define GI_CHIP_ID	0x4749	/* RAGE PRO, BGA, PCI33 only */
-#define GP_CHIP_ID	0x4750	/* RAGE PRO, PQFP, PCI33, full 3D */
-#define GQ_CHIP_ID	0x4751	/* RAGE PRO, PQFP, PCI33, limited 3D */
-#define LM_CHIP_ID	0x4c4d	/* RAGE Mobility PCI */
-#define LN_CHIP_ID	0x4c4e	/* RAGE Mobility AGP */
-
-
-/* Mach64 major ASIC revisions */
-#define MACH64_ASIC_NEC_VT_A3		0x08
-#define MACH64_ASIC_NEC_VT_A4		0x48
-#define MACH64_ASIC_SGS_VT_A4		0x40
-#define MACH64_ASIC_SGS_VT_B1S1		0x01
-#define MACH64_ASIC_SGS_GT_B1S1		0x01
-#define MACH64_ASIC_SGS_GT_B1S2		0x41
-#define MACH64_ASIC_UMC_GT_B2U1		0x1a
-#define MACH64_ASIC_UMC_GT_B2U2		0x5a
-#define MACH64_ASIC_UMC_VT_B2U3		0x9a
-#define MACH64_ASIC_UMC_GT_B2U3		0x9a
-#define MACH64_ASIC_UMC_R3B_D_P_A1	0x1b
-#define MACH64_ASIC_UMC_R3B_D_P_A2	0x5b
-#define MACH64_ASIC_UMC_R3B_D_P_A3	0x1c
-#define MACH64_ASIC_UMC_R3B_D_P_A4	0x5c
-
-/* Mach64 foundries */
-#define MACH64_FND_SGS		0
-#define MACH64_FND_NEC		1
-#define MACH64_FND_UMC		3
-
-/* Mach64 chip types */
-#define MACH64_UNKNOWN		0
-#define MACH64_GX		1
-#define MACH64_CX		2
-#define MACH64_CT		3
-#define MACH64_ET		4
-#define MACH64_VT		5
-#define MACH64_GT		6
-
-/* DST_CNTL register constants */
-#define DST_X_RIGHT_TO_LEFT	0
-#define DST_X_LEFT_TO_RIGHT	1
-#define DST_Y_BOTTOM_TO_TOP	0
-#define DST_Y_TOP_TO_BOTTOM	2
-#define DST_X_MAJOR		0
-#define DST_Y_MAJOR		4
-#define DST_X_TILE		8
-#define DST_Y_TILE		0x10
-#define DST_LAST_PEL		0x20
-#define DST_POLYGON_ENABLE	0x40
-#define DST_24_ROTATION_ENABLE	0x80
-
-/* SRC_CNTL register constants */
-#define SRC_PATTERN_ENABLE		1
-#define SRC_ROTATION_ENABLE		2
-#define SRC_LINEAR_ENABLE		4
-#define SRC_BYTE_ALIGN			8
-#define SRC_LINE_X_RIGHT_TO_LEFT	0
-#define SRC_LINE_X_LEFT_TO_RIGHT	0x10
-
-/* HOST_CNTL register constants */
-#define HOST_BYTE_ALIGN		1
-
-/* GUI_TRAJ_CNTL register constants */
-#define PAT_MONO_8x8_ENABLE	0x01000000
-#define PAT_CLR_4x2_ENABLE	0x02000000
-#define PAT_CLR_8x1_ENABLE	0x04000000
-
-/* DP_CHAIN_MASK register constants */
-#define DP_CHAIN_4BPP		0x8888
-#define DP_CHAIN_7BPP		0xD2D2
-#define DP_CHAIN_8BPP		0x8080
-#define DP_CHAIN_8BPP_RGB	0x9292
-#define DP_CHAIN_15BPP		0x4210
-#define DP_CHAIN_16BPP		0x8410
-#define DP_CHAIN_24BPP		0x8080
-#define DP_CHAIN_32BPP		0x8080
-
-/* DP_PIX_WIDTH register constants */
-#define DST_1BPP		0
-#define DST_4BPP		1
-#define DST_8BPP		2
-#define DST_15BPP		3
-#define DST_16BPP		4
-#define DST_32BPP		6
-#define SRC_1BPP		0
-#define SRC_4BPP		0x100
-#define SRC_8BPP		0x200
-#define SRC_15BPP		0x300
-#define SRC_16BPP		0x400
-#define SRC_32BPP		0x600
-#define HOST_1BPP		0
-#define HOST_4BPP		0x10000
-#define HOST_8BPP		0x20000
-#define HOST_15BPP		0x30000
-#define HOST_16BPP		0x40000
-#define HOST_32BPP		0x60000
-#define BYTE_ORDER_MSB_TO_LSB	0
-#define BYTE_ORDER_LSB_TO_MSB	0x1000000
-
-/* DP_MIX register constants */
-#define BKGD_MIX_NOT_D			0
-#define BKGD_MIX_ZERO			1
-#define BKGD_MIX_ONE			2
-#define BKGD_MIX_D			3
-#define BKGD_MIX_NOT_S			4
-#define BKGD_MIX_D_XOR_S		5
-#define BKGD_MIX_NOT_D_XOR_S		6
-#define BKGD_MIX_S			7
-#define BKGD_MIX_NOT_D_OR_NOT_S		8
-#define BKGD_MIX_D_OR_NOT_S		9
-#define BKGD_MIX_NOT_D_OR_S		10
-#define BKGD_MIX_D_OR_S			11
-#define BKGD_MIX_D_AND_S		12
-#define BKGD_MIX_NOT_D_AND_S		13
-#define BKGD_MIX_D_AND_NOT_S		14
-#define BKGD_MIX_NOT_D_AND_NOT_S	15
-#define BKGD_MIX_D_PLUS_S_DIV2		0x17
-#define FRGD_MIX_NOT_D			0
-#define FRGD_MIX_ZERO			0x10000
-#define FRGD_MIX_ONE			0x20000
-#define FRGD_MIX_D			0x30000
-#define FRGD_MIX_NOT_S			0x40000
-#define FRGD_MIX_D_XOR_S		0x50000
-#define FRGD_MIX_NOT_D_XOR_S		0x60000
-#define FRGD_MIX_S			0x70000
-#define FRGD_MIX_NOT_D_OR_NOT_S		0x80000
-#define FRGD_MIX_D_OR_NOT_S		0x90000
-#define FRGD_MIX_NOT_D_OR_S		0xa0000
-#define FRGD_MIX_D_OR_S			0xb0000
-#define FRGD_MIX_D_AND_S		0xc0000
-#define FRGD_MIX_NOT_D_AND_S		0xd0000
-#define FRGD_MIX_D_AND_NOT_S		0xe0000
-#define FRGD_MIX_NOT_D_AND_NOT_S	0xf0000
-#define FRGD_MIX_D_PLUS_S_DIV2		0x170000
-
-/* DP_SRC register constants */
-#define BKGD_SRC_BKGD_CLR	0
-#define BKGD_SRC_FRGD_CLR	1
-#define BKGD_SRC_HOST		2
-#define BKGD_SRC_BLIT		3
-#define BKGD_SRC_PATTERN	4
-#define FRGD_SRC_BKGD_CLR	0
-#define FRGD_SRC_FRGD_CLR	0x100
-#define FRGD_SRC_HOST		0x200
-#define FRGD_SRC_BLIT		0x300
-#define FRGD_SRC_PATTERN	0x400
-#define MONO_SRC_ONE		0
-#define MONO_SRC_PATTERN	0x10000
-#define MONO_SRC_HOST		0x20000
-#define MONO_SRC_BLIT		0x30000
-
-/* CLR_CMP_CNTL register constants */
-#define COMPARE_FALSE		0
-#define COMPARE_TRUE		1
-#define COMPARE_NOT_EQUAL	4
-#define COMPARE_EQUAL		5
-#define COMPARE_DESTINATION	0
-#define COMPARE_SOURCE		0x1000000
-
-/* FIFO_STAT register constants */
-#define FIFO_ERR		0x80000000
-
-/* CONTEXT_LOAD_CNTL constants */
-#define CONTEXT_NO_LOAD			0
-#define CONTEXT_LOAD			0x10000
-#define CONTEXT_LOAD_AND_DO_FILL	0x20000
-#define CONTEXT_LOAD_AND_DO_LINE	0x30000
-#define CONTEXT_EXECUTE			0
-#define CONTEXT_CMD_DISABLE		0x80000000
-
-/* GUI_STAT register constants */
-#define ENGINE_IDLE		0
-#define ENGINE_BUSY		1
-#define SCISSOR_LEFT_FLAG	0x10
-#define SCISSOR_RIGHT_FLAG	0x20
-#define SCISSOR_TOP_FLAG	0x40
-#define SCISSOR_BOTTOM_FLAG	0x80
-
-/* ATI VGA Extended Regsiters */
-#define sioATIEXT		0x1ce
-#define bioATIEXT		0x3ce
-
-#define ATI2E			0xae
-#define ATI32			0xb2
-#define ATI36			0xb6
-
-/* VGA Graphics Controller Registers */
-#define VGAGRA			0x3ce
-#define GRA06			0x06
-
-/* VGA Seququencer Registers */
-#define VGASEQ			0x3c4
-#define SEQ02			0x02
-#define SEQ04			0x04
-
-#define MACH64_MAX_X		ENGINE_MAX_X
-#define MACH64_MAX_Y		ENGINE_MAX_Y
-
-#define INC_X			0x0020
-#define INC_Y			0x0080
-
-#define RGB16_555		0x0000
-#define RGB16_565		0x0040
-#define RGB16_655		0x0080
-#define RGB16_664		0x00c0
-
-#define POLY_TEXT_TYPE		0x0001
-#define IMAGE_TEXT_TYPE		0x0002
-#define TEXT_TYPE_8_BIT		0x0004
-#define TEXT_TYPE_16_BIT	0x0008
-#define POLY_TEXT_TYPE_8	(POLY_TEXT_TYPE | TEXT_TYPE_8_BIT)
-#define IMAGE_TEXT_TYPE_8	(IMAGE_TEXT_TYPE | TEXT_TYPE_8_BIT)
-#define POLY_TEXT_TYPE_16	(POLY_TEXT_TYPE | TEXT_TYPE_16_BIT)
-#define IMAGE_TEXT_TYPE_16	(IMAGE_TEXT_TYPE | TEXT_TYPE_16_BIT)
-
-#define MACH64_NUM_CLOCKS	16
-#define MACH64_NUM_FREQS	50
-
-/* Power Management register constants (LT & LT Pro) */
-#define PWR_MGT_ON		0x00000001
-#define PWR_MGT_MODE_MASK	0x00000006
-#define AUTO_PWR_UP		0x00000008
-#define USE_F32KHZ		0x00000400
-#define TRISTATE_MEM_EN		0x00000800
-#define SELF_REFRESH		0x00000080
-#define PWR_BLON		0x02000000
-#define STANDBY_NOW		0x10000000
-#define SUSPEND_NOW		0x20000000
-#define PWR_MGT_STATUS_MASK	0xC0000000
-#define PWR_MGT_STATUS_SUSPEND	0x80000000
-
-/* PM Mode constants  */
-#define PWR_MGT_MODE_PIN	0x00000000
-#define PWR_MGT_MODE_REG	0x00000002
-#define PWR_MGT_MODE_TIMER	0x00000004
-#define PWR_MGT_MODE_PCI	0x00000006
-
-/* LCD registers (LT Pro) */
-
-/* LCD Index register */
-#define LCD_INDEX_MASK		0x0000003F
-#define LCD_DISPLAY_DIS		0x00000100
-#define LCD_SRC_SEL		0x00000200
-#define CRTC2_DISPLAY_DIS	0x00000400
-
-/* LCD register indices */
-#define CONFIG_PANEL		0x00
-#define LCD_GEN_CTRL		0x01
-#define DSTN_CONTROL		0x02
-#define HFB_PITCH_ADDR		0x03
-#define HORZ_STRETCHING		0x04
-#define VERT_STRETCHING		0x05
-#define EXT_VERT_STRETCH	0x06
-#define LT_GIO			0x07
-#define POWER_MANAGEMENT	0x08
-#define ZVGPIO			0x09
-#define ICON_CLR0		0x0A
-#define ICON_CLR1		0x0B
-#define ICON_OFFSET		0x0C
-#define ICON_HORZ_VERT_POSN	0x0D
-#define ICON_HORZ_VERT_OFF	0x0E
-#define ICON2_CLR0		0x0F
-#define ICON2_CLR1		0x10
-#define ICON2_OFFSET		0x11
-#define ICON2_HORZ_VERT_POSN	0x12
-#define ICON2_HORZ_VERT_OFF	0x13
-#define LCD_MISC_CNTL		0x14
-#define APC_CNTL		0x1C
-#define POWER_MANAGEMENT_2	0x1D
-#define ALPHA_BLENDING		0x25
-#define PORTRAIT_GEN_CNTL	0x26
-#define APC_CTRL_IO		0x27
-#define TEST_IO			0x28
-#define TEST_OUTPUTS		0x29
-#define DP1_MEM_ACCESS		0x2A
-#define DP0_MEM_ACCESS		0x2B
-#define DP0_DEBUG_A		0x2C
-#define DP0_DEBUG_B		0x2D
-#define DP1_DEBUG_A		0x2E
-#define DP1_DEBUG_B		0x2F
-#define DPCTRL_DEBUG_A		0x30
-#define DPCTRL_DEBUG_B		0x31
-#define MEMBLK_DEBUG		0x32
-#define APC_LUT_AB		0x33
-#define APC_LUT_CD		0x34
-#define APC_LUT_EF		0x35
-#define APC_LUT_GH		0x36
-#define APC_LUT_IJ		0x37
-#define APC_LUT_KL		0x38
-#define APC_LUT_MN		0x39
-#define APC_LUT_OP		0x3A
-
-
-/* Values in LCD_MISC_CNTL */
-#define BIAS_MOD_LEVEL_MASK	0x0000ff00
-#define BIAS_MOD_LEVEL_SHIFT	8
-#define BLMOD_EN		0x00010000
-#define BIASMOD_EN		0x00020000
-
-#endif /* REGMACH64_H */
diff --git a/drivers/video/aty/mach64_accel.c b/drivers/video/aty/mach64_accel.c
index ca2700a7a056..d2ffd74c7307 100644
--- a/drivers/video/aty/mach64_accel.c
+++ b/drivers/video/aty/mach64_accel.c
@@ -13,294 +13,306 @@
 #include <video/fbcon-cfb24.h>
 #include <video/fbcon-cfb32.h>
 
-#include "mach64.h"
+#include <video/mach64.h>
 #include "atyfb.h"
 
     /*
      *  Text console acceleration
      */
 
-static void fbcon_aty_bmove(struct display *p, int sy, int sx, int dy, int dx,
-			    int height, int width);
-static void fbcon_aty_clear(struct vc_data *conp, struct display *p, int sy,
-			    int sx, int height, int width);
+static void fbcon_aty_bmove(struct display *p, int sy, int sx, int dy,
+			    int dx, int height, int width);
+static void fbcon_aty_clear(struct vc_data *conp, struct display *p,
+			    int sy, int sx, int height, int width);
 
 
     /*
      *  Generic Mach64 routines
      */
 
-void aty_reset_engine(const struct fb_info_aty *info)
+void aty_reset_engine(const struct atyfb_par *par)
 {
-    /* reset engine */
-    aty_st_le32(GEN_TEST_CNTL,
-		aty_ld_le32(GEN_TEST_CNTL, info) & ~GUI_ENGINE_ENABLE, info);
-    /* enable engine */
-    aty_st_le32(GEN_TEST_CNTL,
-		aty_ld_le32(GEN_TEST_CNTL, info) | GUI_ENGINE_ENABLE, info);
-    /* ensure engine is not locked up by clearing any FIFO or */
-    /* HOST errors */
-    aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL, info) | BUS_HOST_ERR_ACK |
-			  BUS_FIFO_ERR_ACK, info);
+	/* reset engine */
+	aty_st_le32(GEN_TEST_CNTL,
+		    aty_ld_le32(GEN_TEST_CNTL, par) & ~GUI_ENGINE_ENABLE,
+		    par);
+	/* enable engine */
+	aty_st_le32(GEN_TEST_CNTL,
+		    aty_ld_le32(GEN_TEST_CNTL, par) | GUI_ENGINE_ENABLE,
+		    par);
+	/* ensure engine is not locked up by clearing any FIFO or */
+	/* HOST errors */
+	aty_st_le32(BUS_CNTL,
+		    aty_ld_le32(BUS_CNTL,
+				par) | BUS_HOST_ERR_ACK | BUS_FIFO_ERR_ACK,
+		    par);
 }
 
-static void reset_GTC_3D_engine(const struct fb_info_aty *info)
+static void reset_GTC_3D_engine(const struct atyfb_par *par)
 {
-	aty_st_le32(SCALE_3D_CNTL, 0xc0, info);
+	aty_st_le32(SCALE_3D_CNTL, 0xc0, par);
 	mdelay(GTC_3D_RESET_DELAY);
-	aty_st_le32(SETUP_CNTL, 0x00, info);
+	aty_st_le32(SETUP_CNTL, 0x00, par);
 	mdelay(GTC_3D_RESET_DELAY);
-	aty_st_le32(SCALE_3D_CNTL, 0x00, info);
+	aty_st_le32(SCALE_3D_CNTL, 0x00, par);
 	mdelay(GTC_3D_RESET_DELAY);
 }
 
-void aty_init_engine(const struct atyfb_par *par, struct fb_info_aty *info)
+void aty_init_engine(struct atyfb_par *par, struct fb_info *info)
 {
-    u32 pitch_value;
-
-    /* determine modal information from global mode structure */
-    pitch_value = par->crtc.vxres;
-
-    if (par->crtc.bpp == 24) {
-	/* In 24 bpp, the engine is in 8 bpp - this requires that all */
-	/* horizontal coordinates and widths must be adjusted */
-	pitch_value = pitch_value * 3;
-    }
-
-    /* On GTC (RagePro), we need to reset the 3D engine before */
-    if (M64_HAS(RESET_3D))
-    	reset_GTC_3D_engine(info);
-
-    /* Reset engine, enable, and clear any engine errors */
-    aty_reset_engine(info);
-    /* Ensure that vga page pointers are set to zero - the upper */
-    /* page pointers are set to 1 to handle overflows in the */
-    /* lower page */
-    aty_st_le32(MEM_VGA_WP_SEL, 0x00010000, info);
-    aty_st_le32(MEM_VGA_RP_SEL, 0x00010000, info);
-
-    /* ---- Setup standard engine context ---- */
-
-    /* All GUI registers here are FIFOed - therefore, wait for */
-    /* the appropriate number of empty FIFO entries */
-    wait_for_fifo(14, info);
-
-    /* enable all registers to be loaded for context loads */
-    aty_st_le32(CONTEXT_MASK, 0xFFFFFFFF, info);
-
-    /* set destination pitch to modal pitch, set offset to zero */
-    aty_st_le32(DST_OFF_PITCH, (pitch_value / 8) << 22, info);
-
-    /* zero these registers (set them to a known state) */
-    aty_st_le32(DST_Y_X, 0, info);
-    aty_st_le32(DST_HEIGHT, 0, info);
-    aty_st_le32(DST_BRES_ERR, 0, info);
-    aty_st_le32(DST_BRES_INC, 0, info);
-    aty_st_le32(DST_BRES_DEC, 0, info);
-
-    /* set destination drawing attributes */
-    aty_st_le32(DST_CNTL, DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
-			  DST_X_LEFT_TO_RIGHT, info);
-
-    /* set source pitch to modal pitch, set offset to zero */
-    aty_st_le32(SRC_OFF_PITCH, (pitch_value / 8) << 22, info);
-
-    /* set these registers to a known state */
-    aty_st_le32(SRC_Y_X, 0, info);
-    aty_st_le32(SRC_HEIGHT1_WIDTH1, 1, info);
-    aty_st_le32(SRC_Y_X_START, 0, info);
-    aty_st_le32(SRC_HEIGHT2_WIDTH2, 1, info);
-
-    /* set source pixel retrieving attributes */
-    aty_st_le32(SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT, info);
-
-    /* set host attributes */
-    wait_for_fifo(13, info);
-    aty_st_le32(HOST_CNTL, 0, info);
-
-    /* set pattern attributes */
-    aty_st_le32(PAT_REG0, 0, info);
-    aty_st_le32(PAT_REG1, 0, info);
-    aty_st_le32(PAT_CNTL, 0, info);
-
-    /* set scissors to modal size */
-    aty_st_le32(SC_LEFT, 0, info);
-    aty_st_le32(SC_TOP, 0, info);
-    aty_st_le32(SC_BOTTOM, par->crtc.vyres-1, info);
-    aty_st_le32(SC_RIGHT, pitch_value-1, info);
-
-    /* set background color to minimum value (usually BLACK) */
-    aty_st_le32(DP_BKGD_CLR, 0, info);
-
-    /* set foreground color to maximum value (usually WHITE) */
-    aty_st_le32(DP_FRGD_CLR, 0xFFFFFFFF, info);
-
-    /* set write mask to effect all pixel bits */
-    aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF, info);
-
-    /* set foreground mix to overpaint and background mix to */
-    /* no-effect */
-    aty_st_le32(DP_MIX, FRGD_MIX_S | BKGD_MIX_D, info);
-
-    /* set primary source pixel channel to foreground color */
-    /* register */
-    aty_st_le32(DP_SRC, FRGD_SRC_FRGD_CLR, info);
-
-    /* set compare functionality to false (no-effect on */
-    /* destination) */
-    wait_for_fifo(3, info);
-    aty_st_le32(CLR_CMP_CLR, 0, info);
-    aty_st_le32(CLR_CMP_MASK, 0xFFFFFFFF, info);
-    aty_st_le32(CLR_CMP_CNTL, 0, info);
-
-    /* set pixel depth */
-    wait_for_fifo(2, info);
-    aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, info);
-    aty_st_le32(DP_CHAIN_MASK, par->crtc.dp_chain_mask, info);
-
-    wait_for_fifo(5, info);
-    aty_st_le32(SCALE_3D_CNTL, 0, info);
-    aty_st_le32(Z_CNTL, 0, info);
-    aty_st_le32(CRTC_INT_CNTL, aty_ld_le32(CRTC_INT_CNTL, info) & ~0x20, info);
-    aty_st_le32(GUI_TRAJ_CNTL, 0x100023, info);
-
-    /* insure engine is idle before leaving */
-    wait_for_idle(info);
+	u32 pitch_value;
+
+	/* determine modal information from global mode structure */
+	pitch_value = par->crtc.vxres;
+
+	if (par->crtc.bpp == 24) {
+		/* In 24 bpp, the engine is in 8 bpp - this requires that all */
+		/* horizontal coordinates and widths must be adjusted */
+		pitch_value = pitch_value * 3;
+	}
+
+	/* On GTC (RagePro), we need to reset the 3D engine before */
+	if (M64_HAS(RESET_3D))
+		reset_GTC_3D_engine(par);
+
+	/* Reset engine, enable, and clear any engine errors */
+	aty_reset_engine(par);
+	/* Ensure that vga page pointers are set to zero - the upper */
+	/* page pointers are set to 1 to handle overflows in the */
+	/* lower page */
+	aty_st_le32(MEM_VGA_WP_SEL, 0x00010000, par);
+	aty_st_le32(MEM_VGA_RP_SEL, 0x00010000, par);
+
+	/* ---- Setup standard engine context ---- */
+
+	/* All GUI registers here are FIFOed - therefore, wait for */
+	/* the appropriate number of empty FIFO entries */
+	wait_for_fifo(14, par);
+
+	/* enable all registers to be loaded for context loads */
+	aty_st_le32(CONTEXT_MASK, 0xFFFFFFFF, par);
+
+	/* set destination pitch to modal pitch, set offset to zero */
+	aty_st_le32(DST_OFF_PITCH, (pitch_value / 8) << 22, par);
+
+	/* zero these registers (set them to a known state) */
+	aty_st_le32(DST_Y_X, 0, par);
+	aty_st_le32(DST_HEIGHT, 0, par);
+	aty_st_le32(DST_BRES_ERR, 0, par);
+	aty_st_le32(DST_BRES_INC, 0, par);
+	aty_st_le32(DST_BRES_DEC, 0, par);
+
+	/* set destination drawing attributes */
+	aty_st_le32(DST_CNTL, DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
+		    DST_X_LEFT_TO_RIGHT, par);
+
+	/* set source pitch to modal pitch, set offset to zero */
+	aty_st_le32(SRC_OFF_PITCH, (pitch_value / 8) << 22, par);
+
+	/* set these registers to a known state */
+	aty_st_le32(SRC_Y_X, 0, par);
+	aty_st_le32(SRC_HEIGHT1_WIDTH1, 1, par);
+	aty_st_le32(SRC_Y_X_START, 0, par);
+	aty_st_le32(SRC_HEIGHT2_WIDTH2, 1, par);
+
+	/* set source pixel retrieving attributes */
+	aty_st_le32(SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT, par);
+
+	/* set host attributes */
+	wait_for_fifo(13, par);
+	aty_st_le32(HOST_CNTL, 0, par);
+
+	/* set pattern attributes */
+	aty_st_le32(PAT_REG0, 0, par);
+	aty_st_le32(PAT_REG1, 0, par);
+	aty_st_le32(PAT_CNTL, 0, par);
+
+	/* set scissors to modal size */
+	aty_st_le32(SC_LEFT, 0, par);
+	aty_st_le32(SC_TOP, 0, par);
+	aty_st_le32(SC_BOTTOM, par->crtc.vyres - 1, par);
+	aty_st_le32(SC_RIGHT, pitch_value - 1, par);
+
+	/* set background color to minimum value (usually BLACK) */
+	aty_st_le32(DP_BKGD_CLR, 0, par);
+
+	/* set foreground color to maximum value (usually WHITE) */
+	aty_st_le32(DP_FRGD_CLR, 0xFFFFFFFF, par);
+
+	/* set write mask to effect all pixel bits */
+	aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF, par);
+
+	/* set foreground mix to overpaint and background mix to */
+	/* no-effect */
+	aty_st_le32(DP_MIX, FRGD_MIX_S | BKGD_MIX_D, par);
+
+	/* set primary source pixel channel to foreground color */
+	/* register */
+	aty_st_le32(DP_SRC, FRGD_SRC_FRGD_CLR, par);
+
+	/* set compare functionality to false (no-effect on */
+	/* destination) */
+	wait_for_fifo(3, par);
+	aty_st_le32(CLR_CMP_CLR, 0, par);
+	aty_st_le32(CLR_CMP_MASK, 0xFFFFFFFF, par);
+	aty_st_le32(CLR_CMP_CNTL, 0, par);
+
+	/* set pixel depth */
+	wait_for_fifo(2, par);
+	aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par);
+	aty_st_le32(DP_CHAIN_MASK, par->crtc.dp_chain_mask, par);
+
+	wait_for_fifo(5, par);
+	aty_st_le32(SCALE_3D_CNTL, 0, par);
+	aty_st_le32(Z_CNTL, 0, par);
+	aty_st_le32(CRTC_INT_CNTL, aty_ld_le32(CRTC_INT_CNTL, par) & ~0x20,
+		    par);
+	aty_st_le32(GUI_TRAJ_CNTL, 0x100023, par);
+
+	/* insure engine is idle before leaving */
+	wait_for_idle(par);
 }
 
-
     /*
      *  Accelerated functions
      */
 
 static inline void draw_rect(s16 x, s16 y, u16 width, u16 height,
-			     struct fb_info_aty *info)
+			     struct atyfb_par *par)
 {
-    /* perform rectangle fill */
-    wait_for_fifo(2, info);
-    aty_st_le32(DST_Y_X, (x << 16) | y, info);
-    aty_st_le32(DST_HEIGHT_WIDTH, (width << 16) | height, info);
-    info->blitter_may_be_busy = 1;
+	/* perform rectangle fill */
+	wait_for_fifo(2, par);
+	aty_st_le32(DST_Y_X, (x << 16) | y, par);
+	aty_st_le32(DST_HEIGHT_WIDTH, (width << 16) | height, par);
+	par->blitter_may_be_busy = 1;
 }
 
-static inline void aty_rectcopy(int srcx, int srcy, int dstx, int dsty,
-				u_int width, u_int height,
-				struct fb_info_aty *info)
+static void atyfb_copyarea(struct fb_info *info, struct fb_copyarea *area)
 {
-    u32 direction = DST_LAST_PEL;
-    u32 pitch_value;
-
-    if (!width || !height)
-	return;
-
-    pitch_value = info->current_par.crtc.vxres;
-    if (info->current_par.crtc.bpp == 24) {
-	/* In 24 bpp, the engine is in 8 bpp - this requires that all */
-	/* horizontal coordinates and widths must be adjusted */
-	pitch_value *= 3;
-	srcx *= 3;
-	dstx *= 3;
-	width *= 3;
-    }
-
-    if (srcy < dsty) {
-	dsty += height - 1;
-	srcy += height - 1;
-    } else
-	direction |= DST_Y_TOP_TO_BOTTOM;
-
-    if (srcx < dstx) {
-	dstx += width - 1;
-	srcx += width - 1;
-    } else
-	direction |= DST_X_LEFT_TO_RIGHT;
-
-    wait_for_fifo(4, info);
-    aty_st_le32(DP_SRC, FRGD_SRC_BLIT, info);
-    aty_st_le32(SRC_Y_X, (srcx << 16) | srcy, info);
-    aty_st_le32(SRC_HEIGHT1_WIDTH1, (width << 16) | height, info);
-    aty_st_le32(DST_CNTL, direction, info);
-    draw_rect(dstx, dsty, width, height, info);
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	
+	u32 direction = DST_LAST_PEL;
+	u32 pitch_value;
+
+	if (!area->width || !area->height)
+		return;
+
+	pitch_value = par->crtc.vxres;
+	if (par->crtc.bpp == 24) {
+		/* In 24 bpp, the engine is in 8 bpp - this requires that all */
+		/* horizontal coordinates and widths must be adjusted */
+		pitch_value *= 3;
+		area->sx *= 3;
+		area->dx *= 3;
+		area->width *= 3;
+	}
+
+	if (area->sy < area->dy) {
+		area->dy += area->height - 1;
+		area->sy += area->height - 1;
+	} else
+		direction |= DST_Y_TOP_TO_BOTTOM;
+
+	if (area->sx < area->dx) {
+		area->dx += area->width - 1;
+		area->sx += area->width - 1;
+	} else
+		direction |= DST_X_LEFT_TO_RIGHT;
+
+	wait_for_fifo(4, par);
+	aty_st_le32(DP_SRC, FRGD_SRC_BLIT, par);
+	aty_st_le32(SRC_Y_X, (area->sx << 16) | area->sy, par);
+	aty_st_le32(SRC_HEIGHT1_WIDTH1, (area->width << 16) | area->height,par);
+	aty_st_le32(DST_CNTL, direction, par);
+	draw_rect(area->dx, area->dy, area->width, area->height, par);
 }
 
-void aty_rectfill(int dstx, int dsty, u_int width, u_int height, u_int color,
-		  struct fb_info_aty *info)
+void atyfb_fillrect(struct fb_info *info, struct fb_fillrect *rect)
 {
-    if (!width || !height)
-	return;
-
-    if (info->current_par.crtc.bpp == 24) {
-	/* In 24 bpp, the engine is in 8 bpp - this requires that all */
-	/* horizontal coordinates and widths must be adjusted */
-	dstx *= 3;
-	width *= 3;
-    }
-
-    wait_for_fifo(3, info);
-    aty_st_le32(DP_FRGD_CLR, color, info);
-    aty_st_le32(DP_SRC, BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR | MONO_SRC_ONE,
-		info);
-    aty_st_le32(DST_CNTL, DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
-			  DST_X_LEFT_TO_RIGHT, info);
-    draw_rect(dstx, dsty, width, height, info);
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+
+	if (!rect->width || !rect->height)
+		return;
+
+	rect->color |= (rect->color << 8);
+	rect->color |= (rect->color << 16);
+
+	if (par->crtc.bpp == 24) {
+		/* In 24 bpp, the engine is in 8 bpp - this requires that all */
+		/* horizontal coordinates and widths must be adjusted */
+		rect->dx *= 3;
+		rect->width *= 3;
+	}
+
+	wait_for_fifo(3, par);
+	aty_st_le32(DP_FRGD_CLR, rect->color, par);
+	aty_st_le32(DP_SRC,
+		    BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR | MONO_SRC_ONE,
+		    par);
+	aty_st_le32(DST_CNTL,
+		    DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
+		    DST_X_LEFT_TO_RIGHT, par);
+	draw_rect(rect->dx, rect->dy, rect->width, rect->height, par);
 }
 
-
     /*
      *  Text console acceleration
      */
 
-static void fbcon_aty_bmove(struct display *p, int sy, int sx, int dy, int dx,
-			    int height, int width)
+static void fbcon_aty_bmove(struct display *p, int sy, int sx, int dy,
+			    int dx, int height, int width)
 {
+	struct fb_info *info = p->fb_info;
+	struct fb_copyarea area;
 #ifdef __sparc__
-    struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
+	struct atyfb_par *par = (struct atyfb_par *) (info->par);
 
-    if (fb->mmaped && (!fb->fb_info.display_fg
-	|| fb->fb_info.display_fg->vc_num == fb->vtconsole))
-	return;
+	if (par->mmaped && (!info->display_fg
+			   || info->display_fg->vc_num ==
+			   par->vtconsole))
+		return;
 #endif
 
-    sx *= fontwidth(p);
-    sy *= fontheight(p);
-    dx *= fontwidth(p);
-    dy *= fontheight(p);
-    width *= fontwidth(p);
-    height *= fontheight(p);
+	area.sx = sx * fontwidth(p);
+	area.sy = sy * fontheight(p);
+	area.dx = dx * fontwidth(p);
+	area.dy = dy * fontheight(p);
+	area.width  = width * fontwidth(p);
+	area.height = height * fontheight(p);
 
-    aty_rectcopy(sx, sy, dx, dy, width, height,
-		 (struct fb_info_aty *)p->fb_info);
+	atyfb_copyarea(info, &area); 
 }
 
-static void fbcon_aty_clear(struct vc_data *conp, struct display *p, int sy,
-			    int sx, int height, int width)
+static void fbcon_aty_clear(struct vc_data *conp, struct display *p,
+			    int sy, int sx, int height, int width)
 {
-    u32 bgx;
+	struct fb_info *info = p->fb_info;
+	struct fb_fillrect region;
 #ifdef __sparc__
-    struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
+	struct atyfb_par *par = (struct atyfb_par *) (info->par);
 
-    if (fb->mmaped && (!fb->fb_info.display_fg
-	|| fb->fb_info.display_fg->vc_num == fb->vtconsole))
-	return;
+	if (par->mmaped && (!info->display_fg
+			   || info->display_fg->vc_num ==
+			   par->vtconsole))
+		return;
 #endif
+	region.color = attr_bgcol_ec(p, conp);
+	region.color |= (region.color << 8);
+	region.color |= (region.color << 16);
 
-    bgx = attr_bgcol_ec(p, conp);
-    bgx |= (bgx << 8);
-    bgx |= (bgx << 16);
+	region.dx = sx * fontwidth(p);
+	region.dy = sy * fontheight(p);
+	region.width = width * fontwidth(p);
+	region.height = height * fontheight(p);
+	region.rop = ROP_COPY;
 
-    sx *= fontwidth(p);
-    sy *= fontheight(p);
-    width *= fontwidth(p);
-    height *= fontheight(p);
-
-    aty_rectfill(sx, sy, width, height, bgx,
-		 (struct fb_info_aty *)p->fb_info);
+	atyfb_fillrect(info, &region);
 }
 
 #ifdef __sparc__
 #define check_access \
-    if (fb->mmaped && (!fb->fb_info.display_fg \
-	|| fb->fb_info.display_fg->vc_num == fb->vtconsole)) \
+    if (par->mmaped && (!info->display_fg \
+	|| info->display_fg->vc_num == par->vtconsole)) \
 	return;
 #else
 #define check_access do { } while (0)
@@ -309,10 +321,11 @@ static void fbcon_aty_clear(struct vc_data *conp, struct display *p, int sy,
 #define DEF_FBCON_ATY_OP(name, call, args...) \
 static void name(struct vc_data *conp, struct display *p, args) \
 { \
-    struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info); \
+    struct fb_info *info = p->fb_info; \
+    struct atyfb_par *par = (struct atyfb_par *) info->par; \
     check_access; \
-    if (fb->blitter_may_be_busy) \
-	wait_for_idle((struct fb_info_aty *)p->fb_info); \
+    if (par->blitter_may_be_busy) \
+	wait_for_idle(par); \
     call; \
 }
 
@@ -342,12 +355,11 @@ const struct display_switch fbcon_aty##width = { \
 DEF_FBCON_ATY(8)
 #endif
 #ifdef FBCON_HAS_CFB16
-DEF_FBCON_ATY(16)
+    DEF_FBCON_ATY(16)
 #endif
 #ifdef FBCON_HAS_CFB24
-DEF_FBCON_ATY(24)
+    DEF_FBCON_ATY(24)
 #endif
 #ifdef FBCON_HAS_CFB32
-DEF_FBCON_ATY(32)
+    DEF_FBCON_ATY(32)
 #endif
-
diff --git a/drivers/video/aty/mach64_ct.c b/drivers/video/aty/mach64_ct.c
index 4af998965b27..df57da42d3f0 100644
--- a/drivers/video/aty/mach64_ct.c
+++ b/drivers/video/aty/mach64_ct.c
@@ -9,33 +9,32 @@
 
 #include <video/fbcon.h>
 
-#include "mach64.h"
+#include <video/mach64.h>
 #include "atyfb.h"
 
 
 /* FIXME: remove the FAIL definition */
 #define FAIL(x) do { printk(x "\n"); return -EINVAL; } while (0)
 
-static void aty_st_pll(int offset, u8 val, const struct fb_info_aty *info);
-
-static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
+static void aty_st_pll(int offset, u8 val, const struct atyfb_par *par);
+static int aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per,
 			    struct pll_ct *pll);
-static int aty_dsp_gt(const struct fb_info_aty *info, u8 bpp,
+static int aty_dsp_gt(const struct fb_info *info, u8 bpp,
 		      struct pll_ct *pll);
-static int aty_var_to_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
+static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per,
 			     u8 bpp, union aty_pll *pll);
-static u32 aty_pll_ct_to_var(const struct fb_info_aty *info,
+static u32 aty_pll_ct_to_var(const struct fb_info *info,
 			     const union aty_pll *pll);
 
 
 
-static void aty_st_pll(int offset, u8 val, const struct fb_info_aty *info)
+static void aty_st_pll(int offset, u8 val, const struct atyfb_par *par)
 {
-    /* write addr byte */
-    aty_st_8(CLOCK_CNTL + 1, (offset << 2) | PLL_WR_EN, info);
-    /* write the register value */
-    aty_st_8(CLOCK_CNTL + 2, val, info);
-    aty_st_8(CLOCK_CNTL + 1, (offset << 2) & ~PLL_WR_EN, info);
+	/* write addr byte */
+	aty_st_8(CLOCK_CNTL + 1, (offset << 2) | PLL_WR_EN, par);
+	/* write the register value */
+	aty_st_8(CLOCK_CNTL + 2, val, par);
+	aty_st_8(CLOCK_CNTL + 1, (offset << 2) & ~PLL_WR_EN, par);
 }
 
 
@@ -45,228 +44,238 @@ static void aty_st_pll(int offset, u8 val, const struct fb_info_aty *info)
      *  PLL programming (Mach64 CT family)
      */
 
-static int aty_dsp_gt(const struct fb_info_aty *info, u8 bpp,
+static int aty_dsp_gt(const struct fb_info *info, u8 bpp,
 		      struct pll_ct *pll)
 {
-    u32 dsp_xclks_per_row, dsp_loop_latency, dsp_precision, dsp_off, dsp_on;
-    u32 xclks_per_row, fifo_off, fifo_on, y, fifo_size, page_size;
-
-    /* xclocks_per_row<<11 */
-    xclks_per_row = (pll->mclk_fb_div*pll->vclk_post_div_real*64<<11)/
-		    (pll->vclk_fb_div*pll->mclk_post_div_real*bpp);
-    if (xclks_per_row < (1<<11))
-	FAIL("Dotclock to high");
-    if (M64_HAS(FIFO_24)) {
-	fifo_size = 24;
-	dsp_loop_latency = 0;
-    } else {
-	fifo_size = 32;
-	dsp_loop_latency = 2;
-    }
-    dsp_precision = 0;
-    y = (xclks_per_row*fifo_size)>>11;
-    while (y) {
-	y >>= 1;
-	dsp_precision++;
-    }
-    dsp_precision -= 5;
-    /* fifo_off<<6 */
-    fifo_off = ((xclks_per_row*(fifo_size-1))>>5)+(3<<6);
-
-    if (info->total_vram > 1*1024*1024) {
-	if (info->ram_type >= SDRAM) {
-	    /* >1 MB SDRAM */
-	    dsp_loop_latency += 8;
-	    page_size = 8;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 dsp_xclks_per_row, dsp_loop_latency, dsp_precision, dsp_off,
+	    dsp_on;
+	u32 xclks_per_row, fifo_off, fifo_on, y, fifo_size, page_size;
+
+	/* xclocks_per_row<<11 */
+	xclks_per_row =
+	    (pll->mclk_fb_div * pll->vclk_post_div_real * 64 << 11) /
+	    (pll->vclk_fb_div * pll->mclk_post_div_real * bpp);
+	if (xclks_per_row < (1 << 11))
+		FAIL("Dotclock to high");
+	if (M64_HAS(FIFO_24)) {
+		fifo_size = 24;
+		dsp_loop_latency = 0;
 	} else {
-	    /* >1 MB DRAM */
-	    dsp_loop_latency += 6;
-	    page_size = 9;
+		fifo_size = 32;
+		dsp_loop_latency = 2;
+	}
+	dsp_precision = 0;
+	y = (xclks_per_row * fifo_size) >> 11;
+	while (y) {
+		y >>= 1;
+		dsp_precision++;
 	}
-    } else {
-	if (info->ram_type >= SDRAM) {
-	    /* <2 MB SDRAM */
-	    dsp_loop_latency += 9;
-	    page_size = 10;
+	dsp_precision -= 5;
+	/* fifo_off<<6 */
+	fifo_off = ((xclks_per_row * (fifo_size - 1)) >> 5) + (3 << 6);
+
+	if (info->fix.smem_len > 1 * 1024 * 1024) {
+		if (par->ram_type >= SDRAM) {
+			/* >1 MB SDRAM */
+			dsp_loop_latency += 8;
+			page_size = 8;
+		} else {
+			/* >1 MB DRAM */
+			dsp_loop_latency += 6;
+			page_size = 9;
+		}
 	} else {
-	    /* <2 MB DRAM */
-	    dsp_loop_latency += 8;
-	    page_size = 10;
+		if (par->ram_type >= SDRAM) {
+			/* <2 MB SDRAM */
+			dsp_loop_latency += 9;
+			page_size = 10;
+		} else {
+			/* <2 MB DRAM */
+			dsp_loop_latency += 8;
+			page_size = 10;
+		}
 	}
-    }
-    /* fifo_on<<6 */
-    if (xclks_per_row >= (page_size<<11))
-	fifo_on = ((2*page_size+1)<<6)+(xclks_per_row>>5);
-    else
-	fifo_on = (3*page_size+2)<<6;
-
-    dsp_xclks_per_row = xclks_per_row>>dsp_precision;
-    dsp_on = fifo_on>>dsp_precision;
-    dsp_off = fifo_off>>dsp_precision;
-
-    pll->dsp_config = (dsp_xclks_per_row & 0x3fff) |
-		      ((dsp_loop_latency & 0xf)<<16) |
-		      ((dsp_precision & 7)<<20);
-    pll->dsp_on_off = (dsp_on & 0x7ff) | ((dsp_off & 0x7ff)<<16);
-    return 0;
+	/* fifo_on<<6 */
+	if (xclks_per_row >= (page_size << 11))
+		fifo_on =
+		    ((2 * page_size + 1) << 6) + (xclks_per_row >> 5);
+	else
+		fifo_on = (3 * page_size + 2) << 6;
+
+	dsp_xclks_per_row = xclks_per_row >> dsp_precision;
+	dsp_on = fifo_on >> dsp_precision;
+	dsp_off = fifo_off >> dsp_precision;
+
+	pll->dsp_config = (dsp_xclks_per_row & 0x3fff) |
+	    ((dsp_loop_latency & 0xf) << 16) | ((dsp_precision & 7) << 20);
+	pll->dsp_on_off = (dsp_on & 0x7ff) | ((dsp_off & 0x7ff) << 16);
+	return 0;
 }
 
-static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
+static int aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per,
 			    struct pll_ct *pll)
 {
-    u32 q, x;			/* x is a workaround for sparc64-linux-gcc */
-    x = x;			/* x is a workaround for sparc64-linux-gcc */
-
-    pll->pll_ref_div = info->pll_per*2*255/info->ref_clk_per;
-
-    /* FIXME: use the VTB/GTB /3 post divider if it's better suited */
-    q = info->ref_clk_per*pll->pll_ref_div*4/info->mclk_per;	/* actually 8*q */
-    if (q < 16*8 || q > 255*8)
-	FAIL("mclk out of range");
-    else if (q < 32*8)
-	pll->mclk_post_div_real = 8;
-    else if (q < 64*8)
-	pll->mclk_post_div_real = 4;
-    else if (q < 128*8)
-	pll->mclk_post_div_real = 2;
-    else
-	pll->mclk_post_div_real = 1;
-    pll->mclk_fb_div = q*pll->mclk_post_div_real/8;
-
-    /* FIXME: use the VTB/GTB /{3,6,12} post dividers if they're better suited */
-    q = info->ref_clk_per*pll->pll_ref_div*4/vclk_per;	/* actually 8*q */
-    if (q < 16*8 || q > 255*8)
-	FAIL("vclk out of range");
-    else if (q < 32*8)
-	pll->vclk_post_div_real = 8;
-    else if (q < 64*8)
-	pll->vclk_post_div_real = 4;
-    else if (q < 128*8)
-	pll->vclk_post_div_real = 2;
-    else
-	pll->vclk_post_div_real = 1;
-    pll->vclk_fb_div = q*pll->vclk_post_div_real/8;
-    return 0;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 q, x;		/* x is a workaround for sparc64-linux-gcc */
+	x = x;			/* x is a workaround for sparc64-linux-gcc */
+
+	pll->pll_ref_div = par->pll_per * 2 * 255 / par->ref_clk_per;
+
+	/* FIXME: use the VTB/GTB /3 post divider if it's better suited */
+	q = par->ref_clk_per * pll->pll_ref_div * 4 / par->mclk_per;	/* actually 8*q */
+	if (q < 16 * 8 || q > 255 * 8)
+		FAIL("mclk out of range");
+	else if (q < 32 * 8)
+		pll->mclk_post_div_real = 8;
+	else if (q < 64 * 8)
+		pll->mclk_post_div_real = 4;
+	else if (q < 128 * 8)
+		pll->mclk_post_div_real = 2;
+	else
+		pll->mclk_post_div_real = 1;
+	pll->mclk_fb_div = q * pll->mclk_post_div_real / 8;
+
+	/* FIXME: use the VTB/GTB /{3,6,12} post dividers if they're better suited */
+	q = par->ref_clk_per * pll->pll_ref_div * 4 / vclk_per;	/* actually 8*q */
+	if (q < 16 * 8 || q > 255 * 8)
+		FAIL("vclk out of range");
+	else if (q < 32 * 8)
+		pll->vclk_post_div_real = 8;
+	else if (q < 64 * 8)
+		pll->vclk_post_div_real = 4;
+	else if (q < 128 * 8)
+		pll->vclk_post_div_real = 2;
+	else
+		pll->vclk_post_div_real = 1;
+	pll->vclk_fb_div = q * pll->vclk_post_div_real / 8;
+	return 0;
 }
 
-void aty_calc_pll_ct(const struct fb_info_aty *info, struct pll_ct *pll)
+void aty_calc_pll_ct(const struct fb_info *info, struct pll_ct *pll)
 {
-    u8 mpostdiv = 0;
-    u8 vpostdiv = 0;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u8 mpostdiv = 0;
+	u8 vpostdiv = 0;
 
-    if (M64_HAS(SDRAM_MAGIC_PLL) && (info->ram_type >= SDRAM))
-	pll->pll_gen_cntl = 0x04;
-    else
-	pll->pll_gen_cntl = 0x84;
+	if (M64_HAS(SDRAM_MAGIC_PLL) && (par->ram_type >= SDRAM))
+		pll->pll_gen_cntl = 0x04;
+	else
+		pll->pll_gen_cntl = 0x84;
 
-    switch (pll->mclk_post_div_real) {
+	switch (pll->mclk_post_div_real) {
 	case 1:
-	    mpostdiv = 0;
-	    break;
+		mpostdiv = 0;
+		break;
 	case 2:
-	    mpostdiv = 1;
-	    break;
+		mpostdiv = 1;
+		break;
 	case 3:
-	    mpostdiv = 4;
-	    break;
+		mpostdiv = 4;
+		break;
 	case 4:
-	    mpostdiv = 2;
-	    break;
+		mpostdiv = 2;
+		break;
 	case 8:
-	    mpostdiv = 3;
-	    break;
-    }
-    pll->pll_gen_cntl |= mpostdiv<<4;	/* mclk */
+		mpostdiv = 3;
+		break;
+	}
+	pll->pll_gen_cntl |= mpostdiv << 4;	/* mclk */
 
-    if (M64_HAS(MAGIC_POSTDIV))
-	pll->pll_ext_cntl = 0;
-    else
-    	pll->pll_ext_cntl = mpostdiv;	/* xclk == mclk */
+	if (M64_HAS(MAGIC_POSTDIV))
+		pll->pll_ext_cntl = 0;
+	else
+		pll->pll_ext_cntl = mpostdiv;	/* xclk == mclk */
 
-    switch (pll->vclk_post_div_real) {
+	switch (pll->vclk_post_div_real) {
 	case 2:
-	    vpostdiv = 1;
-	    break;
+		vpostdiv = 1;
+		break;
 	case 3:
-	    pll->pll_ext_cntl |= 0x10;
+		pll->pll_ext_cntl |= 0x10;
 	case 1:
-	    vpostdiv = 0;
-	    break;
+		vpostdiv = 0;
+		break;
 	case 6:
-	    pll->pll_ext_cntl |= 0x10;
+		pll->pll_ext_cntl |= 0x10;
 	case 4:
-	    vpostdiv = 2;
-	    break;
+		vpostdiv = 2;
+		break;
 	case 12:
-	    pll->pll_ext_cntl |= 0x10;
+		pll->pll_ext_cntl |= 0x10;
 	case 8:
-	    vpostdiv = 3;
-	    break;
-    }
+		vpostdiv = 3;
+		break;
+	}
 
-    pll->pll_vclk_cntl = 0x03;	/* VCLK = PLL_VCLK/VCLKx_POST */
-    pll->vclk_post_div = vpostdiv;
+	pll->pll_vclk_cntl = 0x03;	/* VCLK = PLL_VCLK/VCLKx_POST */
+	pll->vclk_post_div = vpostdiv;
 }
 
-static int aty_var_to_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
+static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per,
 			     u8 bpp, union aty_pll *pll)
 {
-    int err;
-
-    if ((err = aty_valid_pll_ct(info, vclk_per, &pll->ct)))
-	return err;
-    if (M64_HAS(GTB_DSP) && (err = aty_dsp_gt(info, bpp, &pll->ct)))
-	return err;
-    aty_calc_pll_ct(info, &pll->ct);
-    return 0;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	int err;
+
+	if ((err = aty_valid_pll_ct(info, vclk_per, &pll->ct)))
+		return err;
+	if (M64_HAS(GTB_DSP) && (err = aty_dsp_gt(info, bpp, &pll->ct)))
+		return err;
+	aty_calc_pll_ct(info, &pll->ct);
+	return 0;
 }
 
-static u32 aty_pll_ct_to_var(const struct fb_info_aty *info,
+static u32 aty_pll_ct_to_var(const struct fb_info *info,
 			     const union aty_pll *pll)
 {
-    u32 ref_clk_per = info->ref_clk_per;
-    u8 pll_ref_div = pll->ct.pll_ref_div;
-    u8 vclk_fb_div = pll->ct.vclk_fb_div;
-    u8 vclk_post_div = pll->ct.vclk_post_div_real;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+
+	u32 ref_clk_per = par->ref_clk_per;
+	u8 pll_ref_div = pll->ct.pll_ref_div;
+	u8 vclk_fb_div = pll->ct.vclk_fb_div;
+	u8 vclk_post_div = pll->ct.vclk_post_div_real;
 
-    return ref_clk_per*pll_ref_div*vclk_post_div/vclk_fb_div/2;
+	return ref_clk_per * pll_ref_div * vclk_post_div / vclk_fb_div / 2;
 }
 
-void aty_set_pll_ct(const struct fb_info_aty *info, const union aty_pll *pll)
+void aty_set_pll_ct(const struct fb_info *info,
+		    const union aty_pll *pll)
 {
-    aty_st_pll(PLL_REF_DIV, pll->ct.pll_ref_div, info);
-    aty_st_pll(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, info);
-    aty_st_pll(MCLK_FB_DIV, pll->ct.mclk_fb_div, info);
-    aty_st_pll(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, info);
-    aty_st_pll(VCLK_POST_DIV, pll->ct.vclk_post_div, info);
-    aty_st_pll(VCLK0_FB_DIV, pll->ct.vclk_fb_div, info);
-    aty_st_pll(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, info);
-
-    if (M64_HAS(GTB_DSP)) {
-	if (M64_HAS(XL_DLL))
-	    aty_st_pll(DLL_CNTL, 0x80, info);
-	else if (info->ram_type >= SDRAM)
-	    aty_st_pll(DLL_CNTL, 0xa6, info);
-	else
-	    aty_st_pll(DLL_CNTL, 0xa0, info);
-	aty_st_pll(VFC_CNTL, 0x1b, info);
-	aty_st_le32(DSP_CONFIG, pll->ct.dsp_config, info);
-	aty_st_le32(DSP_ON_OFF, pll->ct.dsp_on_off, info);
-    }
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+
+	aty_st_pll(PLL_REF_DIV, pll->ct.pll_ref_div, par);
+	aty_st_pll(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, par);
+	aty_st_pll(MCLK_FB_DIV, pll->ct.mclk_fb_div, par);
+	aty_st_pll(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, par);
+	aty_st_pll(VCLK_POST_DIV, pll->ct.vclk_post_div, par);
+	aty_st_pll(VCLK0_FB_DIV, pll->ct.vclk_fb_div, par);
+	aty_st_pll(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, par);
+
+	if (M64_HAS(GTB_DSP)) {
+		if (M64_HAS(XL_DLL))
+			aty_st_pll(DLL_CNTL, 0x80, par);
+		else if (par->ram_type >= SDRAM)
+			aty_st_pll(DLL_CNTL, 0xa6, par);
+		else
+			aty_st_pll(DLL_CNTL, 0xa0, par);
+		aty_st_pll(VFC_CNTL, 0x1b, par);
+		aty_st_le32(DSP_CONFIG, pll->ct.dsp_config, par);
+		aty_st_le32(DSP_ON_OFF, pll->ct.dsp_on_off, par);
+	}
 }
 
 static int dummy(void)
 {
-    return 0;
+	return 0;
 }
 
 const struct aty_dac_ops aty_dac_ct = {
-    set_dac:	(void *)dummy,
+	set_dac:(void *) dummy,
 };
 
 const struct aty_pll_ops aty_pll_ct = {
-    var_to_pll:	aty_var_to_pll_ct,
-    pll_to_var:	aty_pll_ct_to_var,
-    set_pll:	aty_set_pll_ct,
+	var_to_pll:aty_var_to_pll_ct,
+	pll_to_var:aty_pll_ct_to_var,
+	set_pll:aty_set_pll_ct,
 };
-
diff --git a/drivers/video/aty/mach64_cursor.c b/drivers/video/aty/mach64_cursor.c
index d84d47b50318..5ac49784efd6 100644
--- a/drivers/video/aty/mach64_cursor.c
+++ b/drivers/video/aty/mach64_cursor.c
@@ -18,7 +18,7 @@
 #include <asm/fbio.h>
 #endif
 
-#include "mach64.h"
+#include <video/mach64.h>
 #include "atyfb.h"
 
 
@@ -33,21 +33,20 @@
 static const u8 cursor_pixel_map[2] = { 0, 15 };
 static const u8 cursor_color_map[2] = { 0, 0xff };
 
-static const u8 cursor_bits_lookup[16] =
-{
+static const u8 cursor_bits_lookup[16] = {
 	0x00, 0x40, 0x10, 0x50, 0x04, 0x44, 0x14, 0x54,
 	0x01, 0x41, 0x11, 0x51, 0x05, 0x45, 0x15, 0x55
 };
 
-static const u8 cursor_mask_lookup[16] =
-{
+static const u8 cursor_mask_lookup[16] = {
 	0xaa, 0x2a, 0x8a, 0x0a, 0xa2, 0x22, 0x82, 0x02,
 	0xa8, 0x28, 0x88, 0x08, 0xa0, 0x20, 0x80, 0x00
 };
 
-void aty_set_cursor_color(struct fb_info_aty *fb)
+void aty_set_cursor_color(struct fb_info *info)
 {
-	struct aty_cursor *c = fb->cursor;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	struct aty_cursor *c = par->cursor;
 	const u8 *pixel = cursor_pixel_map;	/* ++Geert: Why?? */
 	const u8 *red = cursor_color_map;
 	const u8 *green = cursor_color_map;
@@ -58,26 +57,28 @@ void aty_set_cursor_color(struct fb_info_aty *fb)
 		return;
 
 #ifdef __sparc__
-	if (fb->mmaped && (!fb->fb_info.display_fg
-	    || fb->fb_info.display_fg->vc_num == fb->vtconsole))
+	if (par->mmaped && (!info->display_fg
+			   || info->display_fg->vc_num ==
+			   par->vtconsole))
 		return;
 #endif
 
 	for (i = 0; i < 2; i++) {
-		c->color[i] =  (u32)red[i] << 24;
-		c->color[i] |= (u32)green[i] << 16;
- 		c->color[i] |= (u32)blue[i] <<  8;
- 		c->color[i] |= (u32)pixel[i];
+		c->color[i] = (u32) red[i] << 24;
+		c->color[i] |= (u32) green[i] << 16;
+		c->color[i] |= (u32) blue[i] << 8;
+		c->color[i] |= (u32) pixel[i];
 	}
 
-	wait_for_fifo(2, fb);
-	aty_st_le32(CUR_CLR0, c->color[0], fb);
-	aty_st_le32(CUR_CLR1, c->color[1], fb);
+	wait_for_fifo(2, par);
+	aty_st_le32(CUR_CLR0, c->color[0], par);
+	aty_st_le32(CUR_CLR1, c->color[1], par);
 }
 
-void aty_set_cursor_shape(struct fb_info_aty *fb)
+void aty_set_cursor_shape(struct fb_info *info)
 {
-	struct aty_cursor *c = fb->cursor;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	struct aty_cursor *c = par->cursor;
 	u8 *ram, m, b;
 	int x, y;
 
@@ -85,8 +86,9 @@ void aty_set_cursor_shape(struct fb_info_aty *fb)
 		return;
 
 #ifdef __sparc__
-	if (fb->mmaped && (!fb->fb_info.display_fg
-	    || fb->fb_info.display_fg->vc_num == fb->vtconsole))
+	if (par->mmaped && (!info->display_fg
+			   || info->display_fg->vc_num ==
+			   par->vtconsole))
 		return;
 #endif
 
@@ -95,26 +97,24 @@ void aty_set_cursor_shape(struct fb_info_aty *fb)
 		for (x = 0; x < c->size.x >> 2; x++) {
 			m = c->mask[x][y];
 			b = c->bits[x][y];
-			fb_writeb (cursor_mask_lookup[m >> 4] |
-				   cursor_bits_lookup[(b & m) >> 4],
-				   ram++);
-			fb_writeb (cursor_mask_lookup[m & 0x0f] |
-				   cursor_bits_lookup[(b & m) & 0x0f],
-				   ram++);
+			fb_writeb(cursor_mask_lookup[m >> 4] |
+				  cursor_bits_lookup[(b & m) >> 4], ram++);
+			fb_writeb(cursor_mask_lookup[m & 0x0f] |
+				  cursor_bits_lookup[(b & m) & 0x0f],
+				  ram++);
 		}
-		for ( ; x < 8; x++) {
-			fb_writeb (0xaa, ram++);
-			fb_writeb (0xaa, ram++);
+		for (; x < 8; x++) {
+			fb_writeb(0xaa, ram++);
+			fb_writeb(0xaa, ram++);
 		}
 	}
-	fb_memset (ram, 0xaa, (64 - c->size.y) * 16);
+	fb_memset(ram, 0xaa, (64 - c->size.y) * 16);
 }
 
-static void
-aty_set_cursor(struct fb_info_aty *fb, int on)
+static void aty_set_cursor(struct fb_info *info, int on)
 {
-	struct atyfb_par *par = &fb->current_par;
-	struct aty_cursor *c = fb->cursor;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	struct aty_cursor *c = par->cursor;
 	u16 xoff, yoff;
 	int x, y;
 
@@ -122,8 +122,9 @@ aty_set_cursor(struct fb_info_aty *fb, int on)
 		return;
 
 #ifdef __sparc__
-	if (fb->mmaped && (!fb->fb_info.display_fg
-	    || fb->fb_info.display_fg->vc_num == fb->vtconsole))
+	if (par->mmaped && (!info->display_fg
+			   || info->display_fg->vc_num ==
+			   par->vtconsole))
 		return;
 #endif
 
@@ -144,67 +145,72 @@ aty_set_cursor(struct fb_info_aty *fb, int on)
 			yoff = 0;
 		}
 
-		wait_for_fifo(4, fb);
-		aty_st_le32(CUR_OFFSET, (c->offset >> 3) + (yoff << 1), fb);
+		wait_for_fifo(4, par);
+		aty_st_le32(CUR_OFFSET, (c->offset >> 3) + (yoff << 1),
+			    par);
 		aty_st_le32(CUR_HORZ_VERT_OFF,
-			    ((u32)(64 - c->size.y + yoff) << 16) | xoff, fb);
-		aty_st_le32(CUR_HORZ_VERT_POSN, ((u32)y << 16) | x, fb);
-		aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, fb)
-						       | HWCURSOR_ENABLE, fb);
+			    ((u32) (64 - c->size.y + yoff) << 16) | xoff,
+			    par);
+		aty_st_le32(CUR_HORZ_VERT_POSN, ((u32) y << 16) | x, par);
+		aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, par)
+			    | HWCURSOR_ENABLE, par);
 	} else {
-		wait_for_fifo(1, fb);
+		wait_for_fifo(1, par);
 		aty_st_le32(GEN_TEST_CNTL,
-			    aty_ld_le32(GEN_TEST_CNTL, fb) & ~HWCURSOR_ENABLE,
-			    fb);
+			    aty_ld_le32(GEN_TEST_CNTL,
+					par) & ~HWCURSOR_ENABLE, par);
 	}
-	if (fb->blitter_may_be_busy)
-		wait_for_idle(fb);
+	if (par->blitter_may_be_busy)
+		wait_for_idle(par);
 }
 
-static void
-aty_cursor_timer_handler(unsigned long dev_addr)
+static void aty_cursor_timer_handler(unsigned long dev_addr)
 {
-	struct fb_info_aty *fb = (struct fb_info_aty *)dev_addr;
+	struct fb_info *info = (struct fb_info *) dev_addr;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
 
-	if (!fb->cursor)
+	if (!par->cursor)
 		return;
 
-	if (!fb->cursor->enable)
+	if (!par->cursor->enable)
 		goto out;
 
-	if (fb->cursor->vbl_cnt && --fb->cursor->vbl_cnt == 0) {
-		fb->cursor->on ^= 1;
-		aty_set_cursor(fb, fb->cursor->on);
-		fb->cursor->vbl_cnt = fb->cursor->blink_rate;
+	if (par->cursor->vbl_cnt && --par->cursor->vbl_cnt == 0) {
+		par->cursor->on ^= 1;
+		aty_set_cursor(info, par->cursor->on);
+		par->cursor->vbl_cnt = par->cursor->blink_rate;
 	}
 
-out:
-	fb->cursor->timer->expires = jiffies + (HZ / 50);
-	add_timer(fb->cursor->timer);
+      out:
+	par->cursor->timer->expires = jiffies + (HZ / 50);
+	add_timer(par->cursor->timer);
 }
 
 void atyfb_cursor(struct display *p, int mode, int x, int y)
 {
-	struct fb_info_aty *fb = (struct fb_info_aty *)p->fb_info;
-	struct aty_cursor *c = fb->cursor;
+	struct fb_info *info = p->fb_info;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	struct aty_cursor *c = par->cursor;
 
 	if (!c)
 		return;
 
 #ifdef __sparc__
-	if (fb->mmaped && (!fb->fb_info.display_fg
-	    || fb->fb_info.display_fg->vc_num == fb->vtconsole))
+	if (par->mmaped && (!info->display_fg
+			   || info->display_fg->vc_num ==
+			   par->vtconsole))
 		return;
 #endif
 
 	x *= fontwidth(p);
 	y *= fontheight(p);
-	if (c->pos.x == x && c->pos.y == y && (mode == CM_ERASE) == !c->enable)
+	if (c->pos.x == x && c->pos.y == y
+	    && (mode == CM_ERASE) == !c->enable)
 		return;
 
 	c->enable = 0;
 	if (c->on)
-		aty_set_cursor(fb, 0);
+		aty_set_cursor(info, 0);
 	c->pos.x = x;
 	c->pos.y = y;
 
@@ -216,7 +222,7 @@ void atyfb_cursor(struct display *p, int mode, int x, int y)
 	case CM_DRAW:
 	case CM_MOVE:
 		if (c->on)
-			aty_set_cursor(fb, 1);
+			aty_set_cursor(info, 1);
 		else
 			c->vbl_cnt = CURSOR_DRAW_DELAY;
 		c->enable = 1;
@@ -224,7 +230,7 @@ void atyfb_cursor(struct display *p, int mode, int x, int y)
 	}
 }
 
-struct aty_cursor * __init aty_init_cursor(struct fb_info_aty *fb)
+struct aty_cursor *__init aty_init_cursor(struct fb_info *info)
 {
 	struct aty_cursor *cursor;
 	unsigned long addr;
@@ -242,19 +248,19 @@ struct aty_cursor * __init aty_init_cursor(struct fb_info_aty *fb)
 	memset(cursor->timer, 0, sizeof(*cursor->timer));
 
 	cursor->blink_rate = DEFAULT_CURSOR_BLINK_RATE;
-	fb->total_vram -= PAGE_SIZE;
-	cursor->offset = fb->total_vram;
+	info->fix.smem_len -= PAGE_SIZE;
+	cursor->offset = info->fix.smem_len;
 
 #ifdef __sparc__
-	addr = fb->frame_buffer - 0x800000 + cursor->offset;
-	cursor->ram = (u8 *)addr;
+	addr = info->screen_base - 0x800000 + cursor->offset;
+	cursor->ram = (u8 *) addr;
 #else
 #ifdef __BIG_ENDIAN
-	addr = fb->frame_buffer_phys - 0x800000 + cursor->offset;
-	cursor->ram = (u8 *)ioremap(addr, 1024);
+	addr = info->fix.smem_start - 0x800000 + cursor->offset;
+	cursor->ram = (u8 *) ioremap(addr, 1024);
 #else
-	addr = fb->frame_buffer + cursor->offset;
-	cursor->ram = (u8 *)addr;
+	addr = (unsigned long) info->screen_base + cursor->offset;
+	cursor->ram = (u8 *) addr;
 #endif
 #endif
 
@@ -265,41 +271,42 @@ struct aty_cursor * __init aty_init_cursor(struct fb_info_aty *fb)
 
 	init_timer(cursor->timer);
 	cursor->timer->expires = jiffies + (HZ / 50);
-	cursor->timer->data = (unsigned long)fb;
+	cursor->timer->data = (unsigned long) info;
 	cursor->timer->function = aty_cursor_timer_handler;
 	add_timer(cursor->timer);
-
 	return cursor;
 }
 
 int atyfb_set_font(struct display *d, int width, int height)
 {
-    struct fb_info_aty *fb = (struct fb_info_aty *)d->fb_info;
-    struct aty_cursor *c = fb->cursor;
-    int i, j;
-
-    if (c) {
-	if (!width || !height) {
-	    width = 8;
-	    height = 16;
-	}
+	struct fb_info *info = d->fb_info;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	struct aty_cursor *c = par->cursor;
+	int i, j;
+
+	if (c) {
+		if (!width || !height) {
+			width = 8;
+			height = 16;
+		}
 
-	c->hot.x = 0;
-	c->hot.y = 0;
-	c->size.x = width;
-	c->size.y = height;
+		c->hot.x = 0;
+		c->hot.y = 0;
+		c->size.x = width;
+		c->size.y = height;
 
-	memset(c->bits, 0xff, sizeof(c->bits));
-	memset(c->mask, 0, sizeof(c->mask));
+		memset(c->bits, 0xff, sizeof(c->bits));
+		memset(c->mask, 0, sizeof(c->mask));
 
-	for (i = 0, j = width; j >= 0; j -= 8, i++) {
-	    c->mask[i][height-2] = (j >= 8) ? 0xff : (0xff << (8 - j));
-	    c->mask[i][height-1] = (j >= 8) ? 0xff : (0xff << (8 - j));
-	}
+		for (i = 0, j = width; j >= 0; j -= 8, i++) {
+			c->mask[i][height - 2] =
+			    (j >= 8) ? 0xff : (0xff << (8 - j));
+			c->mask[i][height - 1] =
+			    (j >= 8) ? 0xff : (0xff << (8 - j));
+		}
 
-	aty_set_cursor_color(fb);
-	aty_set_cursor_shape(fb);
-    }
-    return 1;
+		aty_set_cursor_color(info);
+		aty_set_cursor_shape(info);
+	}
+	return 1;
 }
-
diff --git a/drivers/video/aty/mach64_gx.c b/drivers/video/aty/mach64_gx.c
index 25ea5837a03a..02639730591d 100644
--- a/drivers/video/aty/mach64_gx.c
+++ b/drivers/video/aty/mach64_gx.c
@@ -11,18 +11,18 @@
 
 #include <video/fbcon.h>
 
-#include "mach64.h"
+#include <video/mach64.h>
 #include "atyfb.h"
 
 /* Definitions for the ICS 2595 == ATI 18818_1 Clockchip */
 
-#define REF_FREQ_2595       1432  /*  14.33 MHz  (exact   14.31818) */
-#define REF_DIV_2595          46  /* really 43 on ICS 2595 !!!  */
-                                  /* ohne Prescaler */
-#define MAX_FREQ_2595      15938  /* 159.38 MHz  (really 170.486) */
-#define MIN_FREQ_2595       8000  /*  80.00 MHz  (        85.565) */
-                                  /* mit Prescaler 2, 4, 8 */
-#define ABS_MIN_FREQ_2595   1000  /*  10.00 MHz  (really  10.697) */
+#define REF_FREQ_2595       1432	/*  14.33 MHz  (exact   14.31818) */
+#define REF_DIV_2595          46	/* really 43 on ICS 2595 !!!  */
+				  /* ohne Prescaler */
+#define MAX_FREQ_2595      15938	/* 159.38 MHz  (really 170.486) */
+#define MIN_FREQ_2595       8000	/*  80.00 MHz  (        85.565) */
+				  /* mit Prescaler 2, 4, 8 */
+#define ABS_MIN_FREQ_2595   1000	/*  10.00 MHz  (really  10.697) */
 #define N_ADJ_2595           257
 
 #define STOP_BITS_2595     0x1800
@@ -42,26 +42,25 @@
      *  Support Functions
      */
 
-static void aty_dac_waste4(const struct fb_info_aty *info)
+static void aty_dac_waste4(const struct atyfb_par *par)
 {
-  (void)aty_ld_8(DAC_REGS, info);
+	(void) aty_ld_8(DAC_REGS, par);
 
-  (void)aty_ld_8(DAC_REGS + 2, info);
-  (void)aty_ld_8(DAC_REGS + 2, info);
-  (void)aty_ld_8(DAC_REGS + 2, info);
-  (void)aty_ld_8(DAC_REGS + 2, info);
+	(void) aty_ld_8(DAC_REGS + 2, par);
+	(void) aty_ld_8(DAC_REGS + 2, par);
+	(void) aty_ld_8(DAC_REGS + 2, par);
+	(void) aty_ld_8(DAC_REGS + 2, par);
 }
 
-static void aty_StrobeClock(const struct fb_info_aty *info)
+static void aty_StrobeClock(const struct atyfb_par *par)
 {
-    u8 tmp;
+	u8 tmp;
 
-    udelay(26);
+	udelay(26);
 
-    tmp = aty_ld_8(CLOCK_CNTL, info);
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, tmp | CLOCK_STROBE, info);
-
-    return;
+	tmp = aty_ld_8(CLOCK_CNTL, par);
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, tmp | CLOCK_STROBE, par);
+	return;
 }
 
 
@@ -69,120 +68,136 @@ static void aty_StrobeClock(const struct fb_info_aty *info)
      *  IBM RGB514 DAC and Clock Chip
      */
 
-static void aty_st_514(int offset, u8 val, const struct fb_info_aty *info)
+static void aty_st_514(int offset, u8 val, const struct atyfb_par *par)
 {
-    aty_st_8(DAC_CNTL, 1, info);
-    /* right addr byte */
-    aty_st_8(DAC_W_INDEX, offset & 0xff, info);
-    /* left addr byte */
-    aty_st_8(DAC_DATA, (offset >> 8) & 0xff, info);
-    aty_st_8(DAC_MASK, val, info);
-    aty_st_8(DAC_CNTL, 0, info);
+	aty_st_8(DAC_CNTL, 1, par);
+	/* right addr byte */
+	aty_st_8(DAC_W_INDEX, offset & 0xff, par);
+	/* left addr byte */
+	aty_st_8(DAC_DATA, (offset >> 8) & 0xff, par);
+	aty_st_8(DAC_MASK, val, par);
+	aty_st_8(DAC_CNTL, 0, par);
 }
 
-static int aty_set_dac_514(const struct fb_info_aty *info,
+static int aty_set_dac_514(const struct fb_info *info,
 			   const union aty_pll *pll, u32 bpp, u32 accel)
 {
-    static struct {
-	u8 pixel_dly;
-	u8 misc2_cntl;
-	u8 pixel_rep;
-	u8 pixel_cntl_index;
-	u8 pixel_cntl_v1;
-    } tab[3] = {
-	{ 0, 0x41, 0x03, 0x71, 0x45 },	/* 8 bpp */
-	{ 0, 0x45, 0x04, 0x0c, 0x01 },	/* 555 */
-	{ 0, 0x45, 0x06, 0x0e, 0x00 },	/* XRGB */
-    };
-    int i;
-
-    switch (bpp) {
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	static struct {
+		u8 pixel_dly;
+		u8 misc2_cntl;
+		u8 pixel_rep;
+		u8 pixel_cntl_index;
+		u8 pixel_cntl_v1;
+	} tab[3] = {
+		{
+		0, 0x41, 0x03, 0x71, 0x45},	/* 8 bpp */
+		{
+		0, 0x45, 0x04, 0x0c, 0x01},	/* 555 */
+		{
+		0, 0x45, 0x06, 0x0e, 0x00},	/* XRGB */
+	};
+	int i;
+
+	switch (bpp) {
 	case 8:
 	default:
-	    i = 0;
-	    break;
+		i = 0;
+		break;
 	case 16:
-	    i = 1;
-	    break;
+		i = 1;
+		break;
 	case 32:
-	    i = 2;
-	    break;
-    }
-    aty_st_514(0x90, 0x00, info);		/* VRAM Mask Low */
-    aty_st_514(0x04, tab[i].pixel_dly, info);	/* Horizontal Sync Control */
-    aty_st_514(0x05, 0x00, info);		/* Power Management */
-    aty_st_514(0x02, 0x01, info);		/* Misc Clock Control */
-    aty_st_514(0x71, tab[i].misc2_cntl, info);	/* Misc Control 2 */
-    aty_st_514(0x0a, tab[i].pixel_rep, info);	/* Pixel Format */
-    aty_st_514(tab[i].pixel_cntl_index, tab[i].pixel_cntl_v1, info);
-			/* Misc Control 2 / 16 BPP Control / 32 BPP Control */
-    return 0;
+		i = 2;
+		break;
+	}
+	aty_st_514(0x90, 0x00, par);	/* VRAM Mask Low */
+	aty_st_514(0x04, tab[i].pixel_dly, par);	/* Horizontal Sync Control */
+	aty_st_514(0x05, 0x00, par);	/* Power Management */
+	aty_st_514(0x02, 0x01, par);	/* Misc Clock Control */
+	aty_st_514(0x71, tab[i].misc2_cntl, par);	/* Misc Control 2 */
+	aty_st_514(0x0a, tab[i].pixel_rep, par);	/* Pixel Format */
+	aty_st_514(tab[i].pixel_cntl_index, tab[i].pixel_cntl_v1, par);
+	/* Misc Control 2 / 16 BPP Control / 32 BPP Control */
+	return 0;
 }
 
-static int aty_var_to_pll_514(const struct fb_info_aty *info, u32 vclk_per,
+static int aty_var_to_pll_514(const struct fb_info *info, u32 vclk_per,
 			      u8 bpp, union aty_pll *pll)
 {
-    /*
-     *  FIXME: use real calculations instead of using fixed values from the old
-     *	       driver
-     */
-    static struct {
-	u32 limit;	/* pixlock rounding limit (arbitrary) */
-	u8 m;		/* (df<<6) | vco_div_count */
-	u8 n;		/* ref_div_count */
-    } RGB514_clocks[7] = {
-	{  8000, (3<<6) | 20, 9 },	/*  7395 ps / 135.2273 MHz */
-	{ 10000, (1<<6) | 19, 3 },	/*  9977 ps / 100.2273 MHz */
-	{ 13000, (1<<6) |  2, 3 },	/* 12509 ps /  79.9432 MHz */
-	{ 14000, (2<<6) |  8, 7 },	/* 13394 ps /  74.6591 MHz */
-	{ 16000, (1<<6) | 44, 6 },	/* 15378 ps /  65.0284 MHz */
-	{ 25000, (1<<6) | 15, 5 },	/* 17460 ps /  57.2727 MHz */
-	{ 50000, (0<<6) | 53, 7 },	/* 33145 ps /  30.1705 MHz */
-    };
-    int i;
-
-    for (i = 0; i < sizeof(RGB514_clocks)/sizeof(*RGB514_clocks); i++)
-	if (vclk_per <= RGB514_clocks[i].limit) {
-	    pll->ibm514.m = RGB514_clocks[i].m;
-	    pll->ibm514.n = RGB514_clocks[i].n;
-	    return 0;
-	}
-    return -EINVAL;
+	/*
+	 *  FIXME: use real calculations instead of using fixed values from the old
+	 *         driver
+	 */
+	static struct {
+		u32 limit;	/* pixlock rounding limit (arbitrary) */
+		u8 m;		/* (df<<6) | vco_div_count */
+		u8 n;		/* ref_div_count */
+	} RGB514_clocks[7] = {
+		{
+		8000, (3 << 6) | 20, 9},	/*  7395 ps / 135.2273 MHz */
+		{
+		10000, (1 << 6) | 19, 3},	/*  9977 ps / 100.2273 MHz */
+		{
+		13000, (1 << 6) | 2, 3},	/* 12509 ps /  79.9432 MHz */
+		{
+		14000, (2 << 6) | 8, 7},	/* 13394 ps /  74.6591 MHz */
+		{
+		16000, (1 << 6) | 44, 6},	/* 15378 ps /  65.0284 MHz */
+		{
+		25000, (1 << 6) | 15, 5},	/* 17460 ps /  57.2727 MHz */
+		{
+		50000, (0 << 6) | 53, 7},	/* 33145 ps /  30.1705 MHz */
+	};
+	int i;
+
+	for (i = 0; i < sizeof(RGB514_clocks) / sizeof(*RGB514_clocks);
+	     i++)
+		if (vclk_per <= RGB514_clocks[i].limit) {
+			pll->ibm514.m = RGB514_clocks[i].m;
+			pll->ibm514.n = RGB514_clocks[i].n;
+			return 0;
+		}
+	return -EINVAL;
 }
 
-static u32 aty_pll_514_to_var(const struct fb_info_aty *info,
-	                      const union aty_pll *pll)
+static u32 aty_pll_514_to_var(const struct fb_info *info,
+			      const union aty_pll *pll)
 {
-    u8 df, vco_div_count, ref_div_count;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u8 df, vco_div_count, ref_div_count;
 
-    df = pll->ibm514.m >> 6;
-    vco_div_count = pll->ibm514.m & 0x3f;
-    ref_div_count = pll->ibm514.n;
+	df = pll->ibm514.m >> 6;
+	vco_div_count = pll->ibm514.m & 0x3f;
+	ref_div_count = pll->ibm514.n;
 
-    return ((info->ref_clk_per*ref_div_count)<<(3-df))/(vco_div_count+65);
+	return ((par->ref_clk_per * ref_div_count) << (3 - df))/
+	    		(vco_div_count + 65);
 }
 
-static void aty_set_pll_514(const struct fb_info_aty *info,
+static void aty_set_pll_514(const struct fb_info *info,
 			    const union aty_pll *pll)
 {
-    aty_st_514(0x06, 0x02, info);	/* DAC Operation */
-    aty_st_514(0x10, 0x01, info);	/* PLL Control 1 */
-    aty_st_514(0x70, 0x01, info);	/* Misc Control 1 */
-    aty_st_514(0x8f, 0x1f, info);	/* PLL Ref. Divider Input */
-    aty_st_514(0x03, 0x00, info);	/* Sync Control */
-    aty_st_514(0x05, 0x00, info);	/* Power Management */
-    aty_st_514(0x20, pll->ibm514.m, info);	/* F0 / M0 */
-    aty_st_514(0x21, pll->ibm514.n, info);	/* F1 / N0 */
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+
+	aty_st_514(0x06, 0x02, par);	/* DAC Operation */
+	aty_st_514(0x10, 0x01, par);	/* PLL Control 1 */
+	aty_st_514(0x70, 0x01, par);	/* Misc Control 1 */
+	aty_st_514(0x8f, 0x1f, par);	/* PLL Ref. Divider Input */
+	aty_st_514(0x03, 0x00, par);	/* Sync Control */
+	aty_st_514(0x05, 0x00, par);	/* Power Management */
+	aty_st_514(0x20, pll->ibm514.m, par);	/* F0 / M0 */
+	aty_st_514(0x21, pll->ibm514.n, par);	/* F1 / N0 */
 }
 
 const struct aty_dac_ops aty_dac_ibm514 = {
-    set_dac:	aty_set_dac_514,
+	set_dac:aty_set_dac_514,
 };
 
 const struct aty_pll_ops aty_pll_ibm514 = {
-    var_to_pll:	aty_var_to_pll_514,
-    pll_to_var:	aty_pll_514_to_var,
-    set_pll:	aty_set_pll_514,
+	var_to_pll:aty_var_to_pll_514,
+	pll_to_var:aty_pll_514_to_var,
+	set_pll:aty_set_pll_514,
 };
 
 
@@ -190,77 +205,82 @@ const struct aty_pll_ops aty_pll_ibm514 = {
      *  ATI 68860-B DAC
      */
 
-static int aty_set_dac_ATI68860_B(const struct fb_info_aty *info,
-				  const union aty_pll *pll, u32 bpp, u32 accel)
+static int aty_set_dac_ATI68860_B(const struct fb_info *info,
+				  const union aty_pll *pll, u32 bpp,
+				  u32 accel)
 {
-    u32 gModeReg, devSetupRegA, temp, mask;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 gModeReg, devSetupRegA, temp, mask;
 
-    gModeReg = 0;
-    devSetupRegA = 0;
+	gModeReg = 0;
+	devSetupRegA = 0;
 
-    switch (bpp) {
+	switch (bpp) {
 	case 8:
-	    gModeReg = 0x83;
-	    devSetupRegA = 0x60 | 0x00 /*(info->mach64DAC8Bit ? 0x00 : 0x01) */;
-	    break;
+		gModeReg = 0x83;
+		devSetupRegA =
+		    0x60 | 0x00 /*(info->mach64DAC8Bit ? 0x00 : 0x01) */ ;
+		break;
 	case 15:
-	    gModeReg = 0xA0;
-	    devSetupRegA = 0x60;
-	    break;
+		gModeReg = 0xA0;
+		devSetupRegA = 0x60;
+		break;
 	case 16:
-	    gModeReg = 0xA1;
-	    devSetupRegA = 0x60;
-	    break;
+		gModeReg = 0xA1;
+		devSetupRegA = 0x60;
+		break;
 	case 24:
-	    gModeReg = 0xC0;
-	    devSetupRegA = 0x60;
-	    break;
+		gModeReg = 0xC0;
+		devSetupRegA = 0x60;
+		break;
 	case 32:
-	    gModeReg = 0xE3;
-	    devSetupRegA = 0x60;
-	    break;
-    }
-
-    if (!accel) {
-	gModeReg = 0x80;
-	devSetupRegA = 0x61;
-    }
-
-    temp = aty_ld_8(DAC_CNTL, info);
-    aty_st_8(DAC_CNTL, (temp & ~DAC_EXT_SEL_RS2) | DAC_EXT_SEL_RS3, info);
-
-    aty_st_8(DAC_REGS + 2, 0x1D, info);
-    aty_st_8(DAC_REGS + 3, gModeReg, info);
-    aty_st_8(DAC_REGS, 0x02, info);
-
-    temp = aty_ld_8(DAC_CNTL, info);
-    aty_st_8(DAC_CNTL, temp | DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3, info);
-
-    if (info->total_vram < MEM_SIZE_1M)
-	mask = 0x04;
-    else if (info->total_vram == MEM_SIZE_1M)
-	mask = 0x08;
-    else
-	mask = 0x0C;
-
-    /* The following assumes that the BIOS has correctly set R7 of the
-     * Device Setup Register A at boot time.
-     */
-#define A860_DELAY_L	0x80
+		gModeReg = 0xE3;
+		devSetupRegA = 0x60;
+		break;
+	}
+
+	if (!accel) {
+		gModeReg = 0x80;
+		devSetupRegA = 0x61;
+	}
+
+	temp = aty_ld_8(DAC_CNTL, par);
+	aty_st_8(DAC_CNTL, (temp & ~DAC_EXT_SEL_RS2) | DAC_EXT_SEL_RS3,
+		 par);
+
+	aty_st_8(DAC_REGS + 2, 0x1D, par);
+	aty_st_8(DAC_REGS + 3, gModeReg, par);
+	aty_st_8(DAC_REGS, 0x02, par);
+
+	temp = aty_ld_8(DAC_CNTL, par);
+	aty_st_8(DAC_CNTL, temp | DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3, par);
+
+	if (info->fix.smem_len < MEM_SIZE_1M)
+		mask = 0x04;
+	else if (info->fix.smem_len == MEM_SIZE_1M)
+		mask = 0x08;
+	else
+		mask = 0x0C;
 
-    temp = aty_ld_8(DAC_REGS, info);
-    aty_st_8(DAC_REGS, (devSetupRegA | mask) | (temp & A860_DELAY_L), info);
-    temp = aty_ld_8(DAC_CNTL, info);
-    aty_st_8(DAC_CNTL, (temp & ~(DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3)), info);
+	/* The following assumes that the BIOS has correctly set R7 of the
+	 * Device Setup Register A at boot time.
+	 */
+#define A860_DELAY_L	0x80
 
-    aty_st_le32(BUS_CNTL, 0x890e20f1, info);
-    aty_st_le32(DAC_CNTL, 0x47052100, info);
+	temp = aty_ld_8(DAC_REGS, par);
+	aty_st_8(DAC_REGS, (devSetupRegA | mask) | (temp & A860_DELAY_L),
+		 par);
+	temp = aty_ld_8(DAC_CNTL, par);
+	aty_st_8(DAC_CNTL, (temp & ~(DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3)),
+		 par);
 
-    return 0;
+	aty_st_le32(BUS_CNTL, 0x890e20f1, par);
+	aty_st_le32(DAC_CNTL, 0x47052100, par);
+	return 0;
 }
 
 const struct aty_dac_ops aty_dac_ati68860b = {
-    set_dac:	aty_set_dac_ATI68860_B,
+	set_dac:aty_set_dac_ATI68860_B,
 };
 
 
@@ -268,50 +288,52 @@ const struct aty_dac_ops aty_dac_ati68860b = {
      *  AT&T 21C498 DAC
      */
 
-static int aty_set_dac_ATT21C498(const struct fb_info_aty *info,
-				 const union aty_pll *pll, u32 bpp, u32 accel)
+static int aty_set_dac_ATT21C498(const struct fb_info *info,
+				 const union aty_pll *pll, u32 bpp,
+				 u32 accel)
 {
-    u32 dotClock;
-    int muxmode = 0;
-    int DACMask = 0;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 dotClock;
+	int muxmode = 0;
+	int DACMask = 0;
 
-    dotClock = 100000000 / pll->ics2595.period_in_ps;
+	dotClock = 100000000 / pll->ics2595.period_in_ps;
 
-    switch (bpp) {
+	switch (bpp) {
 	case 8:
-	    if (dotClock > 8000) {
-		DACMask = 0x24;
-		muxmode = 1;
-	    } else
-		DACMask = 0x04;
-	    break;
+		if (dotClock > 8000) {
+			DACMask = 0x24;
+			muxmode = 1;
+		} else
+			DACMask = 0x04;
+		break;
 	case 15:
-	    DACMask = 0x16;
-	    break;
+		DACMask = 0x16;
+		break;
 	case 16:
-	    DACMask = 0x36;
-	    break;
+		DACMask = 0x36;
+		break;
 	case 24:
-	    DACMask = 0xE6;
-	    break;
+		DACMask = 0xE6;
+		break;
 	case 32:
-	    DACMask = 0xE6;
-	    break;
-    }
+		DACMask = 0xE6;
+		break;
+	}
 
-    if (1 /* info->mach64DAC8Bit */)
-	DACMask |= 0x02;
+	if (1 /* info->mach64DAC8Bit */ )
+		DACMask |= 0x02;
 
-    aty_dac_waste4(info);
-    aty_st_8(DAC_REGS + 2, DACMask, info);
+	aty_dac_waste4(par);
+	aty_st_8(DAC_REGS + 2, DACMask, par);
 
-    aty_st_le32(BUS_CNTL, 0x890e20f1, info);
-    aty_st_le32(DAC_CNTL, 0x00072000, info);
-    return muxmode;
+	aty_st_le32(BUS_CNTL, 0x890e20f1, par);
+	aty_st_le32(DAC_CNTL, 0x00072000, par);
+	return muxmode;
 }
 
 const struct aty_dac_ops aty_dac_att21c498 = {
-    set_dac:	aty_set_dac_ATT21C498,
+	set_dac:	aty_set_dac_ATT21C498,
 };
 
 
@@ -319,154 +341,155 @@ const struct aty_dac_ops aty_dac_att21c498 = {
      *  ATI 18818 / ICS 2595 Clock Chip
      */
 
-static int aty_var_to_pll_18818(const struct fb_info_aty *info, u32 vclk_per,
-				u8 bpp, union aty_pll *pll)
+static int aty_var_to_pll_18818(const struct fb_info *info,
+				u32 vclk_per, u8 bpp, union aty_pll *pll)
 {
-    u32 MHz100;		/* in 0.01 MHz */
-    u32 program_bits;
-    u32 post_divider;
-
-    /* Calculate the programming word */
-    MHz100 = 100000000 / vclk_per;
-
-    program_bits = -1;
-    post_divider = 1;
-
-    if (MHz100 > MAX_FREQ_2595) {
-	MHz100 = MAX_FREQ_2595;
-	return -EINVAL;
-    } else if (MHz100 < ABS_MIN_FREQ_2595) {
-	program_bits = 0;	/* MHz100 = 257 */
-	return -EINVAL;
-    } else {
-	while (MHz100 < MIN_FREQ_2595) {
-	    MHz100 *= 2;
-	    post_divider *= 2;
+	u32 MHz100;		/* in 0.01 MHz */
+	u32 program_bits;
+	u32 post_divider;
+
+	/* Calculate the programming word */
+	MHz100 = 100000000 / vclk_per;
+
+	program_bits = -1;
+	post_divider = 1;
+
+	if (MHz100 > MAX_FREQ_2595) {
+		MHz100 = MAX_FREQ_2595;
+		return -EINVAL;
+	} else if (MHz100 < ABS_MIN_FREQ_2595) {
+		program_bits = 0;	/* MHz100 = 257 */
+		return -EINVAL;
+	} else {
+		while (MHz100 < MIN_FREQ_2595) {
+			MHz100 *= 2;
+			post_divider *= 2;
+		}
 	}
-    }
-    MHz100 *= 1000;
-    MHz100 = (REF_DIV_2595 * MHz100) / REF_FREQ_2595;
-
-    MHz100 += 500;    /* + 0.5 round */
-    MHz100 /= 1000;
-
-    if (program_bits == -1) {
-	program_bits = MHz100 - N_ADJ_2595;
-	switch (post_divider) {
-	    case 1:
-		program_bits |= 0x0600;
-		break;
-	    case 2:
-		program_bits |= 0x0400;
-		break;
-	    case 4:
-		program_bits |= 0x0200;
-		break;
-	    case 8:
-	    default:
-		break;
+	MHz100 *= 1000;
+	MHz100 = (REF_DIV_2595 * MHz100) / REF_FREQ_2595;
+ 
+	MHz100 += 500;		/* + 0.5 round */
+	MHz100 /= 1000;
+
+	if (program_bits == -1) {
+		program_bits = MHz100 - N_ADJ_2595;
+		switch (post_divider) {
+		case 1:
+			program_bits |= 0x0600;
+			break;
+		case 2:
+			program_bits |= 0x0400;
+			break;
+		case 4:
+			program_bits |= 0x0200;
+			break;
+		case 8:
+		default:
+			break;
+		}
 	}
-    }
 
-    program_bits |= STOP_BITS_2595;
+	program_bits |= STOP_BITS_2595;
 
-    pll->ics2595.program_bits = program_bits;
-    pll->ics2595.locationAddr = 0;
-    pll->ics2595.post_divider = post_divider;
-    pll->ics2595.period_in_ps = vclk_per;
+	pll->ics2595.program_bits = program_bits;
+	pll->ics2595.locationAddr = 0;
+	pll->ics2595.post_divider = post_divider;
+	pll->ics2595.period_in_ps = vclk_per;
 
-    return 0;
+	return 0;
 }
 
-static u32 aty_pll_18818_to_var(const struct fb_info_aty *info,
+static u32 aty_pll_18818_to_var(const struct fb_info *info,
 				const union aty_pll *pll)
 {
-    return(pll->ics2595.period_in_ps);  /* default for now */
+	return (pll->ics2595.period_in_ps);	/* default for now */
 }
 
-static void aty_ICS2595_put1bit(u8 data, const struct fb_info_aty *info)
+static void aty_ICS2595_put1bit(u8 data, const struct atyfb_par *par)
 {
-    u8 tmp;
+	u8 tmp;
 
-    data &= 0x01;
-    tmp = aty_ld_8(CLOCK_CNTL, info);
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, (tmp & ~0x04) | (data << 2),
-	     info);
+	data &= 0x01;
+	tmp = aty_ld_8(CLOCK_CNTL, par);
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset,
+		 (tmp & ~0x04) | (data << 2), par);
 
-    tmp = aty_ld_8(CLOCK_CNTL, info);
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, (tmp & ~0x08) | (0 << 3), info);
+	tmp = aty_ld_8(CLOCK_CNTL, par);
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (0 << 3),
+		 par);
 
-    aty_StrobeClock(info);
+	aty_StrobeClock(par);
 
-    tmp = aty_ld_8(CLOCK_CNTL, info);
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, (tmp & ~0x08) | (1 << 3), info);
+	tmp = aty_ld_8(CLOCK_CNTL, par);
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, (tmp & ~0x08) | (1 << 3),
+		 par);
 
-    aty_StrobeClock(info);
-
-    return;
+	aty_StrobeClock(par);
+	return;
 }
 
-static void aty_set_pll18818(const struct fb_info_aty *info,
+static void aty_set_pll18818(const struct fb_info *info,
 			     const union aty_pll *pll)
 {
-    u32 program_bits;
-    u32 locationAddr;
-
-    u32 i;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 program_bits;
+	u32 locationAddr;
 
-    u8 old_clock_cntl;
-    u8 old_crtc_ext_disp;
+	u32 i;
 
-    old_clock_cntl = aty_ld_8(CLOCK_CNTL, info);
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, 0, info);
+	u8 old_clock_cntl;
+	u8 old_crtc_ext_disp;
 
-    old_crtc_ext_disp = aty_ld_8(CRTC_GEN_CNTL + 3, info);
-    aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24),
-	     info);
+	old_clock_cntl = aty_ld_8(CLOCK_CNTL, par);
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, 0, par);
 
-    mdelay(15); /* delay for 50 (15) ms */
+	old_crtc_ext_disp = aty_ld_8(CRTC_GEN_CNTL + 3, par);
+	aty_st_8(CRTC_GEN_CNTL + 3,
+		 old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24), par);
 
-    program_bits = pll->ics2595.program_bits;
-    locationAddr = pll->ics2595.locationAddr;
+	mdelay(15);		/* delay for 50 (15) ms */
 
-    /* Program the clock chip */
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, 0, info);  /* Strobe = 0 */
-    aty_StrobeClock(info);
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, 1, info);  /* Strobe = 0 */
-    aty_StrobeClock(info);
+	program_bits = pll->ics2595.program_bits;
+	locationAddr = pll->ics2595.locationAddr;
 
-    aty_ICS2595_put1bit(1, info);    /* Send start bits */
-    aty_ICS2595_put1bit(0, info);    /* Start bit */
-    aty_ICS2595_put1bit(0, info);    /* Read / ~Write */
+	/* Program the clock chip */
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, 0, par);	/* Strobe = 0 */
+	aty_StrobeClock(par);
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset, 1, par);	/* Strobe = 0 */
+	aty_StrobeClock(par);
 
-    for (i = 0; i < 5; i++) {	/* Location 0..4 */
-	aty_ICS2595_put1bit(locationAddr & 1, info);
-	locationAddr >>= 1;
-    }
+	aty_ICS2595_put1bit(1, par);	/* Send start bits */
+	aty_ICS2595_put1bit(0, par);	/* Start bit */
+	aty_ICS2595_put1bit(0, par);	/* Read / ~Write */
 
-    for (i = 0; i < 8 + 1 + 2 + 2; i++) {
-	aty_ICS2595_put1bit(program_bits & 1, info);
-	program_bits >>= 1;
-    }
+	for (i = 0; i < 5; i++) {	/* Location 0..4 */
+		aty_ICS2595_put1bit(locationAddr & 1, par);
+		locationAddr >>= 1;
+	}
 
-    mdelay(1); /* delay for 1 ms */
+	for (i = 0; i < 8 + 1 + 2 + 2; i++) {
+		aty_ICS2595_put1bit(program_bits & 1, par);
+		program_bits >>= 1;
+	}
 
-    (void)aty_ld_8(DAC_REGS, info); /* Clear DAC Counter */
-    aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, info);
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset, old_clock_cntl | CLOCK_STROBE,
-	     info);
+	mdelay(1);		/* delay for 1 ms */
 
-    mdelay(50); /* delay for 50 (15) ms */
-    aty_st_8(CLOCK_CNTL + info->clk_wr_offset,
-	     ((pll->ics2595.locationAddr & 0x0F) | CLOCK_STROBE), info);
+	(void) aty_ld_8(DAC_REGS, par);	/* Clear DAC Counter */
+	aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, par);
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset,
+		 old_clock_cntl | CLOCK_STROBE, par);
 
-    return;
+	mdelay(50);		/* delay for 50 (15) ms */
+	aty_st_8(CLOCK_CNTL + par->clk_wr_offset,
+		 ((pll->ics2595.locationAddr & 0x0F) | CLOCK_STROBE), par);
+	return;
 }
 
 const struct aty_pll_ops aty_pll_ati18818_1 = {
-    var_to_pll:	aty_var_to_pll_18818,
-    pll_to_var:	aty_pll_18818_to_var,
-    set_pll:	aty_set_pll18818,
+	var_to_pll:aty_var_to_pll_18818,
+	pll_to_var:aty_pll_18818_to_var,
+	set_pll:aty_set_pll18818,
 };
 
 
@@ -474,112 +497,115 @@ const struct aty_pll_ops aty_pll_ati18818_1 = {
      *  STG 1703 Clock Chip
      */
 
-static int aty_var_to_pll_1703(const struct fb_info_aty *info, u32 vclk_per,
-			       u8 bpp, union aty_pll *pll)
+static int aty_var_to_pll_1703(const struct fb_info *info,
+			       u32 vclk_per, u8 bpp, union aty_pll *pll)
 {
-    u32 mhz100;			/* in 0.01 MHz */
-    u32 program_bits;
-    /* u32 post_divider; */
-    u32 mach64MinFreq, mach64MaxFreq, mach64RefFreq;
-    u32 temp, tempB;
-    u16 remainder, preRemainder;
-    short divider = 0, tempA;
-
-    /* Calculate the programming word */
-    mhz100 = 100000000 / vclk_per;
-    mach64MinFreq = MIN_FREQ_2595;
-    mach64MaxFreq = MAX_FREQ_2595;
-    mach64RefFreq = REF_FREQ_2595;	/* 14.32 MHz */
-
-    /* Calculate program word */
-    if (mhz100 == 0)
-	program_bits = 0xE0;
-    else {
-	if (mhz100 < mach64MinFreq)
-	    mhz100 = mach64MinFreq;
-	if (mhz100 > mach64MaxFreq)
-	    mhz100 = mach64MaxFreq;
-
-	divider = 0;
-	while (mhz100 < (mach64MinFreq << 3)) {
-	    mhz100 <<= 1;
-	    divider += 0x20;
-	}
-
-	temp = (unsigned int)(mhz100);
-	temp = (unsigned int)(temp * (MIN_N_1703 + 2));
-	temp -= (short)(mach64RefFreq << 1);
-
-	tempA = MIN_N_1703;
-	preRemainder = 0xffff;
-
-	do {
-	    tempB = temp;
-	    remainder = tempB % mach64RefFreq;
-	    tempB = tempB / mach64RefFreq;
-
-	    if ((tempB & 0xffff) <= 127 && (remainder <= preRemainder)) {
-		preRemainder = remainder;
-		divider &= ~0x1f;
-		divider |= tempA;
-		divider = (divider & 0x00ff) + ((tempB & 0xff) << 8);
-	    }
-
-	    temp += mhz100;
-	    tempA++;
-	} while (tempA <= (MIN_N_1703 << 1));
+	u32 mhz100;		/* in 0.01 MHz */
+	u32 program_bits;
+	/* u32 post_divider; */
+	u32 mach64MinFreq, mach64MaxFreq, mach64RefFreq;
+	u32 temp, tempB;
+	u16 remainder, preRemainder;
+	short divider = 0, tempA;
+
+	/* Calculate the programming word */
+	mhz100 = 100000000 / vclk_per;
+	mach64MinFreq = MIN_FREQ_2595;
+	mach64MaxFreq = MAX_FREQ_2595;
+	mach64RefFreq = REF_FREQ_2595;	/* 14.32 MHz */
+
+	/* Calculate program word */
+	if (mhz100 == 0)
+		program_bits = 0xE0;
+	else {
+		if (mhz100 < mach64MinFreq)
+			mhz100 = mach64MinFreq;
+		if (mhz100 > mach64MaxFreq)
+			mhz100 = mach64MaxFreq;
+
+		divider = 0;
+		while (mhz100 < (mach64MinFreq << 3)) {
+			mhz100 <<= 1;
+			divider += 0x20;
+		}
 
-	program_bits = divider;
-    }
+		temp = (unsigned int) (mhz100);
+		temp = (unsigned int) (temp * (MIN_N_1703 + 2));
+		temp -= (short) (mach64RefFreq << 1);
+
+		tempA = MIN_N_1703;
+		preRemainder = 0xffff;
+
+		do {
+			tempB = temp;
+			remainder = tempB % mach64RefFreq;
+			tempB = tempB / mach64RefFreq;
+
+			if ((tempB & 0xffff) <= 127
+			    && (remainder <= preRemainder)) {
+				preRemainder = remainder;
+				divider &= ~0x1f;
+				divider |= tempA;
+				divider =
+				    (divider & 0x00ff) +
+				    ((tempB & 0xff) << 8);
+			}
+
+			temp += mhz100;
+			tempA++;
+		} while (tempA <= (MIN_N_1703 << 1));
+
+		program_bits = divider;
+	}
 
-      pll->ics2595.program_bits = program_bits;
-      pll->ics2595.locationAddr = 0;
-      pll->ics2595.post_divider = divider;  /* fuer nix */
-      pll->ics2595.period_in_ps = vclk_per;
+	pll->ics2595.program_bits = program_bits;
+	pll->ics2595.locationAddr = 0;
+	pll->ics2595.post_divider = divider;	/* fuer nix */
+	pll->ics2595.period_in_ps = vclk_per;
 
-      return 0;
+	return 0;
 }
 
-static u32 aty_pll_1703_to_var(const struct fb_info_aty *info,
+static u32 aty_pll_1703_to_var(const struct fb_info *info,
 			       const union aty_pll *pll)
 {
-    return(pll->ics2595.period_in_ps);  /* default for now */
+	return (pll->ics2595.period_in_ps);	/* default for now */
 }
 
-static void aty_set_pll_1703(const struct fb_info_aty *info,
+static void aty_set_pll_1703(const struct fb_info *info,
 			     const union aty_pll *pll)
 {
-    u32 program_bits;
-    u32 locationAddr;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 program_bits;
+	u32 locationAddr;
 
-    char old_crtc_ext_disp;
+	char old_crtc_ext_disp;
 
-    old_crtc_ext_disp = aty_ld_8(CRTC_GEN_CNTL + 3, info);
-    aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24),
-	     info);
+	old_crtc_ext_disp = aty_ld_8(CRTC_GEN_CNTL + 3, par);
+	aty_st_8(CRTC_GEN_CNTL + 3,
+		 old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24), par);
 
-    program_bits = pll->ics2595.program_bits;
-    locationAddr = pll->ics2595.locationAddr;
+	program_bits = pll->ics2595.program_bits;
+	locationAddr = pll->ics2595.locationAddr;
 
-    /* Program clock */
-    aty_dac_waste4(info);
+	/* Program clock */
+	aty_dac_waste4(par);
 
-    (void)aty_ld_8(DAC_REGS + 2, info);
-    aty_st_8(DAC_REGS+2, (locationAddr << 1) + 0x20, info);
-    aty_st_8(DAC_REGS+2, 0, info);
-    aty_st_8(DAC_REGS+2, (program_bits & 0xFF00) >> 8, info);
-    aty_st_8(DAC_REGS+2, (program_bits & 0xFF), info);
+	(void) aty_ld_8(DAC_REGS + 2, par);
+	aty_st_8(DAC_REGS + 2, (locationAddr << 1) + 0x20, par);
+	aty_st_8(DAC_REGS + 2, 0, par);
+	aty_st_8(DAC_REGS + 2, (program_bits & 0xFF00) >> 8, par);
+	aty_st_8(DAC_REGS + 2, (program_bits & 0xFF), par);
 
-    (void)aty_ld_8(DAC_REGS, info); /* Clear DAC Counter */
-    aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, info);
-
-    return;
+	(void) aty_ld_8(DAC_REGS, par);	/* Clear DAC Counter */
+	aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, par);
+	return;
 }
 
 const struct aty_pll_ops aty_pll_stg1703 = {
-    var_to_pll:	aty_var_to_pll_1703,
-    pll_to_var:	aty_pll_1703_to_var,
-    set_pll:	aty_set_pll_1703,
+	var_to_pll:aty_var_to_pll_1703,
+	pll_to_var:aty_pll_1703_to_var,
+	set_pll:aty_set_pll_1703,
 };
 
 
@@ -587,126 +613,123 @@ const struct aty_pll_ops aty_pll_stg1703 = {
      *  Chrontel 8398 Clock Chip
      */
 
-static int aty_var_to_pll_8398(const struct fb_info_aty *info, u32 vclk_per,
-			       u8 bpp, union aty_pll *pll)
+static int aty_var_to_pll_8398(const struct fb_info *info,
+			       u32 vclk_per, u8 bpp, union aty_pll *pll)
 {
-    u32 tempA, tempB, fOut, longMHz100, diff, preDiff;
-
-    u32 mhz100;				/* in 0.01 MHz */
-    u32 program_bits;
-    /* u32 post_divider; */
-    u32 mach64MinFreq, mach64MaxFreq, mach64RefFreq;
-    u16 m, n, k=0, save_m, save_n, twoToKth;
-
-    /* Calculate the programming word */
-    mhz100 = 100000000 / vclk_per;
-    mach64MinFreq = MIN_FREQ_2595;
-    mach64MaxFreq = MAX_FREQ_2595;
-    mach64RefFreq = REF_FREQ_2595;	/* 14.32 MHz */
-
-    save_m = 0;
-    save_n = 0;
-
-    /* Calculate program word */
-    if (mhz100 == 0)
-	program_bits = 0xE0;
-    else
-    {
-	if (mhz100 < mach64MinFreq)
-	    mhz100 = mach64MinFreq;
-	if (mhz100 > mach64MaxFreq)
-	    mhz100 = mach64MaxFreq;
-
-	longMHz100 = mhz100 * 256 / 100;   /* 8 bit scale this */
-
-	while (mhz100 < (mach64MinFreq << 3))
-        {
-	    mhz100 <<= 1;
-	    k++;
-	}
+	u32 tempA, tempB, fOut, longMHz100, diff, preDiff;
+
+	u32 mhz100;		/* in 0.01 MHz */
+	u32 program_bits;
+	/* u32 post_divider; */
+	u32 mach64MinFreq, mach64MaxFreq, mach64RefFreq;
+	u16 m, n, k = 0, save_m, save_n, twoToKth;
+
+	/* Calculate the programming word */
+	mhz100 = 100000000 / vclk_per;
+	mach64MinFreq = MIN_FREQ_2595;
+	mach64MaxFreq = MAX_FREQ_2595;
+	mach64RefFreq = REF_FREQ_2595;	/* 14.32 MHz */
+
+	save_m = 0;
+	save_n = 0;
+
+	/* Calculate program word */
+	if (mhz100 == 0)
+		program_bits = 0xE0;
+	else {
+		if (mhz100 < mach64MinFreq)
+			mhz100 = mach64MinFreq;
+		if (mhz100 > mach64MaxFreq)
+			mhz100 = mach64MaxFreq;
+
+		longMHz100 = mhz100 * 256 / 100;	/* 8 bit scale this */
+
+		while (mhz100 < (mach64MinFreq << 3)) {
+			mhz100 <<= 1;
+			k++;
+		}
 
-	twoToKth = 1 << k;
-	diff = 0;
-	preDiff = 0xFFFFFFFF;
-
-	for (m = MIN_M; m <= MAX_M; m++)
-        {
-	    for (n = MIN_N; n <= MAX_N; n++)
-            {
-		tempA = (14.31818 * 65536);
-		tempA *= (n + 8);  /* 43..256 */
-		tempB = twoToKth * 256;
-		tempB *= (m + 2);  /* 4..32 */
-		fOut = tempA / tempB;  /* 8 bit scale */
-
-		if (longMHz100 > fOut)
-		    diff = longMHz100 - fOut;
-		else
-		    diff = fOut - longMHz100;
-
-		if (diff < preDiff)
-                {
-		    save_m = m;
-		    save_n = n;
-		    preDiff = diff;
+		twoToKth = 1 << k;
+		diff = 0;
+		preDiff = 0xFFFFFFFF;
+
+		for (m = MIN_M; m <= MAX_M; m++) {
+			for (n = MIN_N; n <= MAX_N; n++) {
+				tempA = (14.31818 * 65536);
+				tempA *= (n + 8);	/* 43..256 */
+				tempB = twoToKth * 256;
+				tempB *= (m + 2);	/* 4..32 */
+				fOut = tempA / tempB;	/* 8 bit scale */
+
+				if (longMHz100 > fOut)
+					diff = longMHz100 - fOut;
+				else
+					diff = fOut - longMHz100;
+
+				if (diff < preDiff) {
+					save_m = m;
+					save_n = n;
+					preDiff = diff;
+				}
+			}
 		}
-	    }
-	}
 
-	program_bits = (k << 6) + (save_m) + (save_n << 8);
-    }
+		program_bits = (k << 6) + (save_m) + (save_n << 8);
+	}
 
-    pll->ics2595.program_bits = program_bits;
-    pll->ics2595.locationAddr = 0;
-    pll->ics2595.post_divider = 0;
-    pll->ics2595.period_in_ps = vclk_per;
+	pll->ics2595.program_bits = program_bits;
+	pll->ics2595.locationAddr = 0;
+	pll->ics2595.post_divider = 0;
+	pll->ics2595.period_in_ps = vclk_per;
 
-    return 0;
+	return 0;
 }
 
-static u32 aty_pll_8398_to_var(const struct fb_info_aty *info,
+static u32 aty_pll_8398_to_var(const struct fb_info *info,
 			       const union aty_pll *pll)
 {
-    return(pll->ics2595.period_in_ps);  /* default for now */
+	return (pll->ics2595.period_in_ps);	/* default for now */
 }
 
-static void aty_set_pll_8398(const struct fb_info_aty *info,
+static void aty_set_pll_8398(const struct fb_info *info,
 			     const union aty_pll *pll)
 {
-    u32 program_bits;
-    u32 locationAddr;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 program_bits;
+	u32 locationAddr;
 
-    char old_crtc_ext_disp;
-    char tmp;
+	char old_crtc_ext_disp;
+	char tmp;
 
-    old_crtc_ext_disp = aty_ld_8(CRTC_GEN_CNTL + 3, info);
-    aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24),
-	     info);
+	old_crtc_ext_disp = aty_ld_8(CRTC_GEN_CNTL + 3, par);
+	aty_st_8(CRTC_GEN_CNTL + 3,
+		 old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24), par);
 
-    program_bits = pll->ics2595.program_bits;
-    locationAddr = pll->ics2595.locationAddr;
+	program_bits = pll->ics2595.program_bits;
+	locationAddr = pll->ics2595.locationAddr;
 
-    /* Program clock */
-    tmp = aty_ld_8(DAC_CNTL, info);
-    aty_st_8(DAC_CNTL, tmp | DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3, info);
+	/* Program clock */
+	tmp = aty_ld_8(DAC_CNTL, par);
+	aty_st_8(DAC_CNTL, tmp | DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3, par);
 
-    aty_st_8(DAC_REGS, locationAddr, info);
-    aty_st_8(DAC_REGS+1, (program_bits & 0xff00) >> 8, info);
-    aty_st_8(DAC_REGS+1, (program_bits & 0xff), info);
+	aty_st_8(DAC_REGS, locationAddr, par);
+	aty_st_8(DAC_REGS + 1, (program_bits & 0xff00) >> 8, par);
+	aty_st_8(DAC_REGS + 1, (program_bits & 0xff), par);
 
-    tmp = aty_ld_8(DAC_CNTL, info);
-    aty_st_8(DAC_CNTL, (tmp & ~DAC_EXT_SEL_RS2) | DAC_EXT_SEL_RS3, info);
+	tmp = aty_ld_8(DAC_CNTL, par);
+	aty_st_8(DAC_CNTL, (tmp & ~DAC_EXT_SEL_RS2) | DAC_EXT_SEL_RS3,
+		 par);
 
-    (void)aty_ld_8(DAC_REGS, info); /* Clear DAC Counter */
-    aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, info);
+	(void) aty_ld_8(DAC_REGS, par);	/* Clear DAC Counter */
+	aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, par);
 
-    return;
+	return;
 }
 
 const struct aty_pll_ops aty_pll_ch8398 = {
-    var_to_pll:	aty_var_to_pll_8398,
-    pll_to_var:	aty_pll_8398_to_var,
-    set_pll:	aty_set_pll_8398,
+	var_to_pll:aty_var_to_pll_8398,
+	pll_to_var:aty_pll_8398_to_var,
+	set_pll:aty_set_pll_8398,
 };
 
 
@@ -714,143 +737,146 @@ const struct aty_pll_ops aty_pll_ch8398 = {
      *  AT&T 20C408 Clock Chip
      */
 
-static int aty_var_to_pll_408(const struct fb_info_aty *info, u32 vclk_per,
+static int aty_var_to_pll_408(const struct fb_info *info, u32 vclk_per,
 			      u8 bpp, union aty_pll *pll)
 {
-    u32 mhz100;		/* in 0.01 MHz */
-    u32 program_bits;
-    /* u32 post_divider; */
-    u32 mach64MinFreq, mach64MaxFreq, mach64RefFreq;
-    u32 temp, tempB;
-    u16 remainder, preRemainder;
-    short divider = 0, tempA;
-
-    /* Calculate the programming word */
-    mhz100 = 100000000 / vclk_per;
-    mach64MinFreq = MIN_FREQ_2595;
-    mach64MaxFreq = MAX_FREQ_2595;
-    mach64RefFreq = REF_FREQ_2595;	/* 14.32 MHz */
-
-    /* Calculate program word */
-    if (mhz100 == 0)
-	program_bits = 0xFF;
-    else {
-	if (mhz100 < mach64MinFreq)
-	    mhz100 = mach64MinFreq;
-	if (mhz100 > mach64MaxFreq)
-	    mhz100 = mach64MaxFreq;
-
-	while (mhz100 < (mach64MinFreq << 3)) {
-	    mhz100 <<= 1;
-	    divider += 0x40;
+	u32 mhz100;		/* in 0.01 MHz */
+	u32 program_bits;
+	/* u32 post_divider; */
+	u32 mach64MinFreq, mach64MaxFreq, mach64RefFreq;
+	u32 temp, tempB;
+	u16 remainder, preRemainder;
+	short divider = 0, tempA;
+
+	/* Calculate the programming word */
+	mhz100 = 100000000 / vclk_per;
+	mach64MinFreq = MIN_FREQ_2595;
+	mach64MaxFreq = MAX_FREQ_2595;
+	mach64RefFreq = REF_FREQ_2595;	/* 14.32 MHz */
+
+	/* Calculate program word */
+	if (mhz100 == 0)
+		program_bits = 0xFF;
+	else {
+		if (mhz100 < mach64MinFreq)
+			mhz100 = mach64MinFreq;
+		if (mhz100 > mach64MaxFreq)
+			mhz100 = mach64MaxFreq;
+
+		while (mhz100 < (mach64MinFreq << 3)) {
+			mhz100 <<= 1;
+			divider += 0x40;
+		}
+
+		temp = (unsigned int) mhz100;
+		temp = (unsigned int) (temp * (MIN_N_408 + 2));
+		temp -= ((short) (mach64RefFreq << 1));
+
+		tempA = MIN_N_408;
+		preRemainder = 0xFFFF;
+
+		do {
+			tempB = temp;
+			remainder = tempB % mach64RefFreq;
+			tempB = tempB / mach64RefFreq;
+			if (((tempB & 0xFFFF) <= 255)
+			    && (remainder <= preRemainder)) {
+				preRemainder = remainder;
+				divider &= ~0x3f;
+				divider |= tempA;
+				divider =
+				    (divider & 0x00FF) +
+				    ((tempB & 0xFF) << 8);
+			}
+			temp += mhz100;
+			tempA++;
+		} while (tempA <= 32);
+
+		program_bits = divider;
 	}
 
-	temp = (unsigned int)mhz100;
-	temp = (unsigned int)(temp * (MIN_N_408 + 2));
-	temp -= ((short)(mach64RefFreq << 1));
-
-	tempA = MIN_N_408;
-	preRemainder = 0xFFFF;
-
-	do {
-	    tempB = temp;
-	    remainder = tempB % mach64RefFreq;
-	    tempB = tempB / mach64RefFreq;
-	    if (((tempB & 0xFFFF) <= 255) && (remainder <= preRemainder)) {
-		preRemainder = remainder;
-		divider &= ~0x3f;
-		divider |= tempA;
-		divider = (divider & 0x00FF) + ((tempB & 0xFF) << 8);
-	    }
-	    temp += mhz100;
-	    tempA++;
-	} while(tempA <= 32);
-
-	program_bits = divider;
-    }
-
-    pll->ics2595.program_bits = program_bits;
-    pll->ics2595.locationAddr = 0;
-    pll->ics2595.post_divider = divider;	/* fuer nix */
-    pll->ics2595.period_in_ps = vclk_per;
-
-    return 0;
+	pll->ics2595.program_bits = program_bits;
+	pll->ics2595.locationAddr = 0;
+	pll->ics2595.post_divider = divider;	/* fuer nix */
+	pll->ics2595.period_in_ps = vclk_per;
+
+	return 0;
 }
 
-static u32 aty_pll_408_to_var(const struct fb_info_aty *info,
+static u32 aty_pll_408_to_var(const struct fb_info *info,
 			      const union aty_pll *pll)
 {
-    return(pll->ics2595.period_in_ps);  /* default for now */
+	return (pll->ics2595.period_in_ps);	/* default for now */
 }
 
-static void aty_set_pll_408(const struct fb_info_aty *info,
+static void aty_set_pll_408(const struct fb_info *info,
 			    const union aty_pll *pll)
 {
-    u32 program_bits;
-    u32 locationAddr;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+	u32 program_bits;
+	u32 locationAddr;
 
-    u8 tmpA, tmpB, tmpC;
-    char old_crtc_ext_disp;
+	u8 tmpA, tmpB, tmpC;
+	char old_crtc_ext_disp;
 
-    old_crtc_ext_disp = aty_ld_8(CRTC_GEN_CNTL + 3, info);
-    aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24),
-	     info);
+	old_crtc_ext_disp = aty_ld_8(CRTC_GEN_CNTL + 3, par);
+	aty_st_8(CRTC_GEN_CNTL + 3,
+		 old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24), par);
 
-    program_bits = pll->ics2595.program_bits;
-    locationAddr = pll->ics2595.locationAddr;
+	program_bits = pll->ics2595.program_bits;
+	locationAddr = pll->ics2595.locationAddr;
 
-    /* Program clock */
-    aty_dac_waste4(info);
-    tmpB = aty_ld_8(DAC_REGS + 2, info) | 1;
-    aty_dac_waste4(info);
-    aty_st_8(DAC_REGS + 2, tmpB, info);
+	/* Program clock */
+	aty_dac_waste4(par);
+	tmpB = aty_ld_8(DAC_REGS + 2, par) | 1;
+	aty_dac_waste4(par);
+	aty_st_8(DAC_REGS + 2, tmpB, par);
 
-    tmpA = tmpB;
-    tmpC = tmpA;
-    tmpA |= 8;
-    tmpB = 1;
+	tmpA = tmpB;
+	tmpC = tmpA;
+	tmpA |= 8;
+	tmpB = 1;
 
-    aty_st_8(DAC_REGS, tmpB, info);
-    aty_st_8(DAC_REGS + 2, tmpA, info);
+	aty_st_8(DAC_REGS, tmpB, par);
+	aty_st_8(DAC_REGS + 2, tmpA, par);
 
-    udelay(400); /* delay for 400 us */
+	udelay(400);		/* delay for 400 us */
 
-    locationAddr = (locationAddr << 2) + 0x40;
-    tmpB = locationAddr;
-    tmpA = program_bits >> 8;
+	locationAddr = (locationAddr << 2) + 0x40;
+	tmpB = locationAddr;
+	tmpA = program_bits >> 8;
 
-    aty_st_8(DAC_REGS, tmpB, info);
-    aty_st_8(DAC_REGS + 2, tmpA, info);
+	aty_st_8(DAC_REGS, tmpB, par);
+	aty_st_8(DAC_REGS + 2, tmpA, par);
 
-    tmpB = locationAddr + 1;
-    tmpA = (u8)program_bits;
+	tmpB = locationAddr + 1;
+	tmpA = (u8) program_bits;
 
-    aty_st_8(DAC_REGS, tmpB, info);
-    aty_st_8(DAC_REGS + 2, tmpA, info);
+	aty_st_8(DAC_REGS, tmpB, par);
+	aty_st_8(DAC_REGS + 2, tmpA, par);
 
-    tmpB = locationAddr + 2;
-    tmpA = 0x77;
+	tmpB = locationAddr + 2;
+	tmpA = 0x77;
 
-    aty_st_8(DAC_REGS, tmpB, info);
-    aty_st_8(DAC_REGS + 2, tmpA, info);
+	aty_st_8(DAC_REGS, tmpB, par);
+	aty_st_8(DAC_REGS + 2, tmpA, par);
 
-    udelay(400); /* delay for 400 us */
-    tmpA = tmpC & (~(1 | 8));
-    tmpB = 1;
+	udelay(400);		/* delay for 400 us */
+	tmpA = tmpC & (~(1 | 8));
+	tmpB = 1;
 
-    aty_st_8(DAC_REGS, tmpB, info);
-    aty_st_8(DAC_REGS + 2, tmpA, info);
+	aty_st_8(DAC_REGS, tmpB, par);
+	aty_st_8(DAC_REGS + 2, tmpA, par);
 
-    (void)aty_ld_8(DAC_REGS, info); /* Clear DAC Counter */
-    aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, info);
-
-    return;
+	(void) aty_ld_8(DAC_REGS, par);	/* Clear DAC Counter */
+	aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, par);
+	return;
 }
 
 const struct aty_pll_ops aty_pll_att20c408 = {
-    var_to_pll:	aty_var_to_pll_408,
-    pll_to_var:	aty_pll_408_to_var,
-    set_pll:	aty_set_pll_408,
+	var_to_pll:aty_var_to_pll_408,
+	pll_to_var:aty_pll_408_to_var,
+	set_pll:aty_set_pll_408,
 };
 
 
@@ -858,30 +884,31 @@ const struct aty_pll_ops aty_pll_att20c408 = {
      *  Unsupported DAC and Clock Chip
      */
 
-static int aty_set_dac_unsupported(const struct fb_info_aty *info,
+static int aty_set_dac_unsupported(const struct fb_info *info,
 				   const union aty_pll *pll, u32 bpp,
 				   u32 accel)
 {
-    aty_st_le32(BUS_CNTL, 0x890e20f1, info);
-    aty_st_le32(DAC_CNTL, 0x47052100, info);
-    /* new in 2.2.3p1 from Geert. ???????? */
-    aty_st_le32(BUS_CNTL, 0x590e10ff, info);
-    aty_st_le32(DAC_CNTL, 0x47012100, info);
-    return 0;
+	struct atyfb_par *par = (struct atyfb_par *) info->par;
+
+	aty_st_le32(BUS_CNTL, 0x890e20f1, par);
+	aty_st_le32(DAC_CNTL, 0x47052100, par);
+	/* new in 2.2.3p1 from Geert. ???????? */
+	aty_st_le32(BUS_CNTL, 0x590e10ff, par);
+	aty_st_le32(DAC_CNTL, 0x47012100, par);
+	return 0;
 }
 
 static int dummy(void)
 {
-    return 0;
+	return 0;
 }
 
 const struct aty_dac_ops aty_dac_unsupported = {
-    set_dac:	aty_set_dac_unsupported,
+	set_dac:aty_set_dac_unsupported,
 };
 
 const struct aty_pll_ops aty_pll_unsupported = {
-    var_to_pll:	(void *)dummy,
-    pll_to_var:	(void *)dummy,
-    set_pll:	(void *)dummy,
+	var_to_pll:(void *) dummy,
+	pll_to_var:(void *) dummy,
+	set_pll:(void *) dummy,
 };
-
diff --git a/drivers/video/aty128.h b/drivers/video/aty128.h
deleted file mode 100644
index e2b54f8f490d..000000000000
--- a/drivers/video/aty128.h
+++ /dev/null
@@ -1,352 +0,0 @@
-/*  $Id: aty128.h,v 1.1 1999/10/12 11:00:40 geert Exp $
- *  linux/drivers/video/aty128.h
- *  Register definitions for ATI Rage128 boards
- *
- *  Anthony Tong <atong@uiuc.edu>, 1999
- *  Brad Douglas <brad@neruo.com>, 2000
- */
-
-#ifndef REG_RAGE128_H
-#define REG_RAGE128_H
-
-#define CLOCK_CNTL_INDEX			0x0008
-#define CLOCK_CNTL_DATA				0x000c
-#define BIOS_0_SCRATCH				0x0010
-#define BUS_CNTL				0x0030
-#define GEN_INT_CNTL				0x0040
-#define CRTC_GEN_CNTL				0x0050
-#define CRTC_EXT_CNTL				0x0054
-#define DAC_CNTL				0x0058
-#define I2C_CNTL_1				0x0094
-#define PALETTE_INDEX				0x00b0
-#define PALETTE_DATA				0x00b4
-#define CONFIG_CNTL				0x00e0
-#define GEN_RESET_CNTL				0x00f0
-#define CONFIG_MEMSIZE				0x00f8
-#define MEM_CNTL				0x0140
-#define AGP_BASE				0x0170
-#define AGP_CNTL				0x0174
-#define AGP_APER_OFFSET				0x0178
-#define PCI_GART_PAGE				0x017c
-#define PC_NGUI_MODE				0x0180
-#define PC_NGUI_CTLSTAT				0x0184
-#define MPP_TB_CONFIG				0x01C0
-#define MPP_GP_CONFIG				0x01C8
-#define VIPH_CONTROL				0x01D0
-#define CRTC_H_TOTAL_DISP			0x0200
-#define CRTC_H_SYNC_STRT_WID			0x0204
-#define CRTC_V_TOTAL_DISP			0x0208
-#define CRTC_V_SYNC_STRT_WID			0x020c
-#define CRTC_OFFSET				0x0224
-#define CRTC_OFFSET_CNTL			0x0228
-#define CRTC_PITCH				0x022c
-#define OVR_CLR					0x0230
-#define OVR_WID_LEFT_RIGHT			0x0234
-#define OVR_WID_TOP_BOTTOM			0x0238
-#define LVDS_GEN_CNTL				0x02d0
-#define DDA_CONFIG				0x02e0
-#define DDA_ON_OFF				0x02e4
-#define VGA_DDA_CONFIG				0x02e8
-#define VGA_DDA_ON_OFF				0x02ec
-#define OV0_SCALE_CNTL				0x0420
-#define SUBPIC_CNTL				0x0540
-#define PM4_BUFFER_OFFSET			0x0700
-#define PM4_BUFFER_CNTL				0x0704
-#define PM4_BUFFER_WM_CNTL			0x0708
-#define PM4_BUFFER_DL_RPTR_ADDR			0x070c
-#define PM4_BUFFER_DL_RPTR			0x0710
-#define PM4_BUFFER_DL_WPTR			0x0714
-#define PM4_VC_FPU_SETUP			0x071c
-#define PM4_FPU_CNTL				0x0720
-#define PM4_VC_FORMAT				0x0724
-#define PM4_VC_CNTL				0x0728
-#define PM4_VC_I01				0x072c
-#define PM4_VC_VLOFF				0x0730
-#define PM4_VC_VLSIZE				0x0734
-#define PM4_IW_INDOFF				0x0738
-#define PM4_IW_INDSIZE				0x073c
-#define PM4_FPU_FPX0				0x0740
-#define PM4_FPU_FPY0				0x0744
-#define PM4_FPU_FPX1				0x0748
-#define PM4_FPU_FPY1				0x074c
-#define PM4_FPU_FPX2				0x0750
-#define PM4_FPU_FPY2				0x0754
-#define PM4_FPU_FPY3				0x0758
-#define PM4_FPU_FPY4				0x075c
-#define PM4_FPU_FPY5				0x0760
-#define PM4_FPU_FPY6				0x0764
-#define PM4_FPU_FPR				0x0768
-#define PM4_FPU_FPG				0x076c
-#define PM4_FPU_FPB				0x0770
-#define PM4_FPU_FPA				0x0774
-#define PM4_FPU_INTXY0				0x0780
-#define PM4_FPU_INTXY1				0x0784
-#define PM4_FPU_INTXY2				0x0788
-#define PM4_FPU_INTARGB				0x078c
-#define PM4_FPU_FPTWICEAREA			0x0790
-#define PM4_FPU_DMAJOR01			0x0794
-#define PM4_FPU_DMAJOR12			0x0798
-#define PM4_FPU_DMAJOR02			0x079c
-#define PM4_FPU_STAT				0x07a0
-#define PM4_STAT				0x07b8
-#define PM4_TEST_CNTL				0x07d0
-#define PM4_MICROCODE_ADDR			0x07d4
-#define PM4_MICROCODE_RADDR			0x07d8
-#define PM4_MICROCODE_DATAH			0x07dc
-#define PM4_MICROCODE_DATAL			0x07e0
-#define PM4_CMDFIFO_ADDR			0x07e4
-#define PM4_CMDFIFO_DATAH			0x07e8
-#define PM4_CMDFIFO_DATAL			0x07ec
-#define PM4_BUFFER_ADDR				0x07f0
-#define PM4_BUFFER_DATAH			0x07f4
-#define PM4_BUFFER_DATAL			0x07f8
-#define PM4_MICRO_CNTL				0x07fc
-#define CAP0_TRIG_CNTL				0x0950
-#define CAP1_TRIG_CNTL				0x09c0
-
-/******************************************************************************
- *                  GUI Block Memory Mapped Registers                         *
- *                     These registers are FIFOed.                            *
- *****************************************************************************/
-#define PM4_FIFO_DATA_EVEN			0x1000
-#define PM4_FIFO_DATA_ODD			0x1004
-
-#define DST_OFFSET				0x1404
-#define DST_PITCH				0x1408
-#define DST_WIDTH				0x140c
-#define DST_HEIGHT				0x1410
-#define SRC_X					0x1414
-#define SRC_Y					0x1418
-#define DST_X					0x141c
-#define DST_Y					0x1420
-#define SRC_PITCH_OFFSET			0x1428
-#define DST_PITCH_OFFSET			0x142c
-#define SRC_Y_X					0x1434
-#define DST_Y_X					0x1438
-#define DST_HEIGHT_WIDTH			0x143c
-#define DP_GUI_MASTER_CNTL			0x146c
-#define BRUSH_SCALE				0x1470
-#define BRUSH_Y_X				0x1474
-#define DP_BRUSH_BKGD_CLR			0x1478
-#define DP_BRUSH_FRGD_CLR			0x147c
-#define DST_WIDTH_X				0x1588
-#define DST_HEIGHT_WIDTH_8			0x158c
-#define SRC_X_Y					0x1590
-#define DST_X_Y					0x1594
-#define DST_WIDTH_HEIGHT			0x1598
-#define DST_WIDTH_X_INCY			0x159c
-#define DST_HEIGHT_Y				0x15a0
-#define DST_X_SUB				0x15a4
-#define DST_Y_SUB				0x15a8
-#define SRC_OFFSET				0x15ac
-#define SRC_PITCH				0x15b0
-#define DST_HEIGHT_WIDTH_BW			0x15b4
-#define CLR_CMP_CNTL				0x15c0
-#define CLR_CMP_CLR_SRC				0x15c4
-#define CLR_CMP_CLR_DST				0x15c8
-#define CLR_CMP_MASK				0x15cc
-#define DP_SRC_FRGD_CLR				0x15d8
-#define DP_SRC_BKGD_CLR				0x15dc
-#define DST_BRES_ERR				0x1628
-#define DST_BRES_INC				0x162c
-#define DST_BRES_DEC				0x1630
-#define DST_BRES_LNTH				0x1634
-#define DST_BRES_LNTH_SUB			0x1638
-#define SC_LEFT					0x1640
-#define SC_RIGHT				0x1644
-#define SC_TOP					0x1648
-#define SC_BOTTOM				0x164c
-#define SRC_SC_RIGHT				0x1654
-#define SRC_SC_BOTTOM				0x165c
-#define GUI_DEBUG0				0x16a0
-#define GUI_DEBUG1				0x16a4
-#define GUI_TIMEOUT				0x16b0
-#define GUI_TIMEOUT0				0x16b4
-#define GUI_TIMEOUT1				0x16b8
-#define GUI_PROBE				0x16bc
-#define DP_CNTL					0x16c0
-#define DP_DATATYPE				0x16c4
-#define DP_MIX					0x16c8
-#define DP_WRITE_MASK				0x16cc
-#define DP_CNTL_XDIR_YDIR_YMAJOR		0x16d0
-#define DEFAULT_OFFSET				0x16e0
-#define DEFAULT_PITCH				0x16e4
-#define DEFAULT_SC_BOTTOM_RIGHT			0x16e8
-#define SC_TOP_LEFT				0x16ec
-#define SC_BOTTOM_RIGHT				0x16f0
-#define SRC_SC_BOTTOM_RIGHT			0x16f4
-#define WAIT_UNTIL				0x1720
-#define CACHE_CNTL				0x1724
-#define GUI_STAT				0x1740
-#define PC_GUI_MODE				0x1744
-#define PC_GUI_CTLSTAT				0x1748
-#define PC_DEBUG_MODE				0x1760
-#define BRES_DST_ERR_DEC			0x1780
-#define TRAIL_BRES_T12_ERR_DEC			0x1784
-#define TRAIL_BRES_T12_INC			0x1788
-#define DP_T12_CNTL				0x178c
-#define DST_BRES_T1_LNTH			0x1790
-#define DST_BRES_T2_LNTH			0x1794
-#define SCALE_SRC_HEIGHT_WIDTH			0x1994
-#define SCALE_OFFSET_0				0x1998
-#define SCALE_PITCH				0x199c
-#define SCALE_X_INC				0x19a0
-#define SCALE_Y_INC				0x19a4
-#define SCALE_HACC				0x19a8
-#define SCALE_VACC				0x19ac
-#define SCALE_DST_X_Y				0x19b0
-#define SCALE_DST_HEIGHT_WIDTH			0x19b4
-#define SCALE_3D_CNTL				0x1a00
-#define SCALE_3D_DATATYPE			0x1a20
-#define SETUP_CNTL				0x1bc4
-#define SOLID_COLOR				0x1bc8
-#define WINDOW_XY_OFFSET			0x1bcc
-#define DRAW_LINE_POINT				0x1bd0
-#define SETUP_CNTL_PM4				0x1bd4
-#define DST_PITCH_OFFSET_C			0x1c80
-#define DP_GUI_MASTER_CNTL_C			0x1c84
-#define SC_TOP_LEFT_C				0x1c88
-#define SC_BOTTOM_RIGHT_C			0x1c8c
-
-#define CLR_CMP_MASK_3D				0x1A28
-#define MISC_3D_STATE_CNTL_REG			0x1CA0
-#define MC_SRC1_CNTL				0x19D8
-#define TEX_CNTL				0x1800
-
-/* CONSTANTS */
-#define GUI_ACTIVE				0x80000000
-#define ENGINE_IDLE				0x0
-
-#define PLL_WR_EN				0x00000080
-
-#define CLK_PIN_CNTL				0x0001
-#define PPLL_CNTL				0x0002
-#define PPLL_REF_DIV				0x0003
-#define PPLL_DIV_0				0x0004
-#define PPLL_DIV_1				0x0005
-#define PPLL_DIV_2				0x0006
-#define PPLL_DIV_3				0x0007
-#define VCLK_ECP_CNTL				0x0008
-#define HTOTAL_CNTL				0x0009
-#define X_MPLL_REF_FB_DIV			0x000a
-#define XPLL_CNTL				0x000b
-#define XDLL_CNTL				0x000c
-#define XCLK_CNTL				0x000d
-#define MPLL_CNTL				0x000e
-#define MCLK_CNTL				0x000f
-#define AGP_PLL_CNTL				0x0010
-#define FCP_CNTL				0x0012
-#define PLL_TEST_CNTL				0x0013
-
-#define PPLL_RESET				0x01
-#define PPLL_ATOMIC_UPDATE_EN			0x10000
-#define PPLL_VGA_ATOMIC_UPDATE_EN		0x20000
-#define PPLL_REF_DIV_MASK			0x3FF
-#define PPLL_FB3_DIV_MASK			0x7FF
-#define PPLL_POST3_DIV_MASK			0x70000
-#define PPLL_ATOMIC_UPDATE_R			0x8000
-#define PPLL_ATOMIC_UPDATE_W			0x8000
-#define MEM_CFG_TYPE_MASK			0x3
-#define XCLK_SRC_SEL_MASK			0x7
-#define XPLL_FB_DIV_MASK			0xFF00
-#define X_MPLL_REF_DIV_MASK			0xFF
-
-/* CRTC control values (CRTC_GEN_CNTL) */
-#define CRTC_CSYNC_EN				0x00000010
-
-#define CRTC_PIX_WIDTH_MASK			0x00000700
-#define CRTC_PIX_WIDTH_4BPP			0x00000100
-#define CRTC_PIX_WIDTH_8BPP			0x00000200
-#define CRTC_PIX_WIDTH_15BPP			0x00000300
-#define CRTC_PIX_WIDTH_16BPP			0x00000400
-#define CRTC_PIX_WIDTH_24BPP			0x00000500
-#define CRTC_PIX_WIDTH_32BPP			0x00000600
-
-/* DAC_CNTL bit constants */                       
-#define DAC_8BIT_EN				0x00000100
-#define DAC_MASK				0xFF000000
-#define DAC_BLANKING				0x00000004
-#define DAC_RANGE_CNTL				0x00000003
-#define DAC_RANGE_CNTL				0x00000003
-#define DAC_PALETTE_ACCESS_CNTL			0x00000020
-#define DAC_PDWN				0x00008000
-
-/* GEN_RESET_CNTL bit constants */
-#define SOFT_RESET_GUI				0x00000001
-#define SOFT_RESET_VCLK				0x00000100
-#define SOFT_RESET_PCLK				0x00000200
-#define SOFT_RESET_ECP				0x00000400
-#define SOFT_RESET_DISPENG_XCLK			0x00000800
-
-/* PC_GUI_CTLSTAT bit constants */
-#define PC_BUSY_INIT				0x10000000                 
-#define PC_BUSY_GUI				0x20000000                 
-#define PC_BUSY_NGUI				0x40000000
-#define PC_BUSY					0x80000000
-
-#define BUS_MASTER_DIS				0x00000040
-#define PM4_BUFFER_CNTL_NONPM4			0x00000000
-
-/* DP_DATATYPE bit constants */
-#define DST_8BPP				0x00000002
-#define DST_15BPP				0x00000003
-#define DST_16BPP				0x00000004
-#define DST_24BPP				0x00000005
-#define DST_32BPP				0x00000006
-
-#define BRUSH_SOLIDCOLOR			0x00000d00
-
-/* DP_GUI_MASTER_CNTL bit constants */
-#define	GMC_SRC_PITCH_OFFSET_DEFAULT		0x00000000
-#define GMC_DST_PITCH_OFFSET_DEFAULT		0x00000000
-#define GMC_SRC_CLIP_DEFAULT			0x00000000
-#define GMC_DST_CLIP_DEFAULT			0x00000000
-#define GMC_BRUSH_SOLIDCOLOR			0x000000d0
-#define GMC_SRC_DSTCOLOR			0x00003000
-#define GMC_BYTE_ORDER_MSB_TO_LSB		0x00000000
-#define GMC_DP_SRC_RECT				0x02000000
-#define GMC_3D_FCN_EN_CLR			0x00000000
-#define GMC_AUX_CLIP_CLEAR			0x20000000
-#define GMC_DST_CLR_CMP_FCN_CLEAR		0x10000000
-#define GMC_WRITE_MASK_SET			0x40000000
-#define GMC_DP_CONVERSION_TEMP_6500		0x00000000
-
-/* DP_GUI_MASTER_CNTL ROP3 named constants */
-#define	ROP3_PATCOPY				0x00f00000
-#define ROP3_SRCCOPY				0x00cc0000
-
-#define SRC_DSTCOLOR				0x00030000
-
-/* DP_CNTL bit constants */
-#define DST_X_RIGHT_TO_LEFT			0x00000000
-#define DST_X_LEFT_TO_RIGHT			0x00000001
-#define DST_Y_BOTTOM_TO_TOP			0x00000000
-#define DST_Y_TOP_TO_BOTTOM			0x00000002
-#define DST_X_MAJOR				0x00000000
-#define DST_Y_MAJOR				0x00000004
-#define DST_X_TILE				0x00000008
-#define DST_Y_TILE				0x00000010
-#define DST_LAST_PEL				0x00000020
-#define DST_TRAIL_X_RIGHT_TO_LEFT		0x00000000
-#define DST_TRAIL_X_LEFT_TO_RIGHT		0x00000040
-#define DST_TRAP_FILL_RIGHT_TO_LEFT		0x00000000
-#define DST_TRAP_FILL_LEFT_TO_RIGHT		0x00000080
-#define DST_BRES_SIGN				0x00000100
-#define DST_HOST_BIG_ENDIAN_EN			0x00000200
-#define DST_POLYLINE_NONLAST			0x00008000
-#define DST_RASTER_STALL			0x00010000
-#define DST_POLY_EDGE				0x00040000
-
-/* DP_MIX bit constants */
-#define DP_SRC_RECT				0x00000200
-#define DP_SRC_HOST				0x00000300
-#define DP_SRC_HOST_BYTEALIGN			0x00000400
-
-/* LVDS_GEN_CNTL constants */
-#define LVDS_BL_MOD_LEVEL_MASK			0x0000ff00
-#define LVDS_BL_MOD_LEVEL_SHIFT			8
-#define LVDS_BL_MOD_EN				0x00010000
-#define LVDS_DIGION				0x00040000
-#define LVDS_BLON				0x00080000
-
-#endif /* REG_RAGE128_H */
diff --git a/drivers/video/aty128fb.c b/drivers/video/aty128fb.c
index 1a7ff00fa3f3..2a47ff3bd9ee 100644
--- a/drivers/video/aty128fb.c
+++ b/drivers/video/aty128fb.c
@@ -67,9 +67,6 @@
 #include <asm/backlight.h>
 #endif
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#endif
 #ifdef CONFIG_BOOTX_TEXT
 #include <asm/btext.h>
 #endif /* CONFIG_BOOTX_TEXT */
@@ -84,7 +81,7 @@
 #include <asm/mtrr.h>
 #endif
 
-#include "aty128.h"
+#include <video/aty128.h>
 
 /* Debug flag */
 #undef DEBUG
@@ -1231,27 +1228,6 @@ aty128_set_par(struct aty128fb_par *par,
     if (par->accel_flags & FB_ACCELF_TEXT)
         aty128_init_engine(par, info);
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-    if (!console_fb_info || console_fb_info == &info->fb_info) {
-        struct fb_var_screeninfo var;
-        int cmode, vmode;
-
-	display_info.height = ((par->crtc.v_total >> 16) & 0x7ff) + 1;
-	display_info.width = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3;
-	display_info.depth = par->crtc.bpp;
-	display_info.pitch = (par->crtc.vxres * par->crtc.bpp) >> 3;
-        aty128_encode_var(&var, par, info);
-	if (mac_var_to_vmode(&var, &vmode, &cmode))
-	    display_info.mode = 0;
-	else
-	    display_info.mode = vmode;
-	strcpy(display_info.name, aty128fb_name);
-	display_info.fb_address = info->frame_buffer_phys;
-	display_info.cmap_adr_address = 0;
-	display_info.cmap_data_address = 0;
-	display_info.disp_reg_address = info->regbase_phys;
-    }
-#endif /* CONFIG_FB_COMPAT_XPMAC */
 #if defined(CONFIG_BOOTX_TEXT)
 	btext_update_display(info->frame_buffer_phys,
 			(((par->crtc.h_total>>16) & 0xff)+1)*8,
@@ -1772,8 +1748,8 @@ aty128_init(struct fb_info_aty128 *info, const char *name)
 
     board_list = aty128_board_list_add(board_list, info);
 
-    size = (var.bits_per_pixel <= 8) ? 256 : 32;
-    fb_alloc_cmap(&info->fb_info.cmap, size, 0);	
+    size = (fb_display[con].var.bits_per_pixel <= 8) ? 256 : 32;
+    fb_alloc_cmap(info->fb_info.cmap, size, 0);	
 
     if (register_framebuffer(&info->fb_info) < 0)
 	return 0;
@@ -1927,12 +1903,6 @@ aty128_pci_register(struct pci_dev *pdev,
 		printk(KERN_INFO "aty128fb: Rage128 MTRR set to ON\n");
 	}
 #endif /* CONFIG_MTRR */
-
-#ifdef CONFIG_FB_COMPAT_XPMAC
-    if (!console_fb_info)
-	console_fb_info = &info->fb_info;
-#endif
-
 	return 0;
 
 err_out:
diff --git a/drivers/video/chipsfb.c b/drivers/video/chipsfb.c
index 1f2eb6763e45..b5ce7c9688f3 100644
--- a/drivers/video/chipsfb.c
+++ b/drivers/video/chipsfb.c
@@ -31,10 +31,6 @@
 #include <linux/pci.h>
 #include <asm/io.h>
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#include <asm/pci-bridge.h>
-#endif
 #ifdef CONFIG_PMAC_BACKLIGHT
 #include <asm/backlight.h>
 #endif
@@ -359,11 +355,6 @@ static void chips_set_bitdepth(struct fb_info_chips *p, struct display* disp, in
 	disp->visual = fix->visual;
 	disp->var = *var;
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	display_info.depth = bpp;
-	display_info.pitch = fix->line_length;
-#endif
-	
 	if (p->info.changevar)
 		(*p->info.changevar)(con);
 
@@ -575,26 +566,6 @@ static void __init init_chips(struct fb_info_chips *p)
 
 	chips_hw_init(p);
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	if (!console_fb_info) {
-		unsigned long iobase;
-
-		display_info.height = p->var.yres;
-		display_info.width = p->var.xres;
-		display_info.depth = 8;
-		display_info.pitch = p->fix.line_length;
-		display_info.mode = VMODE_800_600_60;
-		strncpy(display_info.name, "chips65550",
-			sizeof(display_info.name));
-		display_info.fb_address = p->frame_buffer_phys;
-		iobase = pci_bus_io_base_phys(p->pdev->bus->number);
-		display_info.cmap_adr_address = iobase + 0x3c8;
-		display_info.cmap_data_address = iobase + 0x3c9;
-		display_info.disp_reg_address = p->blitter_regs_phys;
-		console_fb_info = &p->info;
-	}
-#endif /* CONFIG_FB_COMPAT_XPMAC */
-
 #ifdef CONFIG_PMAC_PBOOK
 	if (all_chips == NULL)
 		pmu_register_sleep_notifier(&chips_sleep_notifier);
diff --git a/drivers/video/controlfb.c b/drivers/video/controlfb.c
index 7da6fe86075d..183d2745d719 100644
--- a/drivers/video/controlfb.c
+++ b/drivers/video/controlfb.c
@@ -43,9 +43,6 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/nvram.h>
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#endif
 #include <linux/adb.h>
 #include <linux/cuda.h>
 #include <asm/io.h>
@@ -707,24 +704,6 @@ static void control_set_hardware(struct fb_info_control *p, struct fb_par_contro
 	/* Turn on display */
 	out_le32(CNTRL_REG(p,ctrl), par->ctrl);
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	/* And let the world know the truth. */
-	if (!console_fb_info || console_fb_info == &p->info) {
-		display_info.height = p->par.yres;
-		display_info.width = p->par.xres;
-		display_info.depth = (cmode == CMODE_32) ? 32 :
-			((cmode == CMODE_16) ? 16 : 8);
-		display_info.pitch = p->par.pitch;
-		display_info.mode = p->par.vmode;
-		strncpy(display_info.name, "control",
-			sizeof(display_info.name));
-		display_info.fb_address = p->frame_buffer_phys + CTRLFB_OFF;
-		display_info.cmap_adr_address = p->cmap_regs_phys;
-		display_info.cmap_data_address = p->cmap_regs_phys + 0x30;
-		display_info.disp_reg_address = p->control_regs_phys;
-		console_fb_info = &p->info;
-	}
-#endif /* CONFIG_FB_COMPAT_XPMAC */
 #ifdef CONFIG_BOOTX_TEXT
 	btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,
 			     p->par.xres, p->par.yres,
diff --git a/drivers/video/dnfb.c b/drivers/video/dnfb.c
index 4e93f18ad66a..3a8b4ee1cb2d 100644
--- a/drivers/video/dnfb.c
+++ b/drivers/video/dnfb.c
@@ -115,7 +115,7 @@ static struct display disp;
 
 /* frame buffer operations */
 
-static int dn_fb_blank(int blank, struct fb_info *info);
+static int dnfb_blank(int blank, struct fb_info *info);
 static void dnfb_copyarea(struct fb_info *info, struct fb_copyarea *area);
 
 static struct fb_ops dn_fb_ops = {
@@ -165,7 +165,6 @@ void dnfb_copyarea(struct fb_info *info, struct fb_copyarea *area)
 {
 
 	int incr, y_delta, pre_read = 0, x_end, x_word_count;
-	int x_count, y_count;
 	ushort *src, dummy;
 	uint start_mask, end_mask, dest;
 	short i, j;
@@ -173,13 +172,13 @@ void dnfb_copyarea(struct fb_info *info, struct fb_copyarea *area)
 	incr = (area->dy <= area->sy) ? 1 : -1;
 
 	src =
-	    (ushort *) (info->screen_base + area->sy * info->fix.next_line +
+	    (ushort *) (info->screen_base + area->sy * info->fix.line_length +
 			(area->sx >> 4));
-	dest = area->dy * (info->fix.next_line >> 1) + (area->dx >> 4);
+	dest = area->dy * (info->fix.line_length >> 1) + (area->dx >> 4);
 
 	if (incr > 0) {
-		y_delta = (info->fix.next_line * 8) - area->sx - x_count;
-		x_end = area->dx + x_count - 1;
+		y_delta = (info->fix.line_length * 8) - area->sx - area->width;
+		x_end = area->dx + area->width - 1;
 		x_word_count = (x_end >> 4) - (area->dx >> 4) + 1;
 		start_mask = 0xffff0000 >> (area->dx & 0xf);
 		end_mask = 0x7ffff >> (x_end & 0xf);
@@ -188,8 +187,8 @@ void dnfb_copyarea(struct fb_info *info, struct fb_copyarea *area)
 		if ((area->dx & 0xf) < (area->sx & 0xf))
 			pre_read = 1;
 	} else {
-		y_delta = -((info->fix.next_line * 8) - area->sx - x_count);
-		x_end = area->dx - x_count + 1;
+		y_delta = -((info->fix.line_length * 8) - area->sx - area->width);
+		x_end = area->dx - area->width + 1;
 		x_word_count = (area->dx >> 4) - (x_end >> 4) + 1;
 		start_mask = 0x7ffff >> (area->dx & 0xf);
 		end_mask = 0xffff0000 >> (x_end & 0xf);
@@ -199,7 +198,7 @@ void dnfb_copyarea(struct fb_info *info, struct fb_copyarea *area)
 			pre_read = 1;
 	}
 
-	for (i = 0; i < y_count; i++) {
+	for (i = 0; i < area->height; i++) {
 
 		outb(0xc | (dest >> 16), AP_CONTROL_3A);
 
@@ -242,7 +241,7 @@ unsigned long __init dnfb_init(unsigned long mem_start)
 {
 	int err;
 
-	strcpy(&fb_info.modename, dnfb_fix);
+	strcpy(fb_info.modename, dnfb_fix.id);
 	fb_info.changevar = NULL;
 	fb_info.fontname[0] = 0;
 	fb_info.disp = &disp;
diff --git a/drivers/video/fbcon-mac.c b/drivers/video/fbcon-mac.c
deleted file mode 100644
index 6fe9f71bea65..000000000000
--- a/drivers/video/fbcon-mac.c
+++ /dev/null
@@ -1,483 +0,0 @@
-/*
- *  linux/drivers/video/fbcon-mac.c -- Low level frame buffer operations for 
- *				       x bpp packed pixels, font width != 8
- *
- *	Created 26 Dec 1997 by Michael Schmitz
- *	Based on the old macfb.c 6x11 code by Randy Thelen
- *
- *	This driver is significantly slower than the 8bit font drivers 
- *	and would probably benefit from splitting into drivers for each depth.
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License.  See the file COPYING in the main directory of this archive for
- */
-
-#include <linux/module.h>
-#include <linux/tty.h>
-#include <linux/console.h>
-#include <linux/string.h>
-#include <linux/fb.h>
-#include <linux/delay.h>
-
-#include <video/fbcon.h>
-#include <video/fbcon-mac.h>
-
-
-    /*
-     *  variable bpp packed pixels
-     */
-
-static void plot_pixel_mac(struct display *p, int bw, int pixel_x,
-			   int pixel_y);
-static int get_pixel_mac(struct display *p, int pixel_x, int pixel_y);
-
-void fbcon_mac_setup(struct display *p)
-{
-    if (p->line_length)
-	p->next_line = p->line_length;
-    else
-    	p->next_line = p->var.xres_virtual>>3;
-    p->next_plane = 0;
-}
-
-
-   /*
-    *    Macintosh
-    */
-#define PIXEL_BLACK_MAC          0
-#define PIXEL_WHITE_MAC          1
-#define PIXEL_INVERT_MAC         2
-
-void fbcon_mac_bmove(struct display *p, int sy, int sx, int dy, int dx,
-		     int height, int width)
-{
-   int i, j;
-   u8 *dest, *src;
-   int l,r,t,b,w,lo,s;
-   int dl,dr,dt,db,dw,dlo;
-   int move_up;
-
-   src = (u8 *) (p->fb_info->screen_base + sy * fontheight(p) * p->next_line);
-   dest = (u8 *) (p->fb_info->screen_base + dy * fontheight(p) * p->next_line);
-
-   if( sx == 0 && width == p->conp->vc_cols) {
-     s = height * fontheight(p) * p->next_line;
-     fb_memmove(dest, src, s);
-     return;
-   }
-   
-   l = sx * fontwidth(p);
-   r = l + width * fontwidth(p);
-   t = sy * fontheight(p);
-   b = t + height * fontheight(p);
-
-   dl = dx * fontwidth(p);
-   dr = dl + width * fontwidth(p);
-   dt = dy * fontheight(p);
-   db = dt + height * fontheight(p);
-
-   /* w is the # pixels between two long-aligned points, left and right */
-   w = (r&~31) - ((l+31)&~31);
-   dw = (dr&~31) - ((dl+31)&~31);
-   /* lo is the # pixels between the left edge and a long-aligned left pixel */
-   lo = ((l+31)&~31) - l;
-   dlo = ((dl+31)&~31) - dl;
-   
-   /* if dx != sx then, logic has to align the left and right edges for fast moves */
-   if (lo != dlo) {
-     lo = ((l+7)&~7) - l;
-     dlo = ((dl+7)&~7) - dl;
-     w = (r&~7) - ((l+7)&~7);
-     dw = (dr&~7) - ((dl+7)&~7);
-     if (lo != dlo) {
-       unsigned char err_str[128];
-       unsigned short err_buf[256];
-       unsigned long cnt, len;
-       sprintf( err_str, "ERROR: Shift algorithm: sx=%d,sy=%d,dx=%d,dy=%d,w=%d,h=%d,bpp=%d",
-		sx,sy,dx,dy,width,height,p->var.bits_per_pixel);
-       len = strlen(err_str);
-       for (cnt = 0; cnt < len; cnt++)
-         err_buf[cnt] = 0x700 | err_str[cnt];
-       fbcon_mac_putcs(p->conp, p, err_buf, len, 0, 0);
-       /* pause for the user */
-       printk( "ERROR: shift algorithm...\n" );
-       mdelay(5000);
-       return;
-     }
-   }
-
-   s = 0;
-   switch (p->var.bits_per_pixel) {
-   case 1:
-     s = w >> 3;
-     src += lo >> 3;
-     dest += lo >> 3;
-     break;
-   case 2:
-     s = w >> 2;
-     src += lo >> 2;
-     dest += lo >> 2;
-     break;
-   case 4:
-     s = w >> 1;
-     src += lo >> 1;
-     dest += lo >> 1;
-     break;
-   case 8:
-     s = w;
-     src += lo;
-     dest += lo;
-     break;
-   case 16:
-     s = w << 1;
-     src += lo << 1;
-     dest += lo << 1;
-     break;
-   case 32:
-     s = w << 2;
-     src += lo << 2;
-     dest += lo << 2;
-     break;
-   }
-
-   if (sy <= sx) {
-     i = b;
-     move_up = 0;
-     src += height * fontheight(p);
-     dest += height * fontheight(p);
-   } else {
-     i = t;
-     move_up = 1;
-   }
-
-   while (1) {
-     for (i = t; i < b; i++) {
-       j = l;
-
-       for (; j & 31 && j < r; j++)
-	 plot_pixel_mac(p, get_pixel_mac(p, j+(dx-sx), i+(dy-sy)), j, i);
-
-       if (j < r) {
-	 fb_memmove(dest, src, s);
-	 if (move_up) {
-	   dest += p->next_line;
-	   src += p->next_line;
-	 } else {
-	   dest -= p->next_line;
-	   src -= p->next_line;
-	 }
-	 j += w;
-       }
-     
-       for (; j < r; j++)
-	 plot_pixel_mac(p, get_pixel_mac(p, j+(dx-sx), i+(dy-sy)), j, i);
-     }
-
-     if (move_up) {
-       i++;
-       if (i >= b)
-	 break;
-     } else {
-       i--;
-       if (i < t)
-	 break;
-     }
-   }
-}
-
-
-void fbcon_mac_clear(struct vc_data *conp, struct display *p, int sy, int sx,
-		     int height, int width)
-{
-   int pixel;
-   int i, j;
-   int inverse;
-   u8 *dest;
-   int l,r,t,b,w,lo,s;
-
-   inverse = conp ? attr_reverse(p,conp->vc_attr) : 0;
-   pixel = inverse ? PIXEL_WHITE_MAC : PIXEL_BLACK_MAC;
-   dest = (u8 *) (p->fb_info->screen_base + sy * fontheight(p) * p->next_line);
-
-   if( sx == 0 && width == p->conp->vc_cols) {
-     s = height * fontheight(p) * p->next_line;
-     if (inverse)
-       fb_memclear(dest, s);
-     else
-       fb_memset255(dest, s);
-   }
-   
-   l = sx * fontwidth(p);
-   r = l + width * fontwidth(p);
-   t = sy * fontheight(p);
-   b = t + height * fontheight(p);
-   /* w is the # pixels between two long-aligned points, left and right */
-   w = (r&~31) - ((l+31)&~31);
-   /* lo is the # pixels between the left edge and a long-aligned left pixel */
-   lo = ((l+31)&~31) - l;
-   s = 0;
-   switch (p->var.bits_per_pixel) {
-   case 1:
-     s = w >> 3;
-     dest += lo >> 3;
-     break;
-   case 2:
-     s = w >> 2;
-     dest += lo >> 2;
-     break;
-   case 4:
-     s = w >> 1;
-     dest += lo >> 1;
-     break;
-   case 8:
-     s = w;
-     dest += lo;
-     break;
-   case 16:
-     s = w << 1;
-     dest += lo << 1;
-     break;
-   case 32:
-     s = w << 2;
-     dest += lo << 2;
-     break;
-   }
-
-   for (i = t; i < b; i++) {
-     j = l;
-
-     for (; j & 31 && j < r; j++)
-       plot_pixel_mac(p, pixel, j, i);
-
-     if (j < r) {
-       if (PIXEL_WHITE_MAC == pixel)
-	 fb_memclear(dest, s);
-       else
-	 fb_memset255(dest, s);
-       dest += p->next_line;
-       j += w;
-     }
-     
-     for (; j < r; j++)
-       plot_pixel_mac(p, pixel, j, i);
-   }
-}
-
-
-void fbcon_mac_putc(struct vc_data *conp, struct display *p, int c, int yy,
-		    int xx)
-{
-   u8 *cdat;
-   u_int rows, bold, ch_reverse, ch_underline;
-   u8 d;
-   int j;
-
-   cdat = p->fontdata+(c&p->charmask)*fontheight(p);
-   bold = attr_bold(p,c);
-   ch_reverse = attr_reverse(p,c);
-   ch_underline = attr_underline(p,c);
-
-   for (rows = 0; rows < fontheight(p); rows++) {
-      d = *cdat++;
-      if (!conp->vc_can_do_color) {
-	if (ch_underline && rows == (fontheight(p)-2))
-	  d = 0xff;
-	else if (bold)
-	  d |= d>>1;
-	if (ch_reverse)
-	  d = ~d;
-      }
-      for (j = 0; j < fontwidth(p); j++) {
-	plot_pixel_mac(p, (d & 0x80) >> 7, (xx*fontwidth(p)) + j, (yy*fontheight(p)) + rows);
-	d <<= 1;
-      }
-   }
-}
-
-
-void fbcon_mac_putcs(struct vc_data *conp, struct display *p, 
-		     const unsigned short *s, int count, int yy, int xx)
-{
-   u16 c;
-
-   while (count--) {
-      c = scr_readw(s++);
-      fbcon_mac_putc(conp, p, c, yy, xx++);
-   }
-}
-
-
-void fbcon_mac_revc(struct display *p, int xx, int yy)
-{
-   u_int rows, j;
-
-   for (rows = 0; rows < fontheight(p); rows++) {
-     for (j = 0; j < fontwidth(p); j++) {
-       plot_pixel_mac (p, PIXEL_INVERT_MAC, (xx*fontwidth(p))+j, (yy*fontheight(p))+rows);
-     }
-   }
-}
-
-static inline void plot_helper(u8 *dest, u8 bit, int bw)
-{
-    switch (bw) {
-    case PIXEL_BLACK_MAC:
-      fb_writeb( fb_readb(dest) | bit, dest );
-      break;
-    case PIXEL_WHITE_MAC:
-      fb_writeb( fb_readb(dest) & (~bit), dest );
-      break;
-    case PIXEL_INVERT_MAC:
-      fb_writeb( fb_readb(dest) ^ bit, dest );
-      break;
-    default:
-      printk( "ERROR: Unknown pixel value in plot_pixel_mac\n");
-    }
-}
-
-/*
- * plot_pixel_mac
- */
-static void plot_pixel_mac(struct display *p, int bw, int pixel_x, int pixel_y)
-{
-  u8 *dest, bit;
-  u16 *dest16, pix16;
-  u32 *dest32, pix32;
-
-  /* There *are* 68k Macs that support more than 832x624, you know :-) */
-  if (pixel_x < 0 || pixel_y < 0 || pixel_x >= p->var.xres || pixel_y >= p->var.yres) {
-    printk ("ERROR: pixel_x == %d, pixel_y == %d", pixel_x, pixel_y);
-    mdelay(1000);
-    return;
-  }
-
-  switch (p->var.bits_per_pixel) {
-  case 1:
-    dest = (u8 *) ((pixel_x >> 3) + p->fb_info->screen_base + pixel_y * p->next_line);
-    bit = 0x80 >> (pixel_x & 7);
-    plot_helper(dest, bit, bw);
-    break;
-
-  case 2:
-    dest = (u8 *) ((pixel_x >> 2) + p->fb_info->screen_base + pixel_y * p->next_line);
-    bit = 0xC0 >> ((pixel_x & 3) << 1);
-    plot_helper(dest, bit, bw);
-    break;
-
-  case 4:
-    dest = (u8 *) ((pixel_x >> 1) + p->fb_info->screen_base + pixel_y * p->next_line);
-    bit = 0xF0 >> ((pixel_x & 1) << 2);
-    plot_helper(dest, bit, bw);
-    break;
-
-  case 8:
-    dest = (u8 *) (pixel_x + p->fb_info->screen_base + pixel_y * p->next_line);
-    bit = 0xFF;
-    plot_helper(dest, bit, bw);
-    break;
-
-/* FIXME: You can't access framebuffer directly like this! */
-  case 16:
-    dest16 = (u16 *) ((pixel_x *2) + p->fb_info->screen_base + pixel_y * p->next_line);
-    pix16 = 0xFFFF;
-    switch (bw) {
-    case PIXEL_BLACK_MAC:  *dest16 = ~pix16; break;
-    case PIXEL_WHITE_MAC:  *dest16 = pix16;  break;
-    case PIXEL_INVERT_MAC: *dest16 ^= pix16; break;
-    default: printk( "ERROR: Unknown pixel value in plot_pixel_mac\n");
-    }
-    break;
-
-  case 32:
-    dest32 = (u32 *) ((pixel_x *4) + p->fb_info->screen_base + pixel_y * p->next_line);
-    pix32 = 0xFFFFFFFF;
-    switch (bw) {
-    case PIXEL_BLACK_MAC:  *dest32 = ~pix32; break;
-    case PIXEL_WHITE_MAC:  *dest32 = pix32;  break;
-    case PIXEL_INVERT_MAC: *dest32 ^= pix32; break;
-    default: printk( "ERROR: Unknown pixel value in plot_pixel_mac\n");
-    }
-    break;
-  }
-}
-
-static int get_pixel_mac(struct display *p, int pixel_x, int pixel_y)
-{
-  u8 *dest, bit;
-  u16 *dest16;
-  u32 *dest32;
-  u8 pixel=0;
-
-  switch (p->var.bits_per_pixel) {
-  case 1:
-    dest = (u8 *) ((pixel_x / 8) + p->fb_info->screen_base + pixel_y * p->next_line);
-    bit = 0x80 >> (pixel_x & 7);
-    pixel = *dest & bit;
-    break;
-  case 2:
-    dest = (u8 *) ((pixel_x / 4) + p->fb_info->screen_base + pixel_y * p->next_line);
-    bit = 0xC0 >> (pixel_x & 3);
-    pixel = *dest & bit;
-    break;
-  case 4:
-    dest = (u8 *) ((pixel_x / 2) + p->fb_info->screen_base + pixel_y * p->next_line);
-    bit = 0xF0 >> (pixel_x & 1);
-    pixel = *dest & bit;
-    break;
-  case 8:
-    dest = (u8 *) (pixel_x + p->fb_info->screen_base + pixel_y * p->next_line);
-    pixel = *dest;
-    break;
-  case 16:
-    dest16 = (u16 *) ((pixel_x *2) + p->fb_info->screen_base + pixel_y * p->next_line);
-    pixel = *dest16 ? 1 : 0;
-    break;
-  case 32:
-    dest32 = (u32 *) ((pixel_x *4) + p->fb_info->screen_base + pixel_y * p->next_line);
-    pixel = *dest32 ? 1 : 0;
-    break;
-  }
-
-  return pixel ? PIXEL_BLACK_MAC : PIXEL_WHITE_MAC;
-}
-
-
-    /*
-     *  `switch' for the low level operations
-     */
-
-struct display_switch fbcon_mac = {
-    setup:		fbcon_mac_setup,
-    bmove:		fbcon_redraw_bmove,
-    clear:		fbcon_redraw_clear,
-    putc:		fbcon_mac_putc,
-    putcs:		fbcon_mac_putcs,
-    revc:		fbcon_mac_revc,
-    fontwidthmask:	FONTWIDTHRANGE(1,8)
-};
-
-
-#ifdef MODULE
-MODULE_LICENSE("GPL");
-
-int init_module(void)
-{
-    return 0;
-}
-
-void cleanup_module(void)
-{}
-#endif /* MODULE */
-
-
-    /*
-     *  Visible symbols for modules
-     */
-
-EXPORT_SYMBOL(fbcon_mac);
-EXPORT_SYMBOL(fbcon_mac_setup);
-EXPORT_SYMBOL(fbcon_mac_bmove);
-EXPORT_SYMBOL(fbcon_mac_clear);
-EXPORT_SYMBOL(fbcon_mac_putc);
-EXPORT_SYMBOL(fbcon_mac_putcs);
-EXPORT_SYMBOL(fbcon_mac_revc);
diff --git a/drivers/video/fbcon-vga.c b/drivers/video/fbcon-vga.c
deleted file mode 100644
index 4bb15a7764ba..000000000000
--- a/drivers/video/fbcon-vga.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- *  linux/drivers/video/fbcon-vga.c -- Low level frame buffer operations for
- *				       VGA characters/attributes
- *
- *	Created 28 Mar 1998 by Geert Uytterhoeven
- *	Monochrome attributes added May 1998 by Andrew Apted
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License.  See the file COPYING in the main directory of this archive for
- *  more details.
- */
-
-#include <linux/module.h>
-#include <linux/tty.h>
-#include <linux/console.h>
-#include <linux/string.h>
-#include <linux/fb.h>
-
-#include <asm/io.h>
-
-#include <video/fbcon.h>
-#include <video/fbcon-vga.h>
-
-
-    /*
-     *  VGA screen access
-     */ 
-
-static inline void vga_writew(u16 val, u16 *addr)
-{
-#ifdef __powerpc__
-    st_le16(addr, val);
-#else
-    writew(val, (unsigned long)addr);
-#endif /* !__powerpc__ */
-}
-
-static inline u16 vga_readw(u16 *addr)
-{
-#ifdef __powerpc__
-    return ld_le16(addr);
-#else
-    return readw((unsigned long)addr);
-#endif /* !__powerpc__ */	
-}
-
-static inline void vga_memsetw(void *s, u16 c, unsigned int count)
-{
-    u16 *addr = (u16 *)s;
-
-    while (count) {
-	count--;
-	vga_writew(c, addr++);
-    }
-}
-
-static inline void vga_memmovew(u16 *to, u16 *from, unsigned int count)
-{
-    if (to < from) {
-	while (count) {
-	    count--;
-	    vga_writew(vga_readw(from++), to++);
-	}
-    } else {
-	from += count;
-	to += count;
-	while (count) {
-	    count--;
-	    vga_writew(vga_readw(--from), --to);
-	}
-    }
-}
-
-
-    /*
-     *  VGA characters/attributes
-     */
-
-static inline u16 fbcon_vga_attr(struct display *p,
-				 unsigned short s)
-{
-        /* Underline and reverse-video are mutually exclusive on MDA.
-         * Since reverse-video is used for cursors and selected areas, 
-	 * it takes precedence.
-         */
-
-	return (attr_reverse(p, s) ? 0x7000 :
-		(attr_underline(p, s) ? 0x0100 : 0x0700)) |
-	       (attr_bold(p, s) ? 0x0800 : 0) |
-	       (attr_blink(p, s) ? 0x8000 : 0);
-}
-
-void fbcon_vga_setup(struct display *p)
-{
-    p->next_line = p->line_length;
-    p->next_plane = 0;
-}
-
-void fbcon_vga_bmove(struct display *p, int sy, int sx, int dy, int dx,
-		     int height, int width)
-{
-    u16 *src, *dst;
-    int rows;
-
-    if (sx == 0 && dx == 0 && width == p->next_line/2) {
-	src = (u16 *)(p->fb_info->screen_base+sy*p->next_line);
-	dst = (u16 *)(p->fb_info->screen_base+dy*p->next_line);
-	vga_memmovew(dst, src, height*width);
-    } else if (dy < sy || (dy == sy && dx < sx)) {
-	src = (u16 *)(p->fb_info->screen_base+sy*p->next_line+sx*2);
-	dst = (u16 *)(p->fb_info->screen_base+dy*p->next_line+dx*2);
-	for (rows = height; rows-- ;) {
-	    vga_memmovew(dst, src, width);
-	    src += p->next_line/2;
-	    dst += p->next_line/2;
-	}
-    } else {
-	src = (u16 *)(p->fb_info->screen_base+(sy+height-1)*p->next_line+sx*2);
-	dst = (u16 *)(p->fb_info->screen_base+(dy+height-1)*p->next_line+dx*2);
-	for (rows = height; rows-- ;) {
-	    vga_memmovew(dst, src, width);
-	    src -= p->next_line/2;
-	    dst -= p->next_line/2;
-	}
-    }
-}
-
-void fbcon_vga_clear(struct vc_data *conp, struct display *p, int sy, int sx,
-		     int height, int width)
-{
-    u16 *dest = (u16 *)(p->fb_info->screen_base+sy*p->next_line+sx*2);
-    int rows;
-
-    if (sx == 0 && width*2 == p->next_line)      
-	vga_memsetw(dest, conp->vc_video_erase_char, height*width);
-    else
-	for (rows = height; rows-- ; dest += p->next_line/2)
-	    vga_memsetw(dest, conp->vc_video_erase_char, width);
-}
-
-void fbcon_vga_putc(struct vc_data *conp, struct display *p, int c, int y,
-		    int x)
-{
-    u16 *dst = (u16 *)(p->fb_info->screen_base+y*p->next_line+x*2);
-    if (conp->vc_can_do_color)
-    	vga_writew(c, dst);
-    else
-    	vga_writew(fbcon_vga_attr(p, c) | (c & 0xff), dst);
-}
-
-void fbcon_vga_putcs(struct vc_data *conp, struct display *p, 
-		     const unsigned short *s, int count, int y, int x)
-{
-    u16 *dst = (u16 *)(p->fb_info->screen_base+y*p->next_line+x*2);
-    u16 sattr;
-    if (conp->vc_can_do_color)
-    	while (count--)
-    	    vga_writew(scr_readw(s++), dst++);
-    else {
-        sattr = fbcon_vga_attr(p, scr_readw(s));
-        while (count--)
-	    vga_writew(sattr | ((int) (scr_readw(s++)) & 0xff), dst++);
-    }
-}
-
-void fbcon_vga_revc(struct display *p, int x, int y)
-{
-    u16 *dst = (u16 *)(p->fb_info->screen_base+y*p->next_line+x*2);
-    u16 val = vga_readw(dst);
-    val = (val & 0x88ff) | ((val<<4) & 0x7000) | ((val>>4) & 0x0700);
-    vga_writew(val, dst);
-}
-
-
-    /*
-     *  `switch' for the low level operations
-     */
-
-struct display_switch fbcon_vga = {
-    setup:		fbcon_vga_setup,
-    bmove:		fbcon_vga_bmove,
-    clear:		fbcon_vga_clear,
-    putc:		fbcon_vga_putc,
-    putcs:		fbcon_vga_putcs,
-    revc:		fbcon_vga_revc,
-    fontwidthmask:	FONTWIDTH(8)
-};
-
-
-#ifdef MODULE
-MODULE_LICENSE("GPL");
-
-int init_module(void)
-{
-    return 0;
-}
-
-void cleanup_module(void)
-{}
-#endif /* MODULE */
-
-
-    /*
-     *  Visible symbols for modules
-     */
-
-EXPORT_SYMBOL(fbcon_vga);
-EXPORT_SYMBOL(fbcon_vga_setup);
-EXPORT_SYMBOL(fbcon_vga_bmove);
-EXPORT_SYMBOL(fbcon_vga_clear);
-EXPORT_SYMBOL(fbcon_vga_putc);
-EXPORT_SYMBOL(fbcon_vga_putcs);
-EXPORT_SYMBOL(fbcon_vga_revc);
diff --git a/drivers/video/fbgen.c b/drivers/video/fbgen.c
index 744ffa986c65..b3fa7dcb6e7d 100644
--- a/drivers/video/fbgen.c
+++ b/drivers/video/fbgen.c
@@ -30,133 +30,18 @@
 #include <video/fbcon-cfb32.h>
 #include "fbcon-accel.h"
 
-/* ---- `Generic' versions of the frame buffer device operations ----------- */
-
-
-/**
- *	fbgen_get_fix - get fixed part of display
- *	@fix: fb_fix_screeninfo structure
- *	@con: virtual console number
- *	@info: frame buffer info structure
- *
- *	Get the fixed information part of the display and place it
- *	into @fix for virtual console @con on device @info.
- *
- *	Returns negative errno on error, or zero on success.
- *
- */
-
-int fbgen_get_fix(struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
-{
-    struct fb_info_gen *info2 = (struct fb_info_gen *)info;
-    struct fbgen_hwswitch *fbhw = info2->fbhw;
-    char par[info2->parsize];
-
-    if (con == -1)
-	fbhw->get_par(&par, info2);
-    else {
-	int err;
-
-	if ((err = fbhw->decode_var(&fb_display[con].var, &par, info2)))
-	    return err;
-    }
-    memset(fix, 0, sizeof(struct fb_fix_screeninfo));
-    return fbhw->encode_fix(fix, &par, info2);
-}
-
 int gen_get_fix(struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
 {
 	*fix = info->fix;
 	return 0;	
 }
 
-/**
- *	fbgen_get_var - get user defined part of display
- *	@var: fb_var_screeninfo structure
- *	@con: virtual console number
- *	@info: frame buffer info structure
- *
- *	Get the user defined part of the display and place it into @var
- *	for virtual console @con on device @info.
- *
- *	Returns negative errno on error, or zero for success.
- *
- */
-
-int fbgen_get_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
-{
-    struct fb_info_gen *info2 = (struct fb_info_gen *)info;
-    struct fbgen_hwswitch *fbhw = info2->fbhw;
-    char par[info2->parsize];
-
-    if (con == -1) {
-	fbhw->get_par(&par, info2);
-	fbhw->encode_var(var, &par, info2);
-    } else
-	*var = fb_display[con].var;
-    return 0;
-}
-
 int gen_get_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
 {
 	*var = info->var;
 	return 0;	
 }
 
-/**
- *	fbgen_set_var - set the user defined part of display
- *	@var: fb_var_screeninfo user defined part of the display
- *	@con: virtual console number
- *	@info: frame buffer info structure
- *
- *	Set the user defined part of the display as dictated by @var
- *	for virtual console @con on device @info.
- *
- *	Returns negative errno on error, or zero for success.
- *
- */
-
-int fbgen_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
-{
-    struct fb_info_gen *info2 = (struct fb_info_gen *)info;
-    int err;
-    int oldxres, oldyres, oldbpp, oldxres_virtual, oldyres_virtual, oldyoffset;
-    struct fb_bitfield oldred, oldgreen, oldblue;
-
-    if ((err = fbgen_do_set_var(var, con == info->currcon, info2)))
-	return err;
-    if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
-	oldxres = fb_display[con].var.xres;
-	oldyres = fb_display[con].var.yres;
-	oldxres_virtual = fb_display[con].var.xres_virtual;
-	oldyres_virtual = fb_display[con].var.yres_virtual;
-	oldbpp = fb_display[con].var.bits_per_pixel;
-	oldred = fb_display[con].var.red;
-	oldgreen = fb_display[con].var.green;
-	oldblue = fb_display[con].var.blue;
-	oldyoffset = fb_display[con].var.yoffset;
-	fb_display[con].var = *var;
-	if (oldxres != var->xres || oldyres != var->yres ||
-	    oldxres_virtual != var->xres_virtual ||
-	    oldyres_virtual != var->yres_virtual ||
-	    oldbpp != var->bits_per_pixel ||
-	    (!(memcmp(&oldred, &(var->red), sizeof(struct fb_bitfield)))) || 
-	    (!(memcmp(&oldgreen, &(var->green), sizeof(struct fb_bitfield)))) ||
-	    (!(memcmp(&oldblue, &(var->blue), sizeof(struct fb_bitfield)))) ||
-	    oldyoffset != var->yoffset) {
-	    fbgen_set_disp(con, info2);
-	    if (info->changevar)
-		(*info->changevar)(con);
-	    if ((err = fb_alloc_cmap(&fb_display[con].cmap, 0, 0)))
-		return err;
-	    do_install_cmap(con, info);
-	}
-    }
-    var->activate = 0;
-    return 0;
-}
-
-
 int gen_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
 {
 	int err;
@@ -191,75 +76,12 @@ int gen_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
 	return 0;
 }
 
-/**
- *	fbgen_get_cmap - get the colormap
- *	@cmap: frame buffer colormap structure
- *	@kspc: boolean, 0 copy local, 1 put_user() function
- *	@con: virtual console number
- *	@info: frame buffer info structure
- *
- *	Gets the colormap for virtual console @con and places it into
- *	@cmap for device @info.
- *
- *	Returns negative errno on error, or zero for success.
- *
- */
-
-int fbgen_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-		   struct fb_info *info)
-{
-    struct fb_info_gen *info2 = (struct fb_info_gen *)info;
-    struct fbgen_hwswitch *fbhw = info2->fbhw;
-
-    if (con == info->currcon)			/* current console ? */
-	return fb_get_cmap(cmap, kspc, fbhw->getcolreg, info);
-    else
-	if (fb_display[con].cmap.len)	/* non default colormap ? */
-	    fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
-	else {
-	    int size = fb_display[con].var.bits_per_pixel == 16 ? 64 : 256;
-	    fb_copy_cmap(fb_default_cmap(size), cmap, kspc ? 0 : 2);
-	}
-    return 0;
-}
-
 int gen_get_cmap(struct fb_cmap *cmap, int kspc, int con, struct fb_info *info)
 {
 	fb_copy_cmap (&info->cmap, cmap, kspc ? 0 : 2);
 	return 0;
 }
 
-/**
- *	fbgen_set_cmap - set the colormap
- *	@cmap: frame buffer colormap structure
- *	@kspc: boolean, 0 copy local, 1 get_user() function
- *	@con: virtual console number
- *	@info: frame buffer info structure
- *
- *	Sets the colormap @cmap for virtual console @con on
- *	device @info.
- *
- *	Returns negative errno on error, or zero for success.
- *
- */
-
-int fbgen_set_cmap(struct fb_cmap *cmap, int kspc, int con,
-		   struct fb_info *info)
-{
-    int err;
-
-    if (!fb_display[con].cmap.len) {	/* no colormap allocated ? */
-	int size = fb_display[con].var.bits_per_pixel == 16 ? 64 : 256;
-	if ((err = fb_alloc_cmap(&fb_display[con].cmap, size, 0)))
-	    return err;
-    }
-    if (con == info->currcon)			/* current console ? */
-	return fb_set_cmap(cmap, kspc, info);
-    else
-	fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1);
-    return 0;
-}
-
 int gen_set_cmap(struct fb_cmap *cmap, int kspc, int con,
 		 struct fb_info *info)
 {
@@ -285,21 +107,6 @@ int gen_set_cmap(struct fb_cmap *cmap, int kspc, int con,
 	return err;
 }
 
-/**
- *	fbgen_pan_display - pan or wrap the display
- *	@var: frame buffer user defined part of display
- *	@con: virtual console number
- *	@info: frame buffer info structure
- *
- *	Pan or wrap virtual console @con for device @info.
- *
- *	This call looks only at xoffset, yoffset and the
- *	FB_VMODE_YWRAP flag in @var.
- *
- *	Returns negative errno on error, or zero for success.
- *
- */
-
 int fbgen_pan_display(struct fb_var_screeninfo *var, int con,
 		      struct fb_info *info)
 {
@@ -334,92 +141,9 @@ int fbgen_pan_display(struct fb_var_screeninfo *var, int con,
 
 /* ---- Helper functions --------------------------------------------------- */
 
-
-/**
- *	fbgen_do_set_var - change the video mode
- *	@var: frame buffer user defined part of display
- *	@isactive: boolean, 0 inactive, 1 active
- *	@info: generic frame buffer info structure
- *
- *	Change the video mode settings for device @info.  If @isactive
- *	is non-zero, the changes will be activated immediately.
- *
- *	Return negative errno on error, or zero for success.
- *
- */
-
-int fbgen_do_set_var(struct fb_var_screeninfo *var, int isactive,
-		     struct fb_info_gen *info)
-{
-    struct fbgen_hwswitch *fbhw = info->fbhw;
-    int err, activate;
-    char par[info->parsize];
-
-    if ((err = fbhw->decode_var(var, &par, info)))
-	return err;
-    activate = var->activate;
-    if (((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) && isactive)
-	fbhw->set_par(&par, info);
-    fbhw->encode_var(var, &par, info);
-    var->activate = activate;
-    return 0;
-}
-
-/**
- *	fbgen_set_disp - set generic display
- *	@con: virtual console number
- *	@info: generic frame buffer info structure
- *
- *	Sets a display on virtual console @con for device @info.
- *
- */
-
-void fbgen_set_disp(int con, struct fb_info_gen *info)
-{
-    struct fbgen_hwswitch *fbhw = info->fbhw;
-    struct fb_fix_screeninfo fix;
-    char par[info->parsize];
-    struct display *display;
-
-    if (con >= 0)
-	display = &fb_display[con];
-    else
-	display = info->info.disp;	/* used during initialization */
-
-    if (con == -1)
-	fbhw->get_par(&par, info);
-    else
-	fbhw->decode_var(&fb_display[con].var, &par, info);
-    memset(&fix, 0, sizeof(struct fb_fix_screeninfo));
-    fbhw->encode_fix(&fix, &par, info);
-
-    display->visual = fix.visual;
-    display->type = fix.type;
-    display->type_aux = fix.type_aux;
-    display->ypanstep = fix.ypanstep;
-    display->ywrapstep = fix.ywrapstep;
-    display->line_length = fix.line_length;
-    if (info->fbhw->blank || fix.visual == FB_VISUAL_PSEUDOCOLOR ||
-	fix.visual == FB_VISUAL_DIRECTCOLOR)
-	display->can_soft_blank = 1;
-    else
-	display->can_soft_blank = 0;
-    fbhw->set_disp(&par, display, info);
-#if 0 /* FIXME: generic inverse is not supported yet */
-    display->inverse = (fix.visual == FB_VISUAL_MONO01 ? !inverse : inverse);
-#else
-    display->inverse = fix.visual == FB_VISUAL_MONO01;
-#endif
-}
-
 void gen_set_disp(int con, struct fb_info *info)
 {
-	struct display *display;
-
-	if (con >= 0)
-		display = fb_display + con;
-	else
-		display = info->disp;
+	struct display *display = (con < 0) ? info->disp : (fb_display + con);
 
 	display->visual = info->fix.visual;
 	display->type	= info->fix.type;
@@ -481,38 +205,15 @@ void do_install_cmap(int con, struct fb_info *info)
     }
 }
 
-
-/**
- *	fbgen_update_var - update user defined part of display
- *	@con: virtual console number
- *	@info: frame buffer info structure
- *
- *	Updates the user defined part of the display ('var'
- *	structure) on virtual console @con for device @info.
- *	This function is called by fbcon.c.
- *
- *	Returns negative errno on error, or zero for success.
- *
- */
-
-int fbgen_update_var(int con, struct fb_info *info)
-{
-    struct fb_info_gen *info2 = (struct fb_info_gen *)info;
-    struct fbgen_hwswitch *fbhw = info2->fbhw;
-    int err;
-
-    if (fbhw->pan_display) {
-        if ((err = fbhw->pan_display(&fb_display[con].var, info2)))
-            return err;
-    }
-    return 0;
-}
-
 int gen_update_var(int con, struct fb_info *info)
 {
+	struct display *disp = (con < 0) ? info->disp : (fb_display + con);
 	int err;
     
 	if (con == info->currcon) {
+		info->var.xoffset = disp->var.xoffset;
+		info->var.yoffset = disp->var.yoffset;
+		info->var.vmode	= disp->var.vmode;	
 		if (info->fbops->fb_pan_display) {
 			if ((err = info->fbops->fb_pan_display(&info->var, con, info)))
 				return err;
@@ -521,35 +222,6 @@ int gen_update_var(int con, struct fb_info *info)
 	return 0;
 }
 
-
-/**
- *	fbgen_switch - switch to a different virtual console.
- *	@con: virtual console number
- *	@info: frame buffer info structure
- *
- *	Switch to virtuall console @con on device @info.
- *
- *	Returns zero.
- *
- */
-
-int fbgen_switch(int con, struct fb_info *info)
-{
-    struct fb_info_gen *info2 = (struct fb_info_gen *)info;
-    struct fbgen_hwswitch *fbhw = info2->fbhw;
-
-    /* Do we have to save the colormap ? */
-    if (fb_display[info->currcon].cmap.len)
-	fb_get_cmap(&fb_display[info->currcon].cmap, 1, fbhw->getcolreg,
-		    &info2->info);
-    fbgen_do_set_var(&fb_display[con].var, 1, info2);
-    info->currcon = con;
-    /* Install new colormap */
-    do_install_cmap(con, info);
-    return 0;
-}
-
-
 int gen_switch(int con, struct fb_info *info)
 {
 	struct display *disp;
@@ -623,24 +295,15 @@ int fbgen_blank(int blank, struct fb_info *info)
 }
 
 /* generic frame buffer operations */
-EXPORT_SYMBOL(fbgen_get_fix);
 EXPORT_SYMBOL(gen_get_fix);
-EXPORT_SYMBOL(fbgen_get_var);
 EXPORT_SYMBOL(gen_get_var);
-EXPORT_SYMBOL(fbgen_set_var);
 EXPORT_SYMBOL(gen_set_var);
-EXPORT_SYMBOL(fbgen_get_cmap);
 EXPORT_SYMBOL(gen_get_cmap);
-EXPORT_SYMBOL(fbgen_set_cmap);
 EXPORT_SYMBOL(gen_set_cmap);
 EXPORT_SYMBOL(fbgen_pan_display);
 /* helper functions */
-EXPORT_SYMBOL(fbgen_do_set_var);
-EXPORT_SYMBOL(fbgen_set_disp);
 EXPORT_SYMBOL(do_install_cmap);
-EXPORT_SYMBOL(fbgen_update_var);
 EXPORT_SYMBOL(gen_update_var);
-EXPORT_SYMBOL(fbgen_switch);
 EXPORT_SYMBOL(gen_switch);
 EXPORT_SYMBOL(fbgen_blank);
 
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c
index 38d79959289f..b0010753f346 100644
--- a/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
@@ -132,7 +132,7 @@ extern int pmagbafb_init(void);
 extern int pmagbbfb_init(void);
 extern void maxinefb_init(void);
 extern int tx3912fb_init(void);
-extern int tx3912fb_setup(char*);
+extern void tx3912fb_setup(char*);
 extern int radeonfb_init(void);
 extern int radeonfb_setup(char*);
 extern int e1355fb_init(void);
diff --git a/drivers/video/fm2fb.c b/drivers/video/fm2fb.c
index b1b98e6d3eed..1b5b56d407b8 100644
--- a/drivers/video/fm2fb.c
+++ b/drivers/video/fm2fb.c
@@ -198,8 +198,9 @@ static int fm2fb_blank(int blank, struct fb_info *info)
 	if (!blank)
 		t |= FRAMEMASTER_ENABLE | FRAMEMASTER_NOLACE;
 	fm2fb_reg[0] = t;
+	return 0;
 }
-    
+
     /*
      *  Set a single color register. The values supplied are already
      *  rounded down to the hardware's capabilities (according to the
diff --git a/drivers/video/fonts.c b/drivers/video/fonts.c
index 6b531b3cd550..2c50ac006b92 100644
--- a/drivers/video/fonts.c
+++ b/drivers/video/fonts.c
@@ -33,7 +33,7 @@ static struct fbcon_font_desc *fbcon_fonts[] = {
     &font_vga_8x16,
 #endif
 #ifdef CONFIG_FONT_6x11
-#if defined(CONFIG_FBCON_MAC) || defined(CONFIG_FB_SBUS)
+#if defined(CONFIG_FBCON_ACCEL) || defined(CONFIG_FB_SBUS)
 #undef NO_FONTS
 #endif
     &font_vga_6x11,
@@ -43,7 +43,7 @@ static struct fbcon_font_desc *fbcon_fonts[] = {
     &font_sun_8x16,
 #endif
 #ifdef CONFIG_FONT_SUN12x22
-#if defined(CONFIG_FB_SBUS) || defined(CONFIG_FBCON_CFB8) || defined(CONFIG_FBCON_CFB16) || defined(CONFIG_FBCON_CFB24) || defined(CONFIG_FBCON_CFB32)
+#if defined(CONFIG_FB_SBUS) || defined(CONFIG_FBCON_CFB8) || defined(CONFIG_FBCON_CFB16) || defined(CONFIG_FBCON_CFB24) || defined(CONFIG_FBCON_CFB32) || defined(CONFIG_FBCON_ACCEL)
 #undef NO_FONTS
 #endif
     &font_sun_12x22,
diff --git a/drivers/video/hpfb.c b/drivers/video/hpfb.c
index d06782d6857b..f974ddbf55ac 100644
--- a/drivers/video/hpfb.c
+++ b/drivers/video/hpfb.c
@@ -49,6 +49,7 @@ static struct fb_fix_screeninfo hpfb_fix __initdata = {
 	visual:		FB_VISUAL_PSEUDOCOLOR,
 	line_length:	1024,
 	accel:		FB_ACCEL_NONE,
+};
 
 static struct fb_var_screeninfo hpfb_defined = {
 	xres:		1024,
@@ -163,7 +164,7 @@ int __init hpfb_init_one(unsigned long base)
 	fb_info.flags = FBINFO_FLAG_DEFAULT;
 	fb_info.var   = hpfb_defined;
 	fb_info.fix   = hpfb_fix;
-	fb_info.screen_base = hpfb_fix.smem_start;
+	fb_info.screen_base = (char *)hpfb_fix.smem_start;	// FIXME
 
 	/* The below feilds will go away !!!! */
 	fb_info.currcon		= -1;
diff --git a/drivers/video/imsttfb.c b/drivers/video/imsttfb.c
index b817517d0d21..bdd685317aba 100644
--- a/drivers/video/imsttfb.c
+++ b/drivers/video/imsttfb.c
@@ -1177,48 +1177,6 @@ static struct display_switch fbcon_imstt32 = {
 };
 #endif
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-
-extern struct vc_mode display_info;
-extern struct fb_info *console_fb_info;
-
-static void
-set_display_info (struct display *disp)
-{
-	display_info.width = disp->var.xres;
-	display_info.height = disp->var.yres;
-	display_info.depth = disp->var.bits_per_pixel;
-	display_info.pitch = disp->line_length;
-
-	switch (disp->var.xres) {
-		case 512:
-			display_info.mode = 2;
-			break;
-		case 640:
-			display_info.mode = 6;
-			break;
-		case 800:
-			display_info.mode = 12;
-			break;
-		case 832:
-			display_info.mode = 13;
-			break;
-		case 1024:
-			display_info.mode = 17;
-			break;
-		case 1152:
-			display_info.mode = 18;
-			break;
-		case 1280:
-			display_info.mode = disp->var.yres == 960 ? 19 : 20;
-			break;
-		default:
-			display_info.mode = 0;
-	}
-}
-#endif
-
 static int
 imsttfb_getcolreg (u_int regno, u_int *red, u_int *green,
 		   u_int *blue, u_int *transp, struct fb_info *info)
@@ -1385,10 +1343,6 @@ set_dispsw (struct display *disp, struct fb_info_imstt *p)
 		p->dispsw.cursor = 0;
 		p->dispsw.set_font = 0;
 	}
-
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	set_display_info(disp);
-#endif
 }
 
 static void
@@ -1864,16 +1818,6 @@ init_imstt(struct fb_info_imstt *p)
 	tmp = (in_le32(&p->dc_regs[SSTATUS]) & 0x0f00) >> 8;
 	printk("fb%u: %s frame buffer; %uMB vram; chip version %u\n",
 		i, p->fix.id, p->total_vram >> 20, tmp);
-
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	strncpy(display_info.name, "IMS,tt128mb", sizeof(display_info.name));
-	display_info.fb_address = p->frame_buffer_phys;
-	display_info.cmap_adr_address = p->cmap_regs_phys + PADDRW;
-	display_info.cmap_data_address = p->cmap_regs_phys + PDATA;
-	display_info.disp_reg_address = p->dc_regs_phys;
-	if (!console_fb_info)
-		console_fb_info = &p->info;
-#endif /* CONFIG_FB_COMPAT_XPMAC */
 }
 
 static int __devinit
diff --git a/drivers/video/macfb.c b/drivers/video/macfb.c
index a87b21dbca26..3ca76f155572 100644
--- a/drivers/video/macfb.c
+++ b/drivers/video/macfb.c
@@ -41,15 +41,6 @@
 #include <asm/machw.h>
 
 #include <video/fbcon.h>
-#include <video/fbcon-mfb.h>
-#include <video/fbcon-cfb2.h>
-#include <video/fbcon-cfb4.h>
-#include <video/fbcon-cfb8.h>
-#include <video/fbcon-cfb16.h>
-#include <video/fbcon-cfb24.h>
-#include <video/fbcon-cfb32.h>
-
-#if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB4) || defined(FBCON_HAS_CFB2)
 
 /* Common DAC base address for the LC, RBV, Valkyrie, and IIvx */
 #define DAC_BASE 0x50f24000
@@ -151,191 +142,35 @@ struct jet_cmap_regs {
 	unsigned char lut;
 };
 
-#endif
-
 #define PIXEL_TO_MM(a)	(((a)*10)/28)	/* width in mm at 72 dpi */	
 
-static char* video_base;
-static int   video_size;
-static char* video_vbase;        /* mapped */
-
 /* mode */
-static int  video_bpp;
-static int  video_width;
-static int  video_height;
-static int  video_type = FB_TYPE_PACKED_PIXELS;
-static int  video_visual;
-static int  video_linelength;
-static int  video_cmap_len;
 static int  video_slot = 0;
 
-static struct fb_var_screeninfo macfb_defined={
-	0,0,0,0,	/* W,H, W, H (virtual) load xres,xres_virtual*/
-	0,0,		/* virtual -> visible no offset */
-	8,		/* depth -> load bits_per_pixel */
-	0,		/* greyscale ? */
-	{0,0,0},	/* R */
-	{0,0,0},	/* G */
-	{0,0,0},	/* B */
-	{0,0,0},	/* transparency */
-	0,		/* standard pixel format */
-	FB_ACTIVATE_NOW,
-	-1, -1,
-	FB_ACCEL_NONE,	/* The only way to accelerate a mac is .. */
-	0L,0L,0L,0L,0L,
-	0L,0L,0,	/* No sync info */
-	FB_VMODE_NONINTERLACED,
-	{0,0,0,0,0,0}
+static struct fb_var_screeninfo macfb_defined = {
+	bits_per_pixel:	8,	
+	activae:	FB_ACTIVATE_NOW,
+	width:		-1,
+	height:		-1,
+	right_margin:	32,
+	upper_margin:	16,
+	lower_margin:	4,
+	vsync_len:	4,
+	vmode:		FB_VMODE_NONINTERLACED,
+};
+
+static struct fb_fix_screeninfo vesafb_fix = {
+	id:	"Macintosh ",
+	type:	FB_TYPE_PACKED_PIXELS,
+	accel:	FB_ACCEL_NONE,
 };
 
 static struct display disp;
 static struct fb_info fb_info;
-static struct { u_short blue, green, red, pad; } palette[256];
-static union {
-#ifdef FBCON_HAS_CFB16
-    u16 cfb16[16];
-#endif
-#ifdef FBCON_HAS_CFB24
-    u32 cfb24[16];
-#endif
-#ifdef FBCON_HAS_CFB32
-    u32 cfb32[16];
-#endif
-} fbcon_cmap;
-
+static u32 pseudo_palette[17];
 static int             inverse   = 0;
 static int             vidtest   = 0;
 
-static int macfb_update_var(int con, struct fb_info *info)
-{
-	return 0;
-}
-
-static int macfb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			 struct fb_info *info)
-{
-	memset(fix, 0, sizeof(struct fb_fix_screeninfo));
-	strcpy(fix->id, "Mac Generic");
-
-	fix->smem_start = video_base;
-	fix->smem_len = video_size;
-	fix->type = video_type;
-	fix->visual = video_visual;
-	fix->xpanstep = 0;
-	fix->ypanstep = 0;
-	fix->line_length=video_linelength;
-	return 0;
-}
-
-static int macfb_get_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *info)
-{
-	if(con==-1)
-		memcpy(var, &macfb_defined, sizeof(struct fb_var_screeninfo));
-	else
-		*var=fb_display[con].var;
-	return 0;
-}
-
-static void macfb_set_disp(int con)
-{
-	struct fb_fix_screeninfo fix;
-	struct display *display;
-	
-	if (con >= 0)
-		display = &fb_display[con];
-	else
-		display = &disp;	/* used during initialization */
-
-	macfb_get_fix(&fix, con, &fb_info);
-
-	memset(display, 0, sizeof(struct display));
-	display->visual = fix.visual;
-	display->type = fix.type;
-	display->type_aux = fix.type_aux;
-	display->ypanstep = fix.ypanstep;
-	display->ywrapstep = fix.ywrapstep;
-	display->line_length = fix.line_length;
-	display->next_line = fix.line_length;
-	display->can_soft_blank = 0;
-	display->inverse = inverse;
-	display->scrollmode = SCROLL_YREDRAW;
-	macfb_get_var(&display->var, -1, &fb_info);
-
-	switch (video_bpp) {
-#ifdef FBCON_HAS_MFB
-	case 1:
-		display->dispsw = &fbcon_mfb;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB2
-	case 2:
-		display->dispsw = &fbcon_cfb2;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB4
-	case 4:
-		display->dispsw = &fbcon_cfb4;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB8
-	case 8:
-		display->dispsw = &fbcon_cfb8;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB16
-	case 15:
-	case 16:
-		display->dispsw = &fbcon_cfb16;
-		display->dispsw_data = fbcon_cmap.cfb16;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB24
-	case 24:
-		display->dispsw = &fbcon_cfb24;
-		display->dispsw_data = fbcon_cmap.cfb24;
-		break;
-#endif
-#ifdef FBCON_HAS_CFB32
-	case 32:
-		display->dispsw = &fbcon_cfb32;
-		display->dispsw_data = fbcon_cmap.cfb32;
-		break;
-#endif
-	default:
-		display->dispsw = &fbcon_dummy;
-		return;
-	}
-}
-
-static int macfb_set_var(struct fb_var_screeninfo *var, int con,
-			 struct fb_info *info)
-{
-	static int first = 1;
-
-	if (var->xres           != macfb_defined.xres           ||
-	    var->yres           != macfb_defined.yres           ||
-	    var->xres_virtual   != macfb_defined.xres_virtual   ||
-	    var->yres_virtual   != macfb_defined.yres           ||
-	    var->xoffset                                        ||
-	    var->bits_per_pixel != macfb_defined.bits_per_pixel ||
-	    var->nonstd) {
-		if (first) {
-			printk("macfb does not support changing the video mode\n");
-			first = 0;
-		}
-		return -EINVAL;
-	}
-
-	if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_TEST)
-		return 0;
-
-	if (var->yoffset)
-		return -EINVAL;
-	return 0;
-}
-
-#if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB4) || defined(FBCON_HAS_CFB2)
 static int valkyrie_setpalette (unsigned int regno, unsigned int red,
 				unsigned int green, unsigned int blue)
 {
@@ -425,7 +260,7 @@ static int v8_brazil_setpalette (unsigned int regno, unsigned int red,
 	unsigned char _regno;
 	unsigned long flags;
 
-	if (video_bpp>8) return 1; /* failsafe */
+	if (info->var.bits_per_pixel > 8) return 1; /* failsafe */
 
 	save_flags(flags);
 	cli();
@@ -438,7 +273,7 @@ static int v8_brazil_setpalette (unsigned int regno, unsigned int red,
 	   In 4bpp, the regnos are 0x0f, 0x1f, 0x2f, etc, etc
 	   
 	   In 2bpp, the regnos are 0x3f, 0x7f, 0xbf, 0xff */
-  	_regno = (regno<<(8-video_bpp)) | (0xFF>>video_bpp);
+  	_regno = (regno<<(8 - info->var.bits_per_pixel)) | (0xFF >> info->var.vits_per_pixel);
 	writeb(_regno, &v8_brazil_cmap_regs->addr); nop();
 
 	/* send one color channel at a time */
@@ -461,7 +296,7 @@ static int rbv_setpalette (unsigned int regno, unsigned int red,
 	unsigned char _regno;
 	unsigned long flags;
 
-	if (video_bpp>8) return 1; /* failsafe */
+	if (info->var.bits_per_pixel > 8) return 1; /* failsafe */
 
 	save_flags(flags);
 	cli();
@@ -470,7 +305,7 @@ static int rbv_setpalette (unsigned int regno, unsigned int red,
 	 * regno #254 and #255 are the important ones for 1-bit color,
 	 * regno #252-255 are the important ones for 2-bit color, etc.
 	 */
-	_regno = regno + (256-(1<<video_bpp));
+	_regno = regno + (256-(1 << info->var.bits_per_pixel));
 
 	/* reset clut? (VideoToolbox sez "not necessary") */
 	writeb(0xFF, &rbv_cmap_regs->cntl); nop();
@@ -524,7 +359,7 @@ static int toby_setpalette(unsigned int regno, unsigned int red,
 	unsigned char _red  =~(red>>8);
 	unsigned char _green=~(green>>8);
 	unsigned char _blue =~(blue>>8);
-	unsigned char _regno = (regno<<(8-video_bpp)) | (0xFF>>video_bpp);
+	unsigned char _regno = (regno << (8 - info->var.bits_per_pixel)) | (0xFF >> info->var.bits_per_pixel);
 	unsigned long flags;
 
 	save_flags(flags);
@@ -581,7 +416,7 @@ static int civic_setpalette (unsigned int regno, unsigned int red,
 	unsigned long flags;
 	int clut_status;
 	
-	if (video_bpp > 8) return 1; /* failsafe */
+	if (info->var.bits_per_pixel > 8) return 1; /* failsafe */
 
 	red   >>= 8;
 	green >>= 8;
@@ -679,27 +514,6 @@ static int csc_setpalette (unsigned int regno, unsigned int red,
 	return 0;
 }
 
-#endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB4 || FBCON_HAS_CFB2 */
-
-static int macfb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
-			   unsigned *blue, unsigned *transp,
-			   struct fb_info *fb_info)
-{
-	/*
-	 *  Read a single color register and split it into colors/transparent.
-	 *  Return != 0 for invalid regno.
-	 */
-
-	if (regno >= video_cmap_len)
-		return 1;
-
-	*red   = palette[regno].red;
-	*green = palette[regno].green;
-	*blue  = palette[regno].blue;
-	*transp = 0;
-	return 0;
-}
-
 static int macfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 			   unsigned blue, unsigned transp,
 			   struct fb_info *fb_info)
@@ -711,103 +525,82 @@ static int macfb_setcolreg(unsigned regno, unsigned red, unsigned green,
 	 *  != 0 for invalid regno.
 	 */
 	
-	if (regno >= video_cmap_len)
+	if (regno >= info->cmap.len)
 		return 1;
 
-	palette[regno].red   = red;
-	palette[regno].green = green;
-	palette[regno].blue  = blue;
-
-	switch (video_bpp) {
-#ifdef FBCON_HAS_MFB
+	switch (info->var.bits_per_pixel) {
 	case 1:
 		/* We shouldn't get here */
 		break;
-#endif
-#ifdef FBCON_HAS_CFB2
 	case 2:
 		if (macfb_setpalette)
 			macfb_setpalette(regno, red, green, blue);
 		else
 			return 1;
 		break;
-#endif
-#ifdef FBCON_HAS_CFB4
 	case 4:
 		if (macfb_setpalette)
 			macfb_setpalette(regno, red, green, blue);
 		else
 			return 1;
 		break;
-#endif
-#ifdef FBCON_HAS_CFB8
 	case 8:
 		if (macfb_setpalette)
 			macfb_setpalette(regno, red, green, blue);
 		else
 			return 1;
 		break;
-#endif
-#ifdef FBCON_HAS_CFB16
-	case 15:
 	case 16:
-		/* 1:5:5:5 */
-		fbcon_cmap.cfb16[regno] =
-			((red   & 0xf800) >>  1) |
-			((green & 0xf800) >>  6) |
-			((blue  & 0xf800) >> 11) |
-			((transp != 0) << 15);
-		break;
-#endif
+		if (info->var.red.offset == 10) {
+			/* 1:5:5:5 */
+			((u32*) (info->pseudo_palette))[regno] =
+					((red   & 0xf800) >>  1) |
+					((green & 0xf800) >>  6) |
+					((blue  & 0xf800) >> 11) |
+					((transp != 0) << 15);
+		} else {
+			/* 0:5:6:5 */
+			((u32*) (info->pseudo_palette))[regno] =
+					((red   & 0xf800)      ) |
+					((green & 0xfc00) >>  5) |
+					((blue  & 0xf800) >> 11);
+		}
+		break;	
 		/* I'm pretty sure that one or the other of these
 		   doesn't exist on 68k Macs */
-#ifdef FBCON_HAS_CFB24
 	case 24:
 		red   >>= 8;
 		green >>= 8;
 		blue  >>= 8;
-		fbcon_cmap.cfb24[regno] =
-			(red   << macfb_defined.red.offset)   |
-			(green << macfb_defined.green.offset) |
-			(blue  << macfb_defined.blue.offset);
+		((u32 *)(info->pseudo_palette))[regno] =
+			(red   << info->var.red.offset)   |
+			(green << info->var.green.offset) |
+			(blue  << info->var.blue.offset);
 		break;
-#endif
-#ifdef FBCON_HAS_CFB32
 	case 32:
 		red   >>= 8;
 		green >>= 8;
 		blue  >>= 8;
-		fbcon_cmap.cfb32[regno] =
-			(red   << macfb_defined.red.offset)   |
-			(green << macfb_defined.green.offset) |
-			(blue  << macfb_defined.blue.offset);
+		((u32 *)(info->pseudo_palette))[regno] =
+			(red   << info->var.red.offset)   |
+			(green << info->var.green.offset) |
+			(blue  << info->var.blue.offset);
 		break;
-#endif
     }
     return 0;
 }
 
-static int macfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			  struct fb_info *info)
-{
-	if (con == info->currcon) /* current console? */
-		return fb_get_cmap(cmap, kspc, macfb_getcolreg, info);
-	else if (fb_display[con].cmap.len) /* non default colormap? */
-		fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
-	else
-		fb_copy_cmap(fb_default_cmap(video_cmap_len),
-		     cmap, kspc ? 0 : 2);
-	return 0;
-}
-
 static struct fb_ops macfb_ops = {
 	owner:		THIS_MODULE,
-	fb_get_fix:	macfb_get_fix,
-	fb_get_var:	macfb_get_var,
-	fb_set_var:	macfb_set_var,
-	fb_get_cmap:	macfb_get_cmap,
+	fb_get_fix:	gen_get_fix,
+	fb_get_var:	gen_get_var,
+	fb_set_var:	gen_set_var,
+	fb_get_cmap:	gen_get_cmap,
 	fb_set_cmap:	gen_set_cmap,
 	fb_setcolreg:	macfb_setcolreg,
+	fb_fillrect:	cfb_fillrect,
+	fb_copyarea:	cfb_copyarea,
+	fb_imageblit:	cfb_imageblit,
 };
 
 void __init macfb_setup(char *options, int *ints)
@@ -832,88 +625,67 @@ void __init macfb_setup(char *options, int *ints)
 	}
 }
 
-static int macfb_switch(int con, struct fb_info *info)
-{
-	/* Do we have to save the colormap? */
-	if (fb_display[info->currcon].cmap.len)
-		fb_get_cmap(&fb_display[info->currcon].cmap, 1, macfb_getcolreg,
-			    info);
-	
-	info->currcon = con;
-	/* Install new colormap */
-	do_install_cmap(con, info);
-	macfb_update_var(con, info);
-	return 1;
-}
-
 void __init macfb_init(void)
 {
+	int video_cmap_len, video_is_nubus = 0;
 	struct nubus_dev* ndev = NULL;
-	int video_is_nubus = 0;
 
 	if (!MACH_IS_MAC) 
 		return;
 
 	/* There can only be one internal video controller anyway so
 	   we're not too worried about this */
-	video_width      = mac_bi_data.dimensions & 0xFFFF;
-	video_height     = mac_bi_data.dimensions >> 16;
-	video_bpp        = mac_bi_data.videodepth;
-	video_linelength = mac_bi_data.videorow;
-	video_size       = video_linelength * video_height;
+	macfb_defined.xres = mac_bi_data.dimensions & 0xFFFF;
+	macfb_defined.yres = mac_bi_data.dimensions >> 16;
+	macfb_defined.bits_per_pixel = mac_bi_data.videodepth;
+	macfb_fix.line_length = mac_bi_data.videorow;
+	macfb_fix.smem_len = macfb_fix.line_length * macfb_defined.yres;
 	/* Note: physical address (since 2.1.127) */
-	video_base       = (void*) mac_bi_data.videoaddr;
+	macfb_fix.smem_start = (void*) mac_bi_data.videoaddr;
 	/* This is actually redundant with the initial mappings.
 	   However, there are some non-obvious aspects to the way
 	   those mappings are set up, so this is in fact the safest
 	   way to ensure that this driver will work on every possible
 	   Mac */
-	video_vbase	 = ioremap(mac_bi_data.videoaddr, video_size);
+	fb_info.screen_base = ioremap(mac_bi_data.videoaddr, macfb_fix.smem_len);
 	
 	printk("macfb: framebuffer at 0x%p, mapped to 0x%p, size %dk\n",
-	       video_base, video_vbase, video_size/1024);
+	       macfb_fix.smem_start, fb_info.screen_base, macfb_fix.smem_len/1024);
 	printk("macfb: mode is %dx%dx%d, linelength=%d\n",
-	       video_width, video_height, video_bpp, video_linelength);
+	       macfb_defined.xres, macfb_defined.yres/, macfb_defined.bits_per_pixel, macfb_fix.line_length);
 	
 	/*
 	 *	Fill in the available video resolution
 	 */
 	 
-	macfb_defined.xres           = video_width;
-	macfb_defined.yres           = video_height;
-	macfb_defined.xres_virtual   = video_width;
-	macfb_defined.yres_virtual   = video_height;
-	macfb_defined.bits_per_pixel = video_bpp;
+	macfb_defined.xres_virtual   = macfb_defined.xres;
+	macfb_defined.yres_virtual   = macfb_defined.yres;
 	macfb_defined.height = PIXEL_TO_MM(macfb_defined.yres);
 	macfb_defined.width  = PIXEL_TO_MM(macfb_defined.xres);	 
 
 	printk("macfb: scrolling: redraw\n");
-	macfb_defined.yres_virtual = video_height;
+	macfb_defined.yres_virtual = macfb_defined.yres;
 
 	/* some dummy values for timing to make fbset happy */
-	macfb_defined.pixclock     = 10000000 / video_width * 1000 / video_height;
-	macfb_defined.left_margin  = (video_width / 8) & 0xf8;
-	macfb_defined.right_margin = 32;
-	macfb_defined.upper_margin = 16;
-	macfb_defined.lower_margin = 4;
-	macfb_defined.hsync_len    = (video_width / 8) & 0xf8;
-	macfb_defined.vsync_len    = 4;
-
-	switch (video_bpp) {
+	macfb_defined.pixclock     = 10000000 / macfb_defined.xres * 1000 / macfb_defined.yres;
+	macfb_defined.left_margin  = (macfb_defined.xres / 8) & 0xf8;
+	macfb_defined.hsync_len    = (macfb_defined.xres / 8) & 0xf8;
+
+	switch (macfb_defined.bits_per_pixel) {
 	case 1:
 		/* XXX: I think this will catch any program that tries
 		   to do FBIO_PUTCMAP when the visual is monochrome */
 		video_cmap_len = 0;
-		video_visual = FB_VISUAL_MONO01;
+		macfb_fix.visual = FB_VISUAL_MONO01;
 		break;
 	case 2:
 	case 4:
 	case 8:
-		macfb_defined.red.length = video_bpp;
-		macfb_defined.green.length = video_bpp;
-		macfb_defined.blue.length = video_bpp;
-		video_cmap_len = 1 << video_bpp;
-		video_visual = FB_VISUAL_PSEUDOCOLOR;
+		macfb_defined.red.length = macfb_defined.bits_per_pixel;
+		macfb_defined.green.length = macfb_defined.bits_per_pixel;
+		macfb_defined.blue.length = macfb_defined.bits_per_pixel;
+		video_cmap_len = 1 << macfb_defined.bits_per_pixel;
+		macfb_fix.visual = FB_VISUAL_PSEUDOCOLOR;
 		break;
 	case 16:
 		macfb_defined.transp.offset = 15;
@@ -929,7 +701,7 @@ void __init macfb_init(void)
 		video_cmap_len = 16;
 		/* Should actually be FB_VISUAL_DIRECTCOLOR, but this
 		   works too */
-		video_visual = FB_VISUAL_TRUECOLOR;
+		macfb_fix.visual = FB_VISUAL_TRUECOLOR;
 		break;
 	case 24:
 	case 32:
@@ -944,11 +716,11 @@ void __init macfb_init(void)
 		printk("macfb: truecolor: "
 		       "size=0:8:8:8, shift=0:16:8:0\n");
 		video_cmap_len = 16;
-		video_visual = FB_VISUAL_TRUECOLOR;
+		macfb_fix.visual = FB_VISUAL_TRUECOLOR;
 	default:
 		video_cmap_len = 0;
-		video_visual = FB_VISUAL_MONO01;
-		printk("macfb: unknown or unsupported bit depth: %d\n", video_bpp);
+		macfb_fix.visual = FB_VISUAL_MONO01;
+		printk("macfb: unknown or unsupported bit depth: %d\n", macfb_defined.bits_per_pixel);
 		break;
 	}
 	
@@ -974,22 +746,22 @@ void __init macfb_init(void)
 
 		switch(ndev->dr_hw) {
 		case NUBUS_DRHW_APPLE_MDC:
-			strcpy( fb_info.modename, "Macintosh Display Card" );
+			strcat( macfb_fix.id, "Display Card" );
 			macfb_setpalette = mdc_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
 			break;
 		case NUBUS_DRHW_APPLE_TFB:
-			strcpy( fb_info.modename, "Toby" );
+			strcat( macfb_fix.id, "Toby" );
 			macfb_setpalette = toby_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
 			break;
 		case NUBUS_DRHW_APPLE_JET:
-			strcpy(fb_info.modename, "Jet");
+			strcat( macfb_fix.id, "Jet");
 			macfb_setpalette = jet_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
 			break;			
 		default:
-			strcpy( fb_info.modename, "Generic NuBus" );
+			strcat( macfb_fix.id, "Generic NuBus" );
 			break;
 		}
 	}
@@ -1007,14 +779,14 @@ void __init macfb_init(void)
 		case MAC_MODEL_IIX:
 		case MAC_MODEL_IICX:
 		case MAC_MODEL_IIFX:
-			strcpy( fb_info.modename, "Generic NuBus" );
+			strcat( macfb_fix.id, "Generic NuBus" );
 			break;
 
 			/* Valkyrie Quadras */
 		case MAC_MODEL_Q630:
 			/* I'm not sure about this one */
 		case MAC_MODEL_P588:
-			strcpy( fb_info.modename, "Valkyrie built-in" );
+			strcat( macfb_fix.id, "Valkyrie built-in" );
 			macfb_setpalette = valkyrie_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
 			valkyrie_cmap_regs = ioremap(DAC_BASE, 0x1000);
@@ -1037,7 +809,7 @@ void __init macfb_init(void)
 		case MAC_MODEL_Q700:
 		case MAC_MODEL_Q900:
 		case MAC_MODEL_Q950:
-			strcpy( fb_info.modename, "DAFB built-in" );
+			strcat( macfb_fix.id, "DAFB built-in" );
 			macfb_setpalette = dafb_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
 			dafb_cmap_regs = ioremap(DAFB_BASE, 0x1000);
@@ -1045,7 +817,7 @@ void __init macfb_init(void)
 
 			/* LC II uses the V8 framebuffer */
 		case MAC_MODEL_LCII:
-			strcpy( fb_info.modename, "V8 built-in" );
+			strcat( macfb_fix.id, "V8 built-in" );
 			macfb_setpalette = v8_brazil_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
 			v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);
@@ -1057,7 +829,7 @@ void __init macfb_init(void)
 		case MAC_MODEL_IIVI:
 		case MAC_MODEL_IIVX:
 		case MAC_MODEL_P600:
-			strcpy( fb_info.modename, "Brazil built-in" );
+			strcat( macfb_fix.id, "Brazil built-in" );
 			macfb_setpalette = v8_brazil_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
 			v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);
@@ -1074,7 +846,7 @@ void __init macfb_init(void)
 		case MAC_MODEL_P460:
 			macfb_setpalette = v8_brazil_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
-			strcpy( fb_info.modename, "Sonora built-in" );
+			strcat( macfb_fix.id, "Sonora built-in" );
 			v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000);
 			break;
 
@@ -1085,7 +857,7 @@ void __init macfb_init(void)
 		case MAC_MODEL_IISI:
 			macfb_setpalette = rbv_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
-			strcpy( fb_info.modename, "RBV built-in" );
+			strcat( macfb_fix.id, "RBV built-in" );
 			rbv_cmap_regs = ioremap(DAC_BASE, 0x1000);
 			break;
 
@@ -1094,7 +866,7 @@ void __init macfb_init(void)
 		case MAC_MODEL_C660:
 			macfb_setpalette = civic_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
-			strcpy( fb_info.modename, "Civic built-in" );
+			strcat( macfb_fix.id, "Civic built-in" );
 			civic_cmap_regs = ioremap(CIVIC_BASE, 0x1000);
 			break;
 
@@ -1115,7 +887,7 @@ void __init macfb_init(void)
 				v8_brazil_cmap_regs =
 					ioremap(DAC_BASE, 0x1000);
 			}
-			strcpy( fb_info.modename, "LC built-in" );
+			strcat( macfb_fix.id, "LC built-in" );
 			break;
 			/* We think this may be like the LC II */
 		case MAC_MODEL_CCL:
@@ -1125,18 +897,18 @@ void __init macfb_init(void)
 				v8_brazil_cmap_regs =
 					ioremap(DAC_BASE, 0x1000);
 			}
-			strcpy( fb_info.modename, "Color Classic built-in" );
+			strcat( macfb_fix.id, "Color Classic built-in" );
 			break;
 
 			/* And we *do* mean "weirdos" */
 		case MAC_MODEL_TV:
-			strcpy( fb_info.modename, "Mac TV built-in" );
+			strcat( macfb_fix.id, "Mac TV built-in" );
 			break;
 
 			/* These don't have colour, so no need to worry */
 		case MAC_MODEL_SE30:
 		case MAC_MODEL_CLII:
-			strcpy( fb_info.modename, "Monochrome built-in" );
+			strcat( macfb_fix.id, "Monochrome built-in" );
 			break;
 
 			/* Powerbooks are particularly difficult.  Many of
@@ -1149,7 +921,7 @@ void __init macfb_init(void)
 		case MAC_MODEL_PB140:
 		case MAC_MODEL_PB145:
 		case MAC_MODEL_PB170:
-			strcpy( fb_info.modename, "DDC built-in" );
+			strcat( macfb_fix.id, "DDC built-in" );
 			break;
 
 			/* Internal is GSC, External (if present) is ViSC */
@@ -1159,13 +931,13 @@ void __init macfb_init(void)
 		case MAC_MODEL_PB180:
 		case MAC_MODEL_PB210:
 		case MAC_MODEL_PB230:
-			strcpy( fb_info.modename, "GSC built-in" );
+			strcat( macfb_fix.id, "GSC built-in" );
 			break;
 
 			/* Internal is TIM, External is ViSC */
 		case MAC_MODEL_PB165C:
 		case MAC_MODEL_PB180C:
-			strcpy( fb_info.modename, "TIM built-in" );
+			strcat( macfb_fix.id, "TIM built-in" );
 			break;
 
 			/* Internal is CSC, External is Keystone+Ariel. */
@@ -1177,31 +949,36 @@ void __init macfb_init(void)
 		case MAC_MODEL_PB280C:
 			macfb_setpalette = csc_setpalette;
 			macfb_defined.activate = FB_ACTIVATE_NOW;
-			strcpy( fb_info.modename, "CSC built-in" );
+			strcat( macfb_fix.id, "CSC built-in" );
 			csc_cmap_regs = ioremap(CSC_BASE, 0x1000);
 			break;
 		
 		default:
-			strcpy( fb_info.modename, "Unknown/Unsupported built-in" );
+			strcat( macfb_fix.id, "Unknown/Unsupported built-in" );
 			break;
 		}
-	
-	fb_info.changevar   = NULL;
-	fb_info.node        = NODEV;
-	fb_info.fbops       = &macfb_ops;
-	fb_info.screen_base = video_vbase;
-	fb_info.disp        = &disp;
-	fb_info.switch_con  = &macfb_switch;
-	fb_info.updatevar   = &macfb_update_var;
-	fb_info.flags       = FBINFO_FLAG_DEFAULT;
-	macfb_set_disp(-1);
-	do_install_cmap(0, &fb_info);
+
+	strcpy(fb_info.modename, macfb_fix.id);	
+	fb_info.changevar	= NULL;
+	fb_info.node		= NODEV;
+	fb_info.fbops		= &macfb_ops;
+	fb_info.var		= macfb_defined;
+	fb_info.fix		= macfb_fix;
+	fb_info.currcon		= -1;	
+	fb_info.disp		= &disp;
+	fb_info.switch_con	= gen_switch;
+	fb_info.updatevar	= gen_update_var;
+	fb_info.pseudo_palatte	= pseudo_palette;
+	fb_info.flags		= FBINFO_FLAG_DEFAULT;
+
+	fb_alloc_cmap(&fb_info.cmap, video_cmap_len, 0);
+	gen_set_disp(-1, info);
 	
 	if (register_framebuffer(&fb_info) < 0)
 		return;
 
 	printk("fb%d: %s frame buffer device\n",
-	       GET_FB_IDX(fb_info.node), fb_info.modename);
+	       GET_FB_IDX(fb_info.node), fb_info.fix.id);
 }
 
 MODULE_LICENSE("GPL");
diff --git a/drivers/video/macmodes.c b/drivers/video/macmodes.c
index 159d5a7a61c5..ee713a98a79d 100644
--- a/drivers/video/macmodes.c
+++ b/drivers/video/macmodes.c
@@ -20,14 +20,9 @@
 #include <linux/fb.h>
 #include <linux/string.h>
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#endif
-
 #include <video/fbcon.h>
 #include <video/macmodes.h>
 
-
     /*
      *  MacOS video mode definitions
      *
@@ -207,171 +202,6 @@ static const struct monitor_map {
     { -1,    VMODE_640_480_60 },	/* catch-all, must be last */
 };
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-struct fb_info *console_fb_info = NULL;
-struct vc_mode display_info;
-
-static u16 palette_red[16];
-static u16 palette_green[16];
-static u16 palette_blue[16];
-static struct fb_cmap palette_cmap = {
-    0, 16, palette_red, palette_green, palette_blue, NULL
-};
-
-
-/**
- *	console_getmode - get current mode
- *	@mode: virtual console mode structure
- *
- *	Populates @mode with the current mode held in the global
- *	display_info structure.
- *
- *	Note, this function is only for XPMAC compatibility.
- *
- *	Returns zero.
- */
-
-int console_getmode(struct vc_mode *mode)
-{
-    *mode = display_info;
-    return 0;
-}
-
-
-/**
- *	console_setmode - sets current console mode
- *	@mode: virtual console mode structure
- *	@doit: boolean, 0 test mode, 1 test and activate mode
- *
- *	Sets @mode for all virtual consoles if @doit is non-zero,
- *	otherwise, test a mode for validity.
- *
- *	Note, this function is only for XPMAC compatibility.
- *
- *	Returns negative errno on error, or zero for success.
- *
- */
-
-int console_setmode(struct vc_mode *mode, int doit)
-{
-    struct fb_var_screeninfo var;
-    int cmode, err;
-
-    if (!console_fb_info)
-        return -EOPNOTSUPP;
-
-    switch(mode->depth) {
-        case 0:
-        case 8:
-            cmode = CMODE_8;
-            break;
-        case 16:
-            cmode = CMODE_16;
-            break;
-        case 24:
-        case 32:
-            cmode = CMODE_32;
-            break;
-        default:
-            return -EINVAL;
-    }
-
-    if ((err = mac_vmode_to_var(mode->mode, cmode, &var)))
-        return err;
-
-    var.activate = FB_ACTIVATE_TEST;
-    err = console_fb_info->fbops->fb_set_var(&var, fg_console,
-                                             console_fb_info);
-    if (err || !doit)
-        return err;
-    else {
-        int unit;
-
-        var.activate = FB_ACTIVATE_NOW;
-        for (unit = 0; unit < MAX_NR_CONSOLES; unit++)
-            if (fb_display[unit].conp &&
-                (GET_FB_IDX(console_fb_info->node) == con2fb_map[unit]))
-                console_fb_info->fbops->fb_set_var(&var, unit,
-                                                   console_fb_info);
-    }
-
-    return 0;
-}
-
-
-/**
- *	console_setcmap - sets palette color map for console
- *	@n_entries: number of entries in the palette (max 16)
- *	@red: value for red component of palette
- *	@green: value for green component of palette
- *	@blue: value for blue component of palette
- *
- *	Sets global palette_cmap structure and activates the palette
- *	on the current console.
- *
- *	Note, this function is only for XPMAC compatibility.
- *
- *	Returns negative errno on error, or zero for success.
- *
- */
-
-int console_setcmap(int n_entries, unsigned char *red, unsigned char *green,
-                    unsigned char *blue)
-{
-    int i, j, n = 0, err;
-
-    if (!console_fb_info)
-        return -EOPNOTSUPP;
-
-    for (i = 0; i < n_entries; i += n) {
-        n = n_entries - i;
-        if (n > 16)
-            n = 16;
-        palette_cmap.start = i;
-        palette_cmap.len = n;
-
-        for (j = 0; j < n; j++) {
-            palette_cmap.red[j] = (red[i+j] << 8) | red[i+j];
-            palette_cmap.green[j] = (green[i+j] << 8) | green[i+j];
-            palette_cmap.blue[j] = (blue[i+j] << 8) | blue[i+j];
-        }
-        err = console_fb_info->fbops->fb_set_cmap(&palette_cmap, 1,
-                                                  fg_console,
-                                                  console_fb_info);
-        if (err)
-            return err;
-    }
-
-    return 0;
-}
-
-
-/**
- *	console_powermode - sets monitor power mode
- *	@mode: power state to set
- *
- *	Sets power state as dictated by @mode.
- *
- *	Note that this function is only for XPMAC compatibility and
- *	doesn't do much.
- *
- *	Returns 0 for %VC_POWERMODE_INQUIRY, -EINVAL for VESA power
- *	settings, or -ENIXIO on failure.
- *
- */
-
-int console_powermode(int mode)
-{
-    if (mode == VC_POWERMODE_INQUIRY)
-        return 0;
-    if (mode < VESA_NO_BLANKING || mode > VESA_POWERDOWN)
-        return -EINVAL;
-    /* Not Supported */
-    return -ENXIO;
-}
-#endif /* CONFIG_FB_COMPAT_XPMAC */
-
-
 /**
  *	mac_vmode_to_var - converts vmode/cmode pair to var structure
  *	@vmode: MacOS video mode
@@ -548,6 +378,7 @@ int __init mac_find_mode(struct fb_var_screeninfo *var, struct fb_info *info,
     unsigned int dbsize = 0;
 
     if (mode_option && !strncmp(mode_option, "mac", 3)) {
+	mode_option += 3;
 	db = mac_modedb;
 	dbsize = sizeof(mac_modedb)/sizeof(*mac_modedb);
     }
diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c
index 8bc67da400b1..688a79656f91 100644
--- a/drivers/video/matrox/matroxfb_base.c
+++ b/drivers/video/matrox/matroxfb_base.c
@@ -68,7 +68,7 @@
  *               "Samuel Hocevar" <sam@via.ecp.fr>
  *                     Fixes
  *
- *               "Anton Altaparmakov"
+ *               "Anton Altaparmakov" <AntonA@bigfoot.com>
  *                     G400 MAX/non-MAX distinction
  *
  *               "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
@@ -883,25 +883,6 @@ static int matroxfb_set_var(struct fb_var_screeninfo *var, int con,
 			}
 			matrox_cfbX_init(PMINFO display);
 			my_install_cmap(PMINFO2);
-#if defined(CONFIG_FB_COMPAT_XPMAC)
-			if (console_fb_info == &ACCESS_FBINFO(fbcon)) {
-				int vmode, cmode;
-
-				display_info.width = var->xres;
-				display_info.height = var->yres;
-				display_info.depth = var->bits_per_pixel;
-				display_info.pitch = (var->xres_virtual)*(var->bits_per_pixel)/8;
-				if (mac_var_to_vmode(var, &vmode, &cmode))
-					display_info.mode = 0;
-				else
-					display_info.mode = vmode;
-				strcpy(display_info.name, ACCESS_FBINFO(matrox_name));
-				display_info.fb_address = ACCESS_FBINFO(video.base);
-				display_info.cmap_adr_address = 0;
-				display_info.cmap_data_address = 0;
-				display_info.disp_reg_address = ACCESS_FBINFO(mmio.base);
-			}
-#endif /* CONFIG_FB_COMPAT_XPMAC */
 		}
 	}
 	return 0;
@@ -1848,12 +1829,6 @@ static int initMatrox2(WPMINFO struct display* d, struct board* b){
 
 	/* FIXME: Where to move this?! */
 #if defined(CONFIG_ALL_PPC)
-#if defined(CONFIG_FB_COMPAT_XPMAC)
-	strcpy(ACCESS_FBINFO(matrox_name), "MTRX,");	/* OpenFirmware naming convension */
-	strncat(ACCESS_FBINFO(matrox_name), b->name, 26);
-	if (!console_fb_info)
-		console_fb_info = &ACCESS_FBINFO(fbcon);
-#endif
 #ifndef MODULE
 	if (_machine == _MACH_Pmac) {
 		struct fb_var_screeninfo var;
diff --git a/drivers/video/matrox/matroxfb_base.h b/drivers/video/matrox/matroxfb_base.h
index dd3143c5bc98..5ad1962a3d00 100644
--- a/drivers/video/matrox/matroxfb_base.h
+++ b/drivers/video/matrox/matroxfb_base.h
@@ -56,9 +56,6 @@
 #include <video/fbcon-cfb24.h>
 #include <video/fbcon-cfb32.h>
 
-#if defined(CONFIG_FB_COMPAT_XPMAC)
-#include <asm/vc_ioctl.h>
-#endif
 #if defined(CONFIG_PPC)
 #include <asm/prom.h>
 #include <asm/pci-bridge.h>
@@ -591,9 +588,6 @@ struct matrox_fb_info {
 				      } memory;
 			      } values;
 	struct { unsigned red, green, blue, transp; } palette[256];
-#if defined(CONFIG_FB_COMPAT_XPMAC)
-	char	matrox_name[32];
-#endif
 /* These ifdefs must be last! They differ for module & non-module compiles */
 #if defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB24) || defined(FBCON_HAS_CFB32)
 	union {
diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c
index eab5adc10685..b8b70836a5e6 100644
--- a/drivers/video/modedb.c
+++ b/drivers/video/modedb.c
@@ -131,6 +131,10 @@ static const struct fb_videomode modedb[] __initdata = {
 	NULL, 61, 1280, 1024, 9090, 200, 48, 26, 1, 184, 3,
 	0, FB_VMODE_NONINTERLACED
     }, {
+	/* 1400x1050 @ 60Hz, 63.9 kHz hsync */
+	NULL, 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3,
+	0, FB_VMODE_NONINTERLACED   	
+    }, {
 	/* 1024x768 @ 85 Hz, 70.24 kHz hsync */
 	NULL, 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6,
 	0, FB_VMODE_NONINTERLACED
diff --git a/drivers/video/offb.c b/drivers/video/offb.c
index 7a89d7c39db3..49a91978ef58 100644
--- a/drivers/video/offb.c
+++ b/drivers/video/offb.c
@@ -27,9 +27,6 @@
 #include <linux/selection.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#endif
 #include <asm/io.h>
 #include <asm/prom.h>
 #ifdef CONFIG_BOOTX_TEXT
@@ -37,67 +34,42 @@
 #endif
 
 #include <video/fbcon.h>
-#include <video/fbcon-cfb8.h>
-#include <video/fbcon-cfb16.h>
-#include <video/fbcon-cfb32.h>
 #include <video/macmodes.h>
 
 /* Supported palette hacks */
 enum {
 	cmap_unknown,
-	cmap_m64,	/* ATI Mach64 */
-	cmap_r128,	/* ATI Rage128 */
-	cmap_M3A,	/* ATI Rage Mobility M3 Head A */
-	cmap_M3B,	/* ATI Rage Mobility M3 Head B */
-	cmap_radeon,	/* ATI Radeon */
-	cmap_gxt2000,	/* IBM GXT2000 */
+	cmap_m64,		/* ATI Mach64 */
+	cmap_r128,		/* ATI Rage128 */
+	cmap_M3A,		/* ATI Rage Mobility M3 Head A */
+	cmap_M3B,		/* ATI Rage Mobility M3 Head B */
+	cmap_radeon,		/* ATI Radeon */
+	cmap_gxt2000,		/* IBM GXT2000 */
 };
 
-struct fb_info_offb {
-    struct fb_info info;
-    struct fb_fix_screeninfo fix;
-    struct fb_var_screeninfo var;
-    struct display disp;
-    struct { u_char red, green, blue, pad; } palette[256];
-    volatile unsigned char *cmap_adr;
-    volatile unsigned char *cmap_data;
-    int cmap_type;
-    int blanked;
-    union {
-#ifdef FBCON_HAS_CFB16
-	u16 cfb16[16];
-#endif
-#ifdef FBCON_HAS_CFB32
-	u32 cfb32[16];
-#endif
-    } fbcon_cmap;
+struct offb_par {
+	volatile unsigned char *cmap_adr;
+	volatile unsigned char *cmap_data;
+	int cmap_type;
+	int blanked;
 };
 
+struct offb_par default_par;
+
 #ifdef __powerpc__
 #define mach_eieio()	eieio()
 #else
 #define mach_eieio()	do {} while (0)
 #endif
 
-
     /*
      *  Interface used by the world
      */
 
 int offb_init(void);
 
-static int offb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			struct fb_info *info);
-static int offb_get_var(struct fb_var_screeninfo *var, int con,
-			struct fb_info *info);
-static int offb_set_var(struct fb_var_screeninfo *var, int con,
-			struct fb_info *info);
-static int offb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			struct fb_info *info);
-static int offb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
-			struct fb_info *info);
 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-			 u_int transp, struct fb_info *info);
+			  u_int transp, struct fb_info *info);
 static int offb_blank(int blank, struct fb_info *info);
 
 #ifdef CONFIG_BOOTX_TEXT
@@ -105,147 +77,101 @@ extern boot_infos_t *boot_infos;
 #endif
 
 static void offb_init_nodriver(struct device_node *);
-static void offb_init_fb(const char *name, const char *full_name, int width,
-		      int height, int depth, int pitch, unsigned long address,
-		      struct device_node *dp);
-
-    /*
-     *  Interface to the low level console driver
-     */
-
-static int offbcon_switch(int con, struct fb_info *info);
-static int offbcon_updatevar(int con, struct fb_info *info);
-
-    /*
-     *  Internal routines
-     */
-
-static int offb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
-			 u_int *transp, struct fb_info *info);
+static void offb_init_fb(const char *name, const char *full_name,
+			 int width, int height, int depth, int pitch,
+			 unsigned long address, struct device_node *dp);
 
 static struct fb_ops offb_ops = {
 	owner:		THIS_MODULE,
-	fb_get_fix:	offb_get_fix,
-	fb_get_var:	offb_get_var,
-	fb_set_var:	offb_set_var,
-	fb_get_cmap:	offb_get_cmap,
-	fb_set_cmap:	offb_set_cmap,
+	fb_get_fix:	gen_get_fix,
+	fb_get_var:	gen_get_var,
+	fb_set_var:	gen_set_var,
+	fb_get_cmap:	gen_get_cmap,
+	fb_set_cmap:	gen_set_cmap,
 	fb_setcolreg:	offb_setcolreg,
 	fb_blank:	offb_blank,
+	fb_fillrect:	cfb_fillrect,
+	fb_copyarea:	cfb_copyarea,
+	fb_imageblit:	cfb_imageblit,
 };
 
     /*
-     *  Get the Fixed Part of the Display
-     */
-
-static int offb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			struct fb_info *info)
-{
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;
-
-    memcpy(fix, &info2->fix, sizeof(struct fb_fix_screeninfo));
-    return 0;
-}
-
-
-    /*
-     *  Get the User Defined Part of the Display
-     */
-
-static int offb_get_var(struct fb_var_screeninfo *var, int con,
-			struct fb_info *info)
-{
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;
-
-    memcpy(var, &info2->var, sizeof(struct fb_var_screeninfo));
-    return 0;
-}
-
-
-    /*
-     *  Set the User Defined Part of the Display
-     */
-
-static int offb_set_var(struct fb_var_screeninfo *var, int con,
-			struct fb_info *info)
-{
-    struct display *display;
-    unsigned int oldbpp = 0;
-    int err;
-    int activate = var->activate;
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;
-
-    if (con >= 0)
-	display = &fb_display[con];
-    else
-	display = &info2->disp;	/* used during initialization */
-
-    if (var->xres > info2->var.xres || var->yres > info2->var.yres ||
-	var->xres_virtual > info2->var.xres_virtual ||
-	var->yres_virtual > info2->var.yres_virtual ||
-	var->bits_per_pixel > info2->var.bits_per_pixel ||
-	var->nonstd ||
-	(var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
-	return -EINVAL;
-    memcpy(var, &info2->var, sizeof(struct fb_var_screeninfo));
-
-    if ((activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
-	oldbpp = display->var.bits_per_pixel;
-	display->var = *var;
-    }
-    if ((oldbpp != var->bits_per_pixel) || (display->cmap.len == 0)) {
-	if ((err = fb_alloc_cmap(&display->cmap, 0, 0)))
-	    return err;
-	do_install_cmap(con, info);
-    }
-    return 0;
-}
-
-
-    /*
-     *  Get the Colormap
+     *  Set a single color register. The values supplied are already
+     *  rounded down to the hardware's capabilities (according to the
+     *  entries in the var structure). Return != 0 for invalid regno.
      */
 
-static int offb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			 struct fb_info *info)
+static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
+			  u_int transp, struct fb_info *info)
 {
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;
-
-    if (con == info->currcon && !info2->blanked) /* current console? */		
-	return fb_get_cmap(cmap, kspc, offb_getcolreg, info);
-    if (fb_display[con].cmap.len) /* non default colormap? */
-	fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
-    else
-    {
-	int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
-	fb_copy_cmap(fb_default_cmap(size), cmap, kspc ? 0 : 2);
-    }
-    return 0;
-}
-
-    /*
-     *  Set the Colormap
-     */
+	struct offb_par *par = (struct offb_par *) info->par;
+
+	if (!par->cmap_adr || regno > 255)
+		return 1;
+
+	red >>= 8;
+	green >>= 8;
+	blue >>= 8;
+
+	switch (par->cmap_type) {
+	case cmap_m64:
+		*par->cmap_adr = regno;
+		mach_eieio();
+		*par->cmap_data = red;
+		mach_eieio();
+		*par->cmap_data = green;
+		mach_eieio();
+		*par->cmap_data = blue;
+		mach_eieio();
+		break;
+	case cmap_M3A:
+		/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
+		out_le32((unsigned *) (par->cmap_adr + 0x58),
+			 in_le32((unsigned *) (par->cmap_adr +
+					       0x58)) & ~0x20);
+	case cmap_r128:
+		/* Set palette index & data */
+		out_8(par->cmap_adr + 0xb0, regno);
+		out_le32((unsigned *) (par->cmap_adr + 0xb4),
+			 (red << 16 | green << 8 | blue));
+		break;
+	case cmap_M3B:
+		/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
+		out_le32((unsigned *) (par->cmap_adr + 0x58),
+			 in_le32((unsigned *) (par->cmap_adr +
+					       0x58)) | 0x20);
+		/* Set palette index & data */
+		out_8(par->cmap_adr + 0xb0, regno);
+		out_le32((unsigned *) (par->cmap_adr + 0xb4),
+			 (red << 16 | green << 8 | blue));
+		break;
+	case cmap_radeon:
+		/* Set palette index & data (could be smarter) */
+		out_8(par->cmap_adr + 0xb0, regno);
+		out_le32((unsigned *) (par->cmap_adr + 0xb4),
+			 (red << 16 | green << 8 | blue));
+		break;
+	case cmap_gxt2000:
+		out_le32((unsigned *) par->cmap_adr + regno,
+			 (red << 16 | green << 8 | blue));
+		break;
+	}
 
-static int offb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
-			 struct fb_info *info)
-{
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;
-    int err;
-
-    if (!info2->cmap_adr)
-	return -ENOSYS;
-
-    if (!fb_display[con].cmap.len) {	/* no colormap allocated? */
-	int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
-	if ((err = fb_alloc_cmap(&fb_display[con].cmap, size, 0)))
-	    return err;
-    }
-    if (con == info->currcon && !info2->blanked)	/* current console? */
-	return fb_set_cmap(cmap, kspc, info);
-    else
-	fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1);
-    return 0;
+	if (regno < 16)
+		switch (info->var.bits_per_pixel) {
+		case 16:
+			((u16 *) (info->pseudo_palette))[regno] =
+			    (regno << 10) | (regno << 5) | regno;
+			break;
+		case 32:
+			{
+				int i = (regno << 8) | regno;
+				((u32 *) (info->pseudo_palette))[regno] =
+				    (i << 16) | i;
+				break;
+			}
+		}
+	return 0;
 }
 
     /*
@@ -254,62 +180,69 @@ static int offb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
 
 static int offb_blank(int blank, struct fb_info *info)
 {
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;
-    int i, j;
-
-    if (!info2->cmap_adr)
+	struct offb_par *par = (struct offb_par *) info->par;
+	int i, j;
+
+	if (!par->cmap_adr)
+		return 0;
+
+	if (!par->blanked)
+		if (!blank)
+			return 0;
+
+	par->blanked = blank;
+
+	if (blank)
+		for (i = 0; i < 256; i++) {
+			switch (par->cmap_type) {
+			case cmap_m64:
+				*par->cmap_adr = i;
+				mach_eieio();
+				for (j = 0; j < 3; j++) {
+					*par->cmap_data = 0;
+					mach_eieio();
+				}
+				break;
+			case cmap_M3A:
+				/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
+				out_le32((unsigned *) (par->cmap_adr +
+						       0x58),
+					 in_le32((unsigned *) (par->
+							       cmap_adr +
+							       0x58)) &
+					 ~0x20);
+			case cmap_r128:
+				/* Set palette index & data */
+				out_8(par->cmap_adr + 0xb0, i);
+				out_le32((unsigned *) (par->cmap_adr +
+						       0xb4), 0);
+				break;
+			case cmap_M3B:
+				/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
+				out_le32((unsigned *) (par->cmap_adr +
+						       0x58),
+					 in_le32((unsigned *) (par->
+							       cmap_adr +
+							       0x58)) |
+					 0x20);
+				/* Set palette index & data */
+				out_8(par->cmap_adr + 0xb0, i);
+				out_le32((unsigned *) (par->cmap_adr +
+						       0xb4), 0);
+				break;
+			case cmap_radeon:
+				out_8(par->cmap_adr + 0xb0, i);
+				out_le32((unsigned *) (par->cmap_adr +
+						       0xb4), 0);
+				break;
+			case cmap_gxt2000:
+				out_le32((unsigned *) par->cmap_adr + i,
+					 0);
+				break;
+			}
+	} else
+		fb_set_cmap(&info->cmap, 1, info);
 	return 0;
-
-    if (!info2->blanked) {
-       if (!blank)
-	   return 0;
-       if (fb_display[info->currcon].cmap.len)
-   	   fb_get_cmap(&fb_display[info->currcon].cmap, 1, offb_getcolreg,info);
-    }
-
-    info2->blanked = blank;
-	
-
-    if (blank)
-	for (i = 0; i < 256; i++) {
-	    switch(info2->cmap_type) {
-	    case cmap_m64:
-	        *info2->cmap_adr = i;
-	  	mach_eieio();
-	  	for (j = 0; j < 3; j++) {
-		    *info2->cmap_data = 0;
-		    mach_eieio();
-	    	}
-	    	break;
-	    case cmap_M3A:
-	        /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
-	    	out_le32((unsigned *)(info2->cmap_adr + 0x58),
-	    		in_le32((unsigned *)(info2->cmap_adr + 0x58)) & ~0x20);
-	    case cmap_r128:
-	    	/* Set palette index & data */
-    	        out_8(info2->cmap_adr + 0xb0, i);
-	    	out_le32((unsigned *)(info2->cmap_adr + 0xb4), 0);
-	    	break;
-	    case cmap_M3B:
-	        /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
-	    	out_le32((unsigned *)(info2->cmap_adr + 0x58),
-	    		in_le32((unsigned *)(info2->cmap_adr + 0x58)) | 0x20);
-	    	/* Set palette index & data */
-	    	out_8(info2->cmap_adr + 0xb0, i);
-	    	out_le32((unsigned *)(info2->cmap_adr + 0xb4), 0);
-	    	break;
-	    case cmap_radeon:
-    	        out_8(info2->cmap_adr + 0xb0, i);
-	    	out_le32((unsigned *)(info2->cmap_adr + 0xb4), 0);
-	    	break;
-	    case cmap_gxt2000:
-		out_le32((unsigned *)info2->cmap_adr + i, 0);
-		break;
-	    }
-	}
-    else
-	do_install_cmap(info->currcon, info);
-    return 0;	
 }
 
     /*
@@ -318,500 +251,311 @@ static int offb_blank(int blank, struct fb_info *info)
 
 int __init offb_init(void)
 {
-    struct device_node *dp;
-    unsigned int dpy;
+	struct device_node *dp;
+	unsigned int dpy;
 #ifdef CONFIG_BOOTX_TEXT
-    struct device_node *displays = find_type_devices("display");
-    struct device_node *macos_display = NULL;
-
-    /* If we're booted from BootX... */
-    if (prom_num_displays == 0 && boot_infos != 0) {
-	unsigned long addr = (unsigned long) boot_infos->dispDeviceBase;
-	/* find the device node corresponding to the macos display */
-	for (dp = displays; dp != NULL; dp = dp->next) {
-	    int i;
-	    /*
-	     * Grrr...  It looks like the MacOS ATI driver
-	     * munges the assigned-addresses property (but
-	     * the AAPL,address value is OK).
-	     */
-	    if (strncmp(dp->name, "ATY,", 4) == 0 && dp->n_addrs == 1) {
-		unsigned int *ap = (unsigned int *)
-		    get_property(dp, "AAPL,address", NULL);
-		if (ap != NULL) {
-		    dp->addrs[0].address = *ap;
-		    dp->addrs[0].size = 0x01000000;
+	struct device_node *displays = find_type_devices("display");
+	struct device_node *macos_display = NULL;
+
+	/* If we're booted from BootX... */
+	if (prom_num_displays == 0 && boot_infos != 0) {
+		unsigned long addr =
+		    (unsigned long) boot_infos->dispDeviceBase;
+		/* find the device node corresponding to the macos display */
+		for (dp = displays; dp != NULL; dp = dp->next) {
+			int i;
+			/*
+			 * Grrr...  It looks like the MacOS ATI driver
+			 * munges the assigned-addresses property (but
+			 * the AAPL,address value is OK).
+			 */
+			if (strncmp(dp->name, "ATY,", 4) == 0
+			    && dp->n_addrs == 1) {
+				unsigned int *ap =
+				    (unsigned int *) get_property(dp,
+								  "AAPL,address",
+								  NULL);
+				if (ap != NULL) {
+					dp->addrs[0].address = *ap;
+					dp->addrs[0].size = 0x01000000;
+				}
+			}
+
+			/*
+			 * The LTPro on the Lombard powerbook has no addresses
+			 * on the display nodes, they are on their parent.
+			 */
+			if (dp->n_addrs == 0
+			    && device_is_compatible(dp, "ATY,264LTPro")) {
+				int na;
+				unsigned int *ap = (unsigned int *)
+				    get_property(dp, "AAPL,address", &na);
+				if (ap != 0)
+					for (na /= sizeof(unsigned int);
+					     na > 0; --na, ++ap)
+						if (*ap <= addr
+						    && addr <
+						    *ap + 0x1000000)
+							goto foundit;
+			}
+
+			/*
+			 * See if the display address is in one of the address
+			 * ranges for this display.
+			 */
+			for (i = 0; i < dp->n_addrs; ++i) {
+				if (dp->addrs[i].address <= addr
+				    && addr <
+				    dp->addrs[i].address +
+				    dp->addrs[i].size)
+					break;
+			}
+			if (i < dp->n_addrs) {
+			      foundit:
+				printk(KERN_INFO "MacOS display is %s\n",
+				       dp->full_name);
+				macos_display = dp;
+				break;
+			}
 		}
-	    }
-
-	    /*
-	     * The LTPro on the Lombard powerbook has no addresses
-	     * on the display nodes, they are on their parent.
-	     */
-	    if (dp->n_addrs == 0 && device_is_compatible(dp, "ATY,264LTPro")) {
-		int na;
-		unsigned int *ap = (unsigned int *)
-		    get_property(dp, "AAPL,address", &na);
-		if (ap != 0)
-		    for (na /= sizeof(unsigned int); na > 0; --na, ++ap)
-			if (*ap <= addr && addr < *ap + 0x1000000)
-			    goto foundit;
-	    }
-
-	    /*
-	     * See if the display address is in one of the address
-	     * ranges for this display.
-	     */
-	    for (i = 0; i < dp->n_addrs; ++i) {
-		if (dp->addrs[i].address <= addr
-		    && addr < dp->addrs[i].address + dp->addrs[i].size)
-		    break;
-	    }
-	    if (i < dp->n_addrs) {
-	    foundit:
-		printk(KERN_INFO "MacOS display is %s\n", dp->full_name);
-		macos_display = dp;
-		break;
-	    }
-	}
 
-	/* initialize it */
-	offb_init_fb(macos_display? macos_display->name: "MacOS display",
-		     macos_display? macos_display->full_name: "MacOS display",
-		     boot_infos->dispDeviceRect[2],
-		     boot_infos->dispDeviceRect[3],
-		     boot_infos->dispDeviceDepth,
-		     boot_infos->dispDeviceRowBytes, addr, NULL);
-    }
+		/* initialize it */
+		offb_init_fb(macos_display ? macos_display->
+			     name : "MacOS display",
+			     macos_display ? macos_display->
+			     full_name : "MacOS display",
+			     boot_infos->dispDeviceRect[2],
+			     boot_infos->dispDeviceRect[3],
+			     boot_infos->dispDeviceDepth,
+			     boot_infos->dispDeviceRowBytes, addr, NULL);
+	}
 #endif
 
-    for (dpy = 0; dpy < prom_num_displays; dpy++) {
-	if ((dp = find_path_device(prom_display_paths[dpy])))
-	    offb_init_nodriver(dp);
-    }
-    return 0;
+	for (dpy = 0; dpy < prom_num_displays; dpy++) {
+		if ((dp = find_path_device(prom_display_paths[dpy])))
+			offb_init_nodriver(dp);
+	}
+	return 0;
 }
 
 
 static void __init offb_init_nodriver(struct device_node *dp)
 {
-    int *pp, i;
-    unsigned int len;
-    int width = 640, height = 480, depth = 8, pitch;
-    unsigned *up, address;
-
-    if ((pp = (int *)get_property(dp, "depth", &len)) != NULL
-	&& len == sizeof(int))
-	depth = *pp;
-    if ((pp = (int *)get_property(dp, "width", &len)) != NULL
-	&& len == sizeof(int))
-	width = *pp;
-    if ((pp = (int *)get_property(dp, "height", &len)) != NULL
-	&& len == sizeof(int))
-	height = *pp;
-    if ((pp = (int *)get_property(dp, "linebytes", &len)) != NULL
-	&& len == sizeof(int)) {
-	pitch = *pp;
-	if (pitch == 1)
-	    pitch = 0x1000;
-    } else
-	pitch = width;
-    if ((up = (unsigned *)get_property(dp, "address", &len)) != NULL
-	&& len == sizeof(unsigned))
-	address = (u_long)*up;
-    else {
-	for (i = 0; i < dp->n_addrs; ++i)
-	    if (dp->addrs[i].size >= pitch*height*depth/8)
-		break;
-	if (i >= dp->n_addrs) {
-	    printk(KERN_ERR "no framebuffer address found for %s\n", dp->full_name);
-	    return;
-	}
-
-	address = (u_long)dp->addrs[i].address;
+	int *pp, i;
+	unsigned int len;
+	int width = 640, height = 480, depth = 8, pitch;
+	unsigned *up, address;
+
+	if ((pp = (int *) get_property(dp, "depth", &len)) != NULL
+	    && len == sizeof(int))
+		depth = *pp;
+	if ((pp = (int *) get_property(dp, "width", &len)) != NULL
+	    && len == sizeof(int))
+		width = *pp;
+	if ((pp = (int *) get_property(dp, "height", &len)) != NULL
+	    && len == sizeof(int))
+		height = *pp;
+	if ((pp = (int *) get_property(dp, "linebytes", &len)) != NULL
+	    && len == sizeof(int)) {
+		pitch = *pp;
+		if (pitch == 1)
+			pitch = 0x1000;
+	} else
+		pitch = width;
+	if ((up = (unsigned *) get_property(dp, "address", &len)) != NULL
+	    && len == sizeof(unsigned))
+		address = (u_long) * up;
+	else {
+		for (i = 0; i < dp->n_addrs; ++i)
+			if (dp->addrs[i].size >=
+			    pitch * height * depth / 8)
+				break;
+		if (i >= dp->n_addrs) {
+			printk(KERN_ERR
+			       "no framebuffer address found for %s\n",
+			       dp->full_name);
+			return;
+		}
 
-	/* kludge for valkyrie */
-	if (strcmp(dp->name, "valkyrie") == 0) 
-	    address += 0x1000;
-    }
-    offb_init_fb(dp->name, dp->full_name, width, height, depth,
-		 pitch, address, dp);
-    
-}
+		address = (u_long) dp->addrs[i].address;
 
-static void __init offb_init_fb(const char *name, const char *full_name,
-				    int width, int height, int depth,
-				    int pitch, unsigned long address,
-				    struct device_node *dp)
-{
-    int i;
-    struct fb_fix_screeninfo *fix;
-    struct fb_var_screeninfo *var;
-    struct display *disp;
-    struct fb_info_offb *info;
-    unsigned long res_start = address;
-    unsigned long res_size = pitch*height*depth/8;
-
-    if (!request_mem_region(res_start, res_size, "offb"))
-	return;
-
-    printk(KERN_INFO "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
-	   width, height, name, address, depth, pitch);
-    if (depth != 8 && depth != 16 && depth != 32) {
-	printk(KERN_ERR "%s: can't use depth = %d\n", full_name, depth);
-	release_mem_region(res_start, res_size);
-	return;
-    }
-
-    info = kmalloc(sizeof(struct fb_info_offb), GFP_ATOMIC);
-    if (info == 0) {
-	release_mem_region(res_start, res_size);
-	return;
-    }
-    memset(info, 0, sizeof(*info));
-
-    fix = &info->fix;
-    var = &info->var;
-    disp = &info->disp;
-
-    strcpy(fix->id, "OFfb ");
-    strncat(fix->id, name, sizeof(fix->id));
-    fix->id[sizeof(fix->id)-1] = '\0';
-
-    var->xres = var->xres_virtual = width;
-    var->yres = var->yres_virtual = height;
-    fix->line_length = pitch;
-
-    fix->smem_start = address;
-    fix->smem_len = pitch * height;
-    fix->type = FB_TYPE_PACKED_PIXELS;
-    fix->type_aux = 0;
-
-    info->cmap_type = cmap_unknown;
-    if (depth == 8)
-    {
-    	/* XXX kludge for ati */
-	if (dp && !strncmp(name, "ATY,Rage128", 11)) {
-		unsigned long regbase = dp->addrs[2].address;
-		info->cmap_adr = ioremap(regbase, 0x1FFF);
-		info->cmap_type = cmap_r128;
-	} else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
-		|| !strncmp(name, "ATY,RageM3p12A", 14))) {
-		unsigned long regbase = dp->parent->addrs[2].address;
-		info->cmap_adr = ioremap(regbase, 0x1FFF);
-		info->cmap_type = cmap_M3A;
-	} else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
-		unsigned long regbase = dp->parent->addrs[2].address;
-		info->cmap_adr = ioremap(regbase, 0x1FFF);
-		info->cmap_type = cmap_M3B;
-	} else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
-		unsigned long regbase = dp->addrs[1].address;
-		info->cmap_adr = ioremap(regbase, 0x1FFF);
-		info->cmap_type = cmap_radeon;
-	} else if (!strncmp(name, "ATY,", 4)) {
-		unsigned long base = address & 0xff000000UL;
-		info->cmap_adr = ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
-		info->cmap_data = info->cmap_adr + 1;
-		info->cmap_type = cmap_m64;
-	} else if (device_is_compatible(dp, "pci1014,b7")) {
-		unsigned long regbase = dp->addrs[0].address;
-		info->cmap_adr = ioremap(regbase + 0x6000, 0x1000);
-		info->cmap_type = cmap_gxt2000;
+		/* kludge for valkyrie */
+		if (strcmp(dp->name, "valkyrie") == 0)
+			address += 0x1000;
 	}
-        fix->visual = info->cmap_adr ? FB_VISUAL_PSEUDOCOLOR
-				     : FB_VISUAL_STATIC_PSEUDOCOLOR;
-    }
-    else
-	fix->visual = /*info->cmap_adr ? FB_VISUAL_DIRECTCOLOR
-				     : */FB_VISUAL_TRUECOLOR;
-
-    var->xoffset = var->yoffset = 0;
-    var->bits_per_pixel = depth;
-    switch (depth) {
-	case 8:
-	    var->bits_per_pixel = 8;
-	    var->red.offset = 0;
-	    var->red.length = 8;
-	    var->green.offset = 0;
-	    var->green.length = 8;
-	    var->blue.offset = 0;
-	    var->blue.length = 8;
-	    var->transp.offset = 0;
-	    var->transp.length = 0;
-	    break;
-	case 16:	/* RGB 555 */
-	    var->bits_per_pixel = 16;
-	    var->red.offset = 10;
-	    var->red.length = 5;
-	    var->green.offset = 5;
-	    var->green.length = 5;
-	    var->blue.offset = 0;
-	    var->blue.length = 5;
-	    var->transp.offset = 0;
-	    var->transp.length = 0;
-	    break;
-	case 32:	/* RGB 888 */
-	    var->bits_per_pixel = 32;
-	    var->red.offset = 16;
-	    var->red.length = 8;
-	    var->green.offset = 8;
-	    var->green.length = 8;
-	    var->blue.offset = 0;
-	    var->blue.length = 8;
-	    var->transp.offset = 24;
-	    var->transp.length = 8;
-	    break;
-    }
-    var->red.msb_right = var->green.msb_right = var->blue.msb_right = var->transp.msb_right = 0;
-    var->grayscale = 0;
-    var->nonstd = 0;
-    var->activate = 0;
-    var->height = var->width = -1;
-    var->pixclock = 10000;
-    var->left_margin = var->right_margin = 16;
-    var->upper_margin = var->lower_margin = 16;
-    var->hsync_len = var->vsync_len = 8;
-    var->sync = 0;
-    var->vmode = FB_VMODE_NONINTERLACED;
-
-    disp->var = *var;
-    disp->cmap.start = 0;
-    disp->cmap.len = 0;
-    disp->cmap.red = NULL;
-    disp->cmap.green = NULL;
-    disp->cmap.blue = NULL;
-    disp->cmap.transp = NULL;
-    disp->visual = fix->visual;
-    disp->type = fix->type;
-    disp->type_aux = fix->type_aux;
-    disp->ypanstep = 0;
-    disp->ywrapstep = 0;
-    disp->line_length = fix->line_length;
-    disp->can_soft_blank = info->cmap_adr ? 1 : 0;
-    disp->inverse = 0;
-    switch (depth) {
-#ifdef FBCON_HAS_CFB8
-        case 8:
-            disp->dispsw = &fbcon_cfb8;
-            break;
-#endif
-#ifdef FBCON_HAS_CFB16
-        case 16:
-            disp->dispsw = &fbcon_cfb16;
-            disp->dispsw_data = info->fbcon_cmap.cfb16;
-            for (i = 0; i < 16; i++)
-            	if (fix->visual == FB_VISUAL_TRUECOLOR)
-		    info->fbcon_cmap.cfb16[i] =
-			    (((default_blu[i] >> 3) & 0x1f) << 10) |
-			    (((default_grn[i] >> 3) & 0x1f) << 5) |
-			    ((default_red[i] >> 3) & 0x1f);
-		else
-		    info->fbcon_cmap.cfb16[i] =
-			    (i << 10) | (i << 5) | i;
-            break;
-#endif
-#ifdef FBCON_HAS_CFB32
-        case 32:
-            disp->dispsw = &fbcon_cfb32;
-            disp->dispsw_data = info->fbcon_cmap.cfb32;
-            for (i = 0; i < 16; i++)
-            	if (fix->visual == FB_VISUAL_TRUECOLOR)
-		    info->fbcon_cmap.cfb32[i] =
-			(default_blu[i] << 16) |
-			(default_grn[i] << 8) |
-			default_red[i];
-		else
-		    info->fbcon_cmap.cfb32[i] =
-			    (i << 16) | (i << 8) | i;
-            break;
-#endif
-        default:
-            disp->dispsw = &fbcon_dummy;
-    }
-
-    disp->scrollmode = SCROLL_YREDRAW;
-
-    strcpy(info->info.modename, "OFfb ");
-    strncat(info->info.modename, full_name, sizeof(info->info.modename));
-    info->info.node = NODEV;
-    info->info.fbops = &offb_ops;
-    info->info.screen_base = ioremap(address, fix->smem_len);
-    info->info.disp = disp;
-    info->info.currcon = -1;	
-    info->info.fontname[0] = '\0';
-    info->info.changevar = NULL;
-    info->info.switch_con = &offbcon_switch;
-    info->info.updatevar = &offbcon_updatevar;
-    info->info.flags = FBINFO_FLAG_DEFAULT;
-
-    for (i = 0; i < 16; i++) {
-	int j = color_table[i];
-	info->palette[i].red = default_red[j];
-	info->palette[i].green = default_grn[j];
-	info->palette[i].blue = default_blu[j];
-    }
-    offb_set_var(var, -1, &info->info);
-
-    if (register_framebuffer(&info->info) < 0) {
-	kfree(info);
-	release_mem_region(res_start, res_size);
-	return;
-    }
-
-    printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n",
-	   GET_FB_IDX(info->info.node), full_name);
-
-#ifdef CONFIG_FB_COMPAT_XPMAC
-    if (!console_fb_info) {
-	display_info.height = var->yres;
-	display_info.width = var->xres;
-	display_info.depth = depth;
-	display_info.pitch = fix->line_length;
-	display_info.mode = 0;
-	strncpy(display_info.name, name, sizeof(display_info.name));
-	display_info.fb_address = address;
-	display_info.cmap_adr_address = 0;
-	display_info.cmap_data_address = 0;
-	display_info.disp_reg_address = 0;
-	/* XXX kludge for ati */
-	if (info->cmap_type == cmap_m64) {
-	    unsigned long base = address & 0xff000000UL;
-	    display_info.disp_reg_address = base + 0x7ffc00;
-	    display_info.cmap_adr_address = base + 0x7ffcc0;
-	    display_info.cmap_data_address = base + 0x7ffcc1;
-	}
-	console_fb_info = &info->info;
-    }
-#endif /* CONFIG_FB_COMPAT_XPMAC) */
-}
+	offb_init_fb(dp->name, dp->full_name, width, height, depth,
+		     pitch, address, dp);
 
-static int offbcon_switch(int con, struct fb_info *info)
-{
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;	
-
-    /* Do we have to save the colormap? */
-    if (fb_display[info->currcon].cmap.len && !info2->blanked)
-	fb_get_cmap(&fb_display[info->currcon].cmap, 1, offb_getcolreg, info);
-
-    info->currcon = con;
-    /* Install new colormap */
-    do_install_cmap(con, info);
-    return 0;
 }
 
-    /*
-     *  Update the `var' structure (called by fbcon.c)
-     */
-
-static int offbcon_updatevar(int con, struct fb_info *info)
-{
-    /* Nothing */
-    return 0;
-}
-
-    /*
-     *  Read a single color register and split it into
-     *  colors/transparent. Return != 0 for invalid regno.
-     */
-
-static int offb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
-			  u_int *transp, struct fb_info *info)
+static void __init offb_init_fb(const char *name, const char *full_name,
+				int width, int height, int depth,
+				int pitch, unsigned long address,
+				struct device_node *dp)
 {
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;
-
-    if (!info2->cmap_adr || regno > 255)
-	return 1;
-    
-    *red = (info2->palette[regno].red<<8) | info2->palette[regno].red;
-    *green = (info2->palette[regno].green<<8) | info2->palette[regno].green;
-    *blue = (info2->palette[regno].blue<<8) | info2->palette[regno].blue;
-    *transp = 0;
-    return 0;
-}
-
-
-    /*
-     *  Set a single color register. The values supplied are already
-     *  rounded down to the hardware's capabilities (according to the
-     *  entries in the var structure). Return != 0 for invalid regno.
-     */
+	unsigned long res_size = pitch * height * depth / 8;
+	struct offb_par *par = &default_par;
+	unsigned long res_start = address;
+	struct fb_fix_screeninfo *fix;
+	struct fb_var_screeninfo *var;
+	struct fb_info *info;
+	int i;
+
+	if (!request_mem_region(res_start, res_size, "offb"))
+		return;
+
+	printk(KERN_INFO
+	       "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
+	       width, height, name, address, depth, pitch);
+	if (depth != 8 && depth != 16 && depth != 32) {
+		printk(KERN_ERR "%s: can't use depth = %d\n", full_name,
+		       depth);
+		release_mem_region(res_start, res_size);
+		return;
+	}
 
-static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-			 u_int transp, struct fb_info *info)
-{
-    struct fb_info_offb *info2 = (struct fb_info_offb *)info;
-	
-    if (!info2->cmap_adr || regno > 255)
-	return 1;
-
-    red >>= 8;
-    green >>= 8;
-    blue >>= 8;
-
-    info2->palette[regno].red = red;
-    info2->palette[regno].green = green;
-    info2->palette[regno].blue = blue;
-
-    switch(info2->cmap_type) {
-    case cmap_m64:
-        *info2->cmap_adr = regno;
-	mach_eieio();
-	*info2->cmap_data = red;
-	mach_eieio();
-	*info2->cmap_data = green;
-	mach_eieio();
-	*info2->cmap_data = blue;
-	mach_eieio();
-	break;
-    case cmap_M3A:
-	/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
-	out_le32((unsigned *)(info2->cmap_adr + 0x58),
-		in_le32((unsigned *)(info2->cmap_adr + 0x58)) & ~0x20);
-    case cmap_r128:
-	/* Set palette index & data */
-	out_8(info2->cmap_adr + 0xb0, regno);
-	out_le32((unsigned *)(info2->cmap_adr + 0xb4),
-		(red << 16 | green << 8 | blue));
-	break;
-    case cmap_M3B:
-        /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
-    	out_le32((unsigned *)(info2->cmap_adr + 0x58),
-    		in_le32((unsigned *)(info2->cmap_adr + 0x58)) | 0x20);
-    	/* Set palette index & data */
-    	out_8(info2->cmap_adr + 0xb0, regno);
-  	out_le32((unsigned *)(info2->cmap_adr + 0xb4),
-    		(red << 16 | green << 8 | blue));
-    	break;
-    case cmap_radeon:
-	/* Set palette index & data (could be smarter) */
-	out_8(info2->cmap_adr + 0xb0, regno);
-  	out_le32((unsigned *)(info2->cmap_adr + 0xb4),
-    		(red << 16 | green << 8 | blue));
-	break;
-    case cmap_gxt2000:
-	out_le32((unsigned *)info2->cmap_adr + regno,
-		(red << 16 | green << 8 | blue));
-	break;
-    }
-
-    if (regno < 16)
-	switch (info2->var.bits_per_pixel) {
-#ifdef FBCON_HAS_CFB16
-	    case 16:
-		info2->fbcon_cmap.cfb16[regno] = (regno << 10) | (regno << 5) | regno;
+	info =
+	    kmalloc(sizeof(struct fb_info) + sizeof(struct display) +
+		    sizeof(u32) * 17, GFP_ATOMIC);
+	if (info == 0) {
+		release_mem_region(res_start, res_size);
+		return;
+	}
+	memset(info, 0, sizeof(*info));
+
+	fix = &info->fix;
+	var = &info->var;
+
+	strcpy(fix->id, "OFfb ");
+	strncat(fix->id, name, sizeof(fix->id));
+	fix->id[sizeof(fix->id) - 1] = '\0';
+
+	var->xres = var->xres_virtual = width;
+	var->yres = var->yres_virtual = height;
+	fix->line_length = pitch;
+
+	fix->smem_start = address;
+	fix->smem_len = pitch * height;
+	fix->type = FB_TYPE_PACKED_PIXELS;
+	fix->type_aux = 0;
+
+	par->cmap_type = cmap_unknown;
+	if (depth == 8) {
+		/* XXX kludge for ati */
+		if (dp && !strncmp(name, "ATY,Rage128", 11)) {
+			unsigned long regbase = dp->addrs[2].address;
+			par->cmap_adr = ioremap(regbase, 0x1FFF);
+			par->cmap_type = cmap_r128;
+		} else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
+				  || !strncmp(name, "ATY,RageM3p12A", 14))) {
+			unsigned long regbase =
+			    dp->parent->addrs[2].address;
+			par->cmap_adr = ioremap(regbase, 0x1FFF);
+			par->cmap_type = cmap_M3A;
+		} else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
+			unsigned long regbase =
+			    dp->parent->addrs[2].address;
+			par->cmap_adr = ioremap(regbase, 0x1FFF);
+			par->cmap_type = cmap_M3B;
+		} else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
+			unsigned long regbase = dp->addrs[1].address;
+			par->cmap_adr = ioremap(regbase, 0x1FFF);
+			par->cmap_type = cmap_radeon;
+		} else if (!strncmp(name, "ATY,", 4)) {
+			unsigned long base = address & 0xff000000UL;
+			par->cmap_adr =
+			    ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
+			par->cmap_data = info->cmap_adr + 1;
+			par->cmap_type = cmap_m64;
+		} else if (device_is_compatible(dp, "pci1014,b7")) {
+			unsigned long regbase = dp->addrs[0].address;
+			par->cmap_adr = ioremap(regbase + 0x6000, 0x1000);
+			par->cmap_type = cmap_gxt2000;
+		}
+		fix->visual = par->cmap_adr ? FB_VISUAL_PSEUDOCOLOR
+		    : FB_VISUAL_STATIC_PSEUDOCOLOR;
+	} else
+		fix->visual =	/* par->cmap_adr ? FB_VISUAL_DIRECTCOLOR
+				   : */ FB_VISUAL_TRUECOLOR;
+
+	var->xoffset = var->yoffset = 0;
+	var->bits_per_pixel = depth;
+	switch (depth) {
+	case 8:
+		var->bits_per_pixel = 8;
+		var->red.offset = 0;
+		var->red.length = 8;
+		var->green.offset = 0;
+		var->green.length = 8;
+		var->blue.offset = 0;
+		var->blue.length = 8;
+		var->transp.offset = 0;
+		var->transp.length = 0;
 		break;
-#endif
-#ifdef FBCON_HAS_CFB32
-	    case 32:
-	    {
-		int i = (regno << 8) | regno;
-		info2->fbcon_cmap.cfb32[regno] = (i << 16) | i;
+	case 16:		/* RGB 555 */
+		var->bits_per_pixel = 16;
+		var->red.offset = 10;
+		var->red.length = 5;
+		var->green.offset = 5;
+		var->green.length = 5;
+		var->blue.offset = 0;
+		var->blue.length = 5;
+		var->transp.offset = 0;
+		var->transp.length = 0;
 		break;
-	    }
-#endif
-       }
+	case 32:		/* RGB 888 */
+		var->bits_per_pixel = 32;
+		var->red.offset = 16;
+		var->red.length = 8;
+		var->green.offset = 8;
+		var->green.length = 8;
+		var->blue.offset = 0;
+		var->blue.length = 8;
+		var->transp.offset = 24;
+		var->transp.length = 8;
+		break;
+	}
+	var->red.msb_right = var->green.msb_right = var->blue.msb_right =
+	    var->transp.msb_right = 0;
+	var->grayscale = 0;
+	var->nonstd = 0;
+	var->activate = 0;
+	var->height = var->width = -1;
+	var->pixclock = 10000;
+	var->left_margin = var->right_margin = 16;
+	var->upper_margin = var->lower_margin = 16;
+	var->hsync_len = var->vsync_len = 8;
+	var->sync = 0;
+	var->vmode = FB_VMODE_NONINTERLACED;
+
+	strcpy(fix->id, "OFfb ");
+	strncat(fix->id, full_name, sizeof(fix->id));
+	strcpy(info->modename, fix->id);
+	info->node = NODEV;
+	info->fbops = &offb_ops;
+	info->screen_base = ioremap(address, fix->smem_len);
+	info->par = par;
+	info->disp = (struct display *) (info + 1);
+	info->pseudo_palette = (void *) (info->disp + 1);
+	info->currcon = -1;
+	info->fontname[0] = '\0';
+	info->changevar = NULL;
+	info->switch_con = gen_switch;
+	info->updatevar = gen_update_var;
+	info->flags = FBINFO_FLAG_DEFAULT;
+
+	fb_alloc_cmap(&info->cmap, 256, 0);
+
+	gen_set_disp(-1, info);
+
+	if (register_framebuffer(info) < 0) {
+		kfree(info);
+		release_mem_region(res_start, res_size);
+		return;
+	}
 
-    return 0;
+	printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n",
+	       GET_FB_IDX(info->info.node), full_name);
 }
 
 MODULE_LICENSE("GPL");
diff --git a/drivers/video/platinumfb.c b/drivers/video/platinumfb.c
index e4c405b753d0..001a0eb4a2fc 100644
--- a/drivers/video/platinumfb.c
+++ b/drivers/video/platinumfb.c
@@ -33,9 +33,6 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/nvram.h>
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#endif
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/pgtable.h>
@@ -510,24 +507,6 @@ static void platinum_set_par(const struct fb_par_platinum *par, struct fb_info_p
 	set_platinum_clock(info);
 
 	out_be32(&platinum_regs->reg[24].r, 0);	/* turn display on */
-
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	if (console_fb_info == &info->fb_info) {
-		display_info.height = par->yres;
-		display_info.width = par->xres;
-		display_info.depth = ( (cmode == CMODE_32) ? 32 :
-				      ((cmode == CMODE_16) ? 16 : 8));
-		display_info.pitch = vmode_attrs[vmode-1].hres * (1<<cmode) + 0x20;
-		display_info.mode = vmode;
-		strncpy(display_info.name, "platinum",
-			sizeof(display_info.name));
-		display_info.fb_address = info->frame_buffer_phys + init->fb_offset + 0x20;
-		display_info.cmap_adr_address = info->cmap_regs_phys;
-		display_info.cmap_data_address = info->cmap_regs_phys + 0x30;
-		display_info.disp_reg_address = info->platinum_regs_phys;
-		
-	}
-#endif /* CONFIG_FB_COMPAT_XPMAC */
 }
 
 
@@ -705,11 +684,6 @@ static void __init platinum_of_init(struct device_node *dp)
 		kfree(info);
 		return;
 	}
-
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	if (!console_fb_info)
-		console_fb_info = &info->fb_info;
-#endif
 }
 
 /*
diff --git a/drivers/video/pm2fb.c b/drivers/video/pm2fb.c
index dfc42394feda..b83288d8b70a 100644
--- a/drivers/video/pm2fb.c
+++ b/drivers/video/pm2fb.c
@@ -57,7 +57,7 @@
 #error	"The endianness of the target host has not been defined."
 #endif
 
-#if defined(__BIG_ENDIAN) && !defined(__sparc__)
+#if defined(__BIG_ENDIAN) && !defined(__sparc__) && (!defined(CONFIG_PPC) || defined(CONFIG_FB_PM2_CVPPC))
 #define PM2FB_BE_APERTURE
 #endif
 
diff --git a/drivers/video/q40fb.c b/drivers/video/q40fb.c
index 289a0433c89f..a456b949efbd 100644
--- a/drivers/video/q40fb.c
+++ b/drivers/video/q40fb.c
@@ -42,7 +42,7 @@ static struct fb_fix_screeninfo q40fb_fix __initdata = {
 	type:		FB_TYPE_PACKED_PIXELS,
 	visual:		FB_VISUAL_TRUECOLOR,
 	line_length:	1024*2,
-	accel_flags:	FB_ACCEL_NONE,
+	accel:		FB_ACCEL_NONE,
 };
 
 static struct fb_var_screeninfo q40fb_var __initdata = {
@@ -95,9 +95,9 @@ static int q40fb_setcolreg(unsigned regno, unsigned red, unsigned green,
     blue>>=10;
 
     if (regno < 16) {
-	info->pseudo_palette[regno] = ((red & 31) <<6) |
-	                              ((green & 31) << 11) |
-	                         	(blue & 63);
+	((u16 *)info->pseudo_palette)[regno] = ((red & 31) <<6) |
+					       ((green & 31) << 11) |
+					       (blue & 63);
     }
     return 0;
 }
diff --git a/drivers/video/retz3fb.c b/drivers/video/retz3fb.c
index 013b15249bf6..4b5fcdb71c51 100644
--- a/drivers/video/retz3fb.c
+++ b/drivers/video/retz3fb.c
@@ -1274,8 +1274,6 @@ static int retz3fb_set_var(struct fb_var_screeninfo *var, int con,
 static int retz3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
 			    struct fb_info *info)
 {
-	struct retz3_fb_info *zinfo = retz3info(info);
-
 	if (con == info->currcon) /* current console? */
 		return(fb_get_cmap(cmap, kspc, retz3_getcolreg, info));
 	else if (fb_display[con].cmap.len) /* non default colormap? */
@@ -1446,8 +1444,6 @@ int __init retz3fb_init(void)
 
 static int z3fb_switch(int con, struct fb_info *info)
 {
-	struct retz3_fb_info *zinfo = retz3info(info);
-
 	/* Do we have to save the colormap? */
 	if (fb_display[info->currcon].cmap.len)
 		fb_get_cmap(&fb_display[info->currcon].cmap, 1,
diff --git a/drivers/video/sgivwfb.c b/drivers/video/sgivwfb.c
index 144b83f80401..1af77475c3f7 100644
--- a/drivers/video/sgivwfb.c
+++ b/drivers/video/sgivwfb.c
@@ -27,18 +27,15 @@
 #include <asm/mtrr.h>
 
 #include <video/fbcon.h>
-#include <video/fbcon-cfb8.h>
-#include <video/fbcon-cfb16.h>
-#include <video/fbcon-cfb32.h>
 
 #define INCLUDE_TIMING_TABLE_DATA
 #define DBE_REG_BASE regs
-#include "sgivwfb.h"
+#include <video/sgivw.h>
 
-struct sgivwfb_par {
-  struct fb_var_screeninfo var;
-  u_long timing_num;
-  int valid;
+struct sgivw_par {
+	asregs *regs;
+	u32 cmap_fifo;
+	u_long timing_num;
 };
 
 /*
@@ -49,113 +46,109 @@ struct sgivwfb_par {
  */
 
 /* set by arch/i386/kernel/setup.c */
-u_long                sgivwfb_mem_phys;
-u_long                sgivwfb_mem_size;
+u_long sgivwfb_mem_phys;
+u_long sgivwfb_mem_size;
 
-static asregs         *regs;
 static struct fb_info fb_info;
-static struct { u_char red, green, blue, pad; } palette[256];
-static char           sgivwfb_name[16] = "SGI Vis WS FB";
-static u32            cmap_fifo;
-static int            ypan       = 0;
-static int            ywrap      = 0;
+static struct sgivw_par default_par;
+static int ypan = 0;
+static int ywrap = 0;
+
+static struct fb_fix_screeninfo sgivwfb_fix __initdata = {
+	id:		"SGI Vis WS FB",
+	type:		FB_TYPE_PACKED_PIXELS,
+        visual:		FB_VISUAL_PSEUDOCOLOR,
+	mmio_start:	DBE_REG_PHYS,
+	mmio_len:	DBE_REG_SIZE,
+        accel_flags:	FB_ACCEL_NONE
+};
+
+static struct fb_var_screeninfo sgivwfb_var __initdata = {
+        /* 640x480, 8 bpp */
+        xres:		640,
+	yres:		480,
+	xres_virtual:	640,
+	yres_virtual:	480,
+	bits_per_pixel:	8,
+        red:		{0, 8, 0},
+	green:		{0, 8, 0},
+	blue:		{0, 8, 0},
+        height:		-1,
+	width:		-1,
+	pixclock:	20000,
+	left_margin:	64,
+	right_margin:	64,
+	upper_margin:	32,
+	lower_margin:	32,
+	hsync_len:	64,
+	vsync_len:	2,
+        vmode:		FB_VMODE_NONINTERLACED
+};
 
 /* console related variables */
 static struct display disp;
 
-static union {
-#ifdef FBCON_HAS_CFB16
-  u16 cfb16[16];
-#endif
-#ifdef FBCON_HAS_CFB32
-  u32 cfb32[16];
-#endif
-} fbcon_cmap;
-
-static struct sgivwfb_par par_current = {
-  {                             /* var (screeninfo) */
-    /* 640x480, 8 bpp */
-    640, 480, 640, 480, 0, 0, 8, 0,
-    {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
-    0, 0, -1, -1, 0, 20000, 64, 64, 32, 32, 64, 2,
-    0, FB_VMODE_NONINTERLACED
-  },
-  0,                            /* timing_num */
-  0				/* par not activated */
-};
-
 /*
  *  Interface used by the world
  */
-int sgivwfb_setup(char*);
-
-static int sgivwfb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			   struct fb_info *info);
-static int sgivwfb_get_var(struct fb_var_screeninfo *var, int con,
-			   struct fb_info *info);
-static int sgivwfb_set_var(struct fb_var_screeninfo *var, int con,
-			   struct fb_info *info);
-static int sgivwfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			    struct fb_info *info);
-static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-			     u_int transp, struct fb_info *info);
+int sgivwfb_init(void);
+int sgivwfb_setup(char *);
+
+static int sgivwfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
+static int sgivwfb_set_par(struct fb_info *info);
+static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green,
+			     u_int blue, u_int transp,
+			     struct fb_info *info);
 static int sgivwfb_mmap(struct fb_info *info, struct file *file,
-                        struct vm_area_struct *vma);
+			struct vm_area_struct *vma);
 
 static struct fb_ops sgivwfb_ops = {
 	owner:		THIS_MODULE,
-	fb_get_fix:	sgivwfb_get_fix,
-	fb_get_var:	sgivwfb_get_var,
-	fb_set_var:	sgivwfb_set_var,
-	fb_get_cmap:	sgivwfb_get_cmap,
+	fb_get_fix:	gen_get_fix,
+	fb_get_var:	gen_get_var,
+	fb_set_var:	gen_set_var,
+	fb_get_cmap:	gen_get_cmap,
 	fb_set_cmap:	gen_set_cmap,
+	fb_check_var:	sgivwfb_check_var,
+	fb_set_par:	sgivwfb_set_par,
 	fb_setcolreg:	sgivwfb_setcolreg,
+	fb_fillrect:	cfb_fillrect,
+	fb_copyarea:	cfb_copyarea,
+	fb_imageblit:	cfb_imageblit,
 	fb_mmap:	sgivwfb_mmap,
 };
 
 /*
- *  Interface to the low level console driver
- */
-int sgivwfb_init(void);
-static int sgivwfbcon_switch(int con, struct fb_info *info);
-static int sgivwfbcon_updatevar(int con, struct fb_info *info);
-
-/*
  *  Internal routines
  */
 static u_long get_line_length(int xres_virtual, int bpp);
 static unsigned long bytes_per_pixel(int bpp);
-static void activate_par(struct sgivwfb_par *par);
-static void sgivwfb_encode_fix(struct fb_fix_screeninfo *fix,
-			       struct fb_var_screeninfo *var);
-static int sgivwfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
-			     u_int *transp, struct fb_info *info);
 
 static unsigned long get_line_length(int xres_virtual, int bpp)
 {
-  return(xres_virtual * bytes_per_pixel(bpp));
+	return (xres_virtual * bytes_per_pixel(bpp));
 }
 
 static unsigned long bytes_per_pixel(int bpp)
 {
-  unsigned long length;
-
-  switch (bpp) {
-  case 8:
-    length = 1;
-    break;
-  case 16:
-    length = 2;
-    break;
-  case 32:
-    length = 4;
-    break;
-  default:
-    printk(KERN_INFO "sgivwfb: unsupported bpp=%d\n", bpp);
-    length = 0;
-    break;
-  }
-  return(length);
+	unsigned long length;
+
+	switch (bpp) {
+	case 8:
+		length = 1;
+		break;
+	case 16:
+		length = 2;
+		break;
+	case 32:
+		length = 4;
+		break;
+	default:
+		printk(KERN_INFO "sgivwfb: unsupported bpp=%d\n", bpp);
+		length = 0;
+		break;
+	}
+	return (length);
 }
 
 /*
@@ -168,360 +161,476 @@ static unsigned long bytes_per_pixel(int bpp)
 
 static void dbe_TurnOffDma(void)
 {
-  int i;
-  unsigned int readVal;
-
-  // Check to see if things are already turned off:
-  // 1) Check to see if dbe is not using the internal dotclock.
-  // 2) Check to see if the xy counter in dbe is already off.
-
-  DBE_GETREG(ctrlstat, readVal);
-  if (GET_DBE_FIELD(CTRLSTAT, PCLKSEL, readVal) < 2)
-    return;
-
-  DBE_GETREG(vt_xy, readVal);
-  if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1)
-    return;
-
-  // Otherwise, turn off dbe
-
-  DBE_GETREG(ovr_control, readVal);
-  SET_DBE_FIELD(OVR_CONTROL, OVR_DMA_ENABLE, readVal, 0);
-  DBE_SETREG(ovr_control, readVal);
-  udelay(1000);
-  DBE_GETREG(frm_control, readVal);
-  SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, readVal, 0);
-  DBE_SETREG(frm_control, readVal);
-  udelay(1000);
-  DBE_GETREG(did_control, readVal);
-  SET_DBE_FIELD(DID_CONTROL, DID_DMA_ENABLE, readVal, 0);
-  DBE_SETREG(did_control, readVal);
-  udelay(1000);
-
-  // XXX HACK:
-  //
-  //    This was necessary for GBE--we had to wait through two
-  //    vertical retrace periods before the pixel DMA was
-  //    turned off for sure.  I've left this in for now, in
-  //    case dbe needs it.
-
-  for (i = 0; i < 10000; i++)
-    {
-      DBE_GETREG(frm_inhwctrl, readVal);
-      if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) == 0)
-        udelay(10);
-      else
-        {
-          DBE_GETREG(ovr_inhwctrl, readVal);
-          if (GET_DBE_FIELD(OVR_INHWCTRL, OVR_DMA_ENABLE, readVal) == 0)
-            udelay(10);
-          else
-            {
-              DBE_GETREG(did_inhwctrl, readVal);
-              if (GET_DBE_FIELD(DID_INHWCTRL, DID_DMA_ENABLE, readVal) == 0)
-                udelay(10);
-              else
-                break;
-            }
-        }
-    }
+	int i;
+	unsigned int readVal;
+
+	// Check to see if things are already turned off:
+	// 1) Check to see if dbe is not using the internal dotclock.
+	// 2) Check to see if the xy counter in dbe is already off.
+
+	DBE_GETREG(ctrlstat, readVal);
+	if (GET_DBE_FIELD(CTRLSTAT, PCLKSEL, readVal) < 2)
+		return;
+
+	DBE_GETREG(vt_xy, readVal);
+	if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1)
+		return;
+
+	// Otherwise, turn off dbe
+
+	DBE_GETREG(ovr_control, readVal);
+	SET_DBE_FIELD(OVR_CONTROL, OVR_DMA_ENABLE, readVal, 0);
+	DBE_SETREG(ovr_control, readVal);
+	udelay(1000);
+	DBE_GETREG(frm_control, readVal);
+	SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, readVal, 0);
+	DBE_SETREG(frm_control, readVal);
+	udelay(1000);
+	DBE_GETREG(did_control, readVal);
+	SET_DBE_FIELD(DID_CONTROL, DID_DMA_ENABLE, readVal, 0);
+	DBE_SETREG(did_control, readVal);
+	udelay(1000);
+
+	// XXX HACK:
+	//
+	//    This was necessary for GBE--we had to wait through two
+	//    vertical retrace periods before the pixel DMA was
+	//    turned off for sure.  I've left this in for now, in
+	//    case dbe needs it.
+
+	for (i = 0; i < 10000; i++) {
+		DBE_GETREG(frm_inhwctrl, readVal);
+		if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) ==
+		    0)
+			udelay(10);
+		else {
+			DBE_GETREG(ovr_inhwctrl, readVal);
+			if (GET_DBE_FIELD
+			    (OVR_INHWCTRL, OVR_DMA_ENABLE, readVal) == 0)
+				udelay(10);
+			else {
+				DBE_GETREG(did_inhwctrl, readVal);
+				if (GET_DBE_FIELD
+				    (DID_INHWCTRL, DID_DMA_ENABLE,
+				     readVal) == 0)
+					udelay(10);
+				else
+					break;
+			}
+		}
+	}
 }
 
 /*
- *  Set the hardware according to 'par'.
+ *  Set the User Defined Part of the Display. Again if par use it to get
+ *  real video mode.
  */
-static void activate_par(struct sgivwfb_par *par)
+static int sgivwfb_check_var(struct fb_var_screeninfo *var, 
+			     struct fb_info *info)
 {
-  int i,j, htmp, temp;
-  u32 readVal, outputVal;
-  int wholeTilesX, maxPixelsPerTileX;
-  int frmWrite1, frmWrite2, frmWrite3b;
-  dbe_timing_info_t *currentTiming;    /* Current Video Timing */
-  int xpmax, ypmax;                       // Monitor resolution
-  int bytesPerPixel;                      // Bytes per pixel
-
-  currentTiming = &dbeVTimings[par->timing_num];
-  bytesPerPixel = bytes_per_pixel(par->var.bits_per_pixel);
-  xpmax = currentTiming->width;
-  ypmax = currentTiming->height;
-
-  /* dbe_InitGraphicsBase(); */
-  /* Turn on dotclock PLL */
-  DBE_SETREG(ctrlstat, 0x20000000);
-
-  dbe_TurnOffDma();
-
-  /* dbe_CalculateScreenParams(); */
-  maxPixelsPerTileX = 512/bytesPerPixel;
-  wholeTilesX = xpmax/maxPixelsPerTileX;
-  if (wholeTilesX*maxPixelsPerTileX < xpmax)
-    wholeTilesX++;
-
-  printk(KERN_DEBUG "sgivwfb: pixPerTile=%d wholeTilesX=%d\n",
-	 maxPixelsPerTileX, wholeTilesX);
-
-  /* dbe_InitGammaMap(); */
-  udelay(10);
-
-  for (i = 0; i < 256; i++)
-    {
-      DBE_ISETREG(gmap, i, (i << 24) | (i << 16) | (i << 8));
-    }
-
-  /* dbe_TurnOn(); */
-  DBE_GETREG(vt_xy, readVal);
-  if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1)
-    {
-      DBE_SETREG(vt_xy, 0x00000000);
-      udelay(1);
-    }
-  else
-    dbe_TurnOffDma();
-
-  /* dbe_Initdbe(); */
-  for (i = 0; i < 256; i++)
-    {
-      for (j = 0; j < 100; j++)
-        {
-          DBE_GETREG(cm_fifo, readVal);
-          if (readVal != 0x00000000)
-            break;
-          else
-            udelay(10);
-        }
-
-      // DBE_ISETREG(cmap, i, 0x00000000);
-      DBE_ISETREG(cmap, i, (i<<8)|(i<<16)|(i<<24));
-    }
-
-  /* dbe_InitFramebuffer(); */
-  frmWrite1 = 0;
-  SET_DBE_FIELD(FRM_SIZE_TILE, FRM_WIDTH_TILE, frmWrite1, wholeTilesX);
-  SET_DBE_FIELD(FRM_SIZE_TILE, FRM_RHS, frmWrite1, 0);
-
-  switch(bytesPerPixel)
-    {
-      case 1:
-        SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1, DBE_FRM_DEPTH_8);
-        break;
-      case 2:
-        SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1, DBE_FRM_DEPTH_16);
-        break;
-      case 4:
-        SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1, DBE_FRM_DEPTH_32);
-        break;
-    }
-
-  frmWrite2 = 0;
-  SET_DBE_FIELD(FRM_SIZE_PIXEL, FB_HEIGHT_PIX, frmWrite2, ypmax);
-
-  // Tell dbe about the framebuffer location and type
-  // XXX What format is the FRM_TILE_PTR??  64K aligned address?
-  frmWrite3b = 0;
-  SET_DBE_FIELD(FRM_CONTROL, FRM_TILE_PTR, frmWrite3b, sgivwfb_mem_phys>>9);
-  SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, frmWrite3b, 1);
-  SET_DBE_FIELD(FRM_CONTROL, FRM_LINEAR, frmWrite3b, 1);
-
-  /* Initialize DIDs */
-
-  outputVal = 0;
-  switch(bytesPerPixel)
-    {
-      case 1:
-        SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_I8);
-        break;
-      case 2:
-        SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGBA5);
-        break;
-      case 4:
-        SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGB8);
-        break;
-    }
-  SET_DBE_FIELD(WID, BUF, outputVal, DBE_BMODE_BOTH);
-
-  for (i = 0; i < 32; i++)
-    {
-      DBE_ISETREG(mode_regs, i, outputVal);
-    }
-
-  /* dbe_InitTiming(); */
-  DBE_SETREG(vt_intr01, 0xffffffff);
-  DBE_SETREG(vt_intr23, 0xffffffff);
-
-  DBE_GETREG(dotclock, readVal);
-  DBE_SETREG(dotclock, readVal & 0xffff);
-
-  DBE_SETREG(vt_xymax, 0x00000000);
-  outputVal = 0;
-  SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_ON, outputVal, currentTiming->vsync_start);
-  SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_OFF, outputVal, currentTiming->vsync_end);
-  DBE_SETREG(vt_vsync, outputVal);
-  outputVal = 0;
-  SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_ON, outputVal, currentTiming->hsync_start);
-  SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_OFF, outputVal, currentTiming->hsync_end);
-  DBE_SETREG(vt_hsync, outputVal);
-  outputVal = 0;
-  SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_ON, outputVal, currentTiming->vblank_start);
-  SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_OFF, outputVal, currentTiming->vblank_end);
-  DBE_SETREG(vt_vblank, outputVal);
-  outputVal = 0;
-  SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_ON, outputVal, currentTiming->hblank_start);
-  SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_OFF, outputVal, currentTiming->hblank_end-3);
-  DBE_SETREG(vt_hblank, outputVal);
-  outputVal = 0;
-  SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_ON, outputVal, currentTiming->vblank_start);
-  SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_OFF, outputVal, currentTiming->vblank_end);
-  DBE_SETREG(vt_vcmap, outputVal);
-  outputVal = 0;
-  SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_ON, outputVal, currentTiming->hblank_start);
-  SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_OFF, outputVal, currentTiming->hblank_end-3);
-  DBE_SETREG(vt_hcmap, outputVal);
-
-  outputVal = 0;
-  temp = currentTiming->vblank_start - currentTiming->vblank_end - 1;
-  if (temp > 0)
-    temp = -temp;
-
-  SET_DBE_FIELD(DID_START_XY, DID_STARTY, outputVal, (u32)temp);
-  if (currentTiming->hblank_end >= 20)
-    SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
-                      currentTiming->hblank_end - 20);
-  else
-    SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
-                      currentTiming->htotal - (20 - currentTiming->hblank_end));
-  DBE_SETREG(did_start_xy, outputVal);
-
-  outputVal = 0;
-  SET_DBE_FIELD(CRS_START_XY, CRS_STARTY, outputVal, (u32)(temp+1));
-  if (currentTiming->hblank_end >= DBE_CRS_MAGIC)
-    SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
-                      currentTiming->hblank_end - DBE_CRS_MAGIC);
-  else
-    SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
-                      currentTiming->htotal - (DBE_CRS_MAGIC - currentTiming->hblank_end));
-  DBE_SETREG(crs_start_xy, outputVal);
-
-  outputVal = 0;
-  SET_DBE_FIELD(VC_START_XY, VC_STARTY, outputVal, (u32)temp);
-  SET_DBE_FIELD(VC_START_XY, VC_STARTX, outputVal,
-                    currentTiming->hblank_end - 4);
-  DBE_SETREG(vc_start_xy, outputVal);
-
-  DBE_SETREG(frm_size_tile, frmWrite1);
-  DBE_SETREG(frm_size_pixel, frmWrite2);
-
-  outputVal = 0;
-  SET_DBE_FIELD(DOTCLK, M, outputVal, currentTiming->pll_m-1);
-  SET_DBE_FIELD(DOTCLK, N, outputVal, currentTiming->pll_n-1);
-  SET_DBE_FIELD(DOTCLK, P, outputVal, currentTiming->pll_p);
-  SET_DBE_FIELD(DOTCLK, RUN, outputVal, 1);
-  DBE_SETREG(dotclock, outputVal);
-
-  udelay(11*1000);
-
-  DBE_SETREG(vt_vpixen, 0xffffff);
-  DBE_SETREG(vt_hpixen, 0xffffff);
-
-  outputVal = 0;
-  SET_DBE_FIELD(VT_XYMAX, VT_MAXX, outputVal, currentTiming->htotal);
-  SET_DBE_FIELD(VT_XYMAX, VT_MAXY, outputVal, currentTiming->vtotal);
-  DBE_SETREG(vt_xymax, outputVal);
-
-  outputVal = frmWrite1;
-  SET_DBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, outputVal, 1);
-  DBE_SETREG(frm_size_tile, outputVal);
-  DBE_SETREG(frm_size_tile, frmWrite1);
-
-  outputVal = 0;
-  SET_DBE_FIELD(OVR_WIDTH_TILE, OVR_FIFO_RESET, outputVal, 1);
-  DBE_SETREG(ovr_width_tile, outputVal);
-  DBE_SETREG(ovr_width_tile, 0);
-
-  DBE_SETREG(frm_control, frmWrite3b);
-  DBE_SETREG(did_control, 0);
-
-  // Wait for dbe to take frame settings
-  for (i=0; i<100000; i++)
-    {
-      DBE_GETREG(frm_inhwctrl, readVal);
-      if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) != 0)
-        break;
-      else
-        udelay(1);
-    }
-
-  if (i==100000)
-    printk(KERN_INFO "sgivwfb: timeout waiting for frame DMA enable.\n");
-
-  outputVal = 0;
-  htmp = currentTiming->hblank_end - 19;
-  if (htmp < 0)
-    htmp += currentTiming->htotal;    /* allow blank to wrap around */
-  SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_ON, outputVal, htmp);
-  SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_OFF, outputVal,
-                    ((htmp + currentTiming->width - 2) % currentTiming->htotal));
-  DBE_SETREG(vt_hpixen, outputVal);
-
-  outputVal = 0;
-  SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_OFF, outputVal,
-                    currentTiming->vblank_start);
-  SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_ON, outputVal,
-                    currentTiming->vblank_end);
-  DBE_SETREG(vt_vpixen, outputVal);
-
-  // Turn off mouse cursor
-  regs->crs_ctl = 0;
-
-  // XXX What's this section for??
-  DBE_GETREG(ctrlstat, readVal);
-  readVal &= 0x02000000;
-
-  if (readVal != 0)
-    {
-      DBE_SETREG(ctrlstat, 0x30000000);
-    }
-}
-
-static void sgivwfb_encode_fix(struct fb_fix_screeninfo *fix,
-			       struct fb_var_screeninfo *var)
-{
-  memset(fix, 0, sizeof(struct fb_fix_screeninfo));
-  strcpy(fix->id, sgivwfb_name);
-  fix->smem_start = sgivwfb_mem_phys;
-  fix->smem_len = sgivwfb_mem_size;
-  fix->type = FB_TYPE_PACKED_PIXELS;
-  fix->type_aux = 0;
-  switch (var->bits_per_pixel) {
-  case 8:
-    fix->visual = FB_VISUAL_PSEUDOCOLOR;
-    break;
-  default:
-    fix->visual = FB_VISUAL_TRUECOLOR;
-    break;
-  }
-  fix->ywrapstep = ywrap;
-  fix->xpanstep = 0;
-  fix->ypanstep = ypan;
-  fix->line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
-  fix->mmio_start = DBE_REG_PHYS;
-  fix->mmio_len = DBE_REG_SIZE;
+	int err, activate = var->activate;
+	struct dbe_timing_info *timing;
+	u_long line_length;
+	u_long min_mode;
+	int req_dot;
+	int test_mode;
+
+	/*
+	 *  FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal!
+	 *  as FB_VMODE_SMOOTH_XPAN is only used internally
+	 */
+
+	if (var->vmode & FB_VMODE_CONUPDATE) {
+		var->vmode |= FB_VMODE_YWRAP;
+		var->xoffset = display->var.xoffset;
+		var->yoffset = display->var.yoffset;
+	}
+
+	/* XXX FIXME - forcing var's */
+	var->xoffset = 0;
+	var->yoffset = 0;
+
+	/* Limit bpp to 8, 16, and 32 */
+	if (var->bits_per_pixel <= 8)
+		var->bits_per_pixel = 8;
+	else if (var->bits_per_pixel <= 16)
+		var->bits_per_pixel = 16;
+	else if (var->bits_per_pixel <= 32)
+		var->bits_per_pixel = 32;
+	else
+		return -EINVAL;
+
+	var->grayscale = 0;	/* No grayscale for now */
+
+	/* determine valid resolution and timing */
+	for (min_mode = 0; min_mode < DBE_VT_SIZE; min_mode++) {
+		if (dbeVTimings[min_mode].width >= var->xres &&
+		    dbeVTimings[min_mode].height >= var->yres)
+			break;
+	}
+
+	if (min_mode == DBE_VT_SIZE)
+		return -EINVAL;	/* Resolution to high */
+
+	/* XXX FIXME - should try to pick best refresh rate */
+	/* for now, pick closest dot-clock within 3MHz */
+	req_dot = PICOS2KHZ(var->pixclock);
+	printk(KERN_INFO "sgivwfb: requested pixclock=%d ps (%d KHz)\n",
+	       var->pixclock, req_dot);
+	test_mode = min_mode;
+	while (dbeVTimings[min_mode].width == dbeVTimings[test_mode].width) {
+		if (dbeVTimings[test_mode].cfreq + 3000 > req_dot)
+			break;
+		test_mode++;
+	}
+	if (dbeVTimings[min_mode].width != dbeVTimings[test_mode].width)
+		test_mode--;
+	min_mode = test_mode;
+	timing = &dbeVTimings[min_mode];
+	printk(KERN_INFO "sgivwfb: granted dot-clock=%d KHz\n",
+	       timing->cfreq);
+
+	/* Adjust virtual resolution, if necessary */
+	if (var->xres > var->xres_virtual || (!ywrap && !ypan))
+		var->xres_virtual = var->xres;
+	if (var->yres > var->yres_virtual || (!ywrap && !ypan))
+		var->yres_virtual = var->yres;
+
+	/*
+	 *  Memory limit
+	 */
+	line_length =
+	    get_line_length(var->xres_virtual, var->bits_per_pixel);
+	if (line_length * var->yres_virtual > sgivwfb_mem_size)
+		return -ENOMEM;	/* Virtual resolution to high */
+
+	switch (var->bits_per_pixel) {
+	case 8:
+		var->red.offset = 0;
+		var->red.length = 8;
+		var->green.offset = 0;
+		var->green.length = 8;
+		var->blue.offset = 0;
+		var->blue.length = 8;
+		var->transp.offset = 0;
+		var->transp.length = 0;
+		break;
+	case 16:		/* RGBA 5551 */
+		var->red.offset = 11;
+		var->red.length = 5;
+		var->green.offset = 6;
+		var->green.length = 5;
+		var->blue.offset = 1;
+		var->blue.length = 5;
+		var->transp.offset = 0;
+		var->transp.length = 0;
+		break;
+	case 32:		/* RGB 8888 */
+		var->red.offset = 0;
+		var->red.length = 8;
+		var->green.offset = 8;
+		var->green.length = 8;
+		var->blue.offset = 16;
+		var->blue.length = 8;
+		var->transp.offset = 24;
+		var->transp.length = 8;
+		break;
+	}
+	var->red.msb_right = 0;
+	var->green.msb_right = 0;
+	var->blue.msb_right = 0;
+	var->transp.msb_right = 0;
+
+	/* set video timing information */
+	var->pixclock = KHZ2PICOS(timing->cfreq);
+	var->left_margin = timing->htotal - timing->hsync_end;
+	var->right_margin = timing->hsync_start - timing->width;
+	var->upper_margin = timing->vtotal - timing->vsync_end;
+	var->lower_margin = timing->vsync_start - timing->height;
+	var->hsync_len = timing->hsync_end - timing->hsync_start;
+	var->vsync_len = timing->vsync_end - timing->vsync_start;
+
+	/* Ouch. This breaks the rules but timing_num is only important if you
+	* change a video mode */
+	par->timing_num = min_mode;
+
+	printk(KERN_INFO "sgivwfb: new video mode xres=%d yres=%d bpp=%d\n",
+		var->xres, var->yres, var->bits_per_pixel);
+	printk(KERN_INFO "         vxres=%d vyres=%d\n", var->xres_virtual,
+		var->yres_virtual);
+	return 0;
 }
 
 /*
- *  Read a single color register and split it into
- *  colors/transparent. Return != 0 for invalid regno.
+ *  Set the hardware according to 'par'.
  */
-static int sgivwfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
-                             u_int *transp, struct fb_info *info)
+static int sgivwfb_set_par(struct fb_info *info)
 {
-  if (regno > 255)
-    return 1;
-
-  *red =   palette[regno].red << 8;
-  *green = palette[regno].green << 8;
-  *blue =  palette[regno].blue << 8;
-  *transp = 0;
-  return 0;
+	struct sgivw_par *par = info->par;
+	int i, j, htmp, temp;
+	u32 readVal, outputVal;
+	int wholeTilesX, maxPixelsPerTileX;
+	int frmWrite1, frmWrite2, frmWrite3b;
+	dbe_timing_info_t *currentTiming;	/* Current Video Timing */
+	int xpmax, ypmax;	// Monitor resolution
+	int bytesPerPixel;	// Bytes per pixel
+
+	currentTiming = &dbeVTimings[par->timing_num];
+	bytesPerPixel = bytes_per_pixel(info->var.bits_per_pixel);
+	xpmax = currentTiming->width;
+	ypmax = currentTiming->height;
+
+	/* dbe_InitGraphicsBase(); */
+	/* Turn on dotclock PLL */
+	DBE_SETREG(ctrlstat, 0x20000000);
+
+	dbe_TurnOffDma();
+
+	/* dbe_CalculateScreenParams(); */
+	maxPixelsPerTileX = 512 / bytesPerPixel;
+	wholeTilesX = xpmax / maxPixelsPerTileX;
+	if (wholeTilesX * maxPixelsPerTileX < xpmax)
+		wholeTilesX++;
+
+	printk(KERN_DEBUG "sgivwfb: pixPerTile=%d wholeTilesX=%d\n",
+	       maxPixelsPerTileX, wholeTilesX);
+
+	/* dbe_InitGammaMap(); */
+	udelay(10);
+
+	for (i = 0; i < 256; i++) {
+		DBE_ISETREG(gmap, i, (i << 24) | (i << 16) | (i << 8));
+	}
+
+	/* dbe_TurnOn(); */
+	DBE_GETREG(vt_xy, readVal);
+	if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1) {
+		DBE_SETREG(vt_xy, 0x00000000);
+		udelay(1);
+	} else
+		dbe_TurnOffDma();
+
+	/* dbe_Initdbe(); */
+	for (i = 0; i < 256; i++) {
+		for (j = 0; j < 100; j++) {
+			DBE_GETREG(cm_fifo, readVal);
+			if (readVal != 0x00000000)
+				break;
+			else
+				udelay(10);
+		}
+
+		// DBE_ISETREG(cmap, i, 0x00000000);
+		DBE_ISETREG(cmap, i, (i << 8) | (i << 16) | (i << 24));
+	}
+
+	/* dbe_InitFramebuffer(); */
+	frmWrite1 = 0;
+	SET_DBE_FIELD(FRM_SIZE_TILE, FRM_WIDTH_TILE, frmWrite1,
+		      wholeTilesX);
+	SET_DBE_FIELD(FRM_SIZE_TILE, FRM_RHS, frmWrite1, 0);
+
+	switch (bytesPerPixel) {
+	case 1:
+		SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
+			      DBE_FRM_DEPTH_8);
+		break;
+	case 2:
+		SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
+			      DBE_FRM_DEPTH_16);
+		break;
+	case 4:
+		SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
+			      DBE_FRM_DEPTH_32);
+		break;
+	}
+
+	frmWrite2 = 0;
+	SET_DBE_FIELD(FRM_SIZE_PIXEL, FB_HEIGHT_PIX, frmWrite2, ypmax);
+
+	// Tell dbe about the framebuffer location and type
+	// XXX What format is the FRM_TILE_PTR??  64K aligned address?
+	frmWrite3b = 0;
+	SET_DBE_FIELD(FRM_CONTROL, FRM_TILE_PTR, frmWrite3b,
+		      sgivwfb_mem_phys >> 9);
+	SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, frmWrite3b, 1);
+	SET_DBE_FIELD(FRM_CONTROL, FRM_LINEAR, frmWrite3b, 1);
+
+	/* Initialize DIDs */
+
+	outputVal = 0;
+	switch (bytesPerPixel) {
+	case 1:
+		SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_I8);
+		break;
+	case 2:
+		SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGBA5);
+		break;
+	case 4:
+		SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGB8);
+		break;
+	}
+	SET_DBE_FIELD(WID, BUF, outputVal, DBE_BMODE_BOTH);
+
+	for (i = 0; i < 32; i++) {
+		DBE_ISETREG(mode_regs, i, outputVal);
+	}
+
+	/* dbe_InitTiming(); */
+	DBE_SETREG(vt_intr01, 0xffffffff);
+	DBE_SETREG(vt_intr23, 0xffffffff);
+
+	DBE_GETREG(dotclock, readVal);
+	DBE_SETREG(dotclock, readVal & 0xffff);
+
+	DBE_SETREG(vt_xymax, 0x00000000);
+	outputVal = 0;
+	SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_ON, outputVal,
+		      currentTiming->vsync_start);
+	SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_OFF, outputVal,
+		      currentTiming->vsync_end);
+	DBE_SETREG(vt_vsync, outputVal);
+	outputVal = 0;
+	SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_ON, outputVal,
+		      currentTiming->hsync_start);
+	SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_OFF, outputVal,
+		      currentTiming->hsync_end);
+	DBE_SETREG(vt_hsync, outputVal);
+	outputVal = 0;
+	SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_ON, outputVal,
+		      currentTiming->vblank_start);
+	SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_OFF, outputVal,
+		      currentTiming->vblank_end);
+	DBE_SETREG(vt_vblank, outputVal);
+	outputVal = 0;
+	SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_ON, outputVal,
+		      currentTiming->hblank_start);
+	SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_OFF, outputVal,
+		      currentTiming->hblank_end - 3);
+	DBE_SETREG(vt_hblank, outputVal);
+	outputVal = 0;
+	SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_ON, outputVal,
+		      currentTiming->vblank_start);
+	SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_OFF, outputVal,
+		      currentTiming->vblank_end);
+	DBE_SETREG(vt_vcmap, outputVal);
+	outputVal = 0;
+	SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_ON, outputVal,
+		      currentTiming->hblank_start);
+	SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_OFF, outputVal,
+		      currentTiming->hblank_end - 3);
+	DBE_SETREG(vt_hcmap, outputVal);
+
+	outputVal = 0;
+	temp = currentTiming->vblank_start - currentTiming->vblank_end - 1;
+	if (temp > 0)
+		temp = -temp;
+
+	SET_DBE_FIELD(DID_START_XY, DID_STARTY, outputVal, (u32) temp);
+	if (currentTiming->hblank_end >= 20)
+		SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
+			      currentTiming->hblank_end - 20);
+	else
+		SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
+			      currentTiming->htotal - (20 -
+						       currentTiming->
+						       hblank_end));
+	DBE_SETREG(did_start_xy, outputVal);
+
+	outputVal = 0;
+	SET_DBE_FIELD(CRS_START_XY, CRS_STARTY, outputVal,
+		      (u32) (temp + 1));
+	if (currentTiming->hblank_end >= DBE_CRS_MAGIC)
+		SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
+			      currentTiming->hblank_end - DBE_CRS_MAGIC);
+	else
+		SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
+			      currentTiming->htotal - (DBE_CRS_MAGIC -
+						       currentTiming->
+						       hblank_end));
+	DBE_SETREG(crs_start_xy, outputVal);
+
+	outputVal = 0;
+	SET_DBE_FIELD(VC_START_XY, VC_STARTY, outputVal, (u32) temp);
+	SET_DBE_FIELD(VC_START_XY, VC_STARTX, outputVal,
+		      currentTiming->hblank_end - 4);
+	DBE_SETREG(vc_start_xy, outputVal);
+
+	DBE_SETREG(frm_size_tile, frmWrite1);
+	DBE_SETREG(frm_size_pixel, frmWrite2);
+
+	outputVal = 0;
+	SET_DBE_FIELD(DOTCLK, M, outputVal, currentTiming->pll_m - 1);
+	SET_DBE_FIELD(DOTCLK, N, outputVal, currentTiming->pll_n - 1);
+	SET_DBE_FIELD(DOTCLK, P, outputVal, currentTiming->pll_p);
+	SET_DBE_FIELD(DOTCLK, RUN, outputVal, 1);
+	DBE_SETREG(dotclock, outputVal);
+
+	udelay(11 * 1000);
+
+	DBE_SETREG(vt_vpixen, 0xffffff);
+	DBE_SETREG(vt_hpixen, 0xffffff);
+
+	outputVal = 0;
+	SET_DBE_FIELD(VT_XYMAX, VT_MAXX, outputVal, currentTiming->htotal);
+	SET_DBE_FIELD(VT_XYMAX, VT_MAXY, outputVal, currentTiming->vtotal);
+	DBE_SETREG(vt_xymax, outputVal);
+
+	outputVal = frmWrite1;
+	SET_DBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, outputVal, 1);
+	DBE_SETREG(frm_size_tile, outputVal);
+	DBE_SETREG(frm_size_tile, frmWrite1);
+
+	outputVal = 0;
+	SET_DBE_FIELD(OVR_WIDTH_TILE, OVR_FIFO_RESET, outputVal, 1);
+	DBE_SETREG(ovr_width_tile, outputVal);
+	DBE_SETREG(ovr_width_tile, 0);
+
+	DBE_SETREG(frm_control, frmWrite3b);
+	DBE_SETREG(did_control, 0);
+
+	// Wait for dbe to take frame settings
+	for (i = 0; i < 100000; i++) {
+		DBE_GETREG(frm_inhwctrl, readVal);
+		if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) !=
+		    0)
+			break;
+		else
+			udelay(1);
+	}
+
+	if (i == 100000)
+		printk(KERN_INFO
+		       "sgivwfb: timeout waiting for frame DMA enable.\n");
+
+	outputVal = 0;
+	htmp = currentTiming->hblank_end - 19;
+	if (htmp < 0)
+		htmp += currentTiming->htotal;	/* allow blank to wrap around */
+	SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_ON, outputVal, htmp);
+	SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_OFF, outputVal,
+		      ((htmp + currentTiming->width -
+			2) % currentTiming->htotal));
+	DBE_SETREG(vt_hpixen, outputVal);
+
+	outputVal = 0;
+	SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_OFF, outputVal,
+		      currentTiming->vblank_start);
+	SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_ON, outputVal,
+		      currentTiming->vblank_end);
+	DBE_SETREG(vt_vpixen, outputVal);
+
+	// Turn off mouse cursor
+	par->regs->crs_ctl = 0;
+
+	// XXX What's this section for??
+	DBE_GETREG(ctrlstat, readVal);
+	readVal &= 0x02000000;
+
+	if (readVal != 0) {
+		DBE_SETREG(ctrlstat, 0x30000000);
+	}
+	return 0;
 }
 
 /*
@@ -530,307 +639,64 @@ static int sgivwfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
  *  entries in the var structure). Return != 0 for invalid regno.
  */
 
-static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-                             u_int transp, struct fb_info *info)
+static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green,
+			     u_int blue, u_int transp,
+			     struct fb_info *info)
 {
-  if (regno > 255)
-    return 1;
-  red >>= 8;
-  green >>= 8;
-  blue >>= 8;
-  palette[regno].red = red;
-  palette[regno].green = green;
-  palette[regno].blue = blue;
-
-  /* wait for the color map FIFO to have a free entry */
-  while (cmap_fifo == 0)
-    cmap_fifo = regs->cm_fifo;
-
-  regs->cmap[regno] = (red << 24) | (green << 16) | (blue << 8);
-  cmap_fifo--;			/* assume FIFO is filling up */
-  return 0;
-}
+	struct sgivw_par *par = (struct sgivw_par *) info->par;
 
-/* ---------------------------------------------------- */
+	if (regno > 255)
+		return 1;
+	red >>= 8;
+	green >>= 8;
+	blue >>= 8;
 
-/*
- *  Get the Fixed Part of the Display
- */
-static int sgivwfb_get_fix(struct fb_fix_screeninfo *fix, int con,
-			   struct fb_info *info)
-{
-  struct fb_var_screeninfo *var;
-
-  if (con == -1)
-    var = &par_current.var;
-  else
-    var = &fb_display[con].var;
-  sgivwfb_encode_fix(fix, var);
-  return 0;
-}
+	/* wait for the color map FIFO to have a free entry */
+	while (par->cmap_fifo == 0)
+		par->cmap_fifo = par->regs->cm_fifo;
 
-/*
- *  Get the User Defined Part of the Display. If a real par get it form there
- */
-static int sgivwfb_get_var(struct fb_var_screeninfo *var, int con,
-			   struct fb_info *info)
-{
-  if (con == -1)
-    *var = par_current.var;
-  else
-    *var = fb_display[con].var;
-  return 0;
-}
-
-/*
- *  Set the User Defined Part of the Display. Again if par use it to get
- *  real video mode.
- */
-static int sgivwfb_set_var(struct fb_var_screeninfo *var, int con,
-			   struct fb_info *info)
-{
-  int err, activate = var->activate;
-  int oldxres, oldyres, oldvxres, oldvyres, oldbpp;
-  u_long line_length;
-  u_long min_mode;
-  int req_dot;
-  int test_mode;
-
-  struct dbe_timing_info *timing;
-
-  struct display *display;
-
-  if (con >= 0)
-    display = &fb_display[con];
-  else
-    display = &disp;	/* used during initialization */
-
-  /*
-   *  FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal!
-   *  as FB_VMODE_SMOOTH_XPAN is only used internally
-   */
-
-  if (var->vmode & FB_VMODE_CONUPDATE) {
-    var->vmode |= FB_VMODE_YWRAP;
-    var->xoffset = display->var.xoffset;
-    var->yoffset = display->var.yoffset;
-  }
-
-  /* XXX FIXME - forcing var's */
-  var->xoffset = 0;
-  var->yoffset = 0;
-
-  /* Limit bpp to 8, 16, and 32 */
-  if (var->bits_per_pixel <= 8)
-    var->bits_per_pixel = 8;
-  else if (var->bits_per_pixel <= 16)
-    var->bits_per_pixel = 16;
-  else if (var->bits_per_pixel <= 32)
-    var->bits_per_pixel = 32;
-  else
-    return -EINVAL;
-
-  var->grayscale = 0;           /* No grayscale for now */
-
-  /* determine valid resolution and timing */
-  for (min_mode=0; min_mode<DBE_VT_SIZE; min_mode++) {
-    if (dbeVTimings[min_mode].width >= var->xres &&
-        dbeVTimings[min_mode].height >= var->yres)
-      break;
-  }
-
-  if (min_mode == DBE_VT_SIZE)
-    return -EINVAL;             /* Resolution to high */
-
-  /* XXX FIXME - should try to pick best refresh rate */
-  /* for now, pick closest dot-clock within 3MHz*/
-#error "Floating point not allowed in kernel"  
-  req_dot = (int)((1.0e3/1.0e6) / (1.0e-12 * (float)var->pixclock));
-  printk(KERN_INFO "sgivwfb: requested pixclock=%d ps (%d KHz)\n", var->pixclock,
-	 req_dot);
-  test_mode=min_mode;
-  while (dbeVTimings[min_mode].width == dbeVTimings[test_mode].width) {
-    if (dbeVTimings[test_mode].cfreq+3000 > req_dot)
-      break;
-    test_mode++;
-  }
-  if (dbeVTimings[min_mode].width != dbeVTimings[test_mode].width)
-    test_mode--;
-  min_mode = test_mode;
-  timing = &dbeVTimings[min_mode];
-  printk(KERN_INFO "sgivwfb: granted dot-clock=%d KHz\n", timing->cfreq);
-
-  /* Adjust virtual resolution, if necessary */
-  if (var->xres > var->xres_virtual || (!ywrap && !ypan))
-    var->xres_virtual = var->xres;
-  if (var->yres > var->yres_virtual || (!ywrap && !ypan))
-    var->yres_virtual = var->yres;
-
-  /*
-   *  Memory limit
-   */
-  line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
-  if (line_length*var->yres_virtual > sgivwfb_mem_size)
-    return -ENOMEM;             /* Virtual resolution to high */
-
-  switch (var->bits_per_pixel)
-    {
-    case 8:
-      var->red.offset = 0;
-      var->red.length = 8;
-      var->green.offset = 0;
-      var->green.length = 8;
-      var->blue.offset = 0;
-      var->blue.length = 8;
-      var->transp.offset = 0;
-      var->transp.length = 0;
-      break;
-    case 16:	/* RGBA 5551 */
-      var->red.offset = 11;
-      var->red.length = 5;
-      var->green.offset = 6;
-      var->green.length = 5;
-      var->blue.offset = 1;
-      var->blue.length = 5;
-      var->transp.offset = 0;
-      var->transp.length = 0;
-      break;
-    case 32:	/* RGB 8888 */
-      var->red.offset = 0;
-      var->red.length = 8;
-      var->green.offset = 8;
-      var->green.length = 8;
-      var->blue.offset = 16;
-      var->blue.length = 8;
-      var->transp.offset = 24;
-      var->transp.length = 8;
-      break;
-    }
-  var->red.msb_right = 0;
-  var->green.msb_right = 0;
-  var->blue.msb_right = 0;
-  var->transp.msb_right = 0;
-
-  /* set video timing information */
-  var->pixclock = (__u32)(1.0e+9/(float)timing->cfreq);
-  var->left_margin = timing->htotal - timing->hsync_end;
-  var->right_margin = timing->hsync_start - timing->width;
-  var->upper_margin = timing->vtotal - timing->vsync_end;
-  var->lower_margin = timing->vsync_start - timing->height;
-  var->hsync_len = timing->hsync_end - timing->hsync_start;
-  var->vsync_len = timing->vsync_end -  timing->vsync_start;
-
-  if ((activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
-    oldxres = display->var.xres;
-    oldyres = display->var.yres;
-    oldvxres = display->var.xres_virtual;
-    oldvyres = display->var.yres_virtual;
-    oldbpp = display->var.bits_per_pixel;
-    display->var = *var;
-    par_current.var = *var;
-    par_current.timing_num = min_mode;
-    if (oldxres != var->xres || oldyres != var->yres ||
-	oldvxres != var->xres_virtual || oldvyres != var->yres_virtual ||
-	oldbpp != var->bits_per_pixel || !par_current.valid) {
-      struct fb_fix_screeninfo fix;
-      printk(KERN_INFO "sgivwfb: new video mode xres=%d yres=%d bpp=%d\n",
-	     var->xres, var->yres, var->bits_per_pixel);
-      printk(KERN_INFO "         vxres=%d vyres=%d\n",
-	     var->xres_virtual, var->yres_virtual);
-      activate_par(&par_current);
-      sgivwfb_encode_fix(&fix, var);
-      display->visual = fix.visual;
-      display->type = fix.type;
-      display->type_aux = fix.type_aux;
-      display->ypanstep = fix.ypanstep;
-      display->ywrapstep = fix.ywrapstep;
-      display->line_length = fix.line_length;
-      display->can_soft_blank = 1;
-      display->inverse = 0;
-      if (oldbpp != var->bits_per_pixel || !par_current.valid) {
-	if ((err = fb_alloc_cmap(&display->cmap, 0, 0)))
-	  return err;
-	do_install_cmap(con, info);
-      }
-      switch (var->bits_per_pixel) {
-#ifdef FBCON_HAS_CFB8
-      case 8:
-	display->dispsw = &fbcon_cfb8;
-	break;
-#endif
-#ifdef FBCON_HAS_CFB16
-      case 16:
-	display->dispsw = &fbcon_cfb16;
-	display->dispsw_data = fbcon_cmap.cfb16;
-	break;
-#endif
-#ifdef FBCON_HAS_CFB32
-      case 32:
-	display->dispsw = &fbcon_cfb32;
-	display->dispsw_data = fbcon_cmap.cfb32;
-	break;
-#endif
-      default:
-	display->dispsw = &fbcon_dummy;
-	break;
-      }
-      par_current.valid = 1;
-      if (fb_info.changevar)
-	(*fb_info.changevar)(con);
-    }
-  }
-  return 0;
-}
-
-/*
- *  Get the Colormap
- */
-static int sgivwfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
-			    struct fb_info *info)
-{
-  if (con == info->currcon) /* current console? */
-    return fb_get_cmap(cmap, kspc, sgivwfb_getcolreg, info);
-  else if (fb_display[con].cmap.len) /* non default colormap? */
-    fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
-  else
-    fb_copy_cmap(fb_default_cmap(1<<fb_display[con].var.bits_per_pixel),
-		 cmap, kspc ? 0 : 2);
-  return 0;
+	par->regs->cmap[regno] = (red << 24) | (green << 16) | (blue << 8);
+	par->cmap_fifo--;	/* assume FIFO is filling up */
+	return 0;
 }
 
 static int sgivwfb_mmap(struct fb_info *info, struct file *file,
-                        struct vm_area_struct *vma)
+			struct vm_area_struct *vma)
 {
-  unsigned long size = vma->vm_end - vma->vm_start;
-  unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
-  if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
-	return -EINVAL;
-  if (offset+size > sgivwfb_mem_size)
-    return -EINVAL;
-  offset += sgivwfb_mem_phys;
-  pgprot_val(vma->vm_page_prot) = pgprot_val(vma->vm_page_prot) | _PAGE_PCD;
-  vma->vm_flags |= VM_IO;
-  if (remap_page_range(vma, vma->vm_start, offset, size, vma->vm_page_prot))
-    return -EAGAIN;
-  vma->vm_file = file;
-  printk(KERN_DEBUG "sgivwfb: mmap framebuffer P(%lx)->V(%lx)\n", offset, vma->vm_start);
-  return 0;
+	unsigned long size = vma->vm_end - vma->vm_start;
+	unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
+
+	if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
+		return -EINVAL;
+	if (offset + size > sgivwfb_mem_size)
+		return -EINVAL;
+	offset += sgivwfb_mem_phys;
+	pgprot_val(vma->vm_page_prot) =
+	    pgprot_val(vma->vm_page_prot) | _PAGE_PCD;
+	vma->vm_flags |= VM_IO;
+	if (remap_page_range
+	    (vma, vma->vm_start, offset, size, vma->vm_page_prot))
+		return -EAGAIN;
+	vma->vm_file = file;
+	printk(KERN_DEBUG "sgivwfb: mmap framebuffer P(%lx)->V(%lx)\n",
+	       offset, vma->vm_start);
+	return 0;
 }
 
 int __init sgivwfb_setup(char *options)
 {
-  char *this_opt;
+	char *this_opt;
 
-  fb_info.fontname[0] = '\0';
+	fb_info.fontname[0] = '\0';
 
-  if (!options || !*options)
-    return 0;
+	if (!options || !*options)
+		return 0;
 
-  while ((this_opt = strsep(&options, ",")) != NULL) {
-    if (!strncmp(this_opt, "font:", 5))
-      strcpy(fb_info.fontname, this_opt+5);
-  }
-  return 0;
+	while ((this_opt = strsep(&options, ",")) != NULL) {
+		if (!strncmp(this_opt, "font:", 5))
+			strcpy(fb_info.fontname, this_opt + 5);
+	}
+	return 0;
 }
 
 /*
@@ -838,75 +704,67 @@ int __init sgivwfb_setup(char *options)
  */
 int __init sgivwfb_init(void)
 {
-  printk(KERN_INFO "sgivwfb: framebuffer at 0x%lx, size %ldk\n",
-	 sgivwfb_mem_phys, sgivwfb_mem_size/1024);
-
-  regs = (asregs*)ioremap_nocache(DBE_REG_PHYS, DBE_REG_SIZE);
-  if (!regs) {
-    printk(KERN_ERR "sgivwfb: couldn't ioremap registers\n");
-    goto fail_ioremap_regs;
-  }
-
+	printk(KERN_INFO "sgivwfb: framebuffer at 0x%lx, size %ldk\n",
+	       sgivwfb_mem_phys, sgivwfb_mem_size / 1024);
+
+	default_par.regs = (asregs *) ioremap_nocache(DBE_REG_PHYS, DBE_REG_SIZE);
+	if (!default_par.regs) {
+		printk(KERN_ERR "sgivwfb: couldn't ioremap registers\n");
+		goto fail_ioremap_regs;
+	}
 #ifdef CONFIG_MTRR
-  mtrr_add((unsigned long)sgivwfb_mem_phys, sgivwfb_mem_size, MTRR_TYPE_WRCOMB, 1);
+	mtrr_add((unsigned long) sgivwfb_mem_phys, sgivwfb_mem_size,
+		 MTRR_TYPE_WRCOMB, 1);
 #endif
 
-  strcpy(fb_info.modename, sgivwfb_name);
-  fb_info.changevar = NULL;
-  fb_info.node = NODEV;
-  fb_info.fbops = &sgivwfb_ops;
-  fb_info.disp = &disp;
-  fb_info.currcon = -1;	
-  fb_info.switch_con = &sgivwfbcon_switch;
-  fb_info.updatevar = &sgivwfbcon_updatevar;
-  fb_info.flags = FBINFO_FLAG_DEFAULT;
-
-  fb_info.screen_base = ioremap_nocache((unsigned long)sgivwfb_mem_phys, sgivwfb_mem_size);
-  if (!fb_info.screen_base) {
-    printk(KERN_ERR "sgivwfb: couldn't ioremap screen_base\n");
-    goto fail_ioremap_fbmem;
-  }
-
-  /* turn on default video mode */
-  sgivwfb_set_var(&par_current.var, -1, &fb_info);
-
-  if (register_framebuffer(&fb_info) < 0) {
-    printk(KERN_ERR "sgivwfb: couldn't register framebuffer\n");
-    goto fail_register_framebuffer;
-  }
-
-  printk(KERN_INFO "fb%d: Virtual frame buffer device, using %ldK of video memory\n",
-	 GET_FB_IDX(fb_info.node), sgivwfb_mem_size>>10);
-
-  return 0;
-
- fail_register_framebuffer:
-  iounmap((char*)fb_info.screen_base);
- fail_ioremap_fbmem:
-  iounmap(regs);
- fail_ioremap_regs:
-  return -ENXIO;
-}
-
-static int sgivwfbcon_switch(int con, struct fb_info *info)
-{
-  /* Do we have to save the colormap? */
-  if (fb_display[info->currcon].cmap.len)
-    fb_get_cmap(&fb_display[info->currcon].cmap, 1, sgivwfb_getcolreg, info);
-
-  info->currcon = con;
-  /* Install new colormap */
-  do_install_cmap(con, info);
-  return 0;
-}
-
-/*
- *  Update the `var' structure (called by fbcon.c)
- */
-static int sgivwfbcon_updatevar(int con, struct fb_info *info)
-{
-    /* Nothing */
-    return 0;
+	sgivwfb_fix.smem_start = sgivwfb_mem_phys;
+	sgivwfb_fix.smem_len = sgivwfb_mem_size;
+	sgivwfb_fix.ywrapstep = ywrap;
+	sgivwfb_fix.ypanstep = ypan;
+
+	strcpy(fb_info.modename, sgivwfb_fix.id);
+	fb_info.changevar = NULL;
+	fb_info.node = NODEV;
+	fb_info.fix = sgivwfb_fix;
+	fb_info.var = sgivwfb_var;
+	fb_info.fbops = &sgivwfb_ops;
+	fb_info.pseudo_palette = pseudo_palette;
+	fb_info.par = &default_par;
+	fb_info.disp = &disp;
+	fb_info.currcon = -1;
+	fb_info.switch_con = gen_switch;
+	fb_info.updatevar = gen_update_var;
+	fb_info.flags = FBINFO_FLAG_DEFAULT;
+
+	fb_info.screen_base =
+	    ioremap_nocache((unsigned long) sgivwfb_mem_phys,
+			    sgivwfb_mem_size);
+	if (!fb_info.screen_base) {
+		printk(KERN_ERR "sgivwfb: couldn't ioremap screen_base\n");
+		goto fail_ioremap_fbmem;
+	}
+
+	/* turn on default video mode */
+	gen_set_var(&fb_info->var, -1, &fb_info);
+
+	if (register_framebuffer(&fb_info) < 0) {
+		printk(KERN_ERR
+		       "sgivwfb: couldn't register framebuffer\n");
+		goto fail_register_framebuffer;
+	}
+
+	printk(KERN_INFO
+	       "fb%d: Virtual frame buffer device, using %ldK of video memory\n",
+	       GET_FB_IDX(fb_info.node), sgivwfb_mem_size >> 10);
+
+	return 0;
+
+      fail_register_framebuffer:
+	iounmap((char *) fb_info.screen_base);
+      fail_ioremap_fbmem:
+	iounmap(default_par.regs);
+      fail_ioremap_regs:
+	return -ENXIO;
 }
 
 #ifdef MODULE
@@ -914,15 +772,15 @@ MODULE_LICENSE("GPL");
 
 int init_module(void)
 {
-  return sgivwfb_init();
+	return sgivwfb_init();
 }
 
 void cleanup_module(void)
 {
-  unregister_framebuffer(&fb_info);
-  dbe_TurnOffDma();
-  iounmap(regs);
-  iounmap(&fb_info.screen_base);
+	unregister_framebuffer(&fb_info);
+	dbe_TurnOffDma();
+	iounmap(regs);
+	iounmap(&fb_info.screen_base);
 }
 
-#endif /* MODULE */
+#endif				/* MODULE */
diff --git a/drivers/video/sgivwfb.h b/drivers/video/sgivwfb.h
deleted file mode 100644
index 8ff8a77f43e2..000000000000
--- a/drivers/video/sgivwfb.h
+++ /dev/null
@@ -1,660 +0,0 @@
-/*
- *  linux/drivers/video/sgivwfb.h -- SGI DBE frame buffer device header
- *
- *      Copyright (C) 1999 Silicon Graphics, Inc.
- *      Jeffrey Newquist, newquist@engr.sgi.som
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License. See the file COPYING in the main directory of this archive for
- *  more details.
- */
-
-#ifndef __SGIVWFB_H__
-#define __SGIVWFB_H__
-
-#define DBE_GETREG(reg, dest)       ((dest) = DBE_REG_BASE->##reg)
-#define DBE_SETREG(reg, src)        DBE_REG_BASE->##reg = (src)
-#define DBE_IGETREG(reg, idx, dest) ((dest) = DBE_REG_BASE->##reg##[idx])
-#define DBE_ISETREG(reg, idx, src)  (DBE_REG_BASE->##reg##[idx] = (src))
-
-#define MASK(msb, lsb)          ( (((u32)1<<((msb)-(lsb)+1))-1) << (lsb) )
-#define GET(v, msb, lsb)        ( ((u32)(v) & MASK(msb,lsb)) >> (lsb) )
-#define SET(v, f, msb, lsb)     ( (v) = ((v)&~MASK(msb,lsb)) | (( (u32)(f)<<(lsb) ) & MASK(msb,lsb)) )
-
-#define GET_DBE_FIELD(reg, field, v)        GET((v), DBE_##reg##_##field##_MSB, DBE_##reg##_##field##_LSB)
-#define SET_DBE_FIELD(reg, field, v, f)     SET((v), (f), DBE_##reg##_##field##_MSB, DBE_##reg##_##field##_LSB)
-
-/* NOTE: All loads/stores must be 32 bits and uncached */
-
-#define DBE_REG_PHYS	0xd0000000
-#define DBE_REG_SIZE        0x01000000
-
-typedef struct {
-  volatile u32 ctrlstat;     /* 0x000000 general control */
-  volatile u32 dotclock;     /* 0x000004 dot clock PLL control */
-  volatile u32 i2c;          /* 0x000008 crt I2C control */
-  volatile u32 sysclk;       /* 0x00000c system clock PLL control */
-  volatile u32 i2cfp;        /* 0x000010 flat panel I2C control */
-  volatile u32 id;           /* 0x000014 device id/chip revision */
-  volatile u32 config;       /* 0x000018 power on configuration */
-  volatile u32 bist;         /* 0x00001c internal bist status */
-
-  char _pad0[ 0x010000 - 0x000020 ];
-
-  volatile u32 vt_xy;        /* 0x010000 current dot coords */
-  volatile u32 vt_xymax;     /* 0x010004 maximum dot coords */
-  volatile u32 vt_vsync;     /* 0x010008 vsync on/off */
-  volatile u32 vt_hsync;     /* 0x01000c hsync on/off */
-  volatile u32 vt_vblank;    /* 0x010010 vblank on/off */
-  volatile u32 vt_hblank;    /* 0x010014 hblank on/off */
-  volatile u32 vt_flags;     /* 0x010018 polarity of vt signals */
-  volatile u32 vt_f2rf_lock; /* 0x01001c f2rf & framelck y coord */
-  volatile u32 vt_intr01;    /* 0x010020 intr 0,1 y coords */
-  volatile u32 vt_intr23;    /* 0x010024 intr 2,3 y coords */
-  volatile u32 fp_hdrv;      /* 0x010028 flat panel hdrv on/off */
-  volatile u32 fp_vdrv;      /* 0x01002c flat panel vdrv on/off */
-  volatile u32 fp_de;        /* 0x010030 flat panel de on/off */
-  volatile u32 vt_hpixen;    /* 0x010034 intrnl horiz pixel on/off*/
-  volatile u32 vt_vpixen;    /* 0x010038 intrnl vert pixel on/off */
-  volatile u32 vt_hcmap;     /* 0x01003c cmap write (horiz) */
-  volatile u32 vt_vcmap;     /* 0x010040 cmap write (vert) */
-  volatile u32 did_start_xy; /* 0x010044 eol/f did/xy reset val */
-  volatile u32 crs_start_xy; /* 0x010048 eol/f crs/xy reset val */
-  volatile u32 vc_start_xy;  /* 0x01004c eol/f vc/xy reset val */
-
-  char _pad1[ 0x020000 - 0x010050 ];
-
-  volatile u32 ovr_width_tile; /* 0x020000 overlay plane ctrl 0 */
-  volatile u32 ovr_inhwctrl;   /* 0x020004 overlay plane ctrl 1 */
-  volatile u32 ovr_control;    /* 0x020008 overlay plane ctrl 1 */
-
-  char _pad2[ 0x030000 - 0x02000C ];
-
-  volatile u32 frm_size_tile;  /* 0x030000 normal plane ctrl 0 */
-  volatile u32 frm_size_pixel; /* 0x030004 normal plane ctrl 1 */
-  volatile u32 frm_inhwctrl;   /* 0x030008 normal plane ctrl 2 */
-  volatile u32 frm_control;	   /* 0x03000C normal plane ctrl 3 */
-
-  char _pad3[ 0x040000 - 0x030010 ];
-
-  volatile u32 did_inhwctrl;   /* 0x040000 DID control */
-  volatile u32 did_control;    /* 0x040004 DID shadow */
-
-  char _pad4[ 0x048000 - 0x040008 ];
-
-  volatile u32 mode_regs[32];  /* 0x048000 - 0x04807c WID table */
-
-  char _pad5[ 0x050000 - 0x048080 ];
-
-  volatile u32 cmap[6144];     /* 0x050000 - 0x055ffc color map */
-
-  char _pad6[ 0x058000 - 0x056000 ];
-
-  volatile u32 cm_fifo;        /* 0x058000 color map fifo status */
-
-  char _pad7[ 0x060000 - 0x058004 ];
-
-  volatile u32 gmap[256];      /* 0x060000 - 0x0603fc gamma map */
-
-  char _pad8[ 0x068000 - 0x060400 ];
-
-  volatile u32 gmap10[1024];   /* 0x068000 - 0x068ffc gamma map */
-
-  char _pad9[ 0x070000 - 0x069000 ];
-
-  volatile u32 crs_pos;        /* 0x070000 cusror control 0 */
-  volatile u32 crs_ctl;        /* 0x070004 cusror control 1 */
-  volatile u32 crs_cmap[3];    /* 0x070008 - 0x070010 crs cmap */
-
-  char _pad10[ 0x078000 - 0x070014 ];
-
-  volatile u32 crs_glyph[64];  /* 0x078000 - 0x0780fc crs glyph */
-
-  char _pad11[ 0x080000 - 0x078100 ];
-
-  volatile u32 vc_0;           /* 0x080000 video capture crtl 0 */
-  volatile u32 vc_1;           /* 0x080004 video capture crtl 1 */
-  volatile u32 vc_2;           /* 0x080008 video capture crtl 2 */
-  volatile u32 vc_3;           /* 0x08000c video capture crtl 3 */
-  volatile u32 vc_4;           /* 0x080010 video capture crtl 3 */
-  volatile u32 vc_5;           /* 0x080014 video capture crtl 3 */
-  volatile u32 vc_6;           /* 0x080018 video capture crtl 3 */
-  volatile u32 vc_7;           /* 0x08001c video capture crtl 3 */
-  volatile u32 vc_8;           /* 0x08000c video capture crtl 3 */
-} asregs;
-
-/* Bit mask information */
-
-#define DBE_CTRLSTAT_CHIPID_MSB     3
-#define DBE_CTRLSTAT_CHIPID_LSB     0
-#define DBE_CTRLSTAT_SENSE_N_MSB    4
-#define DBE_CTRLSTAT_SENSE_N_LSB    4
-#define DBE_CTRLSTAT_PCLKSEL_MSB    29
-#define DBE_CTRLSTAT_PCLKSEL_LSB    28
-
-#define DBE_DOTCLK_M_MSB            7
-#define DBE_DOTCLK_M_LSB            0
-#define DBE_DOTCLK_N_MSB            13
-#define DBE_DOTCLK_N_LSB            8
-#define DBE_DOTCLK_P_MSB            15
-#define DBE_DOTCLK_P_LSB            14
-#define DBE_DOTCLK_RUN_MSB          20
-#define DBE_DOTCLK_RUN_LSB          20
-
-#define DBE_VT_XY_VT_FREEZE_MSB     31
-#define DBE_VT_XY_VT_FREEZE_LSB     31
-
-#define DBE_VT_VSYNC_VT_VSYNC_ON_MSB        23
-#define DBE_VT_VSYNC_VT_VSYNC_ON_LSB        12
-#define DBE_VT_VSYNC_VT_VSYNC_OFF_MSB       11
-#define DBE_VT_VSYNC_VT_VSYNC_OFF_LSB       0
-
-#define DBE_VT_HSYNC_VT_HSYNC_ON_MSB        23
-#define DBE_VT_HSYNC_VT_HSYNC_ON_LSB        12
-#define DBE_VT_HSYNC_VT_HSYNC_OFF_MSB       11
-#define DBE_VT_HSYNC_VT_HSYNC_OFF_LSB       0
-
-#define DBE_VT_VBLANK_VT_VBLANK_ON_MSB        23
-#define DBE_VT_VBLANK_VT_VBLANK_ON_LSB        12
-#define DBE_VT_VBLANK_VT_VBLANK_OFF_MSB       11
-#define DBE_VT_VBLANK_VT_VBLANK_OFF_LSB       0
-
-#define DBE_VT_HBLANK_VT_HBLANK_ON_MSB        23
-#define DBE_VT_HBLANK_VT_HBLANK_ON_LSB        12
-#define DBE_VT_HBLANK_VT_HBLANK_OFF_MSB       11
-#define DBE_VT_HBLANK_VT_HBLANK_OFF_LSB       0
-
-#define DBE_VT_VCMAP_VT_VCMAP_ON_MSB        23
-#define DBE_VT_VCMAP_VT_VCMAP_ON_LSB        12
-#define DBE_VT_VCMAP_VT_VCMAP_OFF_MSB       11
-#define DBE_VT_VCMAP_VT_VCMAP_OFF_LSB       0
-
-#define DBE_VT_HCMAP_VT_HCMAP_ON_MSB        23
-#define DBE_VT_HCMAP_VT_HCMAP_ON_LSB        12
-#define DBE_VT_HCMAP_VT_HCMAP_OFF_MSB       11
-#define DBE_VT_HCMAP_VT_HCMAP_OFF_LSB       0
-
-#define DBE_VT_XYMAX_VT_MAXX_MSB    11
-#define DBE_VT_XYMAX_VT_MAXX_LSB    0
-#define DBE_VT_XYMAX_VT_MAXY_MSB    23
-#define DBE_VT_XYMAX_VT_MAXY_LSB    12
-
-#define DBE_VT_HPIXEN_VT_HPIXEN_ON_MSB      23
-#define DBE_VT_HPIXEN_VT_HPIXEN_ON_LSB      12
-#define DBE_VT_HPIXEN_VT_HPIXEN_OFF_MSB     11
-#define DBE_VT_HPIXEN_VT_HPIXEN_OFF_LSB     0
-
-#define DBE_VT_VPIXEN_VT_VPIXEN_ON_MSB      23
-#define DBE_VT_VPIXEN_VT_VPIXEN_ON_LSB      12
-#define DBE_VT_VPIXEN_VT_VPIXEN_OFF_MSB     11
-#define DBE_VT_VPIXEN_VT_VPIXEN_OFF_LSB     0
-
-#define DBE_OVR_CONTROL_OVR_DMA_ENABLE_MSB  0
-#define DBE_OVR_CONTROL_OVR_DMA_ENABLE_LSB  0
-
-#define DBE_OVR_INHWCTRL_OVR_DMA_ENABLE_MSB 0
-#define DBE_OVR_INHWCTRL_OVR_DMA_ENABLE_LSB 0
-
-#define DBE_OVR_WIDTH_TILE_OVR_FIFO_RESET_MSB       13
-#define DBE_OVR_WIDTH_TILE_OVR_FIFO_RESET_LSB       13
-
-#define DBE_FRM_CONTROL_FRM_DMA_ENABLE_MSB  0
-#define DBE_FRM_CONTROL_FRM_DMA_ENABLE_LSB  0
-#define DBE_FRM_CONTROL_FRM_TILE_PTR_MSB    31
-#define DBE_FRM_CONTROL_FRM_TILE_PTR_LSB    9
-#define DBE_FRM_CONTROL_FRM_LINEAR_MSB      1
-#define DBE_FRM_CONTROL_FRM_LINEAR_LSB      1
-
-#define DBE_FRM_INHWCTRL_FRM_DMA_ENABLE_MSB 0
-#define DBE_FRM_INHWCTRL_FRM_DMA_ENABLE_LSB 0
-
-#define DBE_FRM_SIZE_TILE_FRM_WIDTH_TILE_MSB        12
-#define DBE_FRM_SIZE_TILE_FRM_WIDTH_TILE_LSB        5
-#define DBE_FRM_SIZE_TILE_FRM_RHS_MSB       4
-#define DBE_FRM_SIZE_TILE_FRM_RHS_LSB       0
-#define DBE_FRM_SIZE_TILE_FRM_DEPTH_MSB     14
-#define DBE_FRM_SIZE_TILE_FRM_DEPTH_LSB     13
-#define DBE_FRM_SIZE_TILE_FRM_FIFO_RESET_MSB        15
-#define DBE_FRM_SIZE_TILE_FRM_FIFO_RESET_LSB        15
-
-#define DBE_FRM_SIZE_PIXEL_FB_HEIGHT_PIX_MSB        31
-#define DBE_FRM_SIZE_PIXEL_FB_HEIGHT_PIX_LSB        16
-
-#define DBE_DID_CONTROL_DID_DMA_ENABLE_MSB  0
-#define DBE_DID_CONTROL_DID_DMA_ENABLE_LSB  0
-#define DBE_DID_INHWCTRL_DID_DMA_ENABLE_MSB 0
-#define DBE_DID_INHWCTRL_DID_DMA_ENABLE_LSB 0
-
-#define DBE_DID_START_XY_DID_STARTY_MSB     23
-#define DBE_DID_START_XY_DID_STARTY_LSB     12
-#define DBE_DID_START_XY_DID_STARTX_MSB     11
-#define DBE_DID_START_XY_DID_STARTX_LSB     0
-
-#define DBE_CRS_START_XY_CRS_STARTY_MSB     23
-#define DBE_CRS_START_XY_CRS_STARTY_LSB     12
-#define DBE_CRS_START_XY_CRS_STARTX_MSB     11
-#define DBE_CRS_START_XY_CRS_STARTX_LSB     0
-
-#define DBE_WID_TYP_MSB     4
-#define DBE_WID_TYP_LSB     2
-#define DBE_WID_BUF_MSB     1
-#define DBE_WID_BUF_LSB     0
-
-#define DBE_VC_START_XY_VC_STARTY_MSB       23
-#define DBE_VC_START_XY_VC_STARTY_LSB       12
-#define DBE_VC_START_XY_VC_STARTX_MSB       11
-#define DBE_VC_START_XY_VC_STARTX_LSB       0
-
-/* Constants */
-
-#define DBE_FRM_DEPTH_8     0
-#define DBE_FRM_DEPTH_16    1
-#define DBE_FRM_DEPTH_32    2
-
-#define DBE_CMODE_I8        0
-#define DBE_CMODE_I12       1
-#define DBE_CMODE_RG3B2     2
-#define DBE_CMODE_RGB4      3
-#define DBE_CMODE_ARGB5     4
-#define DBE_CMODE_RGB8      5
-#define DBE_CMODE_RGBA5     6
-#define DBE_CMODE_RGB10     7
-
-#define DBE_BMODE_BOTH      3
-
-#define DBE_CRS_MAGIC       54
-
-/* Config Register (DBE Only) Definitions */
-
-#define DBE_CONFIG_VDAC_ENABLE       0x00000001
-#define DBE_CONFIG_VDAC_GSYNC        0x00000002
-#define DBE_CONFIG_VDAC_PBLANK       0x00000004
-#define DBE_CONFIG_FPENABLE          0x00000008
-#define DBE_CONFIG_LENDIAN           0x00000020
-#define DBE_CONFIG_TILEHIST          0x00000040
-#define DBE_CONFIG_EXT_ADDR          0x00000080
-
-#define DBE_CONFIG_FBDEV        ( DBE_CONFIG_VDAC_ENABLE | \
-                                      DBE_CONFIG_VDAC_GSYNC  | \
-                                      DBE_CONFIG_VDAC_PBLANK | \
-                                      DBE_CONFIG_LENDIAN     | \
-                                      DBE_CONFIG_EXT_ADDR )
-
-/*
- * Available Video Timings and Corresponding Indices
- */
-
-typedef enum {
-  DBE_VT_640_480_60,
-
-  DBE_VT_800_600_60,
-  DBE_VT_800_600_75,
-  DBE_VT_800_600_120,
-
-  DBE_VT_1024_768_50,
-  DBE_VT_1024_768_60,
-  DBE_VT_1024_768_75,
-  DBE_VT_1024_768_85,
-  DBE_VT_1024_768_120,
-
-  DBE_VT_1280_1024_50,
-  DBE_VT_1280_1024_60,
-  DBE_VT_1280_1024_75,
-  DBE_VT_1280_1024_85,
-
-  DBE_VT_1600_1024_53,
-  DBE_VT_1600_1024_60,
-
-  DBE_VT_1600_1200_50,
-  DBE_VT_1600_1200_60,
-  DBE_VT_1600_1200_75,
-
-  DBE_VT_1920_1080_50,
-  DBE_VT_1920_1080_60,
-  DBE_VT_1920_1080_72,
-
-  DBE_VT_1920_1200_50,
-  DBE_VT_1920_1200_60,
-  DBE_VT_1920_1200_66,
-
-  DBE_VT_UNKNOWN
-} dbe_timing_t;
-
-
-
-/*
- * Crime Video Timing Data Structure
- */
-
-typedef struct dbe_timing_info
-{
-  dbe_timing_t type;
-  int flags;				
-  short width;		    /* Monitor resolution		*/
-  short height;
-  int fields_sec;	    /* fields/sec  (Hz -3 dec. places */
-  int cfreq;		    /* pixel clock frequency (MHz -3 dec. places) */
-  short htotal;		    /* Horizontal total pixels	*/
-  short hblank_start;	    /* Horizontal blank start	*/
-  short hblank_end;	    /* Horizontal blank end		*/
-  short hsync_start;	    /* Horizontal sync start	*/
-  short hsync_end;	    /* Horizontal sync end		*/
-  short vtotal;		    /* Vertical total lines		*/
-  short vblank_start;	    /* Vertical blank start		*/
-  short vblank_end;	    /* Vertical blank end		*/
-  short vsync_start;	    /* Vertical sync start		*/
-  short vsync_end;	    /* Vertical sync end		*/
-  short pll_m;		    /* PLL M parameter		*/
-  short pll_n;		    /* PLL P parameter		*/
-  short pll_p;		    /* PLL N parameter		*/
-} dbe_timing_info_t;
-
-/* Defines for dbe_vof_info_t flags */
-
-#define DBE_VOF_UNKNOWNMON    1
-#define DBE_VOF_STEREO        2
-#define DBE_VOF_DO_GENSYNC    4          /* enable incoming sync */
-#define DBE_VOF_SYNC_ON_GREEN 8          /* sync on green */
-#define DBE_VOF_FLATPANEL     0x1000     /* FLATPANEL Timing */
-#define DBE_VOF_MAGICKEY      0x2000     /* Backdoor key */
-
-/*
- * DBE Timing Tables
- */
-
-#ifdef INCLUDE_TIMING_TABLE_DATA
-struct dbe_timing_info dbeVTimings[] = {
-  {
-    DBE_VT_640_480_60,
-    /*	flags,	width,			height,		fields_sec,		cfreq */
-    0,  	640,			480,		59940,			25175,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    800,	640,		    800,		656,	    	752,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    525,	480,		    525,		490,		    492,
-    /*	pll_m,	pll_n,			pll_p */
-    15,	    2,				3
-  },
-
-  {
-    DBE_VT_800_600_60,
-    /*	flags,	width,			height,		fields_sec,		cfreq */
-    0,	    800,			600,		60317,			40000,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1056,	800,		    1056,		840,		    968,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    628,	600,		    628,		601,		    605,
-    /*	pll_m,	pll_n,			pll_p */
-    3,	    1,				1
-  },
-
-  {
-    DBE_VT_800_600_75,
-    /*	flags,	width,		    height,		fields_sec,	    cfreq */
-    0,	    800,		    600,		75000,		    49500,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1056,	800,		    1056,		816,		    896,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    625,	600,		    625,		601,		    604,
-    /*	pll_m,	pll_n,		    pll_p */
-    11,	    3,		        1
-  },
-
-  {
-    DBE_VT_800_600_120,
-    /*	flags,					width,		height,			fields_sec,	    cfreq */
-    DBE_VOF_STEREO,	    800,		600,			119800,		    82978,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1040,	800,		    1040,		856,		    976,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    666,	600,		    666,		637,		    643,
-    /*	pll_m,	pll_n,		    pll_p */
-    31,	    5,		        1
-  },
-
-  {
-    DBE_VT_1024_768_50,
-    /*	flags,	width,		    height,		fields_sec,	    cfreq */
-    0,	    1024,		    768,		50000,		    54163,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1344,	1024,		    1344,		1048,		    1184,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    806,	768,		    806,		771,		    777,
-    /*	pll_m,	pll_n,		    pll_p */
-    4,	    1,		        1
-  },
-
-  {
-    DBE_VT_1024_768_60,
-    /*	flags,	width,			height,		fields_sec,		cfreq */
-    0,	    1024,			768,		60004,			65000,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1344,	1024,		    1344,		1048,		    1184,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    806,	768,		    806,		771,		    777,
-    /*	pll_m,	pll_n,			pll_p */
-    12,	    5,				0
-  },
-
-  {
-    DBE_VT_1024_768_75,
-    /*	flags,	width,			height,		fields_sec,		cfreq */
-    0,	    1024,			768,		75029,			78750,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1312,	1024,		    1312,		1040,		    1136,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    800,	768,		    800,		769,		    772,
-    /*	pll_m,	pll_n,			pll_p */
-    29,	    5,				1
-  },
-
-  {
-    DBE_VT_1024_768_85,
-    /*	flags,	width,			height,		fields_sec,		cfreq */
-    0,	    1024,			768,		84997,			94500,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1376,	1024,		    1376,		1072,		    1168,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    808,	768,		    808,		769,		    772,
-    /*	pll_m,	pll_n,			pll_p */
-    7,	    2,				0
-  },
-
-  {
-    DBE_VT_1024_768_120,
-    /*	flags,					width,		height,			fields_sec,		cfreq */
-    DBE_VOF_STEREO,	    1024,		768,			119800,			133195,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1376,	1024,		    1376,		1072,		    1168,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    808,	768,		    808,		769,		    772,
-    /*	pll_m,	pll_n,			pll_p */
-    5,	    1,				0
-  },
-
-  {
-    DBE_VT_1280_1024_50,
-    /*	flags,	width,			height,		fields_sec,		cfreq */
-    0,	    1280,			1024,		50000,			89460,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1680,	1280,		    1680,		1360,		    1480,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    1065,	1024,		    1065,		1027,		    1030,
-    /*	pll_m,	pll_n,			pll_p */
-    10,	    3,				0
-  },
-
-  {
-    DBE_VT_1280_1024_60,
-    /*	flags,	width,			height,		fields_sec,		cfreq */
-    0,	    1280,			1024,		60020,			108000,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1688,	1280,		    1688,		1328,		    1440,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    1066,	1024,		    1066,		1025,		    1028,
-    /*	pll_m,	pll_n,			pll_p */
-    4,	    1,			    0
-  },
-
-  {
-    DBE_VT_1280_1024_75,
-    /*	flags,	width,			height,		fields_sec,		cfreq */
-    0,	    1280,			1024,		75025,			135000,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1688,	1280,		    1688,		1296,		    1440,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    1066,	1024,		    1066,		1025,		    1028,
-    /*	pll_m,	pll_n,			pll_p */
-    5,	    1,				0
-  },
-
-  {
-    DBE_VT_1280_1024_85,
-    /*	flags,	width,		    height,		fields_sec,	    cfreq */
-    0,	    1280,		    1024,		85024,		    157500,
-    /*	htotal,	hblank_start,	hblank_end,	hsync_start,	hsync_end */
-    1728,	1280,		    1728,		1344,		    1504,
-    /*	vtotal,	vblank_start,	vblank_end,	vsync_start,	vsync_end */
-    1072,	1024,		    1072,		1025,		    1028,
-    /*	pll_m,	pll_n,		    pll_p */
-    29,	    5,		        0
-  },
-
-  {
-    DBE_VT_1600_1024_53,
-    /* flags,	width,			height,		fields_sec,     cfreq */
-    DBE_VOF_FLATPANEL | DBE_VOF_MAGICKEY,
-    1600,			1024,		53000,			107447,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    1900,   1600,           1900,           1630,           1730,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1067,   1024,           1067,           1027,           1030,
-    /* pll_m,  pll_n,          pll_p */
-    4,      1,              0
-  },
-
-  {
-    DBE_VT_1600_1024_60,
-    /* flags,					width,          height,			fields_sec,     cfreq */
-    DBE_VOF_FLATPANEL,   1600,           1024,			60000,          106913,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    1670,   1600,           1670,           1630,           1650,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1067,   1024,           1067,           1027,           1030,
-    /* pll_m,  pll_n,          pll_p */
-    4,      1,              0
-  },
-
-  {
-    DBE_VT_1600_1200_50,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1600,           1200,           50000,          130500,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2088,   1600,           2088,           1644,           1764,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1250,   1200,           1250,           1205,           1211,
-    /* pll_m,  pll_n,          pll_p */
-    24,     5,              0
-  },
-
-  {
-    DBE_VT_1600_1200_60,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1600,           1200,           59940,          162000,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2160,   1600,           2160,           1644,           1856,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1250,   1200,           1250,           1201,           1204,
-    /* pll_m,  pll_n,          pll_p */
-    6,		1,              0
-  },
-
-  {
-    DBE_VT_1600_1200_75,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1600,           1200,           75000,          202500,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2160,   1600,           2160,           1644,           1856,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1250,   1200,           1250,           1201,           1204,
-    /* pll_m,  pll_n,          pll_p */
-    15,		2,              0
-  },
-
-  {
-    DBE_VT_1920_1080_50,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1920,           1080,           50000,          133200,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2368,   1920,           2368,           1952,           2096,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1125,   1080,           1125,           1083,           1086,
-    /* pll_m,  pll_n,          pll_p */
-    5,      1,              0
-  },
-
-  {
-    DBE_VT_1920_1080_60,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1920,           1080,           59940,          159840,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2368,   1920,           2368,           1952,           2096,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1125,   1080,           1125,           1083,           1086,
-    /* pll_m,  pll_n,          pll_p */
-    6,      1,              0
-  },
-
-  {
-    DBE_VT_1920_1080_72,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1920,           1080,           72000,          216023,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2560,   1920,           2560,           1968,           2184,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1172,   1080,           1172,           1083,           1086,
-    /* pll_m,  pll_n,          pll_p */
-    8,      1,              0
-  },
-
-  {
-    DBE_VT_1920_1200_50,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1920,           1200,           50000,          161500,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2584,   1920,           2584,           1984,           2240,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1250,   1200,           1250,           1203,           1206,
-    /* pll_m,  pll_n,          pll_p */
-    6,      1,              0
-  },
-	
-  {
-    DBE_VT_1920_1200_60,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1920,           1200,           59940,          193800,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2584,   1920,           2584,           1984,           2240,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1250,   1200,           1250,           1203,           1206,
-    /* pll_m,  pll_n,          pll_p */
-    29,     4,              0
-  },
-
-  {
-    DBE_VT_1920_1200_66,
-    /* flags,  width,          height,         fields_sec,     cfreq */
-    0,      1920,           1200,           66000,          213180,
-    /* htotal, hblank_start,   hblank_end,     hsync_start,    hsync_end */
-    2584,   1920,           2584,           1984,           2240,
-    /* vtotal, vblank_start,   vblank_end,     vsync_start,    vsync_end */
-    1250,   1200,           1250,           1203,           1206,
-    /* pll_m,  pll_n,          pll_p */
-    8,      1,              0
-  }
-};
-
-#define DBE_VT_SIZE  (sizeof(dbeVTimings)/sizeof(dbeVTimings[0]))
-#endif // INCLUDE_TIMING_TABLE_DATA
-
-#endif // ! __SGIVWFB_H__
diff --git a/drivers/video/sis/300vtbl.h b/drivers/video/sis/300vtbl.h
index 8103ec200c08..90226457257e 100644
--- a/drivers/video/sis/300vtbl.h
+++ b/drivers/video/sis/300vtbl.h
@@ -1,4 +1,10 @@
-typedef struct _SiS300_StStruct {
+
+
+/* Register settings for SiS 300 series */
+
+
+typedef struct _SiS300_StStruct
+{
 	UCHAR St_ModeID;
 	USHORT St_ModeFlag;
 	UCHAR St_StTableIndex;
@@ -9,31 +15,33 @@ typedef struct _SiS300_StStruct {
 	UCHAR VB_StTVYFilterIndex;
 } SiS300_StStruct;
 
-SiS300_StStruct SiS300_SModeIDTable[] =
-{
-	{0x01, 0x9208, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x01, 0x1210, 0x14, 0x01, 0x01, 0x00, 0x00, 0x00},
-	{0x01, 0x1010, 0x17, 0x02, 0x02, 0x00, 0x00, 0x00},
-	{0x03, 0x8208, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x03, 0x0210, 0x16, 0x01, 0x01, 0x00, 0x00, 0x00},
-	{0x03, 0x0010, 0x18, 0x02, 0x02, 0x00, 0x00, 0x00},
-	{0x05, 0x9209, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x06, 0x8209, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x07, 0x0000, 0x07, 0x03, 0x03, 0x00, 0x00, 0x00},
-	{0x07, 0x0000, 0x19, 0x02, 0x02, 0x00, 0x00, 0x00},
-	{0x0d, 0x920a, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x0e, 0x820a, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x0f, 0x0202, 0x11, 0x01, 0x01, 0x00, 0x00, 0x00},
-	{0x10, 0x0212, 0x12, 0x01, 0x01, 0x00, 0x00, 0x00},
-	{0x11, 0x0212, 0x1a, 0x04, 0x04, 0x00, 0x00, 0x00},
-	{0x12, 0x0212, 0x1b, 0x04, 0x04, 0x00, 0x00, 0x00},
-	{0x13, 0x021b, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x12, 0x0210, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x12, 0x0210, 0x18, 0x01, 0x01, 0x00, 0x00, 0x00},
-	{0xff, 0, 0, 0, 0, 0, 0, 0}
-};
-
-typedef struct _SiS300_StandTableStruct {
+SiS300_StStruct  SiS300_SModeIDTable[]=
+{
+	{0x01,0x9208,0x01,0x00,0x00,0x00,0x00,0x00},
+	{0x01,0x1210,0x14,0x01,0x01,0x00,0x00,0x00},
+	{0x01,0x1010,0x17,0x02,0x02,0x00,0x00,0x00},
+	{0x03,0x8208,0x03,0x00,0x00,0x00,0x00,0x00},
+	{0x03,0x0210,0x16,0x01,0x01,0x00,0x00,0x00},
+	{0x03,0x0010,0x18,0x02,0x02,0x00,0x00,0x00},
+	{0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x00},
+	{0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x00},
+	{0x07,0x0000,0x07,0x03,0x03,0x00,0x00,0x00},
+	{0x07,0x0000,0x19,0x02,0x02,0x00,0x00,0x00},
+	{0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x00},
+	{0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x00},
+	{0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x00},
+	{0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x00},
+	{0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x00},
+	{0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x00},
+	{0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x00},
+	/* {0x12,0x0210,0x18,0x00,0x00,0x00,0x00,0x00}, */  /* <--- Different in BIOS */
+	{0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x00},
+	{0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x00},
+	{0xff,0,0,0,0,0,0,0}
+};
+
+typedef struct _SiS300_StandTableStruct
+{
 	UCHAR CRT_COLS;
 	UCHAR ROWS;
 	UCHAR CHAR_HEIGHT;
@@ -45,362 +53,364 @@ typedef struct _SiS300_StandTableStruct {
 	UCHAR GRC[9];
 } SiS300_StandTableStruct;
 
-SiS300_StandTableStruct SiS300_StandTable[] = {
-	{0x28, 0x18, 0x08, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x28, 0x18, 0x08, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x50, 0x18, 0x08, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x50, 0x18, 0x08, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x28, 0x18, 0x08, 0x4000,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
-	  0xff},
-	 {0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x03, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x00,
-	  0xff}},
-	{0x28, 0x18, 0x08, 0x4000,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
-	  0xff},
-	 {0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x03, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x00,
-	  0xff}},
-	{0x50, 0x18, 0x08, 0x4000,
-	 {0x01, 0x01, 0x00, 0x06},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2,
-	  0xff},
-	 {0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
-	  0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
-	  0x01, 0x00, 0x01, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00,
-	  0xff}},
-	{0x50, 0x18, 0x0e, 0x1000,
-	 {0x00, 0x03, 0x00, 0x03},
-	 0xa6,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x0d, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
-	  0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-	  0x0e, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x00,
-	  0xff}},
+SiS300_StandTableStruct  SiS300_StandTable[]=
+{ /* TW: @ 0x38d4 in BIOS */
+ {0x28,0x18,0x08,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x28,0x18,0x08,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x08,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x08,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x28,0x18,0x08,0x4000,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff} },
+ {0x28,0x18,0x08,0x4000,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff} },
+ {0x50,0x18,0x08,0x4000,
+  {0x01,0x01,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xc2,
+   0xff},
+  {0x00,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x01,0x00,0x01,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,
+   0xff} },
+ {0x50,0x18,0x0e,0x1000,
+  {0x00,0x03,0x00,0x03},
+  0xa6,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0d,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff} },
 /* MDA_DAC*/
-	{0x00, 0x00, 0x00, 0x0000,
-	 {0x00, 0x00, 0x00, 0x15},
-	 0x15,
-	 {0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x3f, 0x3f,
-	  0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x00, 0x00,
-	  0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15},
-	 {0x15, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x3f}},
+ {0x00,0x00,0x00,0x0000,
+  {0x00,0x00,0x00,0x15},
+  0x15,
+  {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x00,0x00,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15},
+  {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f} },
 /* CGA_DAC*/
-	{0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x09, 0x15, 0x00},
-	 0x10,
-	 {0x04, 0x14, 0x01, 0x11, 0x09, 0x15, 0x2a, 0x3a,
-	  0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x2a, 0x3a,
-	  0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x00, 0x10,
-	  0x04},
-	 {0x14, 0x01, 0x11, 0x09, 0x15, 0x00, 0x10, 0x04,
-	  0x14, 0x01, 0x11, 0x09, 0x15, 0x2a, 0x3a, 0x2e,
-	  0x3e, 0x2b, 0x3b, 0x2f},
-	 {0x3f, 0x2a, 0x3a, 0x2e, 0x3e, 0x2b, 0x3b, 0x2f,
-	  0x3f}},
+ {0x00,0x10,0x04,0x0114,
+  {0x11,0x09,0x15,0x00},
+  0x10,
+  {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x10,
+   0x04},
+  {0x14,0x01,0x11,0x09,0x15,0x00,0x10,0x04,
+   0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,0x2e,
+   0x3e,0x2b,0x3b,0x2f},
+  {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f} },
 /* EGA_DAC*/
-	{0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x05, 0x15, 0x20},
-	 0x30,
-	 {0x24, 0x34, 0x21, 0x31, 0x25, 0x35, 0x08, 0x18,
-	  0x0c, 0x1c, 0x09, 0x19, 0x0d, 0x1d, 0x28, 0x38,
-	  0x2c, 0x3c, 0x29, 0x39, 0x2d, 0x3d, 0x02, 0x12,
-	  0x06},
-	 {0x16, 0x03, 0x13, 0x07, 0x17, 0x22, 0x32, 0x26,
-	  0x36, 0x23, 0x33, 0x27, 0x37, 0x0a, 0x1a, 0x0e,
-	  0x1e, 0x0b, 0x1b, 0x0f},
-	 {0x1f, 0x2a, 0x3a, 0x2e, 0x3e, 0x2b, 0x3b, 0x2f,
-	  0x3f}},
+ {0x00,0x10,0x04,0x0114,
+  {0x11,0x05,0x15,0x20},
+  0x30,
+  {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18,
+   0x0c,0x1c,0x09,0x19,0x0d,0x1d,0x28,0x38,
+   0x2c,0x3c,0x29,0x39,0x2d,0x3d,0x02,0x12,
+   0x06},
+  {0x16,0x03,0x13,0x07,0x17,0x22,0x32,0x26,
+   0x36,0x23,0x33,0x27,0x37,0x0a,0x1a,0x0e,
+   0x1e,0x0b,0x1b,0x0f},
+  {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f} },
 /* VGA_DAC*/
-	{0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x09, 0x15, 0x2a},
-	 0x3a,
-	 {0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x00, 0x05,
-	  0x08, 0x0b, 0x0e, 0x11, 0x14, 0x18, 0x1c, 0x20,
-	  0x24, 0x28, 0x2d, 0x32, 0x38, 0x3f, 0x00, 0x10,
-	  0x1f},
-	 {0x2f, 0x3f, 0x1f, 0x27, 0x2f, 0x37, 0x3f, 0x2d,
-	  0x31, 0x36, 0x3a, 0x3f, 0x00, 0x07, 0x0e, 0x15,
-	  0x1c, 0x0e, 0x11, 0x15},
-	 {0x18, 0x1c, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x00,
-	  0x04}},
-	{0x08, 0x0c, 0x10, 0x0a08,
-	 {0x0c, 0x0e, 0x10, 0x0b},
-	 0x0c,
-	 {0x0d, 0x0f, 0x10, 0x10, 0x01, 0x08, 0x00, 0x00,
-	  0x00, 0x00, 0x01, 0x00, 0x02, 0x02, 0x01, 0x00,
-	  0x04, 0x04, 0x01, 0x00, 0x05, 0x02, 0x05, 0x00,
-	  0x06},
-	 {0x01, 0x06, 0x05, 0x06, 0x00, 0x08, 0x01, 0x08,
-	  0x00, 0x07, 0x02, 0x07, 0x06, 0x07, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00}},
-	{0x28, 0x18, 0x08, 0x2000,
-	 {0x09, 0x0f, 0x00, 0x06},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}},
-	{0x50, 0x18, 0x08, 0x4000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}},
-	{0x00, 0x00, 0x00, 0x0000,
-	 {0x01, 0x0f, 0x00, 0x0e},
-	 0x23,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-	  0x01, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f,
-	  0xff}},
-	{0x4a, 0x36, 0x00, 0x00c0,
-	 {0x00, 0x00, 0x00, 0x00},
-	 0x00,
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x3a,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x1a, 0x00, 0x57, 0x39, 0x00, 0xc0,
-	  0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00}},
-	{0x50, 0x18, 0x0e, 0x8000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xa2,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
-	  0xff},
-	 {0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
-	  0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
-	  0x0b, 0x00, 0x05, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05,
-	  0xff}},
-	{0x50, 0x18, 0x0e, 0x8000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}},
-	{0x28, 0x18, 0x0e, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x14, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x28, 0x18, 0x0e, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x14, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x50, 0x18, 0x0e, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x50, 0x18, 0x0e, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x28, 0x18, 0x10, 0x0800,
-	 {0x08, 0x03, 0x00, 0x02},
-	 0x67,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x0c, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x50, 0x18, 0x10, 0x1000,
-	 {0x00, 0x03, 0x00, 0x02},
-	 0x67,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x0c, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}},
-	{0x50, 0x18, 0x10, 0x1000,
-	 {0x00, 0x03, 0x00, 0x02},
-	 0x66,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
-	  0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-	  0x0e, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x00,
-	  0xff}},
-	{0x50, 0x1d, 0x10, 0xa000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xe3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xc3,
-	  0xff},
-	 {0x00, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x01,
-	  0xff}},
-	{0x50, 0x1d, 0x10, 0xa000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xe3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}},
-	{0x28, 0x18, 0x08, 0x2000,
-	 {0x01, 0x0f, 0x00, 0x0e},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
-	  0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-	  0x41, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f,
-	  0xff}}
-};
-
-typedef struct _SiS300_ExtStruct {
+ {0x00,0x10,0x04,0x0114,
+  {0x11,0x09,0x15,0x2a},
+  0x3a,
+  {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05,
+   0x08,0x0b,0x0e,0x11,0x14,0x18,0x1c,0x20,
+   0x24,0x28,0x2d,0x32,0x38,0x3f,0x00,0x10,
+   0x1f},
+  {0x2f,0x3f,0x1f,0x27,0x2f,0x37,0x3f,0x2d,
+   0x31,0x36,0x3a,0x3f,0x00,0x07,0x0e,0x15,
+   0x1c,0x0e,0x11,0x15},
+  {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00,
+   0x04} },
+ {0x08,0x0c,0x10,0x0a08,
+  {0x0c,0x0e,0x10,0x0b},
+  0x0c,
+  {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00,
+   0x00,0x00,0x01,0x00,0x02,0x02,0x01,0x00,
+   0x04,0x04,0x01,0x00,0x05,0x02,0x05,0x00,
+   0x06},
+  {0x01,0x06,0x05,0x06,0x00,0x08,0x01,0x08,
+   0x00,0x07,0x02,0x07,0x06,0x07,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00} },
+ {0x28,0x18,0x08,0x2000,
+  {0x09,0x0f,0x00,0x06},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0x80,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff} },
+ {0x50,0x18,0x08,0x4000,
+  {0x01,0x0f,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff} },
+ {0x00,0x00,0x00,0x0000,	/* TW: Standtable for VGA modes */
+  {0x01,0x0f,0x00,0x0e},	/*    (identical to BIOS) */
+  0x23,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x01,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff} },
+ {0x4a,0x36,0x00,0x00c0,
+  {0x00,0x00,0x00,0x00},
+  0x00,
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x66,0x3a,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x1a,0x00,0x57,0x39,0x00,0xc0,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00} },
+ {0x50,0x18,0x0e,0x8000,
+  {0x01,0x0f,0x00,0x06},
+  0xa2,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,
+   0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,
+   0x0b,0x00,0x05,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,
+   0xff} },
+ {0x50,0x18,0x0e,0x8000,
+  {0x01,0x0f,0x00,0x06},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff} },
+ {0x28,0x18,0x0e,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x28,0x18,0x0e,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x0e,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x0e,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x28,0x18,0x10,0x0800,
+  {0x08,0x03,0x00,0x02},
+  0x67,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x10,0x1000,
+  {0x00,0x03,0x00,0x02},
+  0x67,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff} },
+ {0x50,0x18,0x10,0x1000,
+  {0x00,0x03,0x00,0x02},
+  0x66,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x0f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff} },
+ {0x50,0x1d,0x10,0xa000,
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x00,0xe7,0x04,0xc3,
+   0xff},
+  {0x00,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01,
+   0xff} },
+ {0x50,0x1d,0x10,0xa000,
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x00,0xe7,0x04,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff} },
+ {0x28,0x18,0x08,0x2000,
+  {0x01,0x0f,0x00,0x0e},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0xbf,0x1f,
+   0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x40,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x41,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff} }
+};
+
+typedef struct _SiS300_ExtStruct
+{
 	UCHAR Ext_ModeID;
 	USHORT Ext_ModeFlag;
 	USHORT Ext_ModeInfo;
@@ -413,502 +423,594 @@ typedef struct _SiS300_ExtStruct {
 	UCHAR VB_ExtTVYFilterIndex;
 	UCHAR REFindex;
 } SiS300_ExtStruct;
-SiS300_ExtStruct SiS300_EModeIDTable[] = {
-	{0x6a, 0x2212, 0x47, 0x3563, 0x0102, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00},
-	{0x2e, 0x0a1b, 0x36, 0x3539, 0x0101, 0x08, 0x06, 0x00, 0x00, 0x00, 0x08},
-	{0x2f, 0x021b, 0x35, 0x3532, 0x0100, 0x08, 0x05, 0x00, 0x00, 0x00, 0x10},
-	{0x30, 0x2a1b, 0x47, 0x3563, 0x0103, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00},
-	{0x31, 0x0a1b, 0xad, 0x3630, 0x0000, 0x08, 0x0c, 0x00, 0x00, 0x00, 0x11},
-	{0x32, 0x2a1b, 0xae, 0x3637, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x00, 0x12},
-	{0x33, 0x0a1d, 0xad, 0x3630, 0x0000, 0x08, 0x0c, 0x00, 0x00, 0x00, 0x11},
-	{0x34, 0x2a1d, 0xae, 0x3637, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x00, 0x12},
-	{0x35, 0x0a1f, 0xad, 0x3630, 0x0000, 0x08, 0x0c, 0x00, 0x00, 0x00, 0x11},
-	{0x36, 0x2a1f, 0xae, 0x3637, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x00, 0x12},
-	{0x37, 0x0212, 0x58, 0x358d, 0x0104, 0x08, 0x08, 0x00, 0x00, 0x00, 0x13},
-	{0x38, 0x0a1b, 0x58, 0x358d, 0x0105, 0x08, 0x08, 0x00, 0x00, 0x00, 0x13},
-	{0x3a, 0x0e3b, 0x69, 0x35be, 0x0107, 0x08, 0x09, 0x00, 0x00, 0x00, 0x1a},
-	{0x3c, 0x063b, 0x7a, 0x35d4, 0x0130, 0x08, 0x0a, 0x00, 0x00, 0x00, 0x1e},
-	{0x3d, 0x067d, 0x7a, 0x35d4, 0x0131, 0x08, 0x0a, 0x00, 0x00, 0x00, 0x1e},
-	{0x40, 0x921c, 0x00, 0x3516, 0x010d, 0x08, 0x00, 0x00, 0x00, 0x00, 0x23},
-	{0x41, 0x921d, 0x00, 0x3516, 0x010e, 0x08, 0x00, 0x00, 0x00, 0x00, 0x23},
-	{0x43, 0x0a1c, 0x36, 0x3539, 0x0110, 0x08, 0x06, 0x00, 0x00, 0x00, 0x08},
-	{0x44, 0x0a1d, 0x36, 0x3539, 0x0111, 0x08, 0x06, 0x00, 0x00, 0x00, 0x08},
-	{0x46, 0x2a1c, 0x47, 0x3563, 0x0113, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00},
-	{0x47, 0x2a1d, 0x47, 0x3563, 0x0114, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00},
-	{0x49, 0x0a3c, 0x58, 0x358d, 0x0116, 0x08, 0x08, 0x00, 0x00, 0x00, 0x13},
-	{0x4a, 0x0a3d, 0x58, 0x358d, 0x0117, 0x08, 0x08, 0x00, 0x00, 0x00, 0x13},
-	{0x4c, 0x0e7c, 0x69, 0x35be, 0x0119, 0x08, 0x09, 0x00, 0x00, 0x00, 0x1a},
-	{0x4d, 0x0e7d, 0x69, 0x35be, 0x011a, 0x08, 0x09, 0x00, 0x00, 0x00, 0x1a},
-	{0x50, 0x921b, 0x01, 0x351d, 0x0132, 0x08, 0x01, 0x00, 0x00, 0x00, 0x24},
-	{0x51, 0x921b, 0x13, 0x3524, 0x0133, 0x08, 0x03, 0x00, 0x00, 0x00, 0x25},
-	{0x52, 0x921b, 0x24, 0x352b, 0x0134, 0x08, 0x04, 0x00, 0x00, 0x00, 0x26},
-	{0x56, 0x921d, 0x01, 0x351d, 0x0135, 0x08, 0x01, 0x00, 0x00, 0x00, 0x24},
-	{0x57, 0x921d, 0x13, 0x3524, 0x0136, 0x08, 0x03, 0x00, 0x00, 0x00, 0x25},
-	{0x58, 0x921d, 0x24, 0x352b, 0x0137, 0x08, 0x04, 0x00, 0x00, 0x00, 0x26},
-	{0x59, 0x921b, 0x00, 0x3516, 0x0138, 0x08, 0x00, 0x00, 0x00, 0x00, 0x23},
-	{0x5d, 0x021d, 0x35, 0x3532, 0x0139, 0x08, 0x05, 0x00, 0x00, 0x00, 0x10},
-	{0x62, 0x0a3f, 0x36, 0x3539, 0x013a, 0x08, 0x06, 0x00, 0x00, 0x00, 0x08},
-	{0x63, 0x2a3f, 0x47, 0x3563, 0x013b, 0x08, 0x07, 0x00, 0x00, 0x00, 0x00},
-	{0x64, 0x0a7f, 0x58, 0x358d, 0x013c, 0x08, 0x08, 0x00, 0x00, 0x00, 0x13},
-	{0x65, 0x0eff, 0x69, 0x35be, 0x013d, 0x08, 0x09, 0x00, 0x00, 0x00, 0x1a},
-	{0x66, 0x06ff, 0x7a, 0x35d4, 0x013e, 0x08, 0x0a, 0x00, 0x00, 0x00, 0x1e},
-	{0x68, 0x067b, 0x8b, 0x35ef, 0x013f, 0x08, 0x0b, 0x00, 0x00, 0x00, 0x27},
-	{0x69, 0x06fd, 0x8b, 0x35ef, 0x0140, 0x08, 0x0b, 0x00, 0x00, 0x00, 0x27},
-	{0x6b, 0x07ff, 0x8b, 0x35ef, 0x0000, 0x10, 0x0b, 0x00, 0x00, 0x00, 0x27},
-	{0x6c, 0x067b, 0x9c, 0x35f6, 0x0000, 0x08, 0x0c, 0x00, 0x00, 0x00, 0x28},
-	{0x6d, 0x06fd, 0x9c, 0x35f6, 0x0000, 0x10, 0x0c, 0x00, 0x00, 0x00, 0x28},
-	{0x6e, 0x0e3b, 0x6f, 0x35b2, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x00, 0x29},
-	{0x6f, 0x0e7d, 0x6f, 0x35b2, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x00, 0x29},
-	{0x7b, 0x0eff, 0x6f, 0x35b2, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x00, 0x29},
-	{0x7c, 0x221b, 0xb3, 0x363e, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00, 0x2b},
-	{0x7d, 0x221d, 0xb3, 0x363e, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00, 0x2b},
-	{0x7e, 0x223f, 0xb3, 0x363e, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00, 0x2b},
-	{0xff, 0x0000, 0x00, 0x0000, 0xffff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-};
-
-typedef struct _SiS300_Ext2Struct {
+
+SiS300_ExtStruct  SiS300_EModeIDTable[]=
+{
+	{0x6a,0x2212,0x47,0x3563,0x0102,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */  /* 800x600x? */
+	{0x2e,0x0a1b,0x36,0x3539,0x0101,0x08,0x06,0x00,0x00,0x00,0x08},  /* 37c3 */
+	{0x2f,0x021b,0x35,0x3532,0x0100,0x08,0x05,0x00,0x00,0x00,0x10},  /* 37bc */
+	{0x30,0x2a1b,0x47,0x3563,0x0103,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */
+	{0x31,0x0a1b,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 38ba */ /* 720x480x8 */
+	{0x32,0x2a1b,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 38c1 */ /* 720x576x8 */
+	{0x33,0x0a1d,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 38ba */ /* 720x480x16 */
+	{0x34,0x2a1d,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 38c1 */ /* 720x576x16 */
+	{0x35,0x0a1f,0xad,0x3630,0x0000,0x08,0x0c,0x00,0x00,0x00,0x11},  /* 38ba */ /* 720x480x32 */
+	{0x36,0x2a1f,0xae,0x3637,0x0000,0x08,0x0d,0x00,0x00,0x00,0x12},  /* 38c1 */ /* 720x576x32 */
+	{0x37,0x0212,0x58,0x358d,0x0104,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */ /* 1024x768x? */
+	{0x38,0x0a1b,0x58,0x358d,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */ /* 1024x768x8 */
+	{0x3a,0x0e3b,0x69,0x35be,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 3848 */ /* 1280x1024x8 */
+	{0x3c,0x063b,0x7a,0x35d4,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},  /* 385e */
+	{0x3d,0x067d,0x7a,0x35d4,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},  /* 385e */
+	{0x40,0x921c,0x00,0x3516,0x010d,0x08,0x00,0x00,0x00,0x00,0x23},  /* 37a0 */
+	{0x41,0x921d,0x00,0x3516,0x010e,0x08,0x00,0x00,0x00,0x00,0x23},  /* 37a0 */
+	{0x43,0x0a1c,0x36,0x3539,0x0110,0x08,0x06,0x00,0x00,0x00,0x08},  /* 37c3 */
+	{0x44,0x0a1d,0x36,0x3539,0x0111,0x08,0x06,0x00,0x00,0x00,0x08},  /* 37c3 */
+	{0x46,0x2a1c,0x47,0x3563,0x0113,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */
+	{0x47,0x2a1d,0x47,0x3563,0x0114,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */
+	{0x49,0x0a3c,0x58,0x358d,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */
+	{0x4a,0x0a3d,0x58,0x358d,0x0117,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */
+	{0x4c,0x0e7c,0x69,0x35be,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 3848 */
+	{0x4d,0x0e7d,0x69,0x35be,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 3848 */
+	{0x50,0x921b,0x01,0x351d,0x0132,0x08,0x01,0x00,0x00,0x00,0x24},  /* 37a7 */
+	{0x51,0xb21b,0x13,0x3524,0x0133,0x08,0x03,0x00,0x00,0x00,0x25},  /* 37ae */
+	{0x52,0x921b,0x24,0x352b,0x0134,0x08,0x04,0x00,0x00,0x00,0x26},  /* 37b5 */
+	{0x56,0x921d,0x01,0x351d,0x0135,0x08,0x01,0x00,0x00,0x00,0x24},  /* 37a7 */
+	{0x57,0xb21d,0x13,0x3524,0x0136,0x08,0x03,0x00,0x00,0x00,0x25},  /* 37ae */
+	{0x58,0x921d,0x24,0x352b,0x0137,0x08,0x04,0x00,0x00,0x00,0x26},  /* 37b5 */
+	{0x59,0x921b,0x00,0x3516,0x0138,0x08,0x00,0x00,0x00,0x00,0x23},  /* 37a0 */
+	{0x5c,0x921f,0x24,0x352b,0x0000,0x08,0x04,0x00,0x00,0x00,0x26},  /* TW: inserted 512x384x32 */
+	{0x5d,0x021d,0x35,0x3532,0x0139,0x08,0x05,0x00,0x00,0x00,0x10},  /* 37bc */
+	{0x62,0x0a3f,0x36,0x3539,0x013a,0x08,0x06,0x00,0x00,0x00,0x08},  /* 37c3 */
+	{0x63,0x2a3f,0x47,0x3563,0x013b,0x08,0x07,0x00,0x00,0x00,0x00},  /* 37ed */
+	{0x64,0x0a7f,0x58,0x358d,0x013c,0x08,0x08,0x00,0x00,0x00,0x13},  /* 3817 */
+	{0x65,0x0eff,0x69,0x35be,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},  /* 3848 */
+	{0x66,0x06ff,0x7a,0x35d4,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},  /* 385e */
+	{0x68,0x067b,0x8b,0x35ef,0x013f,0x08,0x0b,0x00,0x00,0x00,0x27},  /* 3879 */
+	{0x69,0x06fd,0x8b,0x35ef,0x0140,0x08,0x0b,0x00,0x00,0x00,0x27},  /* 3879 */
+	{0x6b,0x07ff,0x8b,0x35ef,0x0000,0x10,0x0b,0x00,0x00,0x00,0x27},  /* 3879 */
+	{0x6c,0x067b,0x9c,0x35f6,0x0000,0x08,0x0c,0x00,0x00,0x00,0x28},  /* 3880 */
+	{0x6d,0x06fd,0x9c,0x35f6,0x0000,0x10,0x0c,0x00,0x00,0x00,0x28},  /* 3880 */
+	{0x6e,0x0e3b,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 383c */  /* 1280x960x8 */
+	{0x6f,0x0e7d,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 383c */  /* 1280x960x16 */
+	{0x7b,0x0eff,0x6f,0x35b2,0x0000,0x08,0x0e,0x00,0x00,0x00,0x29},  /* 383c */  /* 1280x960x32 */
+	{0x20,0x0a1b,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},              /* 1024x600 */
+	{0x21,0x0a3d,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},
+	{0x22,0x0a7f,0x54,0x0000,0x0000,0x08,0x0f,0x00,0x00,0x00,0x2b},
+	{0x23,0x0a1b,0xc5,0x0000,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},              /* 1152x768 */
+	{0x24,0x0a3d,0xc5,0x431d,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},
+	{0x25,0x0a7f,0xc5,0x431d,0x0000,0x08,0x10,0x00,0x00,0x00,0x2c},
+	{0xff,0x0000,0x00,0x0000,0xffff,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+typedef struct _SiS300_Ext2Struct
+{
 	USHORT Ext_InfoFlag;
-	UCHAR Ext_CRT1CRTC;
+	UCHAR Ext_CRT1CRTC;  /* TW: Index in SiS300_CRT1Table */
 	UCHAR Ext_CRTVCLK;
-	UCHAR Ext_CRT2CRTC;
-	UCHAR ModeID;
+	UCHAR Ext_CRT2CRTC;  /* TW: Index in LCD Paneltype arrays (&3f) */
+	UCHAR  ModeID;
 	USHORT XRes;
 	USHORT YRes;
 	USHORT ROM_OFFSET;
 } SiS300_Ext2Struct;
-SiS300_Ext2Struct SiS300_RefIndex[] = {
-	{0x085f, 0x0d, 0x03, 0x05, 0x6a, 800, 600, 0x3563},
-	{0x0467, 0x0e, 0x44, 0x05, 0x6a, 800, 600, 0x3568},
-	{0x0067, 0x4f, 0x07, 0x48, 0x6a, 800, 600, 0x356d},
-	{0x0067, 0x10, 0x06, 0x8b, 0x6a, 800, 600, 0x3572},
-	{0x0147, 0x11, 0x08, 0x00, 0x6a, 800, 600, 0x3577},
-	{0x0147, 0x12, 0x0c, 0x00, 0x6a, 800, 600, 0x357c},
-	{0x0047, 0x51, 0x4e, 0x00, 0x6a, 800, 600, 0x3581},
-	{0x0047, 0x11, 0x13, 0x00, 0x6a, 800, 600, 0x3586},
-	{0xc85f, 0x05, 0x00, 0x04, 0x2e, 640, 480, 0x3539},
-	{0xc067, 0x06, 0x02, 0x04, 0x2e, 640, 480, 0x353e},
-	{0xc067, 0x07, 0x02, 0x47, 0x2e, 640, 480, 0x3543},
-	{0xc067, 0x08, 0x03, 0x8a, 0x2e, 640, 480, 0x3548},
-	{0xc047, 0x09, 0x05, 0x00, 0x2e, 640, 480, 0x354d},
-	{0xc047, 0x0a, 0x08, 0x00, 0x2e, 640, 480, 0x3552},
-	{0xc047, 0x0b, 0x0a, 0x00, 0x2e, 640, 480, 0x3557},
-	{0xc047, 0x0c, 0x10, 0x00, 0x2e, 640, 480, 0x355c},
-	{0x487f, 0x04, 0x00, 0x00, 0x2f, 640, 400, 0x3532},
-	{0xc00f, 0x31, 0x01, 0x06, 0x31, 2048, 1536, 0x3630},
-	{0x000f, 0x32, 0x03, 0x06, 0x32, 720, 480, 0x3637},
-	{0x0187, 0x15, 0x05, 0x00, 0x37, 1024, 768, 0x358d},
-	{0xc877, 0x16, 0x09, 0x06, 0x37, 1024, 768, 0x3592},
-	{0xc067, 0x97, 0x0b, 0x49, 0x37, 1024, 768, 0x3597},
-	{0x0267, 0x18, 0x0d, 0x00, 0x37, 1024, 768, 0x359c},
-	{0x0047, 0x59, 0x11, 0x8c, 0x37, 1024, 768, 0x35a1},
-	{0x0047, 0x1a, 0x52, 0x00, 0x37, 1024, 768, 0x35a6},
-	{0x0047, 0x5b, 0x16, 0x00, 0x37, 1024, 768, 0x35ab},
-	{0x0387, 0x5c, 0x4d, 0x00, 0x3a, 1280, 1024, 0x35be},
-	{0x0077, 0x1d, 0x14, 0x07, 0x3a, 1280, 1024, 0x35c3},
-	{0x0047, 0x1e, 0x17, 0x00, 0x3a, 1280, 1024, 0x35c8},
-	{0x0007, 0x1f, 0x98, 0x00, 0x3a, 1280, 1024, 0x35cd},
-	{0x0007, 0x60, 0x59, 0x00, 0x3c, 1600, 1200, 0x35d4},
-	{0x0007, 0x21, 0x5a, 0x00, 0x3c, 1600, 1200, 0x35d9},
-	{0x0007, 0x22, 0x1b, 0x00, 0x3c, 1600, 1200, 0x35de},
-	{0x0007, 0x63, 0x1d, 0x00, 0x3c, 1600, 1200, 0x35e3},
-	{0x0007, 0x24, 0x1e, 0x00, 0x3c, 1600, 1200, 0x35e8},
-	{0x407f, 0x00, 0x00, 0x00, 0x40, 320, 200, 0x3516},
-	{0xc07f, 0x01, 0x00, 0x04, 0x50, 320, 240, 0x351d},
-	{0x0077, 0x02, 0x04, 0x05, 0x51, 400, 300, 0x3524},
-	{0xc077, 0x03, 0x09, 0x06, 0x52, 512, 384, 0x352b},
-	{0x8207, 0x25, 0x1f, 0x00, 0x68, 1920, 1440, 0x35ef},
-	{0x0007, 0x26, 0x20, 0x00, 0x6c, 2048, 1536, 0x35f6},
-	{0x0027, 0x27, 0x14, 0x08, 0x6e, 720, 576, 0x35b2},
-	{0x0027, 0x27, 0x14, 0x08, 0x6e, 720, 576, 0x35b7},
-	{0x00df, 0x33, 0x28, 0x00, 0x7c, 1280, 960, 0x363e},
-	{0xc05f, 0x34, 0x28, 0x00, 0x7c, 1280, 960, 0x3643},
-	{0xffff, 0, 0, 0, 0, 0, 0, 0}
+
+SiS300_Ext2Struct  SiS300_RefIndex[]=
+{ /* TW: Don't ever insert anything here, table is indexed */
+	{0x085f,0x0d,0x03,0x05,0x6a, 800, 600,0x3563}, /* 00 */
+	{0x0467,0x0e,0x44,0x05,0x6a, 800, 600,0x3568}, /* 01 */
+	{0x0067,0x4f,0x07,0x48,0x6a, 800, 600,0x356d}, /* 02 */
+	{0x0067,0x10,0x06,0x8b,0x6a, 800, 600,0x3572}, /* 03 */
+	{0x0147,0x11,0x08,0x00,0x6a, 800, 600,0x3577}, /* 04 */
+	{0x0147,0x12,0x0c,0x00,0x6a, 800, 600,0x357c}, /* 05 */
+	{0x0047,0x51,0x4e,0x00,0x6a, 800, 600,0x3581}, /* 06 */
+	{0x0047,0x11,0x13,0x00,0x6a, 800, 600,0x3586}, /* 07 */
+	{0xc85f,0x05,0x00,0x04,0x2e, 640, 480,0x3539}, /* 08 */
+	{0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x353e}, /* 09 */
+	{0xc067,0x07,0x02,0x47,0x2e, 640, 480,0x3543}, /* 0a */
+	{0xc067,0x08,0x03,0x8a,0x2e, 640, 480,0x3548}, /* 0b */
+	{0xc047,0x09,0x05,0x00,0x2e, 640, 480,0x354d}, /* 0c */
+	{0xc047,0x0a,0x08,0x00,0x2e, 640, 480,0x3552}, /* 0d */
+	{0xc047,0x0b,0x0a,0x00,0x2e, 640, 480,0x3557}, /* 0e */
+	{0xc047,0x0c,0x10,0x00,0x2e, 640, 480,0x355c}, /* 0f */
+	{0x487f,0x04,0x00,0x00,0x2f, 640, 400,0x3532}, /* 10 */
+	{0xc00f,0x31,0x01,0x06,0x31, 720, 480,0x3630}, /* 11 */
+	{0x000f,0x32,0x03,0x06,0x32, 720, 576,0x3637}, /* 12 */
+	{0x0187,0x15,0x05,0x00,0x37,1024, 768,0x358d}, /* 13 */
+        {0xc877,0x16,0x09,0x06,0x37,1024, 768,0x3592}, /* 14 */
+	{0xc067,0x97,0x0b,0x49,0x37,1024, 768,0x3597}, /* 15 */
+	{0x0267,0x18,0x0d,0x00,0x37,1024, 768,0x359c}, /* 16 */
+	{0x0047,0x59,0x11,0x8c,0x37,1024, 768,0x35a1}, /* 17 */
+	{0x0047,0x1a,0x52,0x00,0x37,1024, 768,0x35a6}, /* 18 */
+	{0x0047,0x5b,0x16,0x00,0x37,1024, 768,0x35ab}, /* 19 */
+	{0x0387,0x5c,0x4d,0x00,0x3a,1280,1024,0x35be}, /* 1a */
+	{0x0077,0x1d,0x14,0x07,0x3a,1280,1024,0x35c3}, /* 1b */
+	{0x0047,0x1e,0x17,0x00,0x3a,1280,1024,0x35c8}, /* 1c */
+	{0x0007,0x1f,0x98,0x00,0x3a,1280,1024,0x35cd}, /* 1d */
+	{0x0007,0x60,0x59,0x00,0x3c,1600,1200,0x35d4}, /* 1e */
+	{0x0007,0x21,0x5a,0x00,0x3c,1600,1200,0x35d9}, /* 1f */
+	{0x0007,0x22,0x1b,0x00,0x3c,1600,1200,0x35de}, /* 20 */
+	{0x0007,0x63,0x1d,0x00,0x3c,1600,1200,0x35e3}, /* 21 */
+	{0x0007,0x24,0x1e,0x00,0x3c,1600,1200,0x35e8}, /* 22 */
+	{0x407f,0x00,0x00,0x00,0x40, 320, 200,0x3516}, /* 23 */
+	{0xc07f,0x01,0x00,0x04,0x50, 320, 240,0x351d}, /* 24 */
+	{0x0077,0x02,0x04,0x05,0x51, 400, 300,0x3524}, /* 25 */
+	{0xc077,0x03,0x09,0x06,0x52, 512, 384,0x352b}, /* 26 */   
+	{0x8207,0x25,0x1f,0x00,0x68,1920,1440,0x35ef}, /* 27 */
+	{0x0007,0x26,0x20,0x00,0x6c, 720, 480,0x35f6}, /* 28 */
+	{0x0027,0x27,0x14,0x08,0x6e,1280, 960,0x35b2}, /* 29 */
+	{0x0027,0x27,0x14,0x08,0x6e,1280, 960,0x35b7}, /* 2a */
+	{0xc077,0x33,0x09,0x06,0x20,1024, 600,0x0000}, /* 2b */
+	{0xc077,0x34,0x09,0x06,0x23,1152, 768,0x0000}, /* 2c */
+	{0xffff,0,0,0,0,0,0,0}
 };
 
 /*add for 300 oem util*/
-typedef struct _SiS_VBModeIDTableStruct {
-	UCHAR ModeID;
-	UCHAR VB_TVDelayIndex;
-	UCHAR VB_TVFlickerIndex;
-	UCHAR VB_TVPhaseIndex;
-	UCHAR VB_TVYFilterIndex;
-	UCHAR VB_LCDDelayIndex;
-	UCHAR _VB_LCDHIndex;
-	UCHAR _VB_LCDVIndex;
-} SiS_VBModeIDTableStruct;
-SiS_VBModeIDTableStruct SiS300_VBModeIDTable[] = {
-	{0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	{0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
-	{0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x02},
-	{0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00},
-	{0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x01},
-	{0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x02},
-	{0x05, 0x00, 0x00, 0x01, 0x04, 0x00, 0x00, 0x00},
-	{0x06, 0x00, 0x00, 0x01, 0x05, 0x00, 0x02, 0x00},
-	{0x07, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x01},
-	{0x07, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x02},
-	{0x0d, 0x00, 0x00, 0x01, 0x04, 0x00, 0x00, 0x00},
-	{0x0e, 0x00, 0x00, 0x01, 0x05, 0x00, 0x02, 0x00},
-	{0x0f, 0x00, 0x00, 0x01, 0x05, 0x00, 0x02, 0x01},
-	{0x10, 0x00, 0x00, 0x01, 0x05, 0x00, 0x02, 0x01},
-	{0x11, 0x00, 0x00, 0x01, 0x05, 0x00, 0x02, 0x03},
-	{0x12, 0x00, 0x00, 0x01, 0x05, 0x00, 0x02, 0x03},
-	{0x13, 0x00, 0x00, 0x01, 0x04, 0x00, 0x04, 0x00},
-	{0x6a, 0x00, 0x00, 0x01, 0x07, 0x00, 0x08, 0x0a},
-	{0x2e, 0x00, 0x00, 0x01, 0x05, 0x00, 0x06, 0x08},
-	{0x2f, 0x00, 0x00, 0x01, 0x05, 0x00, 0x06, 0x06},
-	{0x30, 0x00, 0x00, 0x01, 0x07, 0x00, 0x08, 0x0a},
-	{0x31, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x00},
-	{0x32, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x00},
-	{0x37, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0a, 0x0c},
-	{0x38, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0a, 0x0c},
-	{0x3a, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0b, 0x0d},
-	{0x40, 0x00, 0x00, 0x01, 0x04, 0x00, 0x05, 0x05},
-	{0x41, 0x00, 0x00, 0x01, 0x04, 0x00, 0x05, 0x05},
-	{0x43, 0x00, 0x00, 0x01, 0x05, 0x00, 0x06, 0x08},
-	{0x44, 0x00, 0x00, 0x01, 0x05, 0x00, 0x06, 0x08},
-	{0x46, 0x00, 0x00, 0x01, 0x07, 0x00, 0x08, 0x0a},
-	{0x47, 0x00, 0x00, 0x01, 0x07, 0x00, 0x08, 0x0a},
-	{0x49, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0a, 0x0c},
-	{0x4a, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0a, 0x0c},
-	{0x4c, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0b, 0x0d},
-	{0x4d, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0b, 0x0d},
-	{0x50, 0x00, 0x00, 0x01, 0x04, 0x00, 0x05, 0x07},
-	{0x51, 0x00, 0x00, 0x01, 0x07, 0x00, 0x07, 0x09},
-	{0x52, 0x00, 0x00, 0x01, 0x00, 0x00, 0x09, 0x0b},
-	{0x56, 0x00, 0x00, 0x01, 0x04, 0x00, 0x05, 0x07},
-	{0x57, 0x00, 0x00, 0x01, 0x07, 0x00, 0x07, 0x09},
-	{0x58, 0x00, 0x00, 0x01, 0x00, 0x00, 0x09, 0x0b},
-	{0x59, 0x00, 0x00, 0x01, 0x04, 0x00, 0x05, 0x05},
-	{0x5d, 0x00, 0x00, 0x01, 0x07, 0x00, 0x06, 0x06},
-	{0x62, 0x00, 0x00, 0x01, 0x05, 0x00, 0x06, 0x08},
-	{0x63, 0x00, 0x00, 0x01, 0x07, 0x00, 0x08, 0x0a},
-	{0x64, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0a, 0x0c},
-	{0x65, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0b, 0x0d},
-	{0x6e, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0b, 0x0d},
-	{0x6f, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0b, 0x0d},
-	{0x7b, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0b, 0x0d}
+typedef struct _SiS_VBModeIDTableStruct
+{
+	UCHAR  ModeID;
+	UCHAR  VB_TVDelayIndex;
+	UCHAR  VB_TVFlickerIndex;
+	UCHAR  VB_TVPhaseIndex;
+	UCHAR  VB_TVYFilterIndex;
+	UCHAR  VB_LCDDelayIndex;
+	UCHAR  _VB_LCDHIndex;
+	UCHAR  _VB_LCDVIndex;
+}SiS_VBModeIDTableStruct;
+
+SiS_VBModeIDTableStruct  SiS300_VBModeIDTable[]=
+{
+	{0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, /* TW: Identical to 630/301B BIOS */
+	{0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01},
+	{0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x02},
+	{0x03,0x00,0x00,0x00,0x02,0x00,0x02,0x00},
+	{0x03,0x00,0x00,0x00,0x02,0x00,0x02,0x01},
+	{0x03,0x00,0x00,0x00,0x03,0x00,0x03,0x02},
+	{0x05,0x00,0x00,0x01,0x04,0x00,0x00,0x00},
+	{0x06,0x00,0x00,0x01,0x05,0x00,0x02,0x00},
+	{0x07,0x00,0x00,0x00,0x03,0x00,0x03,0x01},
+	{0x07,0x00,0x00,0x00,0x03,0x00,0x03,0x02},
+	{0x0d,0x00,0x00,0x01,0x04,0x00,0x00,0x00},
+	{0x0e,0x00,0x00,0x01,0x05,0x00,0x02,0x00},
+	{0x0f,0x00,0x00,0x01,0x05,0x00,0x02,0x01},
+	{0x10,0x00,0x00,0x01,0x05,0x00,0x02,0x01},
+	{0x11,0x00,0x00,0x01,0x05,0x00,0x02,0x03},
+	{0x12,0x00,0x00,0x01,0x05,0x00,0x02,0x03},
+	{0x13,0x00,0x00,0x01,0x04,0x00,0x04,0x00},
+	{0x6a,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x2e,0x00,0x00,0x01,0x05,0x00,0x06,0x08},
+	{0x2f,0x00,0x00,0x01,0x05,0x00,0x06,0x06},
+	{0x30,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x31,0x00,0x00,0x01,0x06,0x00,0x00,0x00},
+	{0x32,0x00,0x00,0x01,0x06,0x00,0x00,0x00},
+	{0x37,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x38,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x3a,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x40,0x00,0x00,0x01,0x04,0x00,0x05,0x05},
+	{0x41,0x00,0x00,0x01,0x04,0x00,0x05,0x05},
+	{0x43,0x00,0x00,0x01,0x05,0x00,0x06,0x08},
+	{0x44,0x00,0x00,0x01,0x05,0x00,0x06,0x08},
+	{0x46,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x47,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x49,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x4a,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x4c,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x4d,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x50,0x00,0x00,0x01,0x04,0x00,0x05,0x07},
+	{0x51,0x00,0x00,0x01,0x07,0x00,0x07,0x09},
+	{0x52,0x00,0x00,0x01,0x00,0x00,0x09,0x0b},
+	{0x56,0x00,0x00,0x01,0x04,0x00,0x05,0x07},
+	{0x57,0x00,0x00,0x01,0x07,0x00,0x07,0x09},
+	{0x58,0x00,0x00,0x01,0x00,0x00,0x09,0x0b},
+	{0x59,0x00,0x00,0x01,0x04,0x00,0x05,0x05},
+	{0x5d,0x00,0x00,0x01,0x07,0x00,0x06,0x06},
+	{0x62,0x00,0x00,0x01,0x05,0x00,0x06,0x08},
+	{0x63,0x00,0x00,0x01,0x07,0x00,0x08,0x0a},
+	{0x64,0x00,0x00,0x01,0x00,0x00,0x0a,0x0c},
+	{0x65,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x6e,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x6f,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0x7b,0x00,0x00,0x01,0x00,0x00,0x0b,0x0d},
+	{0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00}  /* TW: added! */
 };
 /*end*/
 
-typedef struct _SiS300_CRT1TableStruct {
+typedef struct _SiS300_CRT1TableStruct
+{
 	UCHAR CR[17];
 } SiS300_CRT1TableStruct;
-SiS300_CRT1TableStruct SiS300_CRT1Table[] = {
-	{{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	  0x9c, 0x8e, 0x8f, 0x96, 0xb9, 0x30, 0x00, 0x04,
-	  0x00}},
-	{{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0x0b, 0x3e,
-	  0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x04,
-	  0x00}},
-	{{0x3d, 0x31, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x57, 0x73, 0x20, 0x00, 0x05,
-	  0x01}},
-	{{0x4f, 0x3f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x01,
-	  0x01}},
-	{{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x9c, 0x8e, 0x8f, 0x96, 0xb9, 0x30, 0x00, 0x05,
-	  0x00}},
-	{{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0x0b, 0x3e,
-	  0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x63, 0x4f, 0x50, 0x86, 0x56, 0x9b, 0x06, 0x3e,
-	  0xe8, 0x8b, 0xdf, 0xe7, 0xff, 0x10, 0x00, 0x01,
-	  0x00}},
-	{{0x64, 0x4f, 0x4f, 0x88, 0x55, 0x9d, 0xf2, 0x1f,
-	  0xe0, 0x83, 0xdf, 0xdf, 0xf3, 0x10, 0x00, 0x01,
-	  0x00}},
-	{{0x63, 0x4f, 0x4f, 0x87, 0x5a, 0x81, 0xfb, 0x1f,
-	  0xe0, 0x83, 0xdf, 0xdf, 0xfc, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x66, 0x4f, 0x4f, 0x86, 0x56, 0x9e, 0x03, 0x3e,
-	  0xe4, 0x87, 0xdf, 0xdf, 0x04, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x6c, 0x4f, 0x4f, 0x83, 0x59, 0x9e, 0x00, 0x3e,
-	  0xe5, 0x8d, 0xdf, 0xdf, 0x01, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x63, 0x4f, 0x4f, 0x87, 0x56, 0x9d, 0xfb, 0x1f,
-	  0xe0, 0x83, 0xdf, 0xdf, 0xfc, 0x10, 0x00, 0x01,
-	  0x00}},
-	{{0x65, 0x4f, 0x4f, 0x89, 0x57, 0x9f, 0xfb, 0x1f,
-	  0xe6, 0x8a, 0xe5, 0xe5, 0xfc, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x7b, 0x63, 0x63, 0x9f, 0x6a, 0x93, 0x6f, 0xf0,
-	  0x58, 0x8a, 0x57, 0x57, 0x70, 0x20, 0x00, 0x05,
-	  0x01}},
-	{{0x7f, 0x63, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x57, 0x73, 0x20, 0x00, 0x06,
-	  0x01}},
-	{{0x7d, 0x63, 0x63, 0x81, 0x6e, 0x1d, 0x98, 0xf0,
-	  0x7c, 0x82, 0x57, 0x57, 0x99, 0x00, 0x00, 0x06,
-	  0x01}},
-	{{0x7f, 0x63, 0x63, 0x83, 0x69, 0x13, 0x6f, 0xf0,
-	  0x58, 0x8b, 0x57, 0x57, 0x70, 0x20, 0x00, 0x06,
-	  0x01}},
-	{{0x7e, 0x63, 0x63, 0x82, 0x6b, 0x13, 0x75, 0xf0,
-	  0x58, 0x8b, 0x57, 0x57, 0x76, 0x20, 0x00, 0x06,
-	  0x01}},
-	{{0x8c, 0x63, 0x63, 0x87, 0x72, 0x16, 0x7e, 0xf0,
-	  0x59, 0x8d, 0x57, 0x57, 0x7f, 0x00, 0x00, 0x06,
-	  0x01}},
-	{{0x7e, 0x63, 0x63, 0x82, 0x6c, 0x14, 0x75, 0xe0,
-	  0x58, 0x0b, 0x57, 0x57, 0x76, 0x20, 0x00, 0x06,
-	  0x01}},
-	{{0x7e, 0x63, 0x63, 0x82, 0x6c, 0x14, 0x75, 0xe0,
-	  0x58, 0x0b, 0x57, 0x57, 0x76, 0x20, 0x00, 0x06,
-	  0x01}},
-	{{0x99, 0x7f, 0x7f, 0x9d, 0x84, 0x1a, 0x96, 0x1f,
-	  0x7f, 0x83, 0x7f, 0x7f, 0x97, 0x10, 0x00, 0x02,
-	  0x00}},
-	{{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
-	  0x01}},
-	{{0xa1, 0x7f, 0x7f, 0x85, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
-	  0x01}},
-	{{0x9f, 0x7f, 0x7f, 0x83, 0x85, 0x91, 0x1e, 0xf5,
-	  0x00, 0x83, 0xff, 0xff, 0x1f, 0x10, 0x00, 0x02,
-	  0x01}},
-	{{0xa7, 0x7f, 0x7f, 0x8b, 0x89, 0x95, 0x26, 0xf5,
-	  0x00, 0x83, 0xff, 0xff, 0x27, 0x10, 0x00, 0x02,
-	  0x01}},
-	{{0x9f, 0x7f, 0x7f, 0x83, 0x83, 0x93, 0x1e, 0xf5,
-	  0x00, 0x84, 0xff, 0xff, 0x1f, 0x10, 0x00, 0x02,
-	  0x01}},
-	{{0xa2, 0x7f, 0x7f, 0x86, 0x84, 0x94, 0x37, 0xf5,
-	  0x0b, 0x82, 0xff, 0xff, 0x38, 0x10, 0x00, 0x02,
-	  0x01}},
-	{{0xcf, 0x9f, 0x9f, 0x93, 0xb2, 0x01, 0x14, 0xba,
-	  0x00, 0x83, 0xff, 0xff, 0x15, 0x00, 0x00, 0x03,
-	  0x00}},
-	{{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x28, 0x5a,
-	  0x00, 0x83, 0xff, 0xff, 0x29, 0x09, 0x00, 0x07,
-	  0x01}},
-	{{0xce, 0x9f, 0x9f, 0x92, 0xa5, 0x17, 0x28, 0x5a,
-	  0x00, 0x83, 0xff, 0xff, 0x29, 0x09, 0x00, 0x07,
-	  0x01}},
-	{{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0x2e, 0x5a,
-	  0x00, 0x83, 0xff, 0xff, 0x2f, 0x09, 0x00, 0x07,
-	  0x01}},
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},
-	{{0x3f, 0xef, 0xef, 0x83, 0xfd, 0x1a, 0xda, 0x1f,
-	  0xa0, 0x84, 0x9f, 0x9f, 0xdb, 0x1f, 0x01, 0x01,
-	  0x00}},
-	{{0x55, 0xff, 0xff, 0x99, 0x0d, 0x0c, 0x3e, 0xba,
-	  0x00, 0x84, 0xff, 0xff, 0x3f, 0x0f, 0x41, 0x05,
-	  0x00}},
-	{{0xdc, 0x9f, 0x9f, 0x00, 0xab, 0x19, 0xe6, 0xef,
-	  0xc0, 0xc3, 0xbf, 0xbf, 0xe7, 0x10, 0x00, 0x07,
-	  0x01}},
-	{{0x7f, 0x63, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xba,
-	  0x27, 0x8b, 0xdf, 0xdf, 0x73, 0x00, 0x00, 0x06,
-	  0x01}},
-	{{0x7f, 0x63, 0x63, 0x83, 0x69, 0x13, 0x6f, 0xba,
-	  0x26, 0x89, 0xdf, 0xdf, 0x6f, 0x00, 0x00, 0x06,
-	  0x01}},
-	{{0x7f, 0x63, 0x63, 0x82, 0x6b, 0x13, 0x75, 0xba,
-	  0x29, 0x8c, 0xdf, 0xdf, 0x75, 0x00, 0x00, 0x06,
-	  0x01}},
-	{{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf1,
-	  0xaf, 0x85, 0x3f, 0x3f, 0x25, 0x30, 0x00, 0x02,
-	  0x01}},
-	{{0x9f, 0x7f, 0x7f, 0x83, 0x85, 0x91, 0x1e, 0xf1,
-	  0xad, 0x81, 0x3f, 0x3f, 0x1f, 0x30, 0x00, 0x02,
-	  0x01}},
-	{{0xa7, 0x7f, 0x7f, 0x88, 0x89, 0x15, 0x26, 0xf1,
-	  0xb1, 0x85, 0x3f, 0x3f, 0x27, 0x30, 0x00, 0x02,
-	  0x01}},
-	{{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x28, 0xc4,
-	  0x7a, 0x8e, 0xcf, 0xcf, 0x29, 0x21, 0x00, 0x07,
-	  0x01}},
-	{{0xce, 0x9f, 0x9f, 0x92, 0xa5, 0x17, 0x28, 0xd4,
-	  0x7a, 0x8e, 0xcf, 0xcf, 0x29, 0x21, 0x00, 0x07,
-	  0x01}},
-	{{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0x2e, 0xd4,
-	  0x7d, 0x81, 0xcf, 0xcf, 0x2f, 0x21, 0x00, 0x07,
-	  0x01}},
-	{{0x6b, 0x59, 0x59, 0x8f, 0x5e, 0x8c, 0x0b, 0x3e,
-	  0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x7b, 0x59, 0x63, 0x9f, 0x6a, 0x93, 0x6f, 0xf0,
-	  0x58, 0x8a, 0x3f, 0x57, 0x70, 0x20, 0x00, 0x05,
-	  0x01}},
-	{{0x86, 0x6a, 0x6a, 0x8a, 0x74, 0x06, 0x8c, 0x15,
-	  0x4f, 0x83, 0xef, 0xef, 0x8d, 0x30, 0x00, 0x02,
-	  0x00}},
-	{{0x81, 0x6a, 0x6a, 0x85, 0x70, 0x00, 0x0f, 0x3e,
-	  0xeb, 0x8e, 0xdf, 0xdf, 0x10, 0x00, 0x00, 0x02,
-	  0x00}}
-};
 
-typedef struct _SiS300_MCLKDataStruct {
-	UCHAR SR28, SR29, SR2A;
+SiS300_CRT1TableStruct  SiS300_CRT1Table[]=
+{
+ {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,    /* 0x00 */
+  0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
+  0x00}},
+ {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e,
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00,
+  0x00}},
+ {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0,
+  0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
+  0x01}},
+ {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
+  0x01}},
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+  0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
+  0x00}},
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+  0x00}},
+ {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,
+  0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
+  0x00}},
+ {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
+  0x00}},
+ {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
+  0x00}},
+ {{0x66,0x4f,0x4f,0x86,0x56,0x9e,0x03,0x3e,
+  0xe4,0x87,0xdf,0xdf,0x04,0x00,0x00,0x01,
+  0x00}},
+ {{0x6c,0x4f,0x4f,0x83,0x59,0x9e,0x00,0x3e,    /* 0x0a */
+  0xe5,0x8d,0xdf,0xdf,0x01,0x00,0x00,0x01,
+  0x00}},
+ {{0x63,0x4f,0x4f,0x87,0x56,0x9d,0xfb,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x01,
+  0x00}},
+ {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
+  0xe6,0x8a,0xe5,0xe5,0xfc,0x00,0x00,0x01,
+  0x00}},
+ {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
+  0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+  0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x06,
+  0x01}},
+ {{0x7d,0x63,0x63,0x81,0x6e,0x1d,0x98,0xf0,
+  0x7c,0x82,0x57,0x57,0x99,0x00,0x00,0x06,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xf0,
+  0x58,0x8b,0x57,0x57,0x70,0x20,0x00,0x06,
+  0x01}},
+ {{0x7e,0x63,0x63,0x82,0x6b,0x13,0x75,0xf0,
+  0x58,0x8b,0x57,0x57,0x76,0x20,0x00,0x06,
+  0x01}},
+ {{0x8c,0x63,0x63,0x87,0x72,0x16,0x7e,0xf0,
+  0x59,0x8d,0x57,0x57,0x7f,0x00,0x00,0x06,
+  0x01}},
+ {{0x7e,0x63,0x63,0x82,0x6c,0x14,0x75,0xe0,
+  0x58,0x0b,0x57,0x57,0x76,0x20,0x00,0x06,
+  0x01}},
+ {{0x7e,0x63,0x63,0x82,0x6c,0x14,0x75,0xe0,   /* 0x14 */
+  0x58,0x0b,0x57,0x57,0x76,0x20,0x00,0x06,
+  0x01}},
+ {{0x99,0x7f,0x7f,0x9d,0x84,0x1a,0x96,0x1f,
+  0x7f,0x83,0x7f,0x7f,0x97,0x10,0x00,0x02,
+  0x00}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}},
+ {{0xa1,0x7f,0x7f,0x85,0x86,0x97,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}},
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf5,
+  0x00,0x83,0xff,0xff,0x1f,0x10,0x00,0x02,
+  0x01}},
+ {{0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5,
+  0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02,
+  0x01}},
+ {{0x9f,0x7f,0x7f,0x83,0x83,0x93,0x1e,0xf5,
+  0x00,0x84,0xff,0xff,0x1f,0x10,0x00,0x02,
+  0x01}},
+ {{0xa2,0x7f,0x7f,0x86,0x84,0x94,0x37,0xf5,
+  0x0b,0x82,0xff,0xff,0x38,0x10,0x00,0x02,
+  0x01}},
+ {{0xcf,0x9f,0x9f,0x93,0xb2,0x01,0x14,0xba,
+  0x00,0x83,0xff,0xff,0x15,0x00,0x00,0x03,
+  0x00}},
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0x5a,
+  0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+  0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0x5a,  /* 0x1e */
+  0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+  0x01}},
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0x5a,
+  0x00,0x83,0xff,0xff,0x2f,0x09,0x00,0x07,
+  0x01}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,  /* 36: 1600x1200x85Hz */
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}},
+ {{0x3f,0xef,0xef,0x83,0xfd,0x1a,0xda,0x1f,  /* 37: 1920x1440x60Hz */
+  0xa0,0x84,0x9f,0x9f,0xdb,0x1f,0x01,0x01,
+  0x00}},
+ {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
+  0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
+  0x00}},
+ {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,
+  0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,  /* 0x28 */
+  0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
+  0x01}},
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
+  0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
+  0x01}},
+ {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
+  0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
+  0x01}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
+  0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
+  0x01}},
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
+  0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
+  0x01}},
+ {{0xa7,0x7f,0x7f,0x88,0x89,0x15,0x26,0xf1,
+  0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
+  0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
+  0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+  0x01}},
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
+  0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+  0x01}},
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
+  0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
+  0x01}},
+ {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+  0x00}},
+ {{0x7b,0x59,0x63,0x9f,0x6a,0x93,0x6f,0xf0,  /* 0x32 */
+  0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05,
+  0x01}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1,  /* 0x33 - 1024x600 */
+  0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02,
+  0x01}},
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,  /* 0x34 - 1152x768 */
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}}
+};
+
+typedef struct _SiS300_MCLKDataStruct
+{
+	UCHAR SR28,SR29,SR2A;
 	USHORT CLOCK;
 } SiS300_MCLKDataStruct;
-SiS300_MCLKDataStruct SiS300_MCLKData[] = {
-	{0x5a, 0x64, 0x80, 66},
-	{0xb3, 0x45, 0x80, 83},
-	{0x37, 0x61, 0x80, 100},
-	{0x37, 0x22, 0x80, 133},
-	{0x37, 0x61, 0x80, 100},
-	{0x37, 0x61, 0x80, 100},
-	{0x37, 0x61, 0x80, 100},
-	{0x37, 0x61, 0x80, 100}
-};
-
-typedef struct _SiS300_ECLKDataStruct {
-	UCHAR SR2E, SR2F, SR30;
+
+SiS300_MCLKDataStruct  SiS300_MCLKData[]=
+{ /* TW: at 0x54 in BIOS */
+	{ 0x5a,0x64,0x80, 66},
+	{ 0xb3,0x45,0x80, 83},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x22,0x80,133},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100},
+	{ 0x37,0x61,0x80,100}
+};
+
+typedef struct _SiS300_ECLKDataStruct
+{
+	UCHAR SR2E,SR2F,SR30;
 	USHORT CLOCK;
 } SiS300_ECLKDataStruct;
-SiS300_ECLKDataStruct SiS300_ECLKData[] = {
-	{0x54, 0x43, 0x80, 100},
-	{0x53, 0x43, 0x80, 100},
-	{0x55, 0x43, 0x80, 100},
-	{0x52, 0x43, 0x80, 100},
-	{0x3f, 0x42, 0x80, 100},
-	{0x54, 0x43, 0x80, 100},
-	{0x54, 0x43, 0x80, 100},
-	{0x54, 0x43, 0x80, 100}
-};
-
-typedef struct _SiS300_VCLKDataStruct {
-	UCHAR SR2B, SR2C;
+
+SiS300_ECLKDataStruct  SiS300_ECLKData[]=
+{
+	{ 0x54,0x43,0x80,100},
+	{ 0x53,0x43,0x80,100},
+	{ 0x55,0x43,0x80,100},
+	{ 0x52,0x43,0x80,100},
+	{ 0x3f,0x42,0x80,100},
+	{ 0x54,0x43,0x80,100},
+	{ 0x54,0x43,0x80,100},
+	{ 0x54,0x43,0x80,100}
+};
+
+typedef struct _SiS300_VCLKDataStruct
+{
+	UCHAR SR2B,SR2C;
 	USHORT CLOCK;
 } SiS300_VCLKDataStruct;
-SiS300_VCLKDataStruct SiS300_VCLKData[] = {
-	{0x1b, 0xe1, 25},
-	{0x4e, 0xe4, 28},
-	{0x57, 0xe4, 32},
-	{0xc3, 0xc8, 36},
-	{0x42, 0xc3, 40},
-	{0x5d, 0xc4, 45},
-	{0x52, 0x65, 50},
-	{0x53, 0x65, 50},
-	{0x6d, 0x66, 56},
-	{0x5a, 0x64, 65},
-	{0x46, 0x44, 68},
-	{0x3e, 0x43, 75},
-	{0x6d, 0x46, 76},
-	{0x41, 0x43, 79},
-	{0x31, 0x42, 79},
-	{0x46, 0x25, 85},
-	{0x78, 0x29, 87},
-	{0x62, 0x44, 95},
-	{0x2b, 0x22, 105},
-	{0x49, 0x24, 106},
-	{0xc3, 0x28, 108},
-	{0x3c, 0x23, 109},
-	{0xf7, 0x2c, 132},
-	{0xd4, 0x28, 136},
-	{0x41, 0x05, 158},
-	{0x43, 0x05, 162},
-	{0xe1, 0x0f, 175},
-	{0xfc, 0x12, 189},
-	{0xde, 0x26, 194},
-	{0x54, 0x05, 203},
-	{0x3f, 0x03, 230},
-	{0x30, 0x02, 234},
-	{0x24, 0x01, 266},
-	{0x52, 0x2a, 54},
-	{0x52, 0x6a, 27},
-	{0x62, 0x24, 70},
-	{0x62, 0x64, 70},
-	{0xa8, 0x4c, 30},
-	{0x20, 0x26, 33},
-	{0x31, 0xc2, 39},
-	{0xbf, 0xc8, 35},
-	{0x60, 0x36, 30},
-	{0x40, 0x4a, 28},
-	{0x9f, 0x46, 44},
-	{0x97, 0x2c, 26},
-	{0x44, 0xe4, 25},
-	{0x7e, 0x32, 47},
-	{0x8a, 0x24, 31},
-	{0x97, 0x2c, 26},
-	{0xce, 0x3c, 39},
-	{0x52, 0x4a, 36},
-	{0x34, 0x61, 95},
-	{0x78, 0x27, 108},
-	{0xff, 0x1b, 6625}
-};
+
+SiS300_VCLKDataStruct  SiS300_VCLKData[]=
+{
+	{ 0x1b,0xe1, 25},
+	{ 0x4e,0xe4, 28},
+	{ 0x57,0xe4, 32},
+	{ 0xc3,0xc8, 36},
+	{ 0x42,0xc3, 40},
+	{ 0x5d,0xc4, 45},
+	{ 0x52,0x65, 50},
+	{ 0x53,0x65, 50},
+	{ 0x6d,0x66, 56},
+	{ 0x5a,0x64, 65},
+	{ 0x46,0x44, 68},
+	{ 0x3e,0x43, 75},
+	{ 0x6d,0x46, 76}, /* 0x0c: 800x600 | LVDS_2(CH), MITAC(CH);  - LVDS2(CH), A901(301B): 0xb1,0x46, 76 */
+	{ 0x41,0x43, 79},
+	{ 0x31,0x42, 79},
+	{ 0x46,0x25, 85},
+	{ 0x78,0x29, 87}, /* 0x10 */
+	{ 0x62,0x44, 95},
+	{ 0x2b,0x22,105},
+	{ 0x49,0x24,106},
+	{ 0xc3,0x28,108},
+	{ 0x3c,0x23,109},
+	{ 0xf7,0x2c,132},
+	{ 0xd4,0x28,136},
+	{ 0x41,0x05,158},
+	{ 0x43,0x05,162},
+	{ 0xe1,0x0f,175},
+	{ 0xfc,0x12,189},
+	{ 0xde,0x26,194},
+	{ 0x54,0x05,203},
+	{ 0x3f,0x03,230},
+	{ 0x30,0x02,234},
+	{ 0x24,0x01,266},  /* 0x20 */
+	{ 0x52,0x2a, 54},  /* 301 TV */
+	{ 0x52,0x6a, 27},  /* 301 TV */
+	{ 0x62,0x24, 70},  /* 301 TV */
+	{ 0x62,0x64, 70},  /* 301 TV */
+	{ 0xa8,0x4c, 30},  /* 301 TV */
+	{ 0x20,0x26, 33},  /* 301 TV */
+	{ 0x31,0xc2, 39},
+	{ 0xbf,0xc8, 35},  /* 0x28 */
+	{ 0x60,0x36, 30},  /* 0x29  CH/UNTSC TEXT | LVDS_2(CH) - LVDS2(CH), A901(301B), Mitac(CH): 0xe0, 0xb6, 30 */
+	{ 0x40,0x4a, 28},
+	{ 0x9f,0x46, 44},
+	{ 0x97,0x2c, 26},
+	{ 0x44,0xe4, 25},
+	{ 0x7e,0x32, 47},
+	{ 0x8a,0x24, 31},  /* 0x2f  CH/PAL TEXT | LVDS_2(CH), Mitac(CH) -  LVDS2(CH), A901(301B): 0x57, 0xe4, 31 */
+	{ 0x97,0x2c, 26},
+	{ 0xce,0x3c, 39},
+	{ 0x52,0x4a, 36},
+	{ 0x34,0x61, 95},
+	{ 0x78,0x27,108},
+	{ 0xce,0x25,189},
+	{ 0x45,0x6b, 21},  /* 0x36 */  /* TW: Added from Mitac */
+	{ 0xff,0x00,  0}
+};
+
+#if 0 /* TW: This table is in all BIOSes, but not used */
+SiS300_VCLKDataStruct  SiS300_VBVCLKData[]=
+{
+	{ 0x1b,0xe1, 25},
+	{ 0x4e,0xe4, 28},
+	{ 0x57,0xe4, 31},
+	{ 0xc3,0xc8, 36},
+	{ 0x42,0x47, 40},
+	{ 0x5d,0xc4, 44},
+	{ 0x52,0x47, 49},
+	{ 0x53,0x47, 50},
+	{ 0x6d,0x66, 56},
+	{ 0x5a,0x64, 65},
+	{ 0x46,0x44, 67},
+	{ 0x29,0x61, 75},
+	{ 0x6d,0x46, 75},
+	{ 0x41,0x43, 78},
+	{ 0x31,0x42, 79},
+	{ 0x46,0x25, 84},
+	{ 0x78,0x29, 86}, /* 0x10 */
+	{ 0x62,0x44, 94},
+	{ 0x2b,0x22,104},
+	{ 0x49,0x24,105},
+	{ 0x43,0x42,108},
+	{ 0x3c,0x23,109},
+	{ 0xe0,0x46,132},
+	{ 0x70,0x25,135},
+	{ 0x41,0x22,157},
+	{ 0x43,0x22,162},
+	{ 0x30,0x21,175},
+	{ 0xc1,0x24,189},
+	{ 0xde,0x26,194},
+	{ 0x70,0x07,202},
+	{ 0x3f,0x03,229},
+	{ 0x30,0x02,234},  /* 0x1f */
+	{ 0x24,0x01,265},  /* 0x20 */
+	{ 0x52,0x2a, 54},
+	{ 0x52,0x6a, 27},
+	{ 0x62,0x24, 70},
+	{ 0x62,0x64, 70},
+	{ 0xa8,0x4c, 30},
+	{ 0x20,0x26, 33},
+	{ 0x31,0xc2, 39},
+	{ 0x2e,0x48, 25},  /* 0x28 */
+	{ 0x24,0x46, 25},  /* 0x29 */
+	{ 0x26,0x64, 28},
+	{ 0x37,0x64, 40},
+	{ 0xa1,0x42,108},
+	{ 0x37,0x61,100},
+	{ 0x78,0x27,108},
+	{ 0xff,0x00,  0}
+};
+#endif
 
 UCHAR SiS300_ScreenOffset[] =
-    { 0x14, 0x19, 0x20, 0x28, 0x32, 0x40, 0x50, 0x64, 0x78, 0x80, 0x2d, 0x35,
-	    0xff };
+{
+	0x14,0x19,0x20,0x28,0x32,0x40,0x50,
+        0x64,0x78,0x80,0x2d,0x35,0x48,0xff
+};
 
-typedef struct _SiS300_StResInfoStruct {
+typedef struct _SiS300_StResInfoStruct
+{
 	USHORT HTotal;
 	USHORT VTotal;
 } SiS300_StResInfoStruct;
-SiS300_StResInfoStruct SiS300_StResInfo[] = {
-	{640, 400},
-	{640, 350},
-	{720, 400},
-	{720, 350},
-	{640, 480}
+
+SiS300_StResInfoStruct  SiS300_StResInfo[] =
+{
+	{ 640,400},
+	{ 640,350},
+	{ 720,400},
+	{ 720,350},
+	{ 640,480}
 };
 
-typedef struct _SiS300_ModeResInfoStruct {
+typedef struct _SiS300_ModeResInfoStruct
+{
 	USHORT HTotal;
 	USHORT VTotal;
-	UCHAR XChar;
-	UCHAR YChar;
+	UCHAR  XChar;
+	UCHAR  YChar;
 } SiS300_ModeResInfoStruct;
-SiS300_ModeResInfoStruct SiS300_ModeResInfo[] = {
-	{320, 200, 8, 8},
-	{320, 240, 8, 8},
-	{320, 400, 8, 8},
-	{400, 300, 8, 8},
-	{512, 384, 8, 8},
-	{640, 400, 8, 16},
-	{640, 480, 8, 16},
-	{800, 600, 8, 16},
-	{1024, 768, 8, 16},
-	{1280, 1024, 8, 16},
-	{1600, 1200, 8, 16},
-	{1920, 1440, 8, 16},
-	{720, 480, 8, 16},
-	{720, 576, 8, 16},
-	{1280, 960, 8, 16}
-};
-
-UCHAR SiS300_OutputSelect = 0x40;
+
+SiS300_ModeResInfoStruct  SiS300_ModeResInfo[] =
+{
+	{  320, 200, 8, 8},  /* 0x00 */
+	{  320, 240, 8, 8},  /* 0x01 */
+	{  320, 400, 8, 8},  /* 0x02 */
+	{  400, 300, 8, 8},  /* 0x03 */
+	{  512, 384, 8, 8},  /* 0x04 */
+	{  640, 400, 8,16},  /* 0x05 */
+	{  640, 480, 8,16},  /* 0x06 */
+	{  800, 600, 8,16},  /* 0x07 */
+	{ 1024, 768, 8,16},  /* 0x08 */
+	{ 1280,1024, 8,16},  /* 0x09 */
+	{ 1600,1200, 8,16},  /* 0x0a */
+	{ 1920,1440, 8,16},  /* 0x0b */
+	{  720, 480, 8,16},  /* 0x0c */
+	{  720, 576, 8,16},  /* 0x0d */
+	{ 1280, 960, 8,16},  /* 0x0e */
+	{ 1024, 600, 8,16},  /* 0x0f */
+	{ 1152, 768, 8,16}   /* 0x10 */
+};
+
+UCHAR SiS300_OutputSelect =0x40;
 UCHAR SiS300_SoftSetting = 30;
-UCHAR SiS300_SR07 = 0x10;
-UCHAR SiS300_SR15[8][4] = {
-	{0x1, 0x9, 0xa3, 0x0},
-	{0x43, 0x43, 0x43, 0x0},
-	{0x1e, 0x1e, 0x1e, 0x0},
-	{0x2a, 0x2a, 0x2a, 0x0},
-	{0x6, 0x6, 0x6, 0x0},
-	{0x0, 0x0, 0x0, 0x0},
-	{0x0, 0x0, 0x0, 0x0},
-	{0x0, 0x0, 0x0, 0x0}
-};
-UCHAR SiS300_SR1F = 0x0;
-UCHAR SiS300_SR21 = 0x16;
-UCHAR SiS300_SR22 = 0xb2;
-UCHAR SiS300_SR23 = 0xf6;
-UCHAR SiS300_SR24 = 0xd;
-UCHAR SiS300_SR25[] = { 0x0, 0x0 };
-UCHAR SiS300_SR31 = 0x0;
-UCHAR SiS300_SR32 = 0x11;
-UCHAR SiS300_SR33 = 0x0;
+UCHAR SiS300_SR07=0x10;
+UCHAR SiS300_SR15[8][4] =
+{
+	{0x1,0x9,0xa3,0x0},
+	{0x43,0x43,0x43,0x0},
+	{0x1e,0x1e,0x1e,0x0},
+	{0x2a,0x2a,0x2a,0x0},
+	{0x6,0x6,0x6,0x0},
+	{0x0,0x0,0x0,0x0},
+	{0x0,0x0,0x0,0x0},
+	{0x0,0x0,0x0,0x0}
+};
+UCHAR SiS300_SR1F=0x0;
+UCHAR SiS300_SR21=0x16;
+UCHAR SiS300_SR22=0xb2;
+UCHAR SiS300_SR23=0xf6;
+UCHAR SiS300_SR24=0xd;
+UCHAR SiS300_SR25[]={0x0,0x0};
+UCHAR SiS300_SR31=0x0;
+UCHAR SiS300_SR32=0x11;
+UCHAR SiS300_SR33=0x0;
 UCHAR SiS300_CRT2Data_1_2 = 0x40;
 UCHAR SiS300_CRT2Data_4_D = 0x0;
 UCHAR SiS300_CRT2Data_4_E = 0x0;
@@ -916,42 +1018,68 @@ UCHAR SiS300_CRT2Data_4_10 = 0x80;
 USHORT SiS300_RGBSenseData = 0xd1;
 USHORT SiS300_VideoSenseData = 0xb3;
 USHORT SiS300_YCSenseData = 0xb9;
-USHORT SiS300_RGBSenseData2 = 0x0190;	/*301b */
+USHORT SiS300_RGBSenseData2 = 0x0190;     /*301b*/
 USHORT SiS300_VideoSenseData2 = 0x0174;
 USHORT SiS300_YCSenseData2 = 0x016b;
 
 UCHAR SiS300_CR40[5][4];
 UCHAR SiS300_CR49[2];
-UCHAR SiS300_NTSCPhase[] = { 0x21, 0xed, 0x8a, 0x8 };
-UCHAR SiS300_PALPhase[] = { 0x2a, 0x5, 0xd3, 0x0 };
-UCHAR SiS300_NTSCPhase2[] = { 0x21, 0xF0, 0x7B, 0xD6 };	/*301b */
-UCHAR SiS300_PALPhase2[] = { 0x2a, 0x09, 0x86, 0xe9 };
-UCHAR SiS300_PALMPhase[] = { 0x21, 0xE4, 0x2E, 0x9B };	/*palmn */
-UCHAR SiS300_PALNPhase[] = { 0x21, 0xF4, 0x3E, 0xBA };
-
-typedef struct _SiS300_PanelDelayTblStruct {
+UCHAR SiS300_NTSCPhase[]  = {0x21,0xed,0x8a,0x08};
+UCHAR SiS300_PALPhase[]   = {0x2a,0x05,0xd3,0x00};
+UCHAR SiS300_NTSCPhase2[] = {0x21,0xF0,0x7B,0xD6};  /* 301b */
+UCHAR SiS300_PALPhase2[]  = {0x2a,0x09,0x86,0xe9};  /* 301b */
+UCHAR SiS300_PALMPhase[]  = {0x21,0xE4,0x2E,0x9B};  /* palmn */
+UCHAR SiS300_PALNPhase[]  = {0x21,0xF4,0x3E,0xBA};
+UCHAR SiS300_PALMPhase2[] = {0x21,0xE6,0xEF,0xA4}; /* TW: palm 301b*/
+UCHAR SiS300_PALNPhase2[] = {0x21,0xF6,0x94,0x46}; /* TW: paln 301b*/
+
+typedef struct _SiS300_PanelDelayTblStruct
+{
 	UCHAR timer[2];
 } SiS300_PanelDelayTblStruct;
-SiS300_PanelDelayTblStruct SiS300_PanelDelayTbl[] = {
-	{{0x05, 0xaa}},
-	{{0x05, 0x14}},
-	{{0x05, 0x36}},
-	{{0x05, 0x14}},
-	{{0x05, 0x14}},
-	{{0x05, 0x14}},
-	{{0x05, 0x90}},
-	{{0x05, 0x90}},
-	{{0x05, 0x14}},
-	{{0x05, 0x14}},
-	{{0x05, 0x14}},
-	{{0x05, 0x14}},
-	{{0x05, 0x64}},
-	{{0x05, 0x14}},
-	{{0x05, 0x14}},
-	{{0x05, 0x14}}
-};
-
-typedef struct _SiS300_LCDDataStruct {
+
+SiS300_PanelDelayTblStruct SiS300_PanelDelayTbl[] =
+{
+	{{0x05,0xaa}},
+	{{0x05,0x14}},
+	{{0x05,0x36}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x90}},
+	{{0x05,0x90}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x64}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}} 
+};
+
+SiS300_PanelDelayTblStruct SiS300_PanelDelayTblLVDS[] =
+{
+	{{0x05,0xaa}},
+	{{0x05,0x14}},
+	{{0x05,0x36}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x90}},
+	{{0x05,0x90}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x14}},
+	{{0x05,0x28}},  /* 2.04.5c: 20, 80 - Clevo (2.04.2c): 05, 28 */
+	{{0x05,0x14}},
+	{{0x05,0x14}},  /* Some BIOSes: 05, 40 */
+	{{0x05,0x60}}
+};
+
+typedef struct _SiS300_LCDDataStruct
+{
 	USHORT RVBHCMAX;
 	USHORT RVBHCFACT;
 	USHORT VGAHT;
@@ -959,99 +1087,121 @@ typedef struct _SiS300_LCDDataStruct {
 	USHORT LCDHT;
 	USHORT LCDVT;
 } SiS300_LCDDataStruct;
-SiS300_LCDDataStruct SiS300_StLCD1024x768Data[] = {
-	{66, 31, 992, 510, 1320, 816},
-	{66, 31, 992, 510, 1320, 816},
-	{176, 75, 900, 510, 1320, 816},
-	{176, 75, 900, 510, 1320, 816},
-	{66, 31, 992, 510, 1320, 816},
-	{27, 16, 1024, 650, 1350, 832},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS300_LCDDataStruct SiS300_ExtLCD1024x768Data[] = {
-	{12, 5, 896, 512, 1344, 806},
-	{12, 5, 896, 510, 1344, 806},
-	{32, 15, 1008, 505, 1344, 806},
-	{32, 15, 1008, 514, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS300_LCDDataStruct SiS300_St2LCD1024x768Data[] = {
-	{62, 25, 800, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{104, 45, 945, 496, 1344, 806},
-	{62, 25, 800, 546, 1344, 806},
-	{31, 18, 1008, 624, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS300_LCDDataStruct SiS300_StLCD1280x1024Data[] = {
-	{4, 1, 880, 510, 1650, 1088},
-	{4, 1, 880, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{4, 1, 880, 510, 1650, 1088},
-	{13, 5, 1024, 675, 1560, 1152},
-	{16, 9, 1266, 804, 1688, 1072},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS300_LCDDataStruct SiS300_ExtLCD1280x1024Data[] = {
-	{211, 60, 1024, 501, 1688, 1066},
-	{211, 60, 1024, 508, 1688, 1066},
-	{211, 60, 1024, 501, 1688, 1066},
-	{211, 60, 1024, 508, 1688, 1066},
-	{211, 60, 1024, 500, 1688, 1066},
-	{211, 75, 1024, 625, 1688, 1066},
-	{211, 120, 1280, 798, 1688, 1066},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS300_LCDDataStruct SiS300_St2LCD1280x1024Data[] = {
-	{22, 5, 800, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{13, 5, 1024, 675, 1560, 1152},
-	{16, 9, 1266, 804, 1688, 1072},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS300_LCDDataStruct SiS300_NoScaleData[] = {
-	{1, 1, 800, 449, 800, 449},
-	{1, 1, 800, 449, 800, 449},
-	{1, 1, 900, 449, 900, 449},
-	{1, 1, 900, 449, 900, 449},
-	{1, 1, 800, 525, 800, 525},
-	{1, 1, 1056, 628, 1056, 628},
-	{1, 1, 1344, 806, 1344, 806},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS300_LCDDataStruct SiS300_LCD1280x960Data[] = {
-	{9, 2, 800, 500, 1800, 1000},
-	{9, 2, 800, 500, 1800, 1000},
-	{4, 1, 900, 500, 1800, 1000},
-	{4, 1, 900, 500, 1800, 1000},
-	{9, 2, 800, 500, 1800, 1000},
-	{30, 11, 1056, 625, 1800, 1000},
-	{5, 3, 1350, 800, 1800, 1000},
-	{1, 1, 1576, 1050, 1576, 1050},
-	{1, 1, 1800, 1000, 1800, 1000}
-};
-
-typedef struct _SiS300_TVDataStruct {
+
+SiS300_LCDDataStruct  SiS300_StLCD1024x768Data[]=
+{
+	{   66,  31, 992, 510,1320, 816},
+	{   66,  31, 992, 510,1320, 816},
+	{  176,  75, 900, 510,1320, 816},
+	{  176,  75, 900, 510,1320, 816},
+	{   66,  31, 992, 510,1320, 816},
+	{   27,  16,1024, 650,1350, 832},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS300_LCDDataStruct  SiS300_ExtLCD1024x768Data[]=
+{
+	{   12,   5, 896, 512,1344, 806},
+	{   12,   5, 896, 510,1344, 806},
+	{   32,  15,1008, 505,1344, 806},
+	{   32,  15,1008, 514,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS300_LCDDataStruct  SiS300_St2LCD1024x768Data[]=
+{
+	{   62,  25, 800, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{  104,  45, 945, 496,1344, 806},
+	{   62,  25, 800, 546,1344, 806},
+	{   31,  18,1008, 624,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS300_LCDDataStruct  SiS300_StLCD1280x1024Data[]=
+{
+	{    4,   1, 880, 510,1650,1088},
+	{    4,   1, 880, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{    4,   1, 880, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS300_LCDDataStruct  SiS300_ExtLCD1280x1024Data[]=
+{
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 500,1688,1066},
+	{  211,  75,1024, 625,1688,1066},
+	{  211, 120,1280, 798,1688,1066},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS300_LCDDataStruct  SiS300_St2LCD1280x1024Data[]=
+{
+	{   22,   5, 800, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS300_LCDDataStruct  SiS300_NoScaleData1024x768[]=
+{
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 800, 525, 800, 525},
+	{    1,   1,1056, 628,1056, 628},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS300_LCDDataStruct  SiS300_NoScaleData1280x1024[]=  /* TW: Fake */
+{
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 800, 525, 800, 525},
+	{    1,   1,1056, 628,1056, 628},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS300_LCDDataStruct  SiS300_LCD1280x960Data[]=
+{
+	{    9,   2, 800, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{   30,  11,1056, 625,1800,1000},
+	{    5,   3,1350, 800,1800,1000},
+	{    1,   1,1576,1050,1576,1050},
+	{    1,   1,1800,1000,1800,1000}
+};
+
+typedef struct _SiS300_TVDataStruct
+{
 	USHORT RVBHCMAX;
 	USHORT RVBHCFACT;
 	USHORT VGAHT;
@@ -1066,457 +1216,1480 @@ typedef struct _SiS300_TVDataStruct {
 	UCHAR RY3COE;
 	UCHAR RY4COE;
 } SiS300_TVDataStruct;
-SiS300_TVDataStruct SiS300_StPALData[] = {
-	{1, 1, 864, 525, 1270, 400, 100, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 350, 100, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 400, 0, 0, 720, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 864, 525, 1270, 350, 0, 0, 720, 0xf4, 0x0b, 0x1c, 0x0a},
-	{1, 1, 864, 525, 1270, 480, 50, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 600, 50, 0, 0, 0xf4, 0xff, 0x1c, 0x22}
+
+SiS300_TVDataStruct  SiS300_StPALData[]=
+{
+	{    1,   1, 864, 525,1270, 400, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+	{    1,   1, 864, 525,1270, 350, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+	{    1,   1, 864, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+	{    1,   1, 864, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+	{    1,   1, 864, 525,1270, 480,  50,   0, 760,0xf4,0xff,0x1c,0x22},
+	{    1,   1, 864, 525,1270, 600,  50,   0,   0,0xf4,0xff,0x1c,0x22}
 };
 
-SiS300_TVDataStruct SiS300_ExtPALData[] = {
-	{27, 10, 848, 448, 1270, 530, 50, 0, 50, 0xf4, 0xff, 0x1c, 0x22},
-	{108, 35, 848, 398, 1270, 530, 50, 0, 50, 0xf4, 0xff, 0x1c, 0x22},
-	{12, 5, 954, 448, 1270, 530, 50, 0, 50, 0xf1, 0x04, 0x1f, 0x18},
-	{9, 4, 960, 463, 1644, 438, 50, 0, 50, 0xf4, 0x0b, 0x1c, 0x0a},
-	{9, 4, 848, 528, 1270, 530, 0, 0, 50, 0xf5, 0xfb, 0x1b, 0x2a},
-	{36, 25, 1060, 648, 1316, 530, 438, 0, 438, 0xeb, 0x05, 0x25, 0x16},
-	{3, 2, 1080, 619, 1270, 540, 438, 0, 438, 0xf3, 0x00, 0x1d, 0x20},
-	{1, 1, 1170, 821, 1270, 520, 686, 0, 686, 0xF3, 0x00, 0x1D, 0x20}	/*301b */
+SiS300_TVDataStruct  SiS300_ExtPALData[]=
+{
+	{   27,  10, 848, 448,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+	{  108,  35, 848, 398,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+	{   12,   5, 954, 448,1270, 530,  50,   0,  50,0xf1,0x04,0x1f,0x18},
+	{    9,   4, 960, 463,1644, 438,  50,   0,  50,0xf4,0x0b,0x1c,0x0a},
+	{    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},
+	{   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},
+	{    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},
+	{    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}     /*301b*/
 
 };
 
-SiS300_TVDataStruct SiS300_StNTSCData[] = {
-	{1, 1, 858, 525, 1270, 400, 50, 0, 760, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 350, 50, 0, 640, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 400, 0, 0, 720, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 350, 0, 0, 720, 0xf4, 0x0b, 0x1c, 0x0a},
-	{1, 1, 858, 525, 1270, 480, 0, 0, 760, 0xf1, 0x04, 0x1f, 0x18}
+SiS300_TVDataStruct  SiS300_StNTSCData[]=
+{
+	{    1,   1, 858, 525,1270, 400,  50,   0, 760,0xf1,0x04,0x1f,0x18},
+	{    1,   1, 858, 525,1270, 350,  50,   0, 640,0xf1,0x04,0x1f,0x18},
+	{    1,   1, 858, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+	{    1,   1, 858, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+	{    1,   1, 858, 525,1270, 480,   0,   0, 760,0xf1,0x04,0x1f,0x18}
 };
 
-SiS300_TVDataStruct SiS300_ExtNTSCData[] = {
-	{143, 65, 858, 443, 1270, 440, 171, 0, 171, 0xf1, 0x04, 0x1f, 0x18},
-	{88, 35, 858, 393, 1270, 440, 171, 0, 171, 0xf1, 0x04, 0x1f, 0x18},
-	{143, 70, 924, 443, 1270, 440, 92, 0, 92, 0xf1, 0x04, 0x1f, 0x18},
-	{143, 70, 924, 393, 1270, 440, 92, 0, 92, 0xf4, 0x0b, 0x1c, 0x0a},
-	{143, 76, 836, 523, 1270, 440, 224, 0, 0, 0xf1, 0x05, 0x1f, 0x16},
-	{143, 120, 1056, 643, 1270, 440, 0, 128, 0, 0xf4, 0x10, 0x1c, 0x00},
-	{143, 76, 836, 523, 1270, 440, 0, 128, 0, 0xee, 0x0c, 0x22, 0x08},
-	{65, 64, 1056, 791, 1270, 480, 638, 0, 0, 0xf1, 0x04, 0x1f, 0x18}	/*301b */
+SiS300_TVDataStruct  SiS300_ExtNTSCData[]=
+{
+	{  143,  65, 858, 443,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+	{   88,  35, 858, 393,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+	{  143,  70, 924, 443,1270, 440,  92,   0,  92,0xf1,0x04,0x1f,0x18},
+	{  143,  70, 924, 393,1270, 440,  92,   0,  92,0xf4,0x0b,0x1c,0x0a},
+	{  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},
+	{  143, 120,1056, 643,1270, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},
+	{  143,  76, 836, 523,1270, 440,   0, 128,   0,0xee,0x0c,0x22,0x08},
+	{   65,  64,1056, 791,1270, 480, 638,   0,   0,0xf1,0x04,0x1f,0x18} /*301b*/
 };
 
-SiS_TVDataStruct SiS300_St1HiTVData[] = {
-	
-	    {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	 0x00, 0x00}
+SiS_TVDataStruct  SiS300_St1HiTVData[]=
+{
+ 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
 };
 
-SiS_TVDataStruct SiS300_St2HiTVData[] = {
-	
-	    {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	 0x00, 0x00}
+SiS_TVDataStruct  SiS300_St2HiTVData[]=
+{
+ 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
 };
 
-SiS_TVDataStruct SiS300_ExtHiTVData[] = {
-	
-	    {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	 0x00, 0x00}
+SiS_TVDataStruct  SiS300_ExtHiTVData[]=
+{
+ 	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
 };
 
 UCHAR SiS300_NTSCTiming[] = {
-	0x17, 0x1d, 0x03, 0x09, 0x05, 0x06, 0x0c, 0x0c,
-	0x94, 0x49, 0x01, 0x0a, 0x06, 0x0d, 0x04, 0x0a,
-	0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x1b,
-	0x0c, 0x50, 0x00, 0x97, 0x00, 0xda, 0x4a, 0x17,
-	0x7d, 0x05, 0x4b, 0x00, 0x00, 0xe2, 0x00, 0x02,
-	0x03, 0x0a, 0x65, 0x9d, 0x08, 0x92, 0x8f, 0x40,
-	0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x50,
-	0x00, 0x40, 0x44, 0x00, 0xdb, 0x02, 0x3b, 0x00
+	0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
+	0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
+	0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
+	0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,
+	0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,
+	0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50,
+	0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
 };
 
 UCHAR SiS300_PALTiming[] = {
-	0x19, 0x52, 0x35, 0x6e, 0x04, 0x38, 0x3d, 0x70,
-	0x94, 0x49, 0x01, 0x12, 0x06, 0x3e, 0x35, 0x6d,
-	0x06, 0x14, 0x3e, 0x35, 0x6d, 0x00, 0x45, 0x2b,
-	0x70, 0x50, 0x00, 0x9b, 0x00, 0xd9, 0x5d, 0x17,
-	0x7d, 0x05, 0x45, 0x00, 0x00, 0xe8, 0x00, 0x02,
-	0x0d, 0x00, 0x68, 0xb0, 0x0b, 0x92, 0x8f, 0x40,
-	0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x63,
-	0x00, 0x40, 0x3e, 0x00, 0xe1, 0x02, 0x28, 0x00
+	0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
+	0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
+	0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17,
+	0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02,
+	0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63,
+	0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00
 };
 
-UCHAR SiS300_HiTVExtTiming[] = { 0x00 };
+UCHAR SiS300_HiTVExtTiming[] = {0x00};
 
-UCHAR SiS300_HiTVSt1Timing[] = { 0x00 };
+UCHAR SiS300_HiTVSt1Timing[] = {0x00};
 
-UCHAR SiS300_HiTVSt2Timing[] = { 0x00 };
+UCHAR SiS300_HiTVSt2Timing[] = {0x00};
 
-UCHAR SiS300_HiTVTextTiming[] = { 0x00 };
+UCHAR SiS300_HiTVTextTiming[] = {0x00};
 
-UCHAR SiS300_HiTVGroup3Data[] = { 0x00 };
+UCHAR SiS300_HiTVGroup3Data[] = {0x00};
 
-UCHAR SiS300_HiTVGroup3Simu[] = { 0x00 };
+UCHAR SiS300_HiTVGroup3Simu[] = {0x00};
 
-UCHAR SiS300_HiTVGroup3Text[] = { 0x00 };
+UCHAR SiS300_HiTVGroup3Text[] = {0x00};
 
-typedef struct _SiS300_LVDSDataStruct {
+typedef struct _SiS300_LVDSDataStruct
+{
 	USHORT VGAHT;
 	USHORT VGAVT;
 	USHORT LCDHT;
 	USHORT LCDVT;
 } SiS300_LVDSDataStruct;
-SiS300_LVDSDataStruct SiS300_LVDS800x600Data_1[] = {
-	{0x00, 0x00, 0x00, 0x00}
-};
-
-SiS300_LVDSDataStruct SiS300_LVDS800x600Data_2[] = {
-	{0x00, 0x00, 0x00, 0x00}
-};
-
-SiS300_LVDSDataStruct SiS300_LVDS1024x768Data_1[] = {
-	{0x00, 0x00, 0x00, 0x00}
-};
 
-SiS300_LVDSDataStruct SiS300_LVDS1024x768Data_2[] = {
-	{0x00, 0x00, 0x00, 0x00}
-};
-
-SiS300_LVDSDataStruct SiS300_LVDS1280x1024Data_1[] = {
-	{0x00, 0x00, 0x00, 0x00}
-};
-
-SiS300_LVDSDataStruct SiS300_LVDS1280x1024Data_2[] = {
-	{0x00, 0x00, 0x00, 0x00}
-};
-
-SiS300_LVDSDataStruct SiS300_LVDS640x480Data_1[] = {
-	{0x00, 0x00, 0x00, 0x00}
-};
-
-SiS300_LVDSDataStruct SiS300_CHTVUNTSCData[] = {
-	{0x00, 0x00, 0x00, 0x00}
+SiS300_LVDSDataStruct  SiS300_LVDS800x600Data_1[]=
+{
+	{848, 433,1060, 629},
+	{848, 389,1060, 629},
+	{848, 433,1060, 629},
+	{848, 389,1060, 629},
+	{848, 518,1060, 629},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+SiS300_LVDSDataStruct  SiS300_LVDS800x600Data_2[]=
+{
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+SiS300_LVDSDataStruct  SiS300_LVDS1024x768Data_1[]=
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS300_LVDSDataStruct  SiS300_LVDS1024x768Data_2[]=
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS300_LVDSDataStruct  SiS300_LVDS1280x1024Data_1[]=
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS300_LVDSDataStruct  SiS300_LVDS1280x1024Data_2[]=
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS300_LVDSDataStruct  SiS300_LVDS640x480Data_1[]=
+{
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 449, 800, 449},
+	{800, 525, 800, 525},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628}
+};
+
+/* TW: New: */
+SiS300_LVDSDataStruct  SiS300_LVDS1024x600Data_1[]=
+{
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 689,1344, 800},
+	{1050, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: */
+SiS300_LVDSDataStruct  SiS300_LVDS1024x600Data_2[]=
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: */
+SiS300_LVDSDataStruct  SiS300_LVDS1152x768Data_1[]=
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: */
+SiS300_LVDSDataStruct  SiS300_LVDS1152x768Data_2[]=
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: */
+SiS300_LVDSDataStruct  SiS300_CHTVUNTSCData[]=
+{
+	{840, 600, 840, 600},
+	{840, 600, 840, 600},
+	{840, 600, 840, 600},
+	{840, 600, 840, 600},
+	{784, 600, 784, 600},
+	{1064, 750,1064, 750}
 };
 
-SiS300_LVDSDataStruct SiS300_CHTVONTSCData[] = {
-	{0x00, 0x00, 0x00, 0x00}
+SiS300_LVDSDataStruct  SiS300_CHTVONTSCData[]=
+{
+	{840, 525, 840, 525},
+	{840, 525, 840, 525},
+	{840, 525, 840, 525},
+	{840, 525, 840, 525},
+	{784, 525, 784, 525},
+	{1040, 700,1040, 700}
 };
 
-SiS300_LVDSDataStruct SiS300_CHTVUPALData[] = {
-	{0x00, 0x00, 0x00, 0x00}
+SiS300_LVDSDataStruct  SiS300_CHTVUPALData[]=
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{840, 750, 840, 750},
+	{936, 836, 936, 836}
 };
 
-SiS300_LVDSDataStruct SiS300_CHTVOPALData[] = {
-	{0x00, 0x00, 0x00, 0x00}
+SiS300_LVDSDataStruct  SiS300_CHTVOPALData[]=
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{840, 625, 840, 625},
+	{960, 750, 960, 750}
 };
+/* TW: new end */
 
-typedef struct _SiS300_LVDSDesStruct {
+typedef struct _SiS300_LVDSDesStruct
+{
 	USHORT LCDHDES;
 	USHORT LCDVDES;
 } SiS300_LVDSDesStruct;
-SiS300_LVDSDesStruct SiS300_PanelType00_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType01_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType02_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType03_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType04_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType05_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType06_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType07_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType08_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType09_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0a_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0b_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0c_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0d_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0e_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0f_1[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType00_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType01_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType02_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType03_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType04_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType05_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType06_2[] = {
-	{0x00, 0x00}
-};
 
-SiS300_LVDSDesStruct SiS300_PanelType07_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType08_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType09_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0a_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0b_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0c_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0d_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0e_2[] = {
-	{0x00, 0x00}
-};
-
-SiS300_LVDSDesStruct SiS300_PanelType0f_2[] = {
-	{0x00, 0x00}
+SiS300_LVDSDesStruct  SiS300_PanelType00_1[]=
+{
+	{0, 626},
+	{0, 624},
+	{0, 626},
+	{0, 624},
+	{0, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType01_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType02_1[]=
+{
+	{0, 626},
+	{0, 624},
+	{0, 626},
+	{0, 624},
+	{0, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType03_1[]=
+{
+	{ 8, 436},
+	{ 8, 440},
+	{ 8, 436},
+	{ 8, 440},
+	{ 8, 512},
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType04_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType05_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType06_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType07_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType08_1[]=
+{
+	{1059, 626},
+	{1059, 624},
+	{1059, 626},
+	{1059, 624},
+	{1059, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType09_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0a_1[]=
+{
+	{1059, 626},
+	{1059, 624},
+	{1059, 626},
+	{1059, 624},
+	{1059, 624},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0b_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0c_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0d_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0e_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},  /* 640x480 */
+	{1343,   0},  /* 800x600 */
+	{ 0, 805},    /* 1024x768 */
+	{ 0, 794},    /* 1280x1024 */
+	{ 0,   0}     /* 1280x960 - not applicable */
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0f_1[]=
+{
+	{1343, 798},
+	{1343, 794},
+	{1343, 798},
+	{1343, 794},
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType00_2[]=
+{
+	{976, 527},
+	{976, 502},
+	{976, 527},
+	{976, 502},
+	{976, 567},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType01_2[]=
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType02_2[]=
+{
+	{976, 527},
+	{976, 502},
+	{976, 527},
+	{976, 502},
+	{976, 567},
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType03_2[]=
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{   0, 805},
+	{1152, 622},
+	{1152, 597}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType04_2[]=
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{   0, 805},
+	{   0, 794},
+	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType05_2[]=
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{   0, 805},
+	{   0, 794},
+	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType06_2[]=
+{
+	{1152, 622},
+	{1152, 597},
+	{1152, 622},
+	{1152, 597},
+	{1152, 662},
+	{1232, 722},
+	{   0, 805},
+	{   0, 794},
+	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType07_2[]=
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+	{   0, 805},
+	{   0, 794},
+	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType08_2[]=
+{
+ 	{976, 527},
+ 	{976, 502},
+ 	{976, 527},
+ 	{976, 502},
+ 	{976, 567},
+ 	{  0, 627},
+ 	{  0, 627},
+ 	{  0,   0},
+ 	{  0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType09_2[]=
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0a_2[]=
+{
+ 	{976, 527},
+ 	{976, 502},
+ 	{976, 527},
+ 	{976, 502},
+ 	{976, 567},
+ 	{  0, 627},
+ 	{  0, 627},
+ 	{  0,   0},
+ 	{  0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0b_2[]=
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0c_2[]=
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0d_2[]=
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0e_2[]=
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+SiS300_LVDSDesStruct  SiS300_PanelType0f_2[]=
+{
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 622},
+ 	{1152, 597},
+ 	{1152, 662},
+ 	{1232, 722},
+ 	{   0, 805},
+ 	{   0, 794},
+ 	{   0,   0}
+};
+
+SiS300_LVDSDesStruct SiS300_PanelType1076_1[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS300_LVDSDesStruct SiS300_PanelType1076_2[]=   /* TW: New */
+{
+	{ 1152, 622 },
+	{ 1152, 597 },
+	{ 1152, 622 },
+	{ 1152, 597 },
+	{ 1152, 622 },
+	{ 1232, 722 },
+	{    0, 0   },
+	{    0, 794 },
+	{    0, 0   }
+};
+
+SiS300_LVDSDesStruct SiS300_PanelType1210_1[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS300_LVDSDesStruct SiS300_PanelType1210_2[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS300_LVDSDesStruct SiS300_PanelType1296_1[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS300_LVDSDesStruct SiS300_PanelType1296_2[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
 };
 
-/*301b*/
-SiS300_LVDSDesStruct SiS300_PanelType1076_1[] = {
-	{0x00, 0x00}
-};
-SiS300_LVDSDesStruct SiS300_PanelType1210_1[] = {
-	{0x00, 0x00}
-};
-SiS300_LVDSDesStruct SiS300_PanelType1296_1[] = {
-	{0x00, 0x00}
-};
-SiS300_LVDSDesStruct SiS300_PanelType1076_2[] = {
-	{0x00, 0x00}
-};
-SiS300_LVDSDesStruct SiS300_PanelType1210_2[] = {
-	{0x00, 0x00}
-};
-SiS300_LVDSDesStruct SiS300_PanelType1296_2[] = {
-	{0x00, 0x00}
-};
-/*end 301b*/
 
-SiS300_LVDSDesStruct SiS300_CHTVUNTSCDesData[] = {
-	{0x00, 0x00}
+/* TW: New */
+SiS300_LVDSDesStruct  SiS300_CHTVUNTSCDesData[]=
+{
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct SiS300_CHTVONTSCDesData[] = {
-	{0x00, 0x00}
+SiS300_LVDSDesStruct  SiS300_CHTVONTSCDesData[]=
+{
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0},
+ 	{ 0,   0}
 };
 
-SiS300_LVDSDesStruct SiS300_CHTVUPALDesData[] = {
-	{0x00, 0x00}
+SiS300_LVDSDesStruct  SiS300_CHTVUPALDesData[]=
+{
+ 	{256,   0},
+ 	{256,   0},
+ 	{256,   0},
+ 	{256,   0},
+ 	{  0,   0},
+ 	{  0,   0}
 };
 
-SiS300_LVDSDesStruct SiS300_CHTVOPALDesData[] = {
-	{0x00, 0x00}
+SiS300_LVDSDesStruct  SiS300_CHTVOPALDesData[]=
+{
+ 	{256,   0},
+ 	{256,   0},
+ 	{256,   0},
+ 	{256,   0},
+ 	{  0,   0},
+ 	{  0,   0}
 };
+/* TW: New end */
 
-typedef struct _SiS300_LVDSCRT1DataStruct {
-	UCHAR CR[15];
+typedef struct _SiS300_LVDSCRT1DataStruct
+{
+UCHAR CR[15];
 } SiS300_LVDSCRT1DataStruct;
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_1[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
-};
-
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_1[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
-};
-
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_1[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
-};
-
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_1_H[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
-};
-
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_1_H[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
-};
-
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_1_H[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
-};
 
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_2[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_1[]=
+{
+	{{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
+	  0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+	  0x00 }},
+	{{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+	  0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+	  0x00 }},
+	{{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
+	  0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+	  0x00 }},
+	{{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+	  0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+	  0x00 }},
+	{{0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
+	  0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+	  0x00 }},
+	{{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+	  0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_1[]=
+{ 
+	{{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+	{{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+	{{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+	{{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+	{{0x64,0x4f,0x88,0x54,0x9f,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+	  0x00}},
+	{{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+	  0x01}},
+	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01} }
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_2[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_1[]=
+{
+	{{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00 }},
+	{{0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+	  0x01 }},
+	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_1_H[]=
+{
+	{{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
+	  0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+	  0x00 }},
+	{{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
+	  0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
+	  0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+	  0x00 }},
+	{{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
+	  0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x30,0x27,0x94,0x2c,0x92,0x04,0x3e,
+	  0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
+	  0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_1_H[]=
+{
+	{{0x37,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00 }},
+	{{0x37,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+	  0x60,0x87,0x5D,0x83,0x01,0x00,0x44,
+	  0x00}},
+	{{0x37,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+	{{0x37,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+	  0x60,0x87,0x5D,0x83,0x01,0x00,0x44,
+	  0x00}},
+	{{0x37,0x27,0x9B,0x2b,0x94,0x04,0x3e,
+	  0xE2,0x89,0xDf,0x05,0x00,0x00,0x44,
+	  0x00}},
+	{{0x41,0x31,0x85,0x35,0x1d,0x7c,0xf0,
+	  0x5A,0x8F,0x57,0x7D,0x20,0x00,0x55,
+	  0x01}},
+	{{0x4f,0x3F,0x93,0x45,0x0D,0x24,0xf5,
+	  0x02,0x88,0xFf,0x25,0x10,0x00,0x01,
+	  0x01 }}
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_2[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_1_H[]=
+{
+	{{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+	  0x00 }},
+	{{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+	  0x00 }},
+	{{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+	  0x00 }},
+	{{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x04,
+	  0x00 }},
+	{{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+	  0x01 }},
+	{{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_2[]=
+{
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+	  0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+	  0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
+	  0x1c,0x80,0xdf,0x73,0x00,0x00,0x06,
+	  0x00 }},
+	{{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+	  0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_2[]=
+{
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01 }},
+	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_2[]=
+{
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00 }},
+	{{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01 }},
+	{{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT1800x600_2_H[]=
+{
+	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+	  0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+	  0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e,
+	  0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x27,0x81,0x32,0x1a,0x72,0xba,
+	  0x1c,0x80,0xdf,0x73,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
+	  0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x768_2_H[]=
+{
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01 }},
+	{{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11280x1024_2_H[]=
+{
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00 }},
+	{{0x4f,0x31,0x93,0x3e,0x86,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01 }},
+	{{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_1[] =
+{
+        {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
+	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
+	  0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
+	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
+	  0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0xaf,0xba,
+	  0x3b,0x82,0xdf,0xb0,0x00,0x00,0x01,
+	  0x00}},
+        {{0x7e,0x63,0x82,0x68,0x15,0x1e,0xf1,
+	  0xae,0x85,0x57,0x1f,0x30,0x00,0x26,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x1e,0xf1,
+	  0xae,0x85,0x57,0x1f,0x30,0x00,0x02,
+	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_2_H[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_1_H[] =
+{
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+          0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
+	  0x00}},
+        {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_2_H[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_2[] =
+{
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+          0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_2_H[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11024x600_2_H[] =
+{
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1UNTSC[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_1[] =
+{
+        {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+	  0x00}},
+        {{0x64,0x4f,0x88,0x54,0x9f,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+	  0x00}},
+        {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1ONTSC[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_1_H[] =
+{
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+	  0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
+	  0x00}},
+        {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1UPAL[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_2[] =
+{
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+	  0x00}},
+        {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+	  0x01}},
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+	  0x01}}
 };
 
-SiS300_LVDSCRT1DataStruct SiS300_CHTVCRT1OPAL[] = {
-	
-	    {
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00}}
+SiS300_LVDSCRT1DataStruct  SiS300_LVDSCRT11152x768_2_H[] =
+{
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+	  0x00}},
+        {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+	  0x01}},
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+	  0x01}}
 };
 
-typedef struct _SiS300_CHTVRegDataStruct {
-	UCHAR Reg[5];
+/* TW: New */
+SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1UNTSC[]=
+{
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+	  0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x5d,0x4f,0x81,0x53,0x9c,0x56,0xba,
+	  0x18,0x84,0xdf,0x57,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x80,0x63,0x84,0x6c,0x17,0xec,0xf0,
+	  0x90,0x8c,0x57,0xed,0x20,0x00,0x06,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1ONTSC[]=
+{
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+	  0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+	  0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+	  0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x5d,0x4f,0x81,0x56,0x9c,0x0b,0x3e,
+	  0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,
+	  0x00 }},
+	{{0x7d,0x63,0x81,0x6a,0x16,0xba,0xf0,
+	  0x7f,0x86,0x57,0xbb,0x00,0x00,0x06,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1UPAL[]=
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x55,0x80,0xec,0xba,
+	  0x50,0x84,0xdf,0xed,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x70,0x63,0x94,0x68,0x8d,0x42,0xf1,
+	  0xc8,0x8c,0x57,0xe9,0x20,0x00,0x05,
+	  0x01 }}
+};
+
+SiS300_LVDSCRT1DataStruct  SiS300_CHTVCRT1OPAL[]=
+{
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+	  0x00 }},
+	{{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+	  0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x64,0x4f,0x88,0x55,0x80,0x6f,0xba,
+	  0x20,0x83,0xdf,0x70,0x00,0x00,0x05,
+	  0x00 }},
+	{{0x73,0x63,0x97,0x69,0x8e,0xec,0xf0,
+	  0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
+	  0x01 }}
+};
+/* TW: New end */
+
+/* TW: New */
+typedef struct _SiS300_CHTVRegDataStruct
+{
+	UCHAR Reg[16];
 } SiS300_CHTVRegDataStruct;
+
 SiS300_CHTVRegDataStruct SiS300_CHTVReg_UNTSC[] = {
-	{{0x00, 0x00, 0x00, 0x00, 0x00}}
+	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x6a,0x6a,0x00,0x2d,0xfa,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 17: 640x480 NTSC 7/8  */
+	{{0x8d,0xc4,0x00,0x3b,0xfb,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 24: 800x600 NTSC 7/10 */
 };
 
 SiS300_CHTVRegDataStruct SiS300_CHTVReg_ONTSC[] = {
-	{{0x00, 0x00, 0x00, 0x00, 0x00}}
+	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x69,0x6a,0x00,0x1e,0xfd,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 16: 640x480 NTSC 1/1 */
+	{{0x8c,0xb4,0x00,0x32,0xf9,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 23: 800x600 NTSC 3/4 */
 };
 
 SiS300_CHTVRegDataStruct SiS300_CHTVReg_UPAL[] = {
-	{{0x00, 0x00, 0x00, 0x00, 0x00}}
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x63,0x94,0x01,0x50,0x30,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 15: 640x480 PAL 5/6 */
+	/* TW: For 800x600, 3/4 is VERY underscan */
+	{{0x84,0x64,0x01,0x4e,0x2f,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 21: 800x600 PAL 3/4 */
+	/* TW: Mode 20 is still underscan, use it instead? */
+	/* {{0x83,0x76,0x01,0x40,0x31}} */ /* Mode 20: 800x600 PAL 5/6 */
 };
 
 SiS300_CHTVRegDataStruct SiS300_CHTVReg_OPAL[] = {
-	{{0x00, 0x00, 0x00, 0x00, 0x00}}
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 1/1 */
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
+	{{0x61,0x94,0x01,0x36,0x30,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 14: 640x480 PAL 1/1 */
+	{{0x83,0x76,0x01,0x40,0x31,0,0,0,0,0,0,0,0,0,0,0}}  /* Mode 20: 800x600 PAL 5/6 */
+	/* {{0x81,0x12,0x01,0x50,0x34}}  */ /* TW: (test) Mode 19: 800x600 PAL 1/1 */
 };
+/* TW: New end */
+
+/* TW: New */
+UCHAR SiS300_CHTVVCLKUNTSC[] = {0x29,0x29,0x29,0x29,0x2a,0x2e};
+
+UCHAR SiS300_CHTVVCLKONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b};
 
-UCHAR SiS300_CHTVVCLKUNTSC[] = { 0x00 };
+UCHAR SiS300_CHTVVCLKUPAL[]  = {0x2f,0x2f,0x2f,0x2f,0x2f,0x31};
 
-UCHAR SiS300_CHTVVCLKONTSC[] = { 0x00 };
+UCHAR SiS300_CHTVVCLKOPAL[]  = {0x2f,0x2f,0x2f,0x2f,0x30,0x32};
+/* TW: New end */
 
-UCHAR SiS300_CHTVVCLKUPAL[] = { 0x00 };
 
-UCHAR SiS300_CHTVVCLKOPAL[] = { 0x00 };
diff --git a/drivers/video/sis/310vtbl.h b/drivers/video/sis/310vtbl.h
index 2f3a1fc9e4b9..af4eee909f50 100644
--- a/drivers/video/sis/310vtbl.h
+++ b/drivers/video/sis/310vtbl.h
@@ -1,4 +1,10 @@
-typedef struct _SiS310_StStruct {
+
+
+/* Register settings for SiS 310/325 series */
+
+
+typedef struct _SiS310_StStruct
+{
 	UCHAR St_ModeID;
 	USHORT St_ModeFlag;
 	UCHAR St_StTableIndex;
@@ -9,31 +15,32 @@ typedef struct _SiS310_StStruct {
 	UCHAR VB_StTVYFilterIndex;
 } SiS310_StStruct;
 
-SiS310_StStruct SiS310_SModeIDTable[] =
-{
-	{0x01, 0x9208, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00},
-	{0x01, 0x1210, 0x14, 0x01, 0x01, 0x00, 0x01, 0x00},
-	{0x01, 0x1010, 0x17, 0x02, 0x02, 0x00, 0x01, 0x01},
-	{0x03, 0x8208, 0x03, 0x00, 0x00, 0x00, 0x01, 0x02},
-	{0x03, 0x0210, 0x16, 0x01, 0x01, 0x00, 0x01, 0x02},
-	{0x03, 0x0010, 0x18, 0x02, 0x02, 0x00, 0x01, 0x03},
-	{0x05, 0x9209, 0x05, 0x00, 0x00, 0x00, 0x00, 0x04},
-	{0x06, 0x8209, 0x06, 0x00, 0x00, 0x00, 0x00, 0x05},
-	{0x07, 0x0000, 0x07, 0x03, 0x03, 0x00, 0x01, 0x03},
-	{0x07, 0x0000, 0x19, 0x02, 0x02, 0x00, 0x01, 0x03},
-	{0x0d, 0x920a, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x04},
-	{0x0e, 0x820a, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x05},
-	{0x0f, 0x0202, 0x11, 0x01, 0x01, 0x00, 0x00, 0x05},
-	{0x10, 0x0212, 0x12, 0x01, 0x01, 0x00, 0x00, 0x05},
-	{0x11, 0x0212, 0x1a, 0x04, 0x04, 0x00, 0x00, 0x05},
-	{0x12, 0x0212, 0x1b, 0x04, 0x04, 0x00, 0x00, 0x05},
-	{0x13, 0x021b, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x04},
-	{0x12, 0x0010, 0x18, 0x02, 0x02, 0x00, 0x00, 0x05},
-	{0x12, 0x0210, 0x18, 0x01, 0x01, 0x00, 0x00, 0x05},
-	{0xff, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-};
-
-typedef struct _SiS310_StandTableStruct {
+SiS310_StStruct SiS310_SModeIDTable[]=
+{
+	{0x01,0x9208,0x01,0x00,0x00,0x00,0x01,0x00},
+	{0x01,0x1210,0x14,0x01,0x01,0x00,0x01,0x00},
+	{0x01,0x1010,0x17,0x02,0x02,0x00,0x01,0x01},
+	{0x03,0x8208,0x03,0x00,0x00,0x00,0x01,0x02},
+	{0x03,0x0210,0x16,0x01,0x01,0x00,0x01,0x02},
+	{0x03,0x0010,0x18,0x02,0x02,0x00,0x01,0x03},
+	{0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x04},
+	{0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x05},
+	{0x07,0x0000,0x07,0x03,0x03,0x00,0x01,0x03},
+	{0x07,0x0000,0x19,0x02,0x02,0x00,0x01,0x03},
+	{0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x04},
+	{0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x05},
+	{0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x05},
+	{0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x05},
+	{0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x05},
+	{0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x05},
+	{0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x04},
+	{0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x05},
+	{0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x05},
+	{0xff,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+typedef struct _SiS310_StandTableStruct
+{
 	UCHAR CRT_COLS;
 	UCHAR ROWS;
 	UCHAR CHAR_HEIGHT;
@@ -45,448 +52,450 @@ typedef struct _SiS310_StandTableStruct {
 	UCHAR GRC[9];
 } SiS310_StandTableStruct;
 
-SiS310_StandTableStruct SiS310_StandTable[] = {
+SiS310_StandTableStruct SiS310_StandTable[]=
+{
 /* MD_0_200 */
-	{
-	 0x28, 0x18, 0x08, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_1_200 */
-	{
-	 0x28, 0x18, 0x08, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_2_200 */
-	{
-	 0x50, 0x18, 0x08, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x08,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_3_200 */
-	{
-	 0x50, 0x18, 0x08, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x08,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_4 */
-	{
-	 0x28, 0x18, 0x08, 0x4000,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
-	  0xff},
-	 {0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x03, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x4000,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff}
+ },
 /* MD_5 */
-	{
-	 0x28, 0x18, 0x08, 0x4000,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
-	  0xff},
-	 {0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x03, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x4000,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff}
+ },
 /* MD_6 */
-	{
-	 0x50, 0x18, 0x08, 0x4000,
-	 {0x01, 0x01, 0x00, 0x06},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2,
-	  0xff},
-	 {0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
-	  0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
-	  0x01, 0x00, 0x01, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x08,0x4000,
+  {0x01,0x01,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xc2,
+   0xff},
+  {0x00,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x01,0x00,0x01,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,
+   0xff}
+ },
 /* MD_7 */
-	{
-	 0x50, 0x18, 0x0e, 0x1000,
-	 {0x00, 0x03, 0x00, 0x03},
-	 0xa6,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x0d, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
-	  0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-	  0x0e, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x00,0x03,0x00,0x03},
+  0xa6,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0d,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff}
+ },
 /* MDA_DAC */
-	{
-	 0x00, 0x00, 0x00, 0x0000,
-	 {0x00, 0x00, 0x00, 0x15},
-	 0x15,
-	 {0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x3f, 0x3f,
-	  0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x00, 0x00,
-	  0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15},
-	 {0x15, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x3f}
-	 },
+ {
+  0x00,0x00,0x00,0x0000,
+  {0x00,0x00,0x00,0x15},
+  0x15,
+  {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x00,0x00,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15},
+  {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f}
+ },
 /* CGA_DAC */
-	{
-	 0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x09, 0x15, 0x00},
-	 0x10,
-	 {0x04, 0x14, 0x01, 0x11, 0x09, 0x15, 0x2a, 0x3a,
-	  0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x2a, 0x3a,
-	  0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x00, 0x10,
-	  0x04},
-	 {0x14, 0x01, 0x11, 0x09, 0x15, 0x00, 0x10, 0x04,
-	  0x14, 0x01, 0x11, 0x09, 0x15, 0x2a, 0x3a, 0x2e,
-	  0x3e, 0x2b, 0x3b, 0x2f},
-	 {0x3f, 0x2a, 0x3a, 0x2e, 0x3e, 0x2b, 0x3b, 0x2f,
-	  0x3f}
-	 },
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x09,0x15,0x00},
+  0x10,
+  {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x10,
+   0x04},
+  {0x14,0x01,0x11,0x09,0x15,0x00,0x10,0x04,
+   0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,0x2e,
+   0x3e,0x2b,0x3b,0x2f},
+  {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f}
+ },
 /* EGA_DAC */
-	{
-	 0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x05, 0x15, 0x20},
-	 0x30,
-	 {0x24, 0x34, 0x21, 0x31, 0x25, 0x35, 0x08, 0x18,
-	  0x0c, 0x1c, 0x09, 0x19, 0x0d, 0x1d, 0x28, 0x38,
-	  0x2c, 0x3c, 0x29, 0x39, 0x2d, 0x3d, 0x02, 0x12,
-	  0x06},
-	 {0x16, 0x03, 0x13, 0x07, 0x17, 0x22, 0x32, 0x26,
-	  0x36, 0x23, 0x33, 0x27, 0x37, 0x0a, 0x1a, 0x0e,
-	  0x1e, 0x0b, 0x1b, 0x0f},
-	 {0x1f, 0x2a, 0x3a, 0x2e, 0x3e, 0x2b, 0x3b, 0x2f,
-	  0x3f}
-	 },
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x05,0x15,0x20},
+  0x30,
+  {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18,
+   0x0c,0x1c,0x09,0x19,0x0d,0x1d,0x28,0x38,
+   0x2c,0x3c,0x29,0x39,0x2d,0x3d,0x02,0x12,
+   0x06},
+  {0x16,0x03,0x13,0x07,0x17,0x22,0x32,0x26,
+   0x36,0x23,0x33,0x27,0x37,0x0a,0x1a,0x0e,
+   0x1e,0x0b,0x1b,0x0f},
+  {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f}
+ },
 /* VGA_DAC */
-	{
-	 0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x09, 0x15, 0x2a},
-	 0x3a,
-	 {0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x00, 0x05,
-	  0x08, 0x0b, 0x0e, 0x11, 0x14, 0x18, 0x1c, 0x20,
-	  0x24, 0x28, 0x2d, 0x32, 0x38, 0x3f, 0x00, 0x10,
-	  0x1f},
-	 {0x2f, 0x3f, 0x1f, 0x27, 0x2f, 0x37, 0x3f, 0x2d,
-	  0x31, 0x36, 0x3a, 0x3f, 0x00, 0x07, 0x0e, 0x15,
-	  0x1c, 0x0e, 0x11, 0x15},
-	 {0x18, 0x1c, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x00,
-	  0x04}
-	 },
-	{
-	 0x08, 0x0c, 0x10, 0x0a08,
-	 {0x0c, 0x0e, 0x10, 0x0b},
-	 0x0c,
-	 {0x0d, 0x0f, 0x10, 0x10, 0x01, 0x08, 0x00, 0x00,
-	  0x00, 0x00, 0x01, 0x00, 0x02, 0x02, 0x01, 0x00,
-	  0x04, 0x04, 0x01, 0x00, 0x05, 0x02, 0x05, 0x00,
-	  0x06},
-	 {0x01, 0x06, 0x05, 0x06, 0x00, 0x08, 0x01, 0x08,
-	  0x00, 0x07, 0x02, 0x07, 0x06, 0x07, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00}
-	 },
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x09,0x15,0x2a},
+  0x3a,
+  {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05,
+   0x08,0x0b,0x0e,0x11,0x14,0x18,0x1c,0x20,
+   0x24,0x28,0x2d,0x32,0x38,0x3f,0x00,0x10,
+   0x1f},
+  {0x2f,0x3f,0x1f,0x27,0x2f,0x37,0x3f,0x2d,
+   0x31,0x36,0x3a,0x3f,0x00,0x07,0x0e,0x15,
+   0x1c,0x0e,0x11,0x15},
+  {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00,
+   0x04}
+ },
+ {
+  0x08,0x0c,0x10,0x0a08,
+  {0x0c,0x0e,0x10,0x0b},
+  0x0c,
+  {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00,
+   0x00,0x00,0x01,0x00,0x02,0x02,0x01,0x00,
+   0x04,0x04,0x01,0x00,0x05,0x02,0x05,0x00,
+   0x06},
+  {0x01,0x06,0x05,0x06,0x00,0x08,0x01,0x08,
+   0x00,0x07,0x02,0x07,0x06,0x07,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}
+ },
 /* MD_D */
-	{
-	 0x28, 0x18, 0x08, 0x2000,
-	 {0x09, 0x0f, 0x00, 0x06},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x2000,
+  {0x09,0x0f,0x00,0x06},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
 /* MD_E */
-	{
-	 0x50, 0x18, 0x08, 0x4000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x08,0x4000,
+  {0x01,0x0f,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
 /* ExtVGATable */
-	{
-	 0x00, 0x00, 0x00, 0x0000,
-	 {0x01, 0x0f, 0x00, 0x0e},
-	 0x23,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-	  0x01, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x00,0x00,0x00,0x0000,
+  {0x01,0x0f,0x00,0x0e},
+  0x23,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x01,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff}
+ },
 /* ROM_SAVEPTR */
-	{
-	 0x9f, 0x3b, 0x00, 0x00c0,
-	 {0x00, 0x00, 0x00, 0x00},
-	 0x00,
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbb, 0x3f,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x1a, 0x00, 0xac, 0x3e, 0x00, 0xc0,
-	  0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00}
-	 },
+ {
+  0x9f,0x3b,0x00,0x00c0,
+  {0x00,0x00,0x00,0x00},
+  0x00,
+  {0x00,0x00,0x00,0x00,0x00,0x00,0xbb,0x3f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x1a,0x00,0xac,0x3e,0x00,0xc0,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}
+ },
 /* MD_F */
-	{
-	 0x50, 0x18, 0x0e, 0x8000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xa2,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x82, 0x84, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
-	  0xff},
-	 {0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
-	  0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
-	  0x0b, 0x00, 0x05, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x8000,
+  {0x01,0x0f,0x00,0x06},
+  0xa2,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,
+   0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,
+   0x0b,0x00,0x05,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,
+   0xff}
+ },
 /* MD_10 */
-	{
-	 0x50, 0x18, 0x0e, 0x8000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x82, 0x84, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x8000,
+  {0x01,0x0f,0x00,0x06},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
 /* MD_0_350 */
-	{
-	 0x28, 0x18, 0x0e, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xb1, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x14, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x0e,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_1_350 */
-	{
-	 0x28, 0x18, 0x0e, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x14, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x0e,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_2_350 */
-	{
-	 0x50, 0x18, 0x0e, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_3_350 */
-	{
-	 0x50, 0x18, 0x0e, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_0_1_400 */
-	{
-	 0x28, 0x18, 0x10, 0x0800,
-	 {0x08, 0x03, 0x00, 0x02},
-	 0x67,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xb1, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x0c, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x10,0x0800,
+  {0x08,0x03,0x00,0x02},
+  0x67,
+  {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_2_3_400 */
-	{
-	 0x50, 0x18, 0x10, 0x1000,
-	 {0x00, 0x03, 0x00, 0x02},
-	 0x67,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x0c, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x10,0x1000,
+  {0x00,0x03,0x00,0x02},
+  0x67,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_7_400 */
-	{
-	 0x50, 0x18, 0x10, 0x1000,
-	 {0x00, 0x03, 0x00, 0x02},
-	 0x66,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
-	  0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-	  0x0e, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x10,0x1000,
+  {0x00,0x03,0x00,0x02},
+  0x66,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x0f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff}
+ },
 /* MD_11 */
-	{
-	 0x50, 0x1d, 0x10, 0xa000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xe3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xe9, 0x8b, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xc3,
-	  0xff},
-	 {0x00, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x01,
-	  0xff}
-	 },
+ {
+  0x50,0x1d,0x10,0xa000,
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xc3,
+   0xff},
+  {0x00,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01,
+   0xff}
+ },
 /* ExtEGATable */
-	{
-	 0x50, 0x1d, 0x10, 0xa000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xe3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xe9, 0x8b, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x50,0x1d,0x10,0xa000,
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
 /* MD_13 */
-	{
-	 0x28, 0x18, 0x08, 0x2000,
-	 {0x01, 0x0f, 0x00, 0x0e},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-	  0x41, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f,
-	  0xff}
-	 }
-};
-
-typedef struct _SiS310_ExtStruct {
+ {
+  0x28,0x18,0x08,0x2000,
+  {0x01,0x0f,0x00,0x0e},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x40,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x41,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff}
+ }
+};
+
+typedef struct _SiS310_ExtStruct
+{
 	UCHAR Ext_ModeID;
 	USHORT Ext_ModeFlag;
 	USHORT Ext_ModeInfo;
-	USHORT Ext_Point;
+	USHORT Ext_Point;    /* TW: Address of table entry in (older) BIOS image */
 	USHORT Ext_VESAID;
 	UCHAR Ext_VESAMEMSize;
 	UCHAR Ext_RESINFO;
@@ -495,651 +504,733 @@ typedef struct _SiS310_ExtStruct {
 	UCHAR VB_ExtTVYFilterIndex;
 	UCHAR REFindex;
 } SiS310_ExtStruct;
-SiS310_ExtStruct SiS310_EModeIDTable[] = {
-	
-	    {0x6a, 0x2212, 0x0407, 0x3a81, 0x0102, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x2e, 0x0a1b, 0x0306, 0x3a57, 0x0101, 0x08, 0x06, 0x00, 0x00, 0x05,
-	 0x08},
-	{0x2f, 0x0a1b, 0x0305, 0x3a50, 0x0100, 0x08, 0x05, 0x00, 0x00, 0x05,
-	 0x10},
-	{0x30, 0x2a1b, 0x0407, 0x3a81, 0x0103, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x31, 0x0a1b, 0x030d, 0x3b85, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x06,
-	 0x11},
-	{0x32, 0x0a1b, 0x0a0e, 0x3b8c, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x06,
-	 0x12},
-	{0x33, 0x0a1d, 0x0a0d, 0x3b85, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x06,
-	 0x11},
-	{0x34, 0x2a1d, 0x0a0e, 0x3b8c, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x06,
-	 0x12},
-	{0x35, 0x0a1f, 0x0a0d, 0x3b85, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x06,
-	 0x11},
-	{0x36, 0x2a1f, 0x0a0e, 0x3b8c, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x06,
-	 0x12},
-	{0x37, 0x0212, 0x0508, 0x3aab, 0x0104, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x38, 0x0a1b, 0x0508, 0x3aab, 0x0105, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x3a, 0x0e3b, 0x0609, 0x3adc, 0x0107, 0x08, 0x09, 0x00, 0x00, 0x00,
-	 0x1a},
-	{0x3c, 0x063b, 0x070a, 0x3af2, 0x0130, 0x08, 0x0a, 0x00, 0x00, 0x00,
-	 0x1e},
-	{0x3d, 0x067d, 0x070a, 0x3af2, 0x0131, 0x08, 0x0a, 0x00, 0x00, 0x00,
-	 0x1e},
-	{0x40, 0x9a1c, 0x0000, 0x3a34, 0x010d, 0x08, 0x00, 0x00, 0x00, 0x04,
-	 0x25},
-	{0x41, 0x9a1d, 0x0000, 0x3a34, 0x010e, 0x08, 0x00, 0x00, 0x00, 0x04,
-	 0x25},
-	{0x43, 0x0a1c, 0x0306, 0x3a57, 0x0110, 0x08, 0x06, 0x00, 0x00, 0x05,
-	 0x08},
-	{0x44, 0x0a1d, 0x0306, 0x3a57, 0x0111, 0x08, 0x06, 0x00, 0x00, 0x05,
-	 0x08},
-	{0x46, 0x2a1c, 0x0407, 0x3a81, 0x0113, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x47, 0x2a1d, 0x0407, 0x3a81, 0x0114, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x49, 0x0a3c, 0x0508, 0x3aab, 0x0116, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x4a, 0x0a3d, 0x0508, 0x3aab, 0x0117, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x4c, 0x0e7c, 0x0609, 0x3adc, 0x0119, 0x08, 0x09, 0x00, 0x00, 0x00,
-	 0x1a},
-	{0x4d, 0x0e7d, 0x0609, 0x3adc, 0x011a, 0x08, 0x09, 0x00, 0x00, 0x00,
-	 0x1a},
-	{0x50, 0x9a1b, 0x0001, 0x3a3b, 0x0132, 0x08, 0x01, 0x00, 0x00, 0x04,
-	 0x26},
-	{0x51, 0xba1b, 0x0103, 0x3a42, 0x0133, 0x08, 0x03, 0x00, 0x00, 0x07,
-	 0x27},
-	{0x52, 0x9a1b, 0x0204, 0x3a49, 0x0134, 0x08, 0x04, 0x00, 0x00, 0x00,
-	 0x28},
-	{0x56, 0x9a1d, 0x0001, 0x3a3b, 0x0135, 0x08, 0x01, 0x00, 0x00, 0x04,
-	 0x26},
-	{0x57, 0xba1d, 0x0103, 0x3a42, 0x0136, 0x08, 0x03, 0x00, 0x00, 0x07,
-	 0x27},
-	{0x58, 0x9a1d, 0x0204, 0x3a49, 0x0137, 0x08, 0x04, 0x00, 0x00, 0x00,
-	 0x28},
-	{0x59, 0x9a1b, 0x0000, 0x3a34, 0x0138, 0x08, 0x00, 0x00, 0x00, 0x04,
-	 0x25},
-	{0x5d, 0x0a1d, 0x0305, 0x3a50, 0x0139, 0x08, 0x05, 0x00, 0x00, 0x07,
-	 0x10},
-	{0x62, 0x0a3f, 0x0306, 0x3a57, 0x013a, 0x08, 0x06, 0x00, 0x00, 0x05,
-	 0x08},
-	{0x63, 0x2a3f, 0x0407, 0x3a81, 0x013b, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x64, 0x0a7f, 0x0508, 0x3aab, 0x013c, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x65, 0x0eff, 0x0609, 0x3adc, 0x013d, 0x08, 0x09, 0x00, 0x00, 0x00,
-	 0x1a},
-	{0x66, 0x06ff, 0x070a, 0x3af2, 0x013e, 0x08, 0x0a, 0x00, 0x00, 0x00,
-	 0x1e},
-	{0x68, 0x067b, 0x080b, 0x3b17, 0x013f, 0x08, 0x0b, 0x00, 0x00, 0x00,
-	 0x29},
-	{0x69, 0x06fd, 0x080b, 0x3b17, 0x0140, 0x08, 0x0b, 0x00, 0x00, 0x00,
-	 0x29},
-	{0x6b, 0x07ff, 0x080b, 0x3b17, 0x0141, 0x10, 0x0b, 0x00, 0x00, 0x00,
-	 0x29},
-	{0x6c, 0x067b, 0x090c, 0x3b37, 0x0000, 0x08, 0x0c, 0x00, 0x00, 0x00,
-	 0x2f},
-	{0x6d, 0x06fd, 0x090c, 0x3b37, 0x0000, 0x10, 0x0c, 0x00, 0x00, 0x00,
-	 0x2f},
-	{0x6e, 0x07ff, 0x090c, 0x3b37, 0x0000, 0x10, 0x0c, 0x00, 0x00, 0x00,
-	 0x2f},
-	{0x70, 0x2a1b, 0x0410, 0x3b52, 0x0000, 0x08, 0x10, 0x00, 0x00, 0x07,
-	 0x34},
-	{0x71, 0x0a1b, 0x0511, 0x3b63, 0x0000, 0x08, 0x11, 0x00, 0x00, 0x00,
-	 0x37},
-	{0x74, 0x0a1d, 0x0511, 0x3b63, 0x0000, 0x08, 0x11, 0x00, 0x00, 0x00,
-	 0x37},
-	{0x75, 0x0a3d, 0x0612, 0x3b74, 0x0000, 0x08, 0x12, 0x00, 0x00, 0x00,
-	 0x3a},
-	{0x76, 0x2a1f, 0x0410, 0x3b52, 0x0000, 0x08, 0x10, 0x00, 0x00, 0x07,
-	 0x34},
-	{0x77, 0x0a1f, 0x0511, 0x3b63, 0x0000, 0x08, 0x11, 0x00, 0x00, 0x00,
-	 0x37},
-	{0x78, 0x0a3f, 0x0612, 0x3b74, 0x0000, 0x08, 0x12, 0x00, 0x00, 0x00,
-	 0x3a},
-	{0x79, 0x0a3b, 0x0612, 0x3b74, 0x0000, 0x08, 0x12, 0x00, 0x00, 0x00,
-	 0x3a},
-	{0x7a, 0x2a1d, 0x0410, 0x3b52, 0x0000, 0x08, 0x10, 0x00, 0x00, 0x07,
-	 0x34},
-	{0x7b, 0x0e3b, 0x060f, 0x3ad0, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00,
-	 0x3d},
-	{0x7c, 0x0e7d, 0x060f, 0x3ad0, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00,
-	 0x3d},
-	{0x7d, 0x0eff, 0x060f, 0x3ad0, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00,
-	 0x3d},
-	{0xff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00,
-	 0x00}
-};
-
-typedef struct _SiS310_Ext2Struct {
+
+SiS310_ExtStruct  SiS310_EModeIDTable[]=
+{
+	{0x6a,0x2212,0x0407,0x3a81,0x0102,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x? */
+	{0x2e,0x0a1b,0x0306,0x3a57,0x0101,0x08,0x06,0x00,0x00,0x05,0x08},          /* 640x480x8 */
+/*	{0x2e,0x021b,0x0306,0x3a57,0x0101,0x08,0x06,0x00,0x00,0x05,0x08},    */    /* 640x480x8 - 650/LVDS BIOS (no CRt2Mode) */
+	{0x2f,0x0a1b,0x0305,0x3a50,0x0100,0x08,0x05,0x00,0x00,0x05,0x10},          /* 640x400x8 */
+/*	{0x2f,0x021b,0x0305,0x3a50,0x0100,0x08,0x05,0x00,0x00,0x05,0x10},    */    /* 640x400x8 - 650/LVDS BIOS (no CRt2Mode) */
+	{0x30,0x2a1b,0x0407,0x3a81,0x0103,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x8 */
+/*	{0x30,0x221b,0x0407,0x3a81,0x0103,0x08,0x07,0x00,0x00,0x07,0x00},    */    /* 800x600x8 - 650/LVDS BIOS (no CRt2Mode) */
+/*      {0x31,0x0a1b,0x030d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},    */    /* 720x480x8 */
+        {0x31,0x0a1b,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},          /* 720x480x8 BIOS (301/LVDS) */
+	{0x32,0x0a1b,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},          /* 720x576x8 */
+	{0x33,0x0a1d,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},          /* 720x480x16 */
+	{0x34,0x2a1d,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},          /* 720x576x16 */
+	{0x35,0x0a1f,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},          /* 720x480x32 */
+	{0x36,0x2a1f,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},          /* 720x576x32 */
+	{0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x00,0x13},          /* 1024x768x? */
+	{0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},          /* 1024x768x8 */
+/*	{0x38,0x021b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},    */    /* 1024x768x8 - 650/LVDS BIOS (no CRt2Mode)  */
+	{0x3a,0x0e3b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x8 */
+/*	{0x3a,0x063b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},    */    /* 1280x1024x8 - 650/LVDS BIOS*/
+	{0x3c,0x063b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x8 */
+/*	{0x3c,0x063b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},    */    /* 1600x1200x8 - 650/LVDS BIOS */
+	{0x3d,0x067d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x16 */
+	{0x40,0x9a1c,0x0000,0x3a34,0x010d,0x08,0x00,0x00,0x00,0x04,0x25},
+	{0x41,0x9a1d,0x0000,0x3a34,0x010e,0x08,0x00,0x00,0x00,0x04,0x25},
+	{0x43,0x0a1c,0x0306,0x3a57,0x0110,0x08,0x06,0x00,0x00,0x05,0x08},
+	{0x44,0x0a1d,0x0306,0x3a57,0x0111,0x08,0x06,0x00,0x00,0x05,0x08},          /* 640x480x16 */
+	{0x46,0x2a1c,0x0407,0x3a81,0x0113,0x08,0x07,0x00,0x00,0x07,0x00},
+	{0x47,0x2a1d,0x0407,0x3a81,0x0114,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x16 */
+	{0x49,0x0a3c,0x0508,0x3aab,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},
+	{0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x00,0x13},          /* 1024x768x16 */
+	{0x4c,0x0e7c,0x0609,0x3adc,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},
+	{0x4d,0x0e7d,0x0609,0x3adc,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x16 */
+	{0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},
+/*	{0x50,0x921b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},     */   /* 650/LVDS BIOS */
+	{0x51,0xba1b,0x0103,0x3a42,0x0133,0x08,0x03,0x00,0x00,0x07,0x27},
+/*	{0x52,0x9a1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},  */
+  	{0x52,0xba1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},          /* 650/301 BIOS */
+/*	{0x52,0xb21b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},     */   /* 650/LVDS BIOS (no CRT2Mode) */
+	{0x56,0x9a1d,0x0001,0x3a3b,0x0135,0x08,0x01,0x00,0x00,0x04,0x26},
+	{0x57,0xba1d,0x0103,0x3a42,0x0136,0x08,0x03,0x00,0x00,0x07,0x27},
+/*	{0x58,0x9a1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28},  */
+ 	{0x58,0xba1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28},          /* BIOS (301+LVDS) */
+	{0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},
+/*	{0x59,0x921b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},     */   /* 650/LVDS BIOS (no CRT2Mode) */
+	{0x5A,0x021b,0x0014,0x3b83,0x0138,0x08,0x01,0x00,0x00,0x04,0x3f},          /* 320x480x8 fstn add new mode*/
+	{0x5B,0x0a1d,0x0014,0x3b83,0x0135,0x08,0x01,0x00,0x00,0x04,0x3f},          /* 320x480x16 fstn add new mode*/
+	{0x5c,0xba1f,0x0204,0x3a49,0x0000,0x08,0x04,0x00,0x00,0x00,0x28},          /* TW: inserted 512x384x32 */
+	{0x5d,0x0a1d,0x0305,0x3a50,0x0139,0x08,0x05,0x00,0x00,0x07,0x10},
+	{0x62,0x0a3f,0x0306,0x3a57,0x013a,0x08,0x06,0x00,0x00,0x05,0x08},          /* 640x480x32 */
+	{0x63,0x2a3f,0x0407,0x3a81,0x013b,0x08,0x07,0x00,0x00,0x07,0x00},          /* 800x600x32 */
+	{0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x00,0x13},          /* 1024x768x32 */
+	{0x65,0x0eff,0x0609,0x3adc,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},          /* 1280x1024x32 */
+	{0x66,0x06ff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},          /* 1600x1200x32 */
+	{0x68,0x067b,0x080b,0x3b17,0x013f,0x08,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x8 */
+	{0x69,0x06fd,0x080b,0x3b17,0x0140,0x08,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x16 */
+	{0x6b,0x07ff,0x080b,0x3b17,0x0141,0x10,0x0b,0x00,0x00,0x00,0x29},          /* 1920x1440x32 */
+	{0x6c,0x067b,0x090c,0x3b37,0x0000,0x08,0x0c,0x00,0x00,0x00,0x2f},          /* 2048x1536x8 */
+	{0x6d,0x06fd,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f},          /* 2048x1536x16 */
+	{0x6e,0x07ff,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f},          /* 2048x1536x32 */
+	{0x70,0x2a1b,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},          /* 800x480x8 */
+	{0x71,0x0a1b,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},          /* 1024x576x8 */
+	{0x74,0x0a1d,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},          /* 1024x576x16 */
+	{0x75,0x0a3d,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},	   /* 1280x720x16 */
+	{0x76,0x2a1f,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},          /* 800x480x32 */
+	{0x77,0x0a1f,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},	   /* 1024x576x32 */
+	{0x78,0x0a3f,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},	   /* 1280x720x32 */
+	{0x79,0x0a3b,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},	   /* 1280x720x8 */
+	{0x7a,0x2a1d,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},          /* 800x480x16 */
+	{0x7c,0x0e3b,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},          /* 1280x960x8 - TW */
+	{0x7d,0x0e7d,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},          /* 1280x960x16 - TW */
+	{0x7e,0x0eff,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},          /* 1280x960x32 - TW */
+        /* TW: 650/LVDS BIOS new modes */
+/*	{0x23,0x063b,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},  */      /* 1280x768x8 - 650/LVDS BIOS */
+	{0x23,0x0e3b,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x8 */
+	{0x24,0x0e7d,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x16 */
+	{0x25,0x0eff,0x0614,0x36f7,0x0000,0x08,0x14,0x00,0x00,0x00,0x40},          /* 1280x768x32 */
+	{0x26,0x0e3b,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x8 */
+/*	{0x26,0x063b,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},    */    /* 1400x1050x8 - 650/LVDS BIOS */
+	{0x27,0x0e7d,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x16 */
+	{0x28,0x0eff,0x0c15,0x36fe,0x0000,0x08,0x15,0x00,0x00,0x00,0x41},          /* 1400x1050x32*/
+	{0xff,0x0000,0x0000,0x0000,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+typedef struct _SiS310_Ext2Struct
+{
 	USHORT Ext_InfoFlag;
 	UCHAR Ext_CRT1CRTC;
 	UCHAR Ext_CRTVCLK;
 	UCHAR Ext_CRT2CRTC;
-	UCHAR ModeID;
+	UCHAR  ModeID;
 	USHORT XRes;
 	USHORT YRes;
 	USHORT ROM_OFFSET;
 } SiS310_Ext2Struct;
-SiS310_Ext2Struct SiS310_RefIndex[] = {
-	{0x005f, 0x0d, 0x03, 0x05, 0x6a, 800, 600, 0x3a81},	/* 0x0 */
-	{0x0467, 0x0e, 0x04, 0x05, 0x6a, 800, 600, 0x3a86},	/* 0x1 */
-	{0x0067, 0x0f, 0x08, 0x48, 0x6a, 800, 600, 0x3a8b},	/* 0x2 */
-	{0x0067, 0x10, 0x07, 0x8b, 0x6a, 800, 600, 0x3a90},	/* 0x3 */
-	{0x0147, 0x11, 0x0a, 0x00, 0x6a, 800, 600, 0x3a95},	/* 0x4 */
-	{0x4147, 0x12, 0x0d, 0x00, 0x6a, 800, 600, 0x3a9a},	/* 0x5 */
-	{0x4047, 0x13, 0x13, 0x00, 0x6a, 800, 600, 0x3a9f},	/* 0x6 */
-	{0x4047, 0x14, 0x1c, 0x00, 0x6a, 800, 600, 0x3aa4},	/* 0x7 */
-	{0xc05f, 0x05, 0x00, 0x04, 0x2e, 640, 480, 0x3a57},	/* 0x8 */
-	{0xc067, 0x06, 0x02, 0x04, 0x2e, 640, 480, 0x3a5c},	/* 0x9 */
-	{0xc067, 0x07, 0x02, 0x47, 0x2e, 640, 480, 0x3a61},	/* 0xa */
-	{0xc067, 0x08, 0x03, 0x8a, 0x2e, 640, 480, 0x3a66},	/* 0xb */
-	{0x4047, 0x09, 0x05, 0x00, 0x2e, 640, 480, 0x3a6b},	/* 0xc */
-	{0x4047, 0x0a, 0x09, 0x00, 0x2e, 640, 480, 0x3a70},	/* 0xd */
-	{0x4047, 0x0b, 0x0e, 0x00, 0x2e, 640, 480, 0x3a75},	/* 0xe */
-	{0xc047, 0x0c, 0x15, 0x00, 0x2e, 640, 480, 0x3a7a},	/* 0xf */
-	{0x407f, 0x04, 0x00, 0x00, 0x2f, 640, 400, 0x3a50},	/* 0x10 */
-	{0xc00f, 0x3c, 0x01, 0x06, 0x31, 720, 480, 0x3b85},	/* 0x11 */
-	{0x000f, 0x3d, 0x03, 0x06, 0x32, 720, 576, 0x3b8c},	/* 0x12 */
-	{0x0187, 0x15, 0x06, 0x00, 0x37, 1024, 768, 0x3aab},	/* 0x13 */
-	{0xc877, 0x16, 0x0b, 0x06, 0x37, 1024, 768, 0x3ab0},	/* 0x14 301b TV1024x768 */
-	{0xc067, 0x17, 0x0f, 0x49, 0x37, 1024, 768, 0x3ab5},	/* 0x15 */
-	{0x0267, 0x18, 0x11, 0x00, 0x37, 1024, 768, 0x3aba},	/* 0x16 */
-	{0x0047, 0x19, 0x16, 0x8c, 0x37, 1024, 768, 0x3abf},	/* 0x17 */
-	{0x4047, 0x1a, 0x1b, 0x00, 0x37, 1024, 768, 0x3ac4},	/* 0x18 */
-	{0x4047, 0x1b, 0x1f, 0x00, 0x37, 1024, 768, 0x3ac9},	/* 0x19 */
-	{0x0387, 0x1c, 0x11, 0x00, 0x3a, 1280, 1024, 0x3adc},	/* 0x1a */
-	{0x0077, 0x1d, 0x19, 0x07, 0x3a, 1280, 1024, 0x3ae1},	/* 0x1b */
-	{0x0047, 0x1e, 0x1e, 0x00, 0x3a, 1280, 1024, 0x3ae6},	/* 0x1c */
-	{0x0007, 0x1f, 0x20, 0x00, 0x3a, 1280, 1024, 0x3aeb},	/* 0x1d */
-	{0x0007, 0x20, 0x21, 0x00, 0x3c, 1600, 1200, 0x3af2},	/* 0x1e */
-	{0x0007, 0x21, 0x22, 0x00, 0x3c, 1600, 1200, 0x3af7},	/* 0x1f */
-	{0x0007, 0x22, 0x23, 0x00, 0x3c, 1600, 1200, 0x3afc},	/* 0x20 */
-	{0x0007, 0x23, 0x25, 0x00, 0x3c, 1600, 1200, 0x3b01},	/* 0x21 */
-	{0x0007, 0x24, 0x26, 0x00, 0x3c, 1600, 1200, 0x3b06},	/* 0x22 */
-	{0x0007, 0x25, 0x2c, 0x00, 0x3c, 1600, 1200, 0x3b0b},	/* 0x23 */
-	{0x0007, 0x26, 0x34, 0x00, 0x3c, 1600, 1200, 0x3b10},	/* 0x24 */
-	{0x407f, 0x00, 0x00, 0x00, 0x40, 320, 200, 0x3a34},	/* 0x25 */
-	{0xc07f, 0x01, 0x00, 0x04, 0x50, 320, 240, 0x3a3b},	/* 0x26 */
-	{0x007f, 0x02, 0x04, 0x05, 0x51, 400, 300, 0x3a42},	/* 0x27 */
-	{0xc077, 0x03, 0x0b, 0x06, 0x52, 512, 384, 0x3a49},	/* 0x28 */
-	{0x8007, 0x27, 0x27, 0x00, 0x68, 1920, 1440, 0x3b17},	/* 0x29 */
-	{0x4007, 0x28, 0x29, 0x00, 0x68, 1920, 1440, 0x3b1c},	/* 0x2a */
-	{0x4007, 0x29, 0x2e, 0x00, 0x68, 1920, 1440, 0x3b21},	/* 0x2b */
-	{0x4007, 0x2a, 0x30, 0x00, 0x68, 1920, 1440, 0x3b26},	/* 0x2c */
-	{0x4007, 0x2b, 0x35, 0x00, 0x68, 1920, 1440, 0x3b2b},	/* 0x2d */
-	{0x4005, 0x2c, 0x39, 0x00, 0x68, 1920, 1440, 0x3b30},	/* 0x2e */
-	{0x4007, 0x2d, 0x2b, 0x00, 0x6c, 2048, 1536, 0x3b37},	/* 0x2f */
-	{0x4007, 0x2e, 0x31, 0x00, 0x6c, 2048, 1536, 0x3b3c},	/* 0x30 */
-	{0x4007, 0x2f, 0x33, 0x00, 0x6c, 2048, 1536, 0x3b41},	/* 0x31 */
-	{0x4007, 0x30, 0x37, 0x00, 0x6c, 2048, 1536, 0x3b46},	/* 0x32 */
-	{0x4005, 0x31, 0x38, 0x00, 0x6c, 2048, 1536, 0x3b4b},	/* 0x33 */
-	{0x0057, 0x32, 0x40, 0x08, 0x70, 800, 480, 0x3b52},	/* 0x34 */
-	{0x0047, 0x33, 0x07, 0x08, 0x70, 800, 480, 0x3b57},	/* 0x35 */
-	{0x0047, 0x34, 0x0a, 0x08, 0x70, 800, 480, 0x3b5c},	/* 0x36 */
-	{0x0057, 0x35, 0x0b, 0x09, 0x71, 1024, 576, 0x3b63},	/* 0x37 */
-	{0x0047, 0x36, 0x11, 0x09, 0x71, 1024, 576, 0x3b68},	/* 0x38 */
-	{0x0047, 0x37, 0x16, 0x09, 0x71, 1024, 576, 0x3b6d},	/* 0x39 */
-	{0x0057, 0x38, 0x19, 0x0a, 0x75, 1280, 720, 0x3b74},	/* 0x3a */
-	{0x0047, 0x39, 0x1e, 0x0a, 0x75, 1280, 720, 0x3b79},	/* 0x3b */
-	{0x0047, 0x3a, 0x20, 0x0a, 0x75, 1280, 720, 0x3b7e},	/* 0x3c */
-	{0x0027, 0x3b, 0x19, 0x08, 0x7b, 1280, 960, 0x3ad0},	/* 0x3d */
-	{0x0027, 0x3b, 0x19, 0x08, 0x7b, 1280, 960, 0x3ad5},	/* 0x3e */
-	{0xffff, 0x00, 0x00, 0x00, 0x00, 0000, 0000, 0x0000}
-};
-
-typedef struct _SiS310_CRT1TableStruct {
-	UCHAR CR[17];
-} SiS310_CRT1TableStruct;
 
-SiS310_CRT1TableStruct SiS310_CRT1Table[] = {
-	{{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	  0x9c, 0x8e, 0x8f, 0x96, 0xb9, 0x30, 0x00, 0x00,
-	  0x00}},		/* 0x0 */
-	{{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0x0b, 0x3e,
-	  0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x00,
-	  0x00}},		/* 0x1 */
-	{{0x3d, 0x31, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x57, 0x73, 0x20, 0x00, 0x05,
-	  0x01}},		/* 0x2 */
-	{{0x4f, 0x3f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x01,
-	  0x01}},		/* 0x3 */
-	{{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x9c, 0x8e, 0x8f, 0x96, 0xb9, 0x30, 0x00, 0x05,
-	  0x00}},		/* 0x4 */
-	{{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0x0b, 0x3e,
-	  0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x05,
-	  0x00}},		/* 0x5 */
-	{{0x63, 0x4f, 0x50, 0x86, 0x56, 0x9b, 0x06, 0x3e,
-	  0xe8, 0x8b, 0xdf, 0xe7, 0xff, 0x10, 0x00, 0x01,
-	  0x00}},		/* 0x6 */
-	{{0x64, 0x4f, 0x4f, 0x88, 0x55, 0x9d, 0xf2, 0x1f,
-	  0xe0, 0x83, 0xdf, 0xdf, 0xf3, 0x10, 0x00, 0x01,
-	  0x00}},		/* 0x7 */
-	{{0x63, 0x4f, 0x4f, 0x87, 0x5a, 0x81, 0xfb, 0x1f,
-	  0xe0, 0x83, 0xdf, 0xdf, 0xfc, 0x10, 0x00, 0x05,
-	  0x00}},		/* 0x8 */
-	{{0x65, 0x4f, 0x4f, 0x89, 0x58, 0x80, 0xfb, 0x1f,
-	  0xe0, 0x83, 0xdf, 0xdf, 0xfc, 0x00, 0x00, 0x05,
-	  0x61}},		/* 0x9 */
-	{{0x65, 0x4f, 0x4f, 0x89, 0x58, 0x80, 0x01, 0x3e,
-	  0xe0, 0x83, 0xdf, 0xdf, 0x02, 0x00, 0x00, 0x05,
-	  0x61}},		/* 0xa */
-	{{0x67, 0x4f, 0x4f, 0x8b, 0x58, 0x81, 0x0d, 0x3e,
-	  0xe0, 0x83, 0xdf, 0xdf, 0x0e, 0x10, 0x00, 0x05,
-	  0x61}},		/* 0xb */
-	{{0x65, 0x4f, 0x4f, 0x89, 0x57, 0x9f, 0xfb, 0x1f,
-	  0xe6, 0x8a, 0xe5, 0xe5, 0xfc, 0x00, 0x00, 0x01,
-	  0x00}},		/* 0xc */
-	{{0x7b, 0x63, 0x63, 0x9f, 0x6a, 0x93, 0x6f, 0xf0,
-	  0x58, 0x8a, 0x57, 0x57, 0x70, 0x20, 0x00, 0x05,
-	  0x01}},		/* 0xd */
-	{{0x7f, 0x63, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x57, 0x73, 0x20, 0x00, 0x06,
-	  0x01}},		/* 0xe */
-	{{0x7d, 0x63, 0x63, 0x81, 0x6e, 0x1d, 0x98, 0xf0,
-	  0x7c, 0x82, 0x57, 0x57, 0x99, 0x00, 0x00, 0x06,
-	  0x01}},		/* 0xf */
-	{{0x7f, 0x63, 0x63, 0x83, 0x69, 0x13, 0x6f, 0xf0,
-	  0x58, 0x8b, 0x57, 0x57, 0x70, 0x20, 0x00, 0x06,
-	  0x01}},		/* 0x10 */
-	{{0x7e, 0x63, 0x63, 0x82, 0x6b, 0x13, 0x75, 0xf0,
-	  0x58, 0x8b, 0x57, 0x57, 0x76, 0x20, 0x00, 0x06,
-	  0x01}},		/* 0x11 */
-	{{0x81, 0x63, 0x63, 0x85, 0x6d, 0x18, 0x7a, 0xf0,
-	  0x58, 0x8b, 0x57, 0x57, 0x7b, 0x20, 0x00, 0x06,
-	  0x61}},		/* 0x12 */
-	{{0x83, 0x63, 0x63, 0x87, 0x6e, 0x19, 0x81, 0xf0,
-	  0x58, 0x8b, 0x57, 0x57, 0x82, 0x20, 0x00, 0x06,
-	  0x61}},		/* 0x13 */
-	{{0x85, 0x63, 0x63, 0x89, 0x6f, 0x1a, 0x91, 0xf0,
-	  0x58, 0x8b, 0x57, 0x57, 0x92, 0x20, 0x00, 0x06,
-	  0x61}},		/* 0x14 */
-	{{0x99, 0x7f, 0x7f, 0x9d, 0x84, 0x1a, 0x96, 0x1f,
-	  0x7f, 0x83, 0x7f, 0x7f, 0x97, 0x10, 0x00, 0x02,
-	  0x00}},		/* 0x15 */
-	{{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
-	  0x01}},		/* 0x16 */
-	{{0xa1, 0x7f, 0x7f, 0x85, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
-	  0x01}},		/* 0x17 */
-	{{0x9f, 0x7f, 0x7f, 0x83, 0x85, 0x91, 0x1e, 0xf5,
-	  0x00, 0x83, 0xff, 0xff, 0x1f, 0x10, 0x00, 0x02,
-	  0x01}},		/* 0x18 */
-	{{0xa7, 0x7f, 0x7f, 0x8b, 0x89, 0x95, 0x26, 0xf5,
-	  0x00, 0x83, 0xff, 0xff, 0x27, 0x10, 0x00, 0x02,
-	  0x01}},		/* 0x19 */
-	{{0xa9, 0x7f, 0x7f, 0x8d, 0x8c, 0x9a, 0x2c, 0xf5,
-	  0x00, 0x83, 0xff, 0xff, 0x2d, 0x14, 0x00, 0x02,
-	  0x62}},		/* 0x1a */
-	{{0xab, 0x7f, 0x7f, 0x8f, 0x8d, 0x9b, 0x35, 0xf5,
-	  0x00, 0x83, 0xff, 0xff, 0x36, 0x14, 0x00, 0x02,
-	  0x62}},		/* 0x1b */
-	{{0xcf, 0x9f, 0x9f, 0x93, 0xb2, 0x01, 0x14, 0xba,
-	  0x00, 0x83, 0xff, 0xff, 0x15, 0x00, 0x00, 0x03,
-	  0x00}},		/* 0x1c */
-	{{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x28, 0x5a,
-	  0x00, 0x83, 0xff, 0xff, 0x29, 0x09, 0x00, 0x07,
-	  0x01}},		/* 0x1d */
-	{{0xce, 0x9f, 0x9f, 0x92, 0xa5, 0x17, 0x28, 0x5a,
-	  0x00, 0x83, 0xff, 0xff, 0x29, 0x09, 0x00, 0x07,
-	  0x01}},		/* 0x1e */
-	{{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0x2e, 0x5a,
-	  0x00, 0x83, 0xff, 0xff, 0x2f, 0x09, 0x00, 0x07,
-	  0x01}},		/* 0x1f */
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},		/* 0x20 */
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},		/* 0x21 */
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},		/* 0x22 */
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},		/* 0x23 */
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},		/* 0x24 */
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},		/* 0x25 */
-	{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	  0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	  0x00}},		/* 0x26 */
-	{{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
-	  0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
-	  0x00}},		/* 0x27 */
-	{{0x43, 0xef, 0xef, 0x87, 0x06, 0x00, 0xd4, 0x1f,
-	  0xa0, 0x83, 0x9f, 0x9f, 0xd5, 0x1f, 0x41, 0x05,
-	  0x63}},		/* 0x28 */
-	{{0x45, 0xef, 0xef, 0x89, 0x07, 0x01, 0xd9, 0x1f,
-	  0xa0, 0x83, 0x9f, 0x9f, 0xda, 0x1f, 0x41, 0x05,
-	  0x63}},		/* 0x29 */
-	{{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
-	  0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
-	  0x00}},		/* 0x2a */
-	{{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
-	  0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
-	  0x00}},		/* 0x2b */
-	{{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
-	  0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
-	  0x00}},		/* 0x2c */
-	{{0x59, 0xff, 0xff, 0x9d, 0x17, 0x13, 0x33, 0xba,
-	  0x00, 0x83, 0xff, 0xff, 0x34, 0x0f, 0x41, 0x05,
-	  0x44}},		/* 0x2d */
-	{{0x5b, 0xff, 0xff, 0x9f, 0x18, 0x14, 0x38, 0xba,
-	  0x00, 0x83, 0xff, 0xff, 0x39, 0x0f, 0x41, 0x05,
-	  0x44}},		/* 0x2e */
-	{{0x5b, 0xff, 0xff, 0x9f, 0x18, 0x14, 0x3d, 0xba,
-	  0x00, 0x83, 0xff, 0xff, 0x3e, 0x0f, 0x41, 0x05,
-	  0x44}},		/* 0x2f */
-	{{0x5d, 0xff, 0xff, 0x81, 0x19, 0x95, 0x41, 0xba,
-	  0x00, 0x84, 0xff, 0xff, 0x42, 0x0f, 0x41, 0x05,
-	  0x44}},		/* 0x30 */
-	{{0x55, 0xff, 0xff, 0x99, 0x0d, 0x0c, 0x3e, 0xba,
-	  0x00, 0x84, 0xff, 0xff, 0x3f, 0x0f, 0x41, 0x05,
-	  0x00}},		/* 0x31 */
-	{{0x7f, 0x63, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xba,
-	  0x27, 0x8b, 0xdf, 0xdf, 0x73, 0x00, 0x00, 0x06,
-	  0x01}},		/* 0x32 */
-	{{0x7f, 0x63, 0x63, 0x83, 0x69, 0x13, 0x6f, 0xba,
-	  0x26, 0x89, 0xdf, 0xdf, 0x6f, 0x00, 0x00, 0x06,
-	  0x01}},		/* 0x33 */
-	{{0x7f, 0x63, 0x63, 0x82, 0x6b, 0x13, 0x75, 0xba,
-	  0x29, 0x8c, 0xdf, 0xdf, 0x75, 0x00, 0x00, 0x06,
-	  0x01}},		/* 0x34 */
-	{{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf1,
-	  0xaf, 0x85, 0x3f, 0x3f, 0x25, 0x30, 0x00, 0x02,
-	  0x01}},		/* 0x35 */
-	{{0x9f, 0x7f, 0x7f, 0x83, 0x85, 0x91, 0x1e, 0xf1,
-	  0xad, 0x81, 0x3f, 0x3f, 0x1f, 0x30, 0x00, 0x02,
-	  0x01}},		/* 0x36 */
-	{{0xa7, 0x7f, 0x7f, 0x88, 0x89, 0x15, 0x26, 0xf1,
-	  0xb1, 0x85, 0x3f, 0x3f, 0x27, 0x30, 0x00, 0x02,
-	  0x01}},		/* 0x37 */
-	{{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x28, 0xc4,
-	  0x7a, 0x8e, 0xcf, 0xcf, 0x29, 0x21, 0x00, 0x07,
-	  0x01}},		/* 0x38 */
-	{{0xce, 0x9f, 0x9f, 0x92, 0xa5, 0x17, 0x28, 0xd4,
-	  0x7a, 0x8e, 0xcf, 0xcf, 0x29, 0x21, 0x00, 0x07,
-	  0x01}},		/* 0x39 */
-	{{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0x2e, 0xd4,
-	  0x7d, 0x81, 0xcf, 0xcf, 0x2f, 0x21, 0x00, 0x07,
-	  0x01}},		/* 0x3a */
-	{{0xdc, 0x9f, 0x9f, 0x00, 0xab, 0x19, 0xe6, 0xef,
-	  0xc0, 0xc3, 0xbf, 0xbf, 0xe7, 0x10, 0x00, 0x07,
-	  0x01}},		/* 0x3b */
-	{{0x6b, 0x59, 0x59, 0x8f, 0x5e, 0x8c, 0x0b, 0x3e,
-	  0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x05,
-	  0x00}},		/* 0x3c */
-	{{0x7b, 0x59, 0x63, 0x9f, 0x6a, 0x93, 0x6f, 0xf0,
-	  0x58, 0x8a, 0x3f, 0x57, 0x70, 0x20, 0x00, 0x05,
-	  0x01}}		/* 0x3d */
-};
-
-typedef struct _SiS310_MCLKDataStruct {
-	UCHAR SR28, SR29, SR2A;
+SiS310_Ext2Struct SiS310_RefIndex[]=
+{
+/*	{0x005f,0x0d,0x03,0x05,0x6a, 800, 600,0x3a81},    0x0 - TW: Patch for Chrontel 7019  */
+	{0x085f,0x0d,0x03,0x05,0x6a, 800, 600,0x3a81}, /* 0x0 */
+	{0x0467,0x0e,0x04,0x05,0x6a, 800, 600,0x3a86}, /* 0x1 */
+	{0x0067,0x0f,0x08,0x48,0x6a, 800, 600,0x3a8b}, /* 0x2 */
+	{0x0067,0x10,0x07,0x8b,0x6a, 800, 600,0x3a90}, /* 0x3 */
+	{0x0147,0x11,0x0a,0x00,0x6a, 800, 600,0x3a95}, /* 0x4 */
+	{0x4147,0x12,0x0d,0x00,0x6a, 800, 600,0x3a9a}, /* 0x5 */
+	{0x4047,0x13,0x13,0x00,0x6a, 800, 600,0x3a9f}, /* 0x6 */
+	{0x4047,0x14,0x1c,0x00,0x6a, 800, 600,0x3aa4}, /* 0x7 */
+/*	{0xc05f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57},    0x8 - TW: Patch for Chrontel 7019  */
+	{0xc85f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57}, /* 0x8 */
+	{0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x3a5c}, /* 0x9 */
+	{0xc067,0x07,0x02,0x47,0x2e, 640, 480,0x3a61}, /* 0xa */
+	{0xc067,0x08,0x03,0x8a,0x2e, 640, 480,0x3a66}, /* 0xb */
+	{0x4047,0x09,0x05,0x00,0x2e, 640, 480,0x3a6b}, /* 0xc */
+	{0x4047,0x0a,0x09,0x00,0x2e, 640, 480,0x3a70}, /* 0xd */
+	{0x4047,0x0b,0x0e,0x00,0x2e, 640, 480,0x3a75}, /* 0xe */
+	{0xc047,0x0c,0x15,0x00,0x2e, 640, 480,0x3a7a}, /* 0xf */
+	{0x407f,0x04,0x00,0x00,0x2f, 640, 400,0x3a50}, /* 0x10 */
+	{0xc00f,0x3c,0x01,0x06,0x31, 720, 480,0x3b85}, /* 0x11 */
+	{0x000f,0x3d,0x03,0x06,0x32, 720, 576,0x3b8c}, /* 0x12 */
+	{0x0187,0x15,0x06,0x00,0x37,1024, 768,0x3aab}, /* 0x13 */
+	{0xc877,0x16,0x0b,0x06,0x37,1024, 768,0x3ab0}, /* 0x14 301b TV1024x768*/
+	{0xc067,0x17,0x0f,0x49,0x37,1024, 768,0x3ab5}, /* 0x15 */
+	{0x0267,0x18,0x11,0x00,0x37,1024, 768,0x3aba}, /* 0x16 */
+	{0x0047,0x19,0x16,0x8c,0x37,1024, 768,0x3abf}, /* 0x17 */
+	{0x4047,0x1a,0x1b,0x00,0x37,1024, 768,0x3ac4}, /* 0x18 */
+	{0x4047,0x1b,0x1f,0x00,0x37,1024, 768,0x3ac9}, /* 0x19 */
+	{0x0387,0x1c,0x11,0x00,0x3a,1280,1024,0x3adc}, /* 0x1a */
+	{0x0077,0x1d,0x19,0x07,0x3a,1280,1024,0x3ae1}, /* 0x1b */
+	{0x0047,0x1e,0x1e,0x00,0x3a,1280,1024,0x3ae6}, /* 0x1c */
+	{0x0007,0x1f,0x20,0x00,0x3a,1280,1024,0x3aeb}, /* 0x1d */
+	{0x0007,0x20,0x21,0x00,0x3c,1600,1200,0x3af2}, /* 0x1e */
+	{0x0007,0x21,0x22,0x00,0x3c,1600,1200,0x3af7}, /* 0x1f */
+	{0x0007,0x22,0x23,0x00,0x3c,1600,1200,0x3afc}, /* 0x20 */
+	{0x0007,0x23,0x25,0x00,0x3c,1600,1200,0x3b01}, /* 0x21 */
+	{0x0007,0x24,0x26,0x00,0x3c,1600,1200,0x3b06}, /* 0x22 */
+	{0x0007,0x25,0x2c,0x00,0x3c,1600,1200,0x3b0b}, /* 0x23 */
+	{0x0007,0x26,0x34,0x00,0x3c,1600,1200,0x3b10}, /* 0x24 */
+	{0x407f,0x00,0x00,0x00,0x40, 320, 200,0x3a34}, /* 0x25 */
+	{0xc07f,0x01,0x00,0x04,0x50, 320, 240,0x3a3b}, /* 0x26 */
+	{0x007f,0x02,0x04,0x05,0x51, 400, 300,0x3a42}, /* 0x27 */
+	{0xc077,0x03,0x0b,0x06,0x52, 512, 384,0x3a49}, /* 0x28 */
+	{0x8007,0x27,0x27,0x00,0x68,1920,1440,0x3b17}, /* 0x29 */
+	{0x4007,0x28,0x29,0x00,0x68,1920,1440,0x3b1c}, /* 0x2a */
+	{0x4007,0x29,0x2e,0x00,0x68,1920,1440,0x3b21}, /* 0x2b */
+	{0x4007,0x2a,0x30,0x00,0x68,1920,1440,0x3b26}, /* 0x2c */
+	{0x4007,0x2b,0x35,0x00,0x68,1920,1440,0x3b2b}, /* 0x2d */
+	{0x4005,0x2c,0x39,0x00,0x68,1920,1440,0x3b30}, /* 0x2e */
+	{0x4007,0x2d,0x2b,0x00,0x6c,2048,1536,0x3b37}, /* 0x2f */
+	{0x4007,0x2e,0x31,0x00,0x6c,2048,1536,0x3b3c}, /* 0x30 */
+	{0x4007,0x2f,0x33,0x00,0x6c,2048,1536,0x3b41}, /* 0x31 */
+	{0x4007,0x30,0x37,0x00,0x6c,2048,1536,0x3b46}, /* 0x32 */
+	{0x4005,0x31,0x38,0x00,0x6c,2048,1536,0x3b4b}, /* 0x33 */
+	{0x0057,0x32,0x40,0x08,0x70, 800, 480,0x3b52}, /* 0x34 */
+	{0x0047,0x33,0x07,0x08,0x70, 800, 480,0x3b57}, /* 0x35 */
+	{0x0047,0x34,0x0a,0x08,0x70, 800, 480,0x3b5c}, /* 0x36 */
+	{0x0057,0x35,0x0b,0x09,0x71,1024, 576,0x3b63}, /* 0x37 */
+	{0x0047,0x36,0x11,0x09,0x71,1024, 576,0x3b68}, /* 0x38 */
+	{0x0047,0x37,0x16,0x09,0x71,1024, 576,0x3b6d}, /* 0x39 */
+	{0x0057,0x38,0x19,0x0a,0x75,1280, 720,0x3b74}, /* 0x3a */
+	{0x0047,0x39,0x1e,0x0a,0x75,1280, 720,0x3b79}, /* 0x3b */
+	{0x0047,0x3a,0x20,0x0a,0x75,1280, 720,0x3b7e}, /* 0x3c */
+	{0x0027,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad0}, /* 0x3d */
+	{0x0027,0x3b,0x19,0x08,0x7c,1280, 960,0x3ad5}, /* 0x3e */
+	{0xc07f,0x01,0x00,0x06,0x5a, 320, 480,0x3b83}, /* 0x3f */    /* FSTN mode */
+        {0x0077,0x42,0x12,0x07,0x23,1280, 768,0x0000}, /* 0x40 */    /* TW: 650/LVDS new mode */
+	{0x0067,0x43,0x4d,0x08,0x26,1400,1050,0x0000}, /* 0x41 */    /* TW: 650/LVDS new mode */
+	{0xffff,0x00,0x00,0x00,0x00,0000,0000,0x0000}
+};
+
+typedef struct _SiS310_CRT1TableStruct
+{
+ 	UCHAR CR[17];
+} SiS310_CRT1TableStruct;
+SiS310_CRT1TableStruct SiS310_CRT1Table[]=
+{
+ {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
+   0x00}}, /* 0x0 */
+ {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e,
+   0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00,
+   0x00}}, /* 0x1 */
+ {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0,
+   0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
+   0x01}}, /* 0x2 */
+ {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
+   0x01}}, /* 0x3 */
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
+   0x00}}, /* 0x4 */
+ {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+   0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+   0x00}}, /* 0x5 */
+ {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,
+   0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
+   0x00}}, /* 0x6 */
+ {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
+   0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
+   0x00}}, /* 0x7 */
+ {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
+   0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
+   0x00}}, /* 0x8 */
+ {{0x65,0x4f,0x4f,0x89,0x58,0x80,0xfb,0x1f,
+   0xe0,0x83,0xdf,0xdf,0xfc,0x00,0x00,0x05,
+   0x61}}, /* 0x9 */
+ {{0x65,0x4f,0x4f,0x89,0x58,0x80,0x01,0x3e,
+   0xe0,0x83,0xdf,0xdf,0x02,0x00,0x00,0x05,
+   0x61}}, /* 0xa */
+ {{0x67,0x4f,0x4f,0x8b,0x58,0x81,0x0d,0x3e,
+   0xe0,0x83,0xdf,0xdf,0x0e,0x10,0x00,0x05,
+   0x61}}, /* 0xb */
+ {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
+   0xe6,0x8a,0xe5,0xe5,0xfc,0x00,0x00,0x01,
+   0x00}}, /* 0xc */
+ {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
+   0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
+   0x01}}, /* 0xd */
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x06,
+   0x01}}, /* 0xe */
+ {{0x7d,0x63,0x63,0x81,0x6e,0x1d,0x98,0xf0,
+   0x7c,0x82,0x57,0x57,0x99,0x00,0x00,0x06,
+   0x01}}, /* 0xf */
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xf0,
+   0x58,0x8b,0x57,0x57,0x70,0x20,0x00,0x06,
+   0x01}}, /* 0x10 */
+ {{0x7e,0x63,0x63,0x82,0x6b,0x13,0x75,0xf0,
+   0x58,0x8b,0x57,0x57,0x76,0x20,0x00,0x06,
+   0x01}}, /* 0x11 */
+ {{0x81,0x63,0x63,0x85,0x6d,0x18,0x7a,0xf0,
+   0x58,0x8b,0x57,0x57,0x7b,0x20,0x00,0x06,
+   0x61}}, /* 0x12 */
+ {{0x83,0x63,0x63,0x87,0x6e,0x19,0x81,0xf0,
+   0x58,0x8b,0x57,0x57,0x82,0x20,0x00,0x06,
+   0x61}}, /* 0x13 */
+ {{0x85,0x63,0x63,0x89,0x6f,0x1a,0x91,0xf0,
+   0x58,0x8b,0x57,0x57,0x92,0x20,0x00,0x06,
+   0x61}}, /* 0x14 */
+ {{0x99,0x7f,0x7f,0x9d,0x84,0x1a,0x96,0x1f,
+   0x7f,0x83,0x7f,0x7f,0x97,0x10,0x00,0x02,
+   0x00}}, /* 0x15 */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+   0x01}}, /* 0x16 */
+ {{0xa1,0x7f,0x7f,0x85,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+   0x01}}, /* 0x17 */
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf5,
+   0x00,0x83,0xff,0xff,0x1f,0x10,0x00,0x02,
+   0x01}}, /* 0x18 */
+ {{0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5,
+   0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02,
+   0x01}}, /* 0x19 */
+ {{0xa9,0x7f,0x7f,0x8d,0x8c,0x9a,0x2c,0xf5,
+   0x00,0x83,0xff,0xff,0x2d,0x14,0x00,0x02,
+   0x62}}, /* 0x1a */
+ {{0xab,0x7f,0x7f,0x8f,0x8d,0x9b,0x35,0xf5,
+   0x00,0x83,0xff,0xff,0x36,0x14,0x00,0x02,
+   0x62}}, /* 0x1b */
+ {{0xcf,0x9f,0x9f,0x93,0xb2,0x01,0x14,0xba,
+   0x00,0x83,0xff,0xff,0x15,0x00,0x00,0x03,
+   0x00}}, /* 0x1c */
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0x5a,
+   0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+   0x01}}, /* 0x1d */
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0x5a,
+   0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+   0x01}}, /* 0x1e */
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0x5a,
+   0x00,0x83,0xff,0xff,0x2f,0x09,0x00,0x07,
+   0x01}}, /* 0x1f */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x20 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x21 @ 4084 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x22 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x23 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x24 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x25 */
+ {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+   0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+   0x00}}, /* 0x26 */
+ {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+   0x00}}, /* 0x27 */
+ {{0x43,0xef,0xef,0x87,0x06,0x00,0xd4,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xd5,0x1f,0x41,0x05,
+   0x63}}, /* 0x28 */
+ {{0x45,0xef,0xef,0x89,0x07,0x01,0xd9,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xda,0x1f,0x41,0x05,
+   0x63}}, /* 0x29 */
+ {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+   0x00}}, /* 0x2a */
+ {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+   0x00}}, /* 0x2b */
+ {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+   0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+   0x00}}, /* 0x2c */
+ {{0x59,0xff,0xff,0x9d,0x17,0x13,0x33,0xba,
+   0x00,0x83,0xff,0xff,0x34,0x0f,0x41,0x05,
+   0x44}}, /* 0x2d */
+ {{0x5b,0xff,0xff,0x9f,0x18,0x14,0x38,0xba,
+   0x00,0x83,0xff,0xff,0x39,0x0f,0x41,0x05,
+   0x44}}, /* 0x2e */
+ {{0x5b,0xff,0xff,0x9f,0x18,0x14,0x3d,0xba,
+   0x00,0x83,0xff,0xff,0x3e,0x0f,0x41,0x05,
+   0x44}}, /* 0x2f */
+ {{0x5d,0xff,0xff,0x81,0x19,0x95,0x41,0xba,
+  0x00,0x84,0xff,0xff,0x42,0x0f,0x41,0x05,
+  0x44}}, /* 0x30 */
+ {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
+  0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
+  0x00}}, /* 0x31 */
+ {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,
+   0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
+   0x01}}, /* 0x32 */
+ {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
+   0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
+   0x01}}, /* 0x33 */
+ {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
+   0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
+   0x01}}, /* 0x34 */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
+   0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
+   0x01}}, /* 0x35 */
+ {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
+   0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
+   0x01}}, /* 0x36 */
+ {{0xa7,0x7f,0x7f,0x88,0x89,0x15,0x26,0xf1,
+   0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
+   0x01}}, /* 0x37 */
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
+   0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+   0x01}}, /* 0x38 */
+ {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
+   0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+   0x01}}, /* 0x39 */
+ {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
+   0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
+   0x01}}, /* 0x3a */
+ {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,
+   0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+   0x01}}, /* 0x3b */
+ {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
+   0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+   0x00}}, /* 0x3c */
+ {{0x7b,0x59,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
+   0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05,
+   0x01}}, /* 0x3d */
+ {{0x86,0x6a,0x6a,0x8a,0x74,0x06,0x8c,0x15,
+   0x4f,0x83,0xef,0xef,0x8d,0x30,0x00,0x02,
+   0x00}}, /* 0x3e */
+ {{0x81,0x6a,0x6a,0x85,0x70,0x00,0x0f,0x3e,
+   0xeb,0x8e,0xdf,0xdf,0x10,0x00,0x00,0x02,
+   0x00}}, /* 0x3f */
+ /* TW: New from 650/LVDS BIOS */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1,
+   0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02,
+   0x01}},  /* 0x40 */
+ {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+   0x01}},  /* 0x41 */
+ {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x20,0xf5,
+   0x03,0x88,0xff,0xff,0x21,0x10,0x00,0x07,
+   0x01}},  /* 0x42 */
+ {{0xe6,0xae,0xae,0x8a,0xbd,0x90,0x3d,0x10,
+   0x1a,0x8d,0x19,0x19,0x3e,0x2f,0x00,0x03,
+   0x00}}   /* 0x43 */
+};
+
+typedef struct _SiS310_MCLKDataStruct
+{
+	UCHAR SR28,SR29,SR2A;
 	USHORT CLOCK;
 } SiS310_MCLKDataStruct;
-SiS310_MCLKDataStruct SiS310_MCLKData[] = {
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166}
+
+SiS310_MCLKDataStruct SiS310_MCLKData_0_315[] =
+{
+	{ 0x3b,0x22,0x01,143},   /* TW: Was { 0x5c,0x23,0x01,166}, */
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166}
 };
 
-typedef struct _SiS310_ECLKDataStruct {
-	UCHAR SR2E, SR2F, SR30;
-	USHORT CLOCK;
+SiS310_MCLKDataStruct SiS310_MCLKData_0_650[] =	/* @ 0x54 */
+{
+	{ 0x5a,0x64,0x82, 66},
+	{ 0xb3,0x45,0x82, 83},
+	{ 0x37,0x61,0x82,100},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x61,0x82,100},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133}
+};
+
+SiS310_MCLKDataStruct SiS310_MCLKData_1[] =	/* @ 0x155 */
+{
+        { 0x29,0x21,0x82,150},
+	{ 0x5c,0x23,0x82,166},
+	{ 0x65,0x23,0x82,183},
+	{ 0x37,0x21,0x82,200},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133},
+	{ 0x37,0x22,0x82,133}
+};
+
+typedef struct _SiS310_ECLKDataStruct
+{
+ 	UCHAR SR2E,SR2F,SR30;
+ 	USHORT CLOCK;
 } SiS310_ECLKDataStruct;
-SiS310_ECLKDataStruct SiS310_ECLKData[] = {
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166}
+SiS310_ECLKDataStruct SiS310_ECLKData[]=
+{
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166}
 };
 
-typedef struct _SiS310_VCLKDataStruct {
-	UCHAR SR2B, SR2C;
+typedef struct _SiS310_VCLKDataStruct
+{
+	UCHAR SR2B,SR2C;
 	USHORT CLOCK;
 } SiS310_VCLKDataStruct;
-SiS310_VCLKDataStruct SiS310_VCLKData[] = {
-	{0x1b, 0xe1, 25},	/* 0x0 */
-	{0x4e, 0xe4, 28},	/* 0x1 */
-	{0x57, 0xe4, 31},	/* 0x2 */
-	{0xc3, 0xc8, 36},	/* 0x3 */
-	{0x42, 0xe2, 40},	/* 0x4 */
-	{0xfe, 0xcd, 43},	/* 0x5 */
-	{0x5d, 0xc4, 44},	/* 0x6 */
-	{0x52, 0xe2, 49},	/* 0x7 */
-	{0x53, 0xe2, 50},	/* 0x8 */
-	{0x74, 0x67, 52},	/* 0x9 */
-	{0x6d, 0x66, 56},	/* 0xa */
-	{0x6c, 0xc3, 65},	/* 0xb */
-	{0x46, 0x44, 67},	/* 0xc */
-	{0xb1, 0x46, 68},	/* 0xd */
-	{0xd3, 0x4a, 72},	/* 0xe */
-	{0x29, 0x61, 75},	/* 0xf */
-	{0x6e, 0x46, 76},	/* 0x10 */
-	{0x2b, 0x61, 78},	/* 0x11 */
-	{0x31, 0x42, 79},	/* 0x12 */
-	{0xab, 0x44, 83},	/* 0x13 */
-	{0x46, 0x25, 84},	/* 0x14 */
-	{0x78, 0x29, 86},	/* 0x15 */
-	{0x62, 0x44, 94},	/* 0x16 */
-	{0x2b, 0x41, 104},	/* 0x17 */
-	{0x3a, 0x23, 105},	/* 0x18 */
-	{0x70, 0x44, 108},	/* 0x19 */
-	{0x3c, 0x23, 109},	/* 0x1a */
-	{0x5e, 0x43, 113},	/* 0x1b */
-	{0xbc, 0x44, 116},	/* 0x1c */
-	{0xe0, 0x46, 132},	/* 0x1d */
-	{0x54, 0x42, 135},	/* 0x1e */
-	{0xea, 0x2a, 139},	/* 0x1f */
-	{0x41, 0x22, 157},	/* 0x20 */
-	{0x70, 0x24, 162},	/* 0x21 */
-	{0x30, 0x21, 175},	/* 0x22 */
-	{0x4e, 0x22, 189},	/* 0x23 */
-	{0xde, 0x26, 194},	/* 0x24 */
-	{0x62, 0x06, 202},	/* 0x25 */
-	{0x3f, 0x03, 229},	/* 0x26 */
-	{0xb8, 0x06, 234},	/* 0x27 */
-	{0x34, 0x02, 253},	/* 0x28 */
-	{0x58, 0x04, 255},	/* 0x29 */
-	{0x24, 0x01, 265},	/* 0x2a */
-	{0x9b, 0x02, 267},	/* 0x2b */
-	{0x70, 0x05, 270},	/* 0x2c */
-	{0x25, 0x01, 272},	/* 0x2d */
-	{0x9c, 0x02, 277},	/* 0x2e */
-	{0x27, 0x01, 286},	/* 0x2f */
-	{0x3c, 0x02, 291},	/* 0x30 */
-	{0xef, 0x0a, 292},	/* 0x31 */
-	{0xf6, 0x0a, 310},	/* 0x32 */
-	{0x95, 0x01, 315},	/* 0x33 */
-	{0xf0, 0x09, 324},	/* 0x34 */
-	{0xfe, 0x0a, 331},	/* 0x35 */
-	{0xf3, 0x09, 332},	/* 0x36 */
-	{0xea, 0x08, 340},	/* 0x37 */
-	{0xe8, 0x07, 376},	/* 0x38 */
-	{0xde, 0x06, 389},	/* 0x39 */
-	{0x52, 0x2a, 54},	/* 0x3a */
-	{0x52, 0x6a, 27},	/* 0x3b */
-	{0x62, 0x24, 70},	/* 0x3c */
-	{0x62, 0x64, 70},	/* 0x3d */
-	{0xa8, 0x4c, 30},	/* 0x3e */
-	{0x20, 0x26, 33},	/* 0x3f */
-	{0x31, 0xc2, 39}	/* 0x40 */
-};
-
-typedef struct _SiS310_VBVCLKDataStruct {
-	UCHAR Part4_A, Part4_B;
+
+SiS310_VCLKDataStruct SiS310_VCLKData[]=
+{
+	{ 0x1b,0xe1, 25}, /* 0x0 */   /* 650/LVDS BIOS: @ 0x5647 */
+	{ 0x4e,0xe4, 28}, /* 0x1 */
+	{ 0x57,0xe4, 31}, /* 0x2 */
+	{ 0xc3,0xc8, 36}, /* 0x3 */
+	{ 0x42,0xe2, 40}, /* 0x4 */
+	{ 0xfe,0xcd, 43}, /* 0x5 */
+	{ 0x5d,0xc4, 44}, /* 0x6 */
+	{ 0x52,0xe2, 49}, /* 0x7 */
+	{ 0x53,0xe2, 50}, /* 0x8 */
+	{ 0x74,0x67, 52}, /* 0x9 */
+	{ 0x6d,0x66, 56}, /* 0xa */
+	{ 0x5a,0x64, 65}, /* 0xb */   /* TW: was 6c c3 - WRONG */
+	{ 0x46,0x44, 67}, /* 0xc */
+	{ 0xb1,0x46, 68}, /* 0xd */
+	{ 0xd3,0x4a, 72}, /* 0xe */
+	{ 0x29,0x61, 75}, /* 0xf */
+	{ 0x6e,0x46, 76}, /* 0x10 */
+	{ 0x2b,0x61, 78}, /* 0x11 */
+	{ 0x31,0x42, 79}, /* 0x12 */
+	{ 0xab,0x44, 83}, /* 0x13 */
+	{ 0x46,0x25, 84}, /* 0x14 */
+	{ 0x78,0x29, 86}, /* 0x15 */
+	{ 0x62,0x44, 94}, /* 0x16 */
+	{ 0x2b,0x41,104}, /* 0x17 */
+	{ 0x3a,0x23,105}, /* 0x18 */
+	{ 0x70,0x44,108}, /* 0x19 */
+	{ 0x3c,0x23,109}, /* 0x1a */
+	{ 0x5e,0x43,113}, /* 0x1b */
+	{ 0xbc,0x44,116}, /* 0x1c */
+	{ 0xe0,0x46,132}, /* 0x1d */
+	{ 0x54,0x42,135}, /* 0x1e */
+	{ 0xea,0x2a,139}, /* 0x1f */
+	{ 0x41,0x22,157}, /* 0x20 */
+	{ 0x70,0x24,162}, /* 0x21 */
+	{ 0x30,0x21,175}, /* 0x22 */
+	{ 0x4e,0x22,189}, /* 0x23 */
+	{ 0xde,0x26,194}, /* 0x24 */
+	{ 0x62,0x06,202}, /* 0x25 */
+	{ 0x3f,0x03,229}, /* 0x26 */
+	{ 0xb8,0x06,234}, /* 0x27 */
+	{ 0x34,0x02,253}, /* 0x28 */
+	{ 0x58,0x04,255}, /* 0x29 */
+	{ 0x24,0x01,265}, /* 0x2a */
+	{ 0x9b,0x02,267}, /* 0x2b */
+	{ 0x70,0x05,270}, /* 0x2c */
+	{ 0x25,0x01,272}, /* 0x2d */
+	{ 0x9c,0x02,277}, /* 0x2e */
+	{ 0x27,0x01,286}, /* 0x2f */
+	{ 0x3c,0x02,291}, /* 0x30 */
+	{ 0xef,0x0a,292}, /* 0x31 */
+	{ 0xf6,0x0a,310}, /* 0x32 */
+	{ 0x95,0x01,315}, /* 0x33 */
+	{ 0xf0,0x09,324}, /* 0x34 */
+	{ 0xfe,0x0a,331}, /* 0x35 */
+	{ 0xf3,0x09,332}, /* 0x36 */
+	{ 0xea,0x08,340}, /* 0x37 */
+	{ 0xe8,0x07,376}, /* 0x38 */
+	{ 0xde,0x06,389}, /* 0x39 */
+	{ 0x52,0x2a, 54}, /* 0x3a */
+	{ 0x52,0x6a, 27}, /* 0x3b */
+	{ 0x62,0x24, 70}, /* 0x3c */
+	{ 0x62,0x64, 70}, /* 0x3d */
+	{ 0xa8,0x4c, 30}, /* 0x3e */
+	{ 0x20,0x26, 33}, /* 0x3f */
+	{ 0x31,0xc2, 39}, /* 0x40 */
+	/* TW: 650/LVDS BIOS @ 0x574b new: */
+	{ 0x60,0x36, 30}, /* 0x41 */  /* Chrontel */
+	{ 0x40,0x4a, 28}, /* 0x42 */  /* Chrontel */
+	{ 0x9f,0x46, 44}, /* 0x43 */  /* Chrontel */
+	{ 0x97,0x2c, 26}, /* 0x44 */
+	{ 0x44,0xe4, 25}, /* 0x45 */  /* Chrontel */
+	{ 0x7e,0x32, 47}, /* 0x46 */  /* Chrontel */
+	{ 0x8a,0x24, 31}, /* 0x47 */  /* Chrontel */
+	{ 0x97,0x2c, 26}, /* 0x48 */  /* Chrontel */
+	{ 0xce,0x3c, 39}, /* 0x49 */
+	{ 0x52,0x4a, 36}, /* 0x4a */  /* Chrontel */
+	{ 0x34,0x61, 95}, /* 0x4b */
+	{ 0x78,0x27,108}, /* 0x4c - was 102 */  /* TW: Last entry in 650/301 BIOS */
+	{ 0x66,0x43,123}, /* 0x4d */  /* Modes 0x26-0x28 (1400x1050) */
+	{ 0x41,0x4e, 21}, /* 0x4e */
+	{ 0xa1,0x4a, 29}, /* 0x4f */  /* Chrontel */
+	{ 0x19,0x42, 42}, /* 0x50 */
+	{ 0x54,0x46, 58}, /* 0x51 */  /* Chrontel */
+	{ 0x25,0x42, 61}, /* 0x52 */
+	{ 0x44,0x44, 66}, /* 0x53 */  /* Chrontel */
+	{ 0x3a,0x62, 70}  /* 0x54 */  /* Chrontel */
+};
+
+typedef struct _SiS310_VBVCLKDataStruct
+{
+	UCHAR Part4_A,Part4_B;
 	USHORT CLOCK;
 } SiS310_VBVCLKDataStruct;
-SiS310_VBVCLKDataStruct SiS310_VBVCLKData[] = {
-	{0x1b, 0xe1, 25},	/* 0x0 */
-	{0x4e, 0xe4, 28},	/* 0x1 */
-	{0x57, 0xe4, 31},	/* 0x2 */
-	{0xc3, 0xc8, 36},	/* 0x3 */
-	{0x42, 0x47, 40},	/* 0x4 */
-	{0xfe, 0xcd, 43},	/* 0x5 */
-	{0x5d, 0xc4, 44},	/* 0x6 */
-	{0x52, 0x47, 49},	/* 0x7 */
-	{0x53, 0x47, 50},	/* 0x8 */
-	{0x74, 0x67, 52},	/* 0x9 */
-	{0x6d, 0x66, 56},	/* 0xa */
-	{0x5a, 0x64, 65},	/* 0xb */
-	{0x46, 0x44, 67},	/* 0xc */
-	{0xb1, 0x46, 68},	/* 0xd */
-	{0xd3, 0x4a, 72},	/* 0xe */
-	{0x29, 0x61, 75},	/* 0xf */
-	{0x6d, 0x46, 75},	/* 0x10 */
-	{0x41, 0x43, 78},	/* 0x11 */
-	{0x31, 0x42, 79},	/* 0x12 */
-	{0xab, 0x44, 83},	/* 0x13 */
-	{0x46, 0x25, 84},	/* 0x14 */
-	{0x78, 0x29, 86},	/* 0x15 */
-	{0x62, 0x44, 94},	/* 0x16 */
-	{0x2b, 0x22, 104},	/* 0x17 */
-	{0x49, 0x24, 105},	/* 0x18 */
-	{0xf8, 0x2f, 108},	/* 0x19 */
-	{0x3c, 0x23, 109},	/* 0x1a */
-	{0x5e, 0x43, 113},	/* 0x1b */
-	{0xbc, 0x44, 116},	/* 0x1c */
-	{0xe0, 0x46, 132},	/* 0x1d */
-	{0xd4, 0x28, 135},	/* 0x1e */
-	{0xea, 0x2a, 139},	/* 0x1f */
-	{0x41, 0x22, 157},	/* 0x20 */
-	{0x70, 0x24, 162},	/* 0x21 */
-	{0x30, 0x21, 175},	/* 0x22 */
-	{0x4e, 0x22, 189},	/* 0x23 */
-	{0xde, 0x26, 194},	/* 0x24 */
-	{0x70, 0x07, 202},	/* 0x25 */
-	{0x3f, 0x03, 229},	/* 0x26 */
-	{0xb8, 0x06, 234},	/* 0x27 */
-	{0x34, 0x02, 253},	/* 0x28 */
-	{0x58, 0x04, 255},	/* 0x29 */
-	{0x24, 0x01, 265},	/* 0x2a */
-	{0x9b, 0x02, 267},	/* 0x2b */
-	{0x70, 0x05, 270},	/* 0x2c */
-	{0x25, 0x01, 272},	/* 0x2d */
-	{0x9c, 0x02, 277},	/* 0x2e */
-	{0x27, 0x01, 286},	/* 0x2f */
-	{0x3c, 0x02, 291},	/* 0x30 */
-	{0xef, 0x0a, 292},	/* 0x31 */
-	{0xf6, 0x0a, 310},	/* 0x32 */
-	{0x95, 0x01, 315},	/* 0x33 */
-	{0xf0, 0x09, 324},	/* 0x34 */
-	{0xfe, 0x0a, 331},	/* 0x35 */
-	{0xf3, 0x09, 332},	/* 0x36 */
-	{0xea, 0x08, 340},	/* 0x37 */
-	{0xe8, 0x07, 376},	/* 0x38 */
-	{0xde, 0x06, 389},	/* 0x39 */
-	{0x52, 0x2a, 54},	/* 0x3a */
-	{0x52, 0x6a, 27},	/* 0x3b */
-	{0x62, 0x24, 70},	/* 0x3c */
-	{0x62, 0x64, 70},	/* 0x3d */
-	{0xa8, 0x4c, 30},	/* 0x3e */
-	{0x20, 0x26, 33},	/* 0x3f */
-	{0x31, 0xc2, 39}	/* 0x40 */
-};
-
-UCHAR SiS310_ScreenOffset[] =
-    { 0x14, 0x19, 0x20, 0x28, 0x32, 0x40, 0x50, 0x64, 0x78, 0x80, 0x2d, 0x35 };
-
-typedef struct _SiS310_StResInfoStruct {
+
+SiS310_VBVCLKDataStruct SiS310_VBVCLKData[]=
+{
+	{ 0x1b,0xe1, 25}, /* 0x0 */   /* 650/LVDS BIOS: @ 0x579c */
+	{ 0x4e,0xe4, 28}, /* 0x1 */
+	{ 0x57,0xe4, 31}, /* 0x2 */
+	{ 0xc3,0xc8, 36}, /* 0x3 */
+	{ 0x42,0x47, 40}, /* 0x4 */
+	{ 0xfe,0xcd, 43}, /* 0x5 */
+	{ 0x5d,0xc4, 44}, /* 0x6 */
+	{ 0x52,0x47, 49}, /* 0x7 */
+	{ 0x53,0x47, 50}, /* 0x8 */
+	{ 0x74,0x67, 52}, /* 0x9 */
+	{ 0x6d,0x66, 56}, /* 0xa */
+	{ 0x35,0x62, 65}, /* 0xb */  /* Was 0x5a,0x64 - 650/LVDS+301 bios: 35,62  */
+	{ 0x46,0x44, 67}, /* 0xc */
+	{ 0xb1,0x46, 68}, /* 0xd */
+	{ 0xd3,0x4a, 72}, /* 0xe */
+	{ 0x29,0x61, 75}, /* 0xf */
+	{ 0x6d,0x46, 75}, /* 0x10 */
+	{ 0x41,0x43, 78}, /* 0x11 */
+	{ 0x31,0x42, 79}, /* 0x12 */
+	{ 0xab,0x44, 83}, /* 0x13 */
+	{ 0x46,0x25, 84}, /* 0x14 */
+	{ 0x78,0x29, 86}, /* 0x15 */
+	{ 0x62,0x44, 94}, /* 0x16 */
+	{ 0x2b,0x22,104}, /* 0x17 */
+	{ 0x49,0x24,105}, /* 0x18 */
+	{ 0xf8,0x2f,108}, /* 0x19 */
+	{ 0x3c,0x23,109}, /* 0x1a */
+	{ 0x5e,0x43,113}, /* 0x1b */
+	{ 0xbc,0x44,116}, /* 0x1c */
+	{ 0xe0,0x46,132}, /* 0x1d */
+	{ 0xd4,0x28,135}, /* 0x1e */
+	{ 0xea,0x2a,139}, /* 0x1f */
+	{ 0x41,0x22,157}, /* 0x20 */
+	{ 0x70,0x24,162}, /* 0x21 */
+	{ 0x30,0x21,175}, /* 0x22 */
+	{ 0x4e,0x22,189}, /* 0x23 */
+	{ 0xde,0x26,194}, /* 0x24 */
+	{ 0x70,0x07,202}, /* 0x25 */
+	{ 0x3f,0x03,229}, /* 0x26 */
+	{ 0xb8,0x06,234}, /* 0x27 */
+	{ 0x34,0x02,253}, /* 0x28 */
+	{ 0x58,0x04,255}, /* 0x29 */
+	{ 0x24,0x01,265}, /* 0x2a */
+	{ 0x9b,0x02,267}, /* 0x2b */
+	{ 0x70,0x05,270}, /* 0x2c */
+	{ 0x25,0x01,272}, /* 0x2d */
+	{ 0x9c,0x02,277}, /* 0x2e */
+	{ 0x27,0x01,286}, /* 0x2f */
+	{ 0x3c,0x02,291}, /* 0x30 */
+	{ 0xef,0x0a,292}, /* 0x31 */
+	{ 0xf6,0x0a,310}, /* 0x32 */
+	{ 0x95,0x01,315}, /* 0x33 */
+	{ 0xf0,0x09,324}, /* 0x34 */
+	{ 0xfe,0x0a,331}, /* 0x35 */
+	{ 0xf3,0x09,332}, /* 0x36 */
+	{ 0xea,0x08,340}, /* 0x37 */
+	{ 0xe8,0x07,376}, /* 0x38 */
+	{ 0xde,0x06,389}, /* 0x39 */
+	{ 0x52,0x2a, 54}, /* 0x3a */
+	{ 0x52,0x6a, 27}, /* 0x3b */
+	{ 0x62,0x24, 70}, /* 0x3c */
+	{ 0x62,0x64, 70}, /* 0x3d */
+	{ 0xa8,0x4c, 30}, /* 0x3e */
+	{ 0x20,0x26, 33}, /* 0x3f */
+	{ 0x31,0xc2, 39}, /* 0x40 */
+	/* TW: 650/LVDS+301 BIOS (@ 0x58a0 in LVDS) new: */
+	{ 0x2e,0x48, 25}, /* 0x41 */
+	{ 0x24,0x46, 25}, /* 0x42 */
+	{ 0x26,0x64, 28}, /* 0x43 */
+	{ 0x37,0x64, 40}, /* 0x44 */
+	{ 0xa1,0x42,108}, /* 0x45 */
+	{ 0x37,0x61,100}, /* 0x46 */
+	{ 0x78,0x27,108}  /* 0x47 */
+	/* --- 0x58bc --- */
+};
+
+UCHAR SiS310_ScreenOffset[]= { 0x14,0x19,0x20,0x28,0x32,0x40,
+                               0x50,0x64,0x78,0x80,0x2d,0x35,0x57};  /* TW: Added 1400x1050 offset */
+
+typedef struct _SiS310_StResInfoStruct
+{
 	USHORT HTotal;
 	USHORT VTotal;
 } SiS310_StResInfoStruct;
-SiS310_StResInfoStruct SiS310_StResInfo[] = {
-	{640, 400},
-	{640, 350},
-	{720, 400},
-	{720, 350},
-	{640, 480}
+
+SiS310_StResInfoStruct SiS310_StResInfo[]=
+{
+	{ 640,400},
+	{ 640,350},
+	{ 720,400},
+	{ 720,350},
+	{ 640,480}
 };
 
-typedef struct _SiS310_ModeResInfoStruct {
+typedef struct _SiS310_ModeResInfoStruct
+{
 	USHORT HTotal;
 	USHORT VTotal;
-	UCHAR XChar;
-	UCHAR YChar;
+	UCHAR  XChar;
+	UCHAR  YChar;
 } SiS310_ModeResInfoStruct;
-SiS310_ModeResInfoStruct SiS310_ModeResInfo[] = {
-	{320, 200, 8, 8},
-	{320, 240, 8, 8},
-	{320, 400, 8, 8},
-	{400, 300, 8, 8},
-	{512, 384, 8, 8},
-	{640, 400, 8, 16},
-	{640, 480, 8, 16},
-	{800, 600, 8, 16},
-	{1024, 768, 8, 16},
-	{1280, 1024, 8, 16},
-	{1600, 1200, 8, 16},
-	{1920, 1440, 8, 16},
-	{2048, 1536, 8, 16},
-	{720, 480, 8, 16},
-	{720, 576, 8, 16},
-	{1280, 960, 8, 16},
-	{800, 480, 8, 16},
-	{1024, 576, 8, 16},
-	{1280, 720, 8, 16}
+
+SiS310_ModeResInfoStruct SiS310_ModeResInfo[]=
+{
+	{  320, 200, 8, 8},   /* 0x00 */
+	{  320, 240, 8, 8},   /* 0x01 */
+	{  320, 400, 8, 8},   /* 0x02 */
+	{  400, 300, 8, 8},   /* 0x03 */
+	{  512, 384, 8, 8},   /* 0x04 */
+	{  640, 400, 8,16},   /* 0x05 */
+	{  640, 480, 8,16},   /* 0x06 */
+	{  800, 600, 8,16},   /* 0x07 */
+	{ 1024, 768, 8,16},   /* 0x08 */
+	{ 1280,1024, 8,16},   /* 0x09 */
+	{ 1600,1200, 8,16},   /* 0x0a */
+	{ 1920,1440, 8,16},   /* 0x0b */
+	{ 2048,1536, 8,16},   /* 0x0c */
+	{  720, 480, 8,16},   /* 0x0d */
+	{  720, 576, 8,16},   /* 0x0e */
+	{ 1280, 960, 8,16},   /* 0x0f */
+	{  800, 480, 8,16},   /* 0x10 */
+	{ 1024, 576, 8,16},   /* 0x11 */
+	{ 1280, 720, 8,16},   /* 0x12 */
+	{  856, 480, 8,16},   /* 0x13 19; TW: New from 650/LVDS BIOS */
+	{ 1280, 768, 8,16},   /* 0x14 20; TW: New from 650/LVDS BIOS */
+	{ 1400,1050, 8,16}    /* 0x15 21; TW: New from 650/LVDS BIOS */
 };
 
 UCHAR SiS310_OutputSelect = 0x40;
-UCHAR SiS310_SoftSetting = 30;
+
+UCHAR SiS310_SoftSetting  = 0x30;   /* TW: RAM setting */
+
 UCHAR SiS310_SR07 = 0x18;
-UCHAR SiS310_SR15[8][4] = {
-	{0x0, 0x4, 0x60, 0x60},
-	{0xf, 0xf, 0xf, 0xf},
-	{0xba, 0xba, 0xba, 0xba},
-	{0xa9, 0xa9, 0xac, 0xac},
-	{0xa0, 0xa0, 0xa0, 0xa8},
-	{0x0, 0x0, 0x2, 0x2},
-	{0x30, 0x30, 0x40, 0x40},
-	{0x0, 0xa5, 0xfb, 0xf6}
-};
-UCHAR SiS310_CR40[5][4] = {
-	{0x77, 0x77, 0x33, 0x33},
-	{0x77, 0x77, 0x33, 0x33},
-	{0x0, 0x0, 0x0, 0x0},
-	{0x5b, 0x5b, 0x3, 0x3},
-	{0x0, 0x0, 0xf0, 0xf8}
-};
-UCHAR SiS310_CR49[] = { 0xaa, 0x88 };
+
+UCHAR SiS310_SR15[8][4]={
+	{0x00,0x04,0x60,0x60},
+	{0x0f,0x0f,0x0f,0x0f},
+	{0xba,0xba,0xba,0xba},
+	{0xa9,0xa9,0xac,0xac},
+	{0xa0,0xa0,0xa0,0xa8},
+	{0x00,0x00,0x02,0x02},
+ 	{0x30,0x30,0x40,0x40},
+	{0x00,0xa5,0xfb,0xf6}
+};
+
+UCHAR SiS310_CR40[5][4]={
+	{0x77,0x77,0x33,0x33},
+	{0x77,0x77,0x33,0x33},
+	{0x00,0x00,0x00,0x00},
+	{0x5b,0x5b,0x03,0x03},
+	{0x00,0x00,0xf0,0xf8}
+};
+
+UCHAR SiS310_CR49[] = {0xaa,0x88};
 UCHAR SiS310_SR1F = 0x0;
 UCHAR SiS310_SR21 = 0xa5;
 UCHAR SiS310_SR22 = 0xfb;
 UCHAR SiS310_SR23 = 0xf6;
 UCHAR SiS310_SR24 = 0xd;
-UCHAR SiS310_SR25[] = { 0x33, 0x3 };
-UCHAR SiS310_SR31 = 0x0;
+UCHAR SiS310_SR25[] = {0x33,0x3};
+UCHAR SiS310_SR31 = 0x00;
 UCHAR SiS310_SR32 = 0x11;
-UCHAR SiS310_SR33 = 0x0;
-UCHAR SiS310_CRT2Data_1_2 = 0x0;
-UCHAR SiS310_CRT2Data_4_D = 0x0;
-UCHAR SiS310_CRT2Data_4_E = 0x0;
+UCHAR SiS310_SR33 = 0x00;
+UCHAR SiS310_CRT2Data_1_2 = 0x00;
+UCHAR SiS310_CRT2Data_4_D = 0x00;
+UCHAR SiS310_CRT2Data_4_E = 0x00;
 UCHAR SiS310_CRT2Data_4_10 = 0x80;
-USHORT SiS310_RGBSenseData = 0xd1;
-USHORT SiS310_VideoSenseData = 0xb9;
-USHORT SiS310_YCSenseData = 0xb3;
-USHORT SiS310_RGBSenseData2 = 0x0190;	/*301b */
+USHORT SiS310_RGBSenseData    = 0xd1;
+USHORT SiS310_VideoSenseData  = 0xb9;
+USHORT SiS310_YCSenseData     = 0xb3;
+USHORT SiS310_RGBSenseData2   = 0x0190;     /*301b*/
 USHORT SiS310_VideoSenseData2 = 0x0174;
 USHORT SiS310_YCSenseData2 = 0x016b;
-UCHAR SiS310_NTSCPhase[] = { 0x21, 0xed, 0x8a, 0x8 };
-UCHAR SiS310_PALPhase[] = { 0x2a, 0x5, 0xd3, 0x0 };
-UCHAR SiS310_NTSCPhase2[] = { 0x21, 0xF0, 0x7B, 0xD6 };	/*301b */
-UCHAR SiS310_PALPhase2[] = { 0x2a, 0x09, 0x86, 0xe9 };
-UCHAR SiS310_PALMPhase[] = { 0x21, 0xE4, 0x2E, 0x9B };	/*palmn */
-UCHAR SiS310_PALNPhase[] = { 0x21, 0xF4, 0x3E, 0xBA };
-
-typedef struct _SiS310_LCDDataStruct {
+UCHAR SiS310_NTSCPhase[]  = {0x21,0xed,0xba,0x08};  /* TW: Was {0x21,0xed,0x8a,0x08}; */
+UCHAR SiS310_PALPhase[]   = {0x2a,0x05,0xe3,0x00};  /* TW: Was {0x2a,0x05,0xd3,0x00}; */
+UCHAR SiS310_NTSCPhase2[] = {0x21,0xF0,0x7B,0xD6};
+UCHAR SiS310_PALPhase2[]  = {0x2a,0x09,0x86,0xe9};
+UCHAR SiS310_PALMPhase[]  = {0x21,0xE4,0x2E,0x9B}; /* TW: palm*/
+UCHAR SiS310_PALNPhase[]  = {0x21,0xF4,0x3E,0xBA}; /* TW: paln*/
+UCHAR SiS310_PALMPhase2[] = {0x21,0xE6,0xEF,0xA4}; /* TW: palm 301b*/
+UCHAR SiS310_PALNPhase2[] = {0x21,0xF6,0x94,0x46}; /* TW: paln 301b*/
+
+typedef struct _SiS310_LCDDataStruct
+{
 	USHORT RVBHCMAX;
 	USHORT RVBHCFACT;
 	USHORT VGAHT;
@@ -1147,99 +1238,132 @@ typedef struct _SiS310_LCDDataStruct {
 	USHORT LCDHT;
 	USHORT LCDVT;
 } SiS310_LCDDataStruct;
-SiS310_LCDDataStruct SiS310_StLCD1024x768Data[] = {
-	{62, 25, 800, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{104, 45, 945, 496, 1344, 806},
-	{62, 25, 800, 546, 1344, 806},
-	{31, 18, 1008, 624, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS310_LCDDataStruct SiS310_ExtLCD1024x768Data[] = {
-	{12, 5, 896, 512, 1344, 806},
-	{12, 5, 896, 510, 1344, 806},
-	{32, 15, 1008, 505, 1344, 806},
-	{32, 15, 1008, 514, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS310_LCDDataStruct SiS310_St2LCD1024x768Data[] = {
-	{62, 25, 800, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{104, 45, 945, 496, 1344, 806},
-	{62, 25, 800, 546, 1344, 806},
-	{31, 18, 1008, 624, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS310_LCDDataStruct SiS310_StLCD1280x1024Data[] = {
-	{22, 5, 800, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{13, 5, 1024, 675, 1560, 1152},
-	{16, 9, 1266, 804, 1688, 1072},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS310_LCDDataStruct SiS310_ExtLCD1280x1024Data[] = {
-	{211, 60, 1024, 501, 1688, 1066},
-	{211, 60, 1024, 508, 1688, 1066},
-	{211, 60, 1024, 501, 1688, 1066},
-	{211, 60, 1024, 508, 1688, 1066},
-	{211, 60, 1024, 500, 1688, 1066},
-	{211, 75, 1024, 625, 1688, 1066},
-	{211, 120, 1280, 798, 1688, 1066},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS310_LCDDataStruct SiS310_St2LCD1280x1024Data[] = {
-	{22, 5, 800, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{13, 5, 1024, 675, 1560, 1152},
-	{16, 9, 1266, 804, 1688, 1072},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS310_LCDDataStruct SiS310_NoScaleData[] = {
-	{1, 1, 800, 449, 800, 449},
-	{1, 1, 800, 449, 800, 449},
-	{1, 1, 900, 449, 900, 449},
-	{1, 1, 900, 449, 900, 449},
-	{1, 1, 800, 525, 800, 525},
-	{1, 1, 1056, 628, 1056, 628},
-	{1, 1, 1344, 806, 1344, 806},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS310_LCDDataStruct SiS310_LCD1280x960Data[] = {
-	{9, 2, 800, 500, 1800, 1000},
-	{9, 2, 800, 500, 1800, 1000},
-	{4, 1, 900, 500, 1800, 1000},
-	{4, 1, 900, 500, 1800, 1000},
-	{9, 2, 800, 500, 1800, 1000},
-	{30, 11, 1056, 625, 1800, 1000},
-	{5, 3, 1350, 800, 1800, 1000},
-	{1, 1, 1576, 1050, 1576, 1050},
-	{1, 1, 1800, 1000, 1800, 1000}
-};
-
-typedef struct _SiS310_TVDataStruct {
+
+SiS310_LCDDataStruct  SiS310_StLCD1024x768Data[]=
+{
+	{   62,  25, 800, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{  104,  45, 945, 496,1344, 806},
+	{   62,  25, 800, 546,1344, 806},
+	{   31,  18,1008, 624,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS310_LCDDataStruct  SiS310_ExtLCD1024x768Data[] =   /* TW: Checked */
+{
+	{   12,   5, 896, 512,1344, 806},
+	{   12,   5, 896, 510,1344, 806},
+	{   32,  15,1008, 505,1344, 806},
+	{   32,  15,1008, 514,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS310_LCDDataStruct  SiS310_St2LCD1024x768Data[] =  /* TW: Checked */
+{
+	{   62,  25, 800, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+/*	{   32,  15, 930, 546,1344, 806},   */
+        {   62,  25, 800, 546,1344, 806},    /* TW: Different in 650/301LV BIOS */
+	{  104,  45, 945, 496,1344, 806},
+	{   62,  25, 800, 546,1344, 806},
+	{   31,  18,1008, 624,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS310_LCDDataStruct  SiS310_StLCD1280x1024Data[] =
+{
+	{   22,   5, 800, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS310_LCDDataStruct  SiS310_ExtLCD1280x1024Data[] =  /* TW: Checked */
+{
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 500,1688,1066},
+	{  211,  75,1024, 625,1688,1066},
+	{  211, 120,1280, 798,1688,1066},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS310_LCDDataStruct  SiS310_St2LCD1280x1024Data[] =
+{
+	{   22,   5, 800, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS310_LCDDataStruct  SiS310_NoScaleData1024x768[] =  /* TW: Checked */
+{
+        {    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+#if 0
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 800, 525, 800, 525},
+	{    1,   1,1056, 628,1056, 628},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1688,1066,1688,1066}
+#endif
+};
+
+SiS310_LCDDataStruct  SiS310_NoScaleData1280x1024[] =  /* TW: New; Checked */
+{
+        {    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS310_LCDDataStruct  SiS310_LCD1280x960Data[] =
+{
+	{    9,   2, 800, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{   30,  11,1056, 625,1800,1000},
+	{    5,   3,1350, 800,1800,1000},
+	{    1,   1,1576,1050,1576,1050},
+	{    1,   1,1800,1000,1800,1000}
+};
+
+typedef struct _SiS310_TVDataStruct
+{
 	USHORT RVBHCMAX;
 	USHORT RVBHCFACT;
 	USHORT VGAHT;
@@ -1254,1351 +1378,2259 @@ typedef struct _SiS310_TVDataStruct {
 	UCHAR RY3COE;
 	UCHAR RY4COE;
 } SiS310_TVDataStruct;
-SiS310_TVDataStruct SiS310_StPALData[] = {
-	{1, 1, 864, 525, 1270, 400, 100, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 350, 100, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 400, 0, 0, 720, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 864, 525, 1270, 350, 0, 0, 720, 0xf4, 0x0b, 0x1c, 0x0a},
-	{1, 1, 864, 525, 1270, 480, 50, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 600, 50, 0, 0, 0xf4, 0xff, 0x1c, 0x22}
-};
 
-SiS310_TVDataStruct SiS310_ExtPALData[] = {
-	{27, 10, 848, 448, 1270, 530, 50, 0, 50, 0xf4, 0xff, 0x1c, 0x22},
-	{108, 35, 848, 398, 1270, 530, 50, 0, 50, 0xf4, 0xff, 0x1c, 0x22},
-	{12, 5, 954, 448, 1270, 530, 50, 0, 50, 0xf1, 0x04, 0x1f, 0x18},
-	{9, 4, 960, 463, 1644, 438, 50, 0, 50, 0xf4, 0x0b, 0x1c, 0x0a},
-	{9, 4, 848, 528, 1270, 530, 0, 0, 50, 0xf5, 0xfb, 0x1b, 0x2a},
-	{36, 25, 1060, 648, 1316, 530, 438, 0, 438, 0xeb, 0x05, 0x25, 0x16},
-	{3, 2, 1080, 619, 1270, 540, 438, 0, 438, 0xf3, 0x00, 0x1d, 0x20},
-	{1, 1, 1170, 821, 1270, 520, 686, 0, 686, 0xF3, 0x00, 0x1D, 0x20}	/*301b */
-};
-
-SiS310_TVDataStruct SiS310_StNTSCData[] = {
-	{1, 1, 858, 525, 1270, 400, 50, 0, 760, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 350, 50, 0, 640, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 400, 0, 0, 720, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 350, 0, 0, 720, 0xf4, 0x0b, 0x1c, 0x0a},
-	{1, 1, 858, 525, 1270, 480, 0, 0, 760, 0xf1, 0x04, 0x1f, 0x18}
-};
-
-SiS310_TVDataStruct SiS310_ExtNTSCData[] = {
-	{143, 65, 858, 443, 1270, 440, 171, 0, 171, 0xf1, 0x04, 0x1f, 0x18},
-	{88, 35, 858, 393, 1270, 440, 171, 0, 171, 0xf1, 0x04, 0x1f, 0x18},
-	{143, 70, 924, 443, 1270, 440, 92, 0, 92, 0xf1, 0x04, 0x1f, 0x18},
-	{143, 70, 924, 393, 1270, 440, 92, 0, 92, 0xf4, 0x0b, 0x1c, 0x0a},
-	{143, 76, 836, 523, 1270, 440, 224, 0, 0, 0xf1, 0x05, 0x1f, 0x16},
-	{143, 120, 1056, 643, 1270, 440, 0, 128, 0, 0xf4, 0x10, 0x1c, 0x00},
-	{2, 1, 858, 503, 1270, 480, 0, 128, 0, 0xee, 0x0c, 0x22, 0x08},
-	{65, 64, 1056, 791, 1270, 480, 638, 0, 0, 0xEE, 0x0C, 0x22, 0x08}	/*301b */
-};
-
-SiS310_TVDataStruct SiS310_St1HiTVData[] = {
-	{0x00}
+SiS310_TVDataStruct  SiS310_StPALData[]=
+{
+ {    1,   1, 864, 525,1270, 400, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 350, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 864, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+ {    1,   1, 864, 525,1270, 480,  50,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 600,  50,   0,   0,0xf4,0xff,0x1c,0x22}
 };
 
-SiS310_TVDataStruct SiS310_St2HiTVData[] = {
-	{0x00}
+SiS310_TVDataStruct  SiS310_ExtPALData[]=
+{
+ {   27,  10, 848, 448,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+ {  108,  35, 848, 398,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+ {   12,   5, 954, 448,1270, 530,  50,   0,  50,0xf1,0x04,0x1f,0x18},
+ {    9,   4, 960, 463,1644, 438,  50,   0,  50,0xf4,0x0b,0x1c,0x0a},
+ {    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},
+ {   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},
+ {    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},
+ {    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}     /*301b*/
 };
 
-SiS310_TVDataStruct SiS310_ExtHiTVData[] = {
-	{0x00}
+SiS310_TVDataStruct  SiS310_StNTSCData[]=
+{
+ {    1,   1, 858, 525,1270, 400,  50,   0, 760,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 350,  50,   0, 640,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+ {    1,   1, 858, 525,1270, 480,   0,   0, 760,0xf1,0x04,0x1f,0x18}
 };
 
-UCHAR SiS310_NTSCTiming[] = {
-	0x17, 0x1d, 0x03, 0x09, 0x05, 0x06, 0x0c, 0x0c,
-	0x94, 0x49, 0x01, 0x0a, 0x06, 0x0d, 0x04, 0x0a,
-	0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x1b,
-	0x0c, 0x50, 0x00, 0x97, 0x00, 0xda, 0x4a, 0x17,
-	0x7d, 0x05, 0x4b, 0x00, 0x00, 0xe2, 0x00, 0x02,
-	0x03, 0x0a, 0x65, 0x9d, 0x08, 0x92, 0x8f, 0x40,
-	0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x50,
-	0x00, 0x40, 0x44, 0x00, 0xdb, 0x02, 0x3b, 0x00
+SiS310_TVDataStruct  SiS310_ExtNTSCData[]=
+{
+ {  143,  65, 858, 443,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+ {   88,  35, 858, 393,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+ {  143,  70, 924, 443,1270, 440,  92,   0,  92,0xf1,0x04,0x1f,0x18},
+ {  143,  70, 924, 393,1270, 440,  92,   0,  92,0xf4,0x0b,0x1c,0x0a},
+ {  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},
+ {  143, 120,1056, 643,1270, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},
+ {    2,   1, 858, 503,1270, 480,   0, 128,   0,0xee,0x0c,0x22,0x08},
+ {   65,  64,1056, 791,1270, 480, 638,   0,   0,0xEE,0x0C,0x22,0x08} /*301b*/     
+};
+
+/* TW: These tables will need data ! */
+SiS310_TVDataStruct  SiS310_St1HiTVData[]=
+{
+   	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
 };
 
-UCHAR SiS310_PALTiming[] = {
-	0x19, 0x52, 0x35, 0x6e, 0x04, 0x38, 0x3d, 0x70,
-	0x94, 0x49, 0x01, 0x12, 0x06, 0x3e, 0x35, 0x6d,
-	0x06, 0x14, 0x3e, 0x35, 0x6d, 0x00, 0x45, 0x2b,
-	0x70, 0x50, 0x00, 0x9b, 0x00, 0xd9, 0x5d, 0x17,
-	0x7d, 0x05, 0x45, 0x00, 0x00, 0xe8, 0x00, 0x02,
-	0x0d, 0x00, 0x68, 0xb0, 0x0b, 0x92, 0x8f, 0x40,
-	0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x63,
-	0x00, 0x40, 0x3e, 0x00, 0xe1, 0x02, 0x28, 0x00
+SiS310_TVDataStruct  SiS310_St2HiTVData[]=
+{
+	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
 };
 
-UCHAR SiS310_HiTVExtTiming[] = { 0x00 };
-
-UCHAR SiS310_HiTVSt1Timing[] = { 0x00 };
-
-UCHAR SiS310_HiTVSt2Timing[] = { 0x00 };
-
-UCHAR SiS310_HiTVTextTiming[] = { 0x00 };
-
-UCHAR SiS310_HiTVGroup3Data[] = { 0x00 };
-
-UCHAR SiS310_HiTVGroup3Simu[] = { 0x00 };
-
-UCHAR SiS310_HiTVGroup3Text[] = { 0x00 };
-
-typedef struct _SiS310_PanelDelayTblStruct {
-	UCHAR timer[2];
+SiS310_TVDataStruct  SiS310_ExtHiTVData[]=
+{
+	{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+UCHAR SiS310_NTSCTiming[] = {   /* TW: New */
+	0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
+	0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
+	0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
+	0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,
+	0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,
+	0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50,
+	0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
+};
+
+UCHAR SiS310_PALTiming[] = {   /* TW: New */
+	0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
+	0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
+	0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17,
+	0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02,
+	0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63,
+	0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00
+};
+
+UCHAR SiS310_HiTVExtTiming[] = {   /* TW: New */
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
+	0x2a,0xde,0x2a,0x44,0x40,0x2a,0x44,0x40,
+	0x8e,0x8e,0x82,0x07,0x0b,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x3d,
+	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
+};
+
+UCHAR SiS310_HiTVSt1Timing[] = {   /* TW: New */
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x65,0x90,0x7b,0xa8,0x03,0xf0,0x87,0x03,
+	0x11,0x15,0x11,0xcf,0x10,0x11,0xcf,0x10,
+	0x35,0x35,0x3b,0x69,0x1d,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x04,0x86,
+	0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00
+};
+
+UCHAR SiS310_HiTVSt2Timing[] = {   /* TW: New */
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
+	0x2a,0xde,0x2a,0x44,0x40,0x2a,0x44,0x40,
+	0x8e,0x8e,0x82,0x07,0x0b,0x92,0x0f,0x40,
+	0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x3d,
+	0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
+};
+
+UCHAR SiS310_HiTVTextTiming[] = {   /* TW: New */
+        0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
+	0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
+	0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
+	0x65,0x90,0xe7,0xbc,0x03,0x0c,0x97,0x03,
+	0x14,0x78,0x14,0x08,0x20,0x14,0x08,0x20,
+	0xc8,0xc8,0x3b,0xd2,0x26,0x92,0x0f,0x40,
+        0x60,0x80,0x14,0x90,0x8c,0x60,0x04,0x96,
+	0x72,0x5c,0x11,0x00,0xfc,0xff,0x32,0x00
+};
+
+UCHAR SiS310_HiTVGroup3Data[] = {   /* TW: New */
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f,
+	0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x2e,0x58,0x48,0x72,0x44,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x4f,0x7f,0x03,0xa8,0x7d,0x20,0x1a,0xa9,
+	0x14,0x05,0x03,0x7e,0x64,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+UCHAR SiS310_HiTVGroup3Simu[] = {   /* TW: New */
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95,
+	0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x15,0x26,0xd3,0xe4,0x11,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x67,0x36,0x01,0x47,0x0e,0x10,0xbe,0xb4,
+	0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+UCHAR SiS310_HiTVGroup3Text[] = {   /* TW: New */
+        0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7,
+	0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6,
+	0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
+	0x8c,0x6e,0x60,0x18,0x2c,0x0c,0x20,0x22,
+	0x56,0x36,0x4f,0x6e,0x3f,0x80,0x00,0x80,
+	0x93,0x3c,0x01,0x50,0x2f,0x10,0xf4,0xca,
+	0x01,0x05,0x03,0x7e,0x65,0x31,0x14,0x75,
+	0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
+};
+
+typedef struct _SiS310_PanelDelayTblStruct
+{
+ 	UCHAR timer[2];
 } SiS310_PanelDelayTblStruct;
-SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[] = {
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}},
-	{{0x00, 0x00}}
-};
-
-typedef struct _SiS310_LVDSDataStruct {
+
+SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[]=  /* TW: New from 650/301LV BIOS */
+{
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}}
+};
+
+SiS310_PanelDelayTblStruct SiS310_PanelDelayTblLVDS[]=  
+{
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}},
+	{{0x28,0xc8}}
+};
+
+typedef struct _SiS310_LVDSDataStruct
+{
 	USHORT VGAHT;
 	USHORT VGAVT;
 	USHORT LCDHT;
 	USHORT LCDVT;
 } SiS310_LVDSDataStruct;
-SiS310_LVDSDataStruct SiS310_LVDS800x600Data_1[] = {
-	{848, 433, 1060, 629},
-	{848, 389, 1060, 629},
-	{848, 433, 1060, 629},
-	{848, 389, 1060, 629},
-	{848, 518, 1060, 629},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{800, 449, 1000, 644},
-	{800, 525, 1000, 635}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS800x600Data_2[] = {
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{800, 449, 1000, 644},
-	{800, 525, 1000, 635}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS1024x768Data_1[] = {
-	{840, 438, 1344, 806},
-	{840, 409, 1344, 806},
-	{840, 438, 1344, 806},
-	{840, 409, 1344, 806},
-	{840, 518, 1344, 806},
-	{1050, 638, 1344, 806},
-	{1344, 806, 1344, 806},
-	{800, 449, 1280, 801},
-	{800, 525, 1280, 813}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS1024x768Data_2[] = {
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{800, 449, 1280, 801},
-	{800, 525, 1280, 813}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS1280x1024Data_1[] = {
-	{840, 438, 1344, 806},
-	{840, 409, 1344, 806},
-	{840, 438, 1344, 806},
-	{840, 409, 1344, 806},
-	{840, 518, 1344, 806},
-	{1050, 638, 1344, 806},
-	{1344, 806, 1344, 806},
-	{800, 449, 1280, 801},
-	{800, 525, 1280, 813}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS1280x1024Data_2[] = {
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{800, 449, 1280, 801},
-	{800, 525, 1280, 813}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS640x480Data_1[] = {
+
+SiS310_LVDSDataStruct  SiS310_LVDS320x480Data_1[]=
+{
+	{848, 433,400,525},
+	{848, 389,400,525},
+	{848, 433,400,525},
+	{848, 389,400,525},
+	{848, 518,400, 525},
+	{1056, 628,400,525},
+	{400, 525,400,525},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_1[]=   /* TW: New */
+{
+	{848, 433,1060, 629},
+	{848, 389,1060, 629},
+	{848, 433,1060, 629},
+	{848, 389,1060, 629},
+	{848, 518,1060, 629},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_2[]=   /* TW: New */
+{
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{800, 449,1000, 644},
+	{800, 525,1000, 635}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_1[]=   /* TW: New */
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},    /* 640x480 */
+	{1050, 638,1344, 806},   /* 800x600 */
+	{1344, 806,1344, 806},   /* 1024x768 */
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_2[]=   /* TW: New */
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_1[]=   /* TW: New */
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_2[]=   /* TW: New */
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1400x1050Data_1[]=   /* TW: New */
+{
+        {928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{928, 416, 1688, 1066},
+	{928, 366, 1688, 1066},
+	{928, 496, 1688, 1066},
+	{1088, 616, 1688, 1066},
+	{1312, 784, 1688, 1066},
+	{1568, 1040, 1688, 1066},
+	{1688, 1066, 1688, 1066}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1400x1050Data_2[]=   /* TW: New */
+{
+        {1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+	{1688,1066, 1688,1066},
+};
+
+/* TW: New: - from 300 series */
+SiS310_LVDSDataStruct  SiS310_LVDS1024x600Data_1[]=
+{
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 604,1344, 800},
+	{840, 560,1344, 800},
+	{840, 689,1344, 800},
+	{1050, 800,1344, 800},
+	{1344, 800,1344, 800},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: - from 300 series */
+SiS310_LVDSDataStruct  SiS310_LVDS1024x600Data_2[]=
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: - from 300 series */
+SiS310_LVDSDataStruct  SiS310_LVDS1152x768Data_1[]=
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New: - from 300 series */
+SiS310_LVDSDataStruct  SiS310_LVDS1152x768Data_2[]=
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+/* TW: New in 650/LVDS BIOS - resolution unknown */
+SiS310_LVDSDataStruct  SiS310_LVDSXXXxXXXData_1[]=   /* TW: New */
+{
+        { 800, 449, 800, 449},
+	{ 800, 449, 800, 449},
+	{ 900, 449, 900, 449},
+	{ 900, 449, 900, 449},
+	{ 800, 525, 800, 525},
+	{1056, 628,1056, 628},
+	{1344, 806,1344, 806},
+	{1688, 806,1688, 806}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS640x480Data_1[]=   /* TW: New */
+{
 	{800, 449, 800, 449},
 	{800, 449, 800, 449},
 	{800, 449, 800, 449},
 	{800, 449, 800, 449},
 	{800, 525, 800, 525},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628}
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628},
+	{1056, 628,1056, 628}
 };
 
-SiS310_LVDSDataStruct SiS310_CHTVUNTSCData[] = {
-	{840, 600, 840, 600},
-	{840, 600, 840, 600},
-	{840, 600, 840, 600},
-	{840, 600, 840, 600},
-	{784, 600, 784, 600},
-	{1064, 750, 1064, 750}
+SiS310_LVDSDataStruct  SiS310_LVDS1280x960Data_1[]=   /* TW: New */
+{
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 438,1344, 806},
+	{840, 409,1344, 806},
+	{840, 518,1344, 806},
+	{1050, 638,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1280x960Data_2[]=   /* TW: New */
+{
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{1344, 806,1344, 806},
+	{800, 449,1280, 801},
+	{800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_CHTVUNTSCData[]=   /* TW: New */
+{
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 840, 600, 840, 600},
+	{ 784, 600, 784, 600},
+	{1064, 750,1064, 750},
+        {1160, 945,1160, 945}           /* TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct SiS310_CHTVONTSCData[] = {
-	{840, 525, 840, 525},
-	{840, 525, 840, 525},
-	{840, 525, 840, 525},
-	{840, 525, 840, 525},
-	{784, 525, 784, 525},
-	{1040, 700, 1040, 700}
+SiS310_LVDSDataStruct  SiS310_CHTVONTSCData[]=   /* TW: New */
+{
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 840, 525, 840, 525},
+	{ 784, 525, 784, 525},
+	{1040, 700,1040, 700},
+        {1160, 840,1160, 840}          	/* TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct SiS310_CHTVUPALData[] = {
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{840, 750, 840, 750},
-	{936, 836, 936, 836}
+SiS310_LVDSDataStruct  SiS310_CHTVUPALData[]=   /* TW: New */
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 960, 750, 960, 750},
+	{1400,1000,1400,1000}   	/*  TW: For Ch7019 1024 */
 };
 
-SiS310_LVDSDataStruct SiS310_CHTVOPALData[] = {
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{840, 625, 840, 625},
-	{960, 750, 960, 750}
+SiS310_LVDSDataStruct  SiS310_CHTVOPALData[]=   /* TW: New */
+{
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{1008, 625,1008, 625},
+	{ 840, 625, 840, 625},
+	{ 944, 625, 944, 625},
+        {1400, 875,1400, 875}       	/*  TW: For Ch7019 1024 */
 };
 
-typedef struct _SiS310_LVDSDesStruct {
+typedef struct _SiS310_LVDSDesStruct
+{
 	USHORT LCDHDES;
 	USHORT LCDVDES;
 } SiS310_LVDSDesStruct;
-SiS310_LVDSDesStruct SiS310_PanelType00_1[] = {
-	{0, 626},
-	{0, 624},
-	{0, 626},
-	{0, 624},
-	{0, 624},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType01_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType02_1[] = {
-	{0, 626},
-	{0, 624},
-	{0, 626},
-	{0, 624},
-	{0, 624},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType03_1[] = {
-	{8, 436},
-	{8, 440},
-	{8, 436},
-	{8, 440},
-	{8, 512},
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794}
+
+/* TW: PanelType arrays taken from 650/LVDS BIOS 1.10.0 */
+
+SiS310_LVDSDesStruct  SiS310_PanelType00_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType01_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 805},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType02_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 1065},
+	{ 0, 0},
+	{ 0, 0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType04_1[] = {
+
+SiS310_LVDSDesStruct  SiS310_PanelType03_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType04_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType05_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType05_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType06_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType06_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType07_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType07_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType08_1[] = {
-	{1059, 626},
-	{1059, 624},
-	{1059, 626},
-	{1059, 624},
-	{1059, 624},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType09_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+SiS310_LVDSDesStruct  SiS310_PanelType08_1[]=   /* TW: New */
+{
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0},
+	{ 0, 0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType09_1[]=   /* TW: New */
+{
+	{ 0, 448},
+	{ 0, 448},
+	{ 0, 448},
+	{ 0, 448},
+	{ 0, 524},
+	{ 0, 627},
+	{ 0, 805},
+	{ 0, 805},
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0a_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0a_1[]=   /* TW: New */
+{
 	{1059, 626},
 	{1059, 624},
 	{1059, 626},
 	{1059, 624},
 	{1059, 624},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0b_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0b_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0c_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0c_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0d_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0d_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0e_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0e_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0f_1[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0f_1[]=   /* TW: New */
+{
 	{1343, 798},
 	{1343, 794},
 	{1343, 798},
 	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType00_2[] = {
-	{976, 527},
-	{976, 502},
-	{976, 527},
-	{976, 502},
-	{976, 567},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
+	{1343,   0},
+	{1343,   0},
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType01_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType02_2[] = {
-	{976, 527},
-	{976, 502},
-	{976, 527},
-	{976, 502},
-	{976, 567},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType03_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType00_2[]=   /* TW: New */
+{
+	{980, 528},
+	{980, 503},
+	{980, 528},
+	{980, 503},
+	{980, 568},
+	{ 0, 628},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType01_2[]=   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{1152, 622},
-	{1152, 597}
+	{ 0, 806},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType04_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+SiS310_LVDSDesStruct  SiS310_PanelType02_2[]=   /* TW: New */
+{
+	{1368, 754},
+	{1368, 729},
+	{1368, 754},
+	{1368, 729},
+	{1368, 794},
+	{1448, 854},
+	{1560, 938},
+	{   0,1066},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType03_2[]=   /* TW: New */
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType05_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType04_2[]=   /* TW: New */
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType05_2[]=   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType06_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType06_2[]=   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType07_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType07_2[]=   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType08_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType08_2[]=   /* TW: New */
+{
 	{976, 527},
 	{976, 502},
 	{976, 527},
 	{976, 502},
 	{976, 567},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType09_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+SiS310_LVDSDesStruct  SiS310_PanelType09_2[]=   /* TW: New */
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0a_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0a_2[]=   /* TW: New */
+{
 	{976, 527},
 	{976, 502},
 	{976, 527},
 	{976, 502},
 	{976, 567},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
+	{ 0, 627},
+	{ 0, 627},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0b_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0b_2[]=   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0c_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0c_2[]=   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0d_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0d_2[]=   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0e_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0e_2[]=   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_PanelType0f_2[] = {
+SiS310_LVDSDesStruct  SiS310_PanelType0f_2[] =   /* TW: New */
+{
 	{1152, 622},
 	{1152, 597},
 	{1152, 622},
 	{1152, 597},
 	{1152, 662},
 	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-/*301b*/
-SiS310_LVDSDesStruct SiS310_PanelType1076_1[] = {
-	{0x00, 0x00}
-};
-SiS310_LVDSDesStruct SiS310_PanelType1210_1[] = {
-	{0x00, 0x00}
-};
-SiS310_LVDSDesStruct SiS310_PanelType1296_1[] = {
-	{0x00, 0x00}
-};
-SiS310_LVDSDesStruct SiS310_PanelType1076_2[] = {
-	{0x00, 0x00}
-};
-SiS310_LVDSDesStruct SiS310_PanelType1210_2[] = {
-	{0x00, 0x00}
-};
-SiS310_LVDSDesStruct SiS310_PanelType1296_2[] = {
-	{0x00, 0x00}
-};
-/*end 301b*/
-
-SiS310_LVDSDesStruct SiS310_CHTVUNTSCDesData[] = {
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0}
+	{ 0, 805},
+	{ 0, 794},
+	{ 0,   0}
 };
 
-SiS310_LVDSDesStruct SiS310_CHTVONTSCDesData[] = {
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_CHTVUPALDesData[] = {
-	{256, 0},
-	{256, 0},
-	{256, 0},
-	{256, 0},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_CHTVOPALDesData[] = {
-	{256, 0},
-	{256, 0},
-	{256, 0},
-	{256, 0},
-	{0, 0},
-	{0, 0}
+SiS310_LVDSDesStruct SiS310_PanelType1076_1[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS310_LVDSDesStruct SiS310_PanelType1076_2[]=   /* TW: New */
+{
+	{ 1152, 622 },
+	{ 1152, 597 },
+	{ 1152, 622 },
+	{ 1152, 597 },
+	{ 1152, 622 },
+	{ 1232, 722 },
+	{    0, 0   },
+	{    0, 794 },
+	{    0, 0   }
+};
+
+SiS310_LVDSDesStruct SiS310_PanelType1210_1[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS310_LVDSDesStruct SiS310_PanelType1210_2[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS310_LVDSDesStruct SiS310_PanelType1296_1[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS310_LVDSDesStruct SiS310_PanelType1296_2[]=   /* TW: New */
+{
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0},
+	{ 0 , 0}
+};
+
+SiS310_LVDSDesStruct  SiS310_CHTVUNTSCDesData[]= 
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-/*add for LCDA*/
-typedef struct _SiS310_LCDACRT1DataStruct {
-	UCHAR CR[17];
-} SiS310_LCDACRT1DataStruct;
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT1800x600_1[] = {
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0xaf, 0x1f,
-	  0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x05,
-	  0x00}},
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0x83, 0x1f,
-	  0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0xaf, 0x1f,
-	  0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x05,
-	  0x00}},
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0x83, 0x1f,
-	  0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0x04, 0x3e,
-	  0xe0, 0x85, 0xdf, 0xfb, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x7f, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x06,
-	  0x01}}
+SiS310_LVDSDesStruct  SiS310_CHTVONTSCDesData[]=
+{
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT11024x768_1[] = {
-	{{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0xc4, 0x1f,
-	  0x92, 0x89, 0x8f, 0x8f, 0xb5, 0x30, 0x00, 0x05,
-	  0x00}},
-	{{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0x97, 0x1f,
-	  0x60, 0x87, 0x5d, 0x5d, 0x83, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0xc4, 0x1f,
-	  0x92, 0x89, 0x8f, 0x8f, 0xb5, 0x30, 0x00, 0x05,
-	  0x00}},
-	{{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0x97, 0x1f,
-	  0x60, 0x87, 0x5d, 0x5d, 0x83, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0x04, 0x3e,
-	  0xE2, 0x89, 0xDf, 0xDf, 0x05, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x87, 0x63, 0x63, 0x8B, 0x69, 0x1A, 0x7c, 0xf0,
-	  0x5A, 0x8F, 0x57, 0x57, 0x7D, 0x20, 0x00, 0x26,
-	  0x01}},
-	{{0xA3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xFf, 0xFf, 0x25, 0x10, 0x00, 0x02,
-	  0x01}}
+SiS310_LVDSDesStruct  SiS310_CHTVUPALDesData[]=
+{
+	{256,   0},
+	{256,   0},
+	{256,   0},
+	{256,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT11280x1024_1[] = {
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0xb4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x82, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x01,
-	  0x00}},
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0xb4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x82, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x01,
-	  0x00}},
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x04, 0x3e,
-	  0xe2, 0x89, 0xdf, 0x05, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x7e, 0x63, 0x82, 0x68, 0x15, 0x7c, 0xf0,
-	  0x5a, 0x8f, 0x57, 0x7d, 0x20, 0x00, 0x26,
-	  0x01}},
-	{{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
-	  0x01}}
+SiS310_LVDSDesStruct  SiS310_CHTVOPALDesData[]=
+{
+	{256,   0},
+	{256,   0},
+	{256,   0},
+	{256,   0},
+	{ 0,   0},
+	{ 0,   0},
+	{ 0,   0}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT1800x600_1_H[] = {
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0xaf, 0x1f,
-	  0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x04,
-	  0x00}},
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0x83, 0x1f,
-	  0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x04,
-	  0x00}},
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0xaf, 0x1f,
-	  0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x04,
-	  0x00}},
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0x83, 0x1f,
-	  0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x04,
-	  0x00}},
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0x04, 0x3e,
-	  0xe0, 0x85, 0xdf, 0xfb, 0x10, 0x00, 0x04,
-	  0x00}},
-	{{0x3d, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x05,
-	  0x01}}
-};
+typedef struct _SiS310_Part2PortTblStruct
+{
+ 	UCHAR CR[12];
+} SiS310_Part2PortTblStruct;
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT11024x768_1_H[] = {
-	{{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0xc4, 0x1f,
-	  0x92, 0x89, 0x8f, 0x8f, 0xb5, 0x30, 0x00, 0x44,
-	  0x00}},
-	{{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0x97, 0x1f,
-	  0x60, 0x87, 0x5D, 0x5D, 0x83, 0x01, 0x00, 0x44,
-	  0x00}},
-	{{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0xc4, 0x1f,
-	  0x92, 0x89, 0x8f, 0x8f, 0xb5, 0x30, 0x00, 0x44,
-	  0x00}},
-	{{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0x97, 0x1f,
-	  0x60, 0x87, 0x5D, 0x5D, 0x83, 0x01, 0x00, 0x44,
-	  0x00}},
-	{{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0x04, 0x3e,
-	  0xE2, 0x89, 0xDf, 0xDf, 0x05, 0x00, 0x00, 0x44,
-	  0x00}},
-	{{0x41, 0x31, 0x31, 0x85, 0x35, 0x1d, 0x7c, 0xf0,
-	  0x5A, 0x8F, 0x57, 0x57, 0x7D, 0x20, 0x00, 0x55,
-	  0x01}},
-	{{0x4f, 0x3F, 0x3F, 0x93, 0x45, 0x0D, 0x24, 0xf5,
-	  0x02, 0x88, 0xFf, 0xFf, 0x25, 0x10, 0x00, 0x01,
-	  0x01}}
+SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_1[] =
+{
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x38,0x13,0x16,0x0c,0xe6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT11280x1024_1_H[] = {
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0xb4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x04,
-	  0x00}},
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x82, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x04,
-	  0x00}},
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0xb4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x04,
-	  0x00}},
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x82, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x04,
-	  0x00}},
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x04, 0x3e,
-	  0xe2, 0x89, 0xdf, 0x05, 0x00, 0x00, 0x04,
-	  0x00}},
-	{{0x3c, 0x31, 0x80, 0x35, 0x1c, 0x7c, 0xf0,
-	  0x5a, 0x8f, 0x57, 0x7d, 0x20, 0x00, 0x55,
-	  0x01}},
-	{{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
-	  0x01}}
+SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_1[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT1800x600_2[] = {
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-	  0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-	  0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-	  0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-	  0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0xba,
-	  0x1c, 0x80, 0xdf, 0x73, 0x00, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x06,
-	  0x01}}
+SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_2[] =
+{
+ {{0x25,0x12,0x51,0x6e,0x48,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
+ {{0x2c,0x12,0x38,0x55,0x2f,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
+ {{0x25,0x12,0x51,0x6e,0x48,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
+ {{0x2c,0x12,0x38,0x55,0x2f,0xc1,0x35,0xb1,0x47,0xe9,0x71,0x33}},
+ {{0x2d,0x12,0x79,0x96,0x70,0x99,0x35,0x89,0x47,0xc1,0x49,0x33}},
+ {{0x29,0x12,0xb5,0xd2,0xac,0xe9,0x35,0xd9,0x47,0x11,0x99,0x33}},
+ {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT11024x768_2[] = {
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x63, 0x87, 0x78, 0x89, 0x24, 0xf1,
-	  0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x02,
-	  0x01}},
-	{{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
-	  0x01}}
+SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_2[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT11280x1024_2[] = {
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x06,
-	  0x00}},
-	{{0xa3, 0x63, 0x87, 0x78, 0x89, 0x24, 0xf1,
-	  0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x02,
-	  0x01}},
-	{{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
-	  0x01}}
-};
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT1800x600_2_H[] = {
-	{{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
-	  0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
-	  0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
-	  0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x27, 0x81, 0x3a, 0x1a, 0x72, 0x3e,
-	  0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0xba,
-	  0x1c, 0x80, 0xdf, 0x73, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x05,
-	  0x01}}
+SiS310_Part2PortTblStruct SiS310_CRT2Part2_1024x768_3[] =
+{
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x2c,0x12,0x9a,0xae,0x88,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT11024x768_2_H[] = {
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x31, 0x93, 0x3e, 0x06, 0x24, 0xf1,
-	  0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x01,
-	  0x01}},
-	{{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
-	  0x01}}
+SiS310_Part2PortTblStruct SiS310_CRT2Part2_1280x1024_3[] =
+{
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
+ {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
 };
 
-SiS310_LCDACRT1DataStruct SiS310_LCDACRT11280x1024_2_H[] = {
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x4f, 0x31, 0x93, 0x3e, 0x86, 0x24, 0xf1,
-	  0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x01,
-	  0x01}},
-	{{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
-	  0x01}}
-};
+/*add for LCDA*/
+typedef struct _SiS310_LCDACRT1DataStruct
+{
+ 	UCHAR CR[17];
+}SiS310_LCDACRT1DataStruct;
 
-typedef struct _SiS310_LVDSCRT1DataStruct {
-	UCHAR CR[15];
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_1[] =
+{
+ {{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00}},
+ {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00}},
+ {{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00}},
+ {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00}},
+ {{0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00}},
+ {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_1[]=
+{
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0x97,0x1f,
+   0x60,0x87,0x5d,0x5d,0x83,0x10,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0x97,0x1f,
+   0x60,0x87,0x5d,0x5d,0x83,0x10,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x4f,0x97,0x55,0x86,0x04,0x3e,
+   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x05,
+   0x00}},
+ {{0x87,0x63,0x63,0x8B,0x69,0x1A,0x7c,0xf0,
+   0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x26,
+   0x01}},
+ {{0xA3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_1[]=
+{
+ {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+   0x00}},
+ {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+   0x00}},
+ {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+   0x00}},
+ {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+   0x00}},
+ {{0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e,
+   0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+   0x00}},
+ {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+   0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+   0x01}},
+ {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_1_H[]=
+{
+ {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+   0x00}},
+ {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+   0x00}},
+ {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+   0x00}},
+ {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+   0x00}},
+ {{0x30,0x27,0x94,0x2c,0x92,0x04,0x3e,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04,
+   0x00}},
+ {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_1_H[]=
+{
+ {{0x37,0x27,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
+   0x00}},
+ {{0x37,0x27,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+   0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
+   0x00}},
+ {{0x37,0x27,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
+   0x00}},
+ {{0x37,0x27,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+   0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
+   0x00}},
+ {{0x37,0x27,0x27,0x9B,0x2b,0x94,0x04,0x3e,
+   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x44,
+   0x00}},
+ {{0x41,0x31,0x31,0x85,0x35,0x1d,0x7c,0xf0,
+   0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x55,
+   0x01}},
+ {{0x4f,0x3F,0x3F,0x93,0x45,0x0D,0x24,0xf5,
+   0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x01,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_1_H[]=
+{
+ {{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+   0x00}},
+{{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+   0x00}},
+ {{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+   0x00}},
+ {{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+   0x00}},
+ {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+   0xe2,0x89,0xdf,0x05,0x00,0x00,0x04,
+   0x00}},
+ {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+   0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+   0x01}},
+ {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_2[]=
+{ 
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+   0x00}},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+   0x00}},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+   0x00}},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+   0x00}},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
+   0x1c,0x80,0xdf,0x73,0x00,0x00,0x06,
+   0x00}},
+ {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_2[]=
+{ 
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+   0x01}},
+ {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_2[]=
+{
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+   0x00}},
+ {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+   0x01}},
+ {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT1800x600_2_H[]=
+{ 
+ {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+   0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+   0x00}},
+ {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+   0x00}},
+ {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+   0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+   0x00}},
+ {{0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e,
+   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+   0x00}},
+ {{0x3d,0x27,0x81,0x32,0x1a,0x72,0xba,
+   0x1c,0x80,0xdf,0x73,0x00,0x00,0x05,
+   0x00}},
+ {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
+   0x01}}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11024x768_2_H[]=
+{ 
+ {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+   0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+   0x01 }},
+ {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+   0x01 }}
+};
+
+SiS310_LCDACRT1DataStruct  SiS310_LCDACRT11280x1024_2_H[]=
+{ 
+ {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x4f,0x31,0x93,0x3e,0x86,0x24,0xf1,
+   0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+   0x01 }},
+ {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+   0x01 }}
+};
+
+typedef struct _SiS310_LVDSCRT1DataStruct
+{
+ 	UCHAR CR[15];
 } SiS310_LVDSCRT1DataStruct;
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1[] = {
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0xaf, 0x1f,
-	  0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x05,
-	  0x00}},
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0x83, 0x1f,
-	  0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0xaf, 0x1f,
-	  0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x05,
-	  0x00}},
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0x83, 0x1f,
-	  0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x65, 0x4f, 0x89, 0x56, 0x83, 0x04, 0x3e,
-	  0xe0, 0x85, 0xdf, 0xfb, 0x10, 0x00, 0x05,
-	  0x00}},
-	{{0x7f, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x06,
-	  0x01}}
-};
 
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1[] = {
-	{{0x73, 0x4f, 0x97, 0x55, 0x86, 0xc4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x05,
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1320x480_1[] =
+{
+ {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 }},
+ {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x65,0x4f,0x89,0x54,0x9f,0xc4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+   0x00 }},
+ {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 }},
+ {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01 }},
+{{0x2d,0x27,0x90,0x2c,0x80,0x0b,0x3e,
+   0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
+   0x00 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1[] =   /* TW: New */
+{
+ {{0x6b,0x4f,0x8f,0x55,0x85,0xaa,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 }},
+ {{0x6b,0x4f,0x8f,0x55,0x85,0x78,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x6b,0x4f,0x8f,0x55,0x85,0xaa,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 }},
+ {{0x6b,0x4f,0x8f,0x55,0x85,0x78,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x6b,0x4f,0x8f,0x55,0x85,0xfa,0x1f,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 }},
+ {{0x7f,0x63,0x83,0x69,0x19,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1[] =    /* TW: New */
+{
+ {{0x73,0x4f,0x97,0x53,0x84,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x97,0x53,0x84,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x97,0x53,0x84,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x97,0x53,0x84,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x05,
+   0x00}},
+ {{0x73,0x4f,0x97,0x53,0x84,0x04,0x3e,
+   0xE2,0x89,0xDf,0x05,0x00,0x00,0x05,
+   0x00}},
+ {{0x87,0x63,0x8B,0x67,0x18,0x7c,0xf0,
+   0x5A,0x81,0x57,0x7D,0x00,0x00,0x06,
+   0x01}},
+ {{0xA3,0x7f,0x87,0x83,0x94,0x24,0xf5,
+   0x02,0x89,0xFf,0x25,0x10,0x00,0x02,
+   0x01}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1[] =    /* TW: New */
+{
+ {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
+   0x00 }},
+ {{0x7e,0x4f,0x82,0x56,0x04,0x08,0x3e,
+   0xe0,0x84,0xdf,0x09,0x00,0x00,0x06,
+   0x00 }},
+ {{0x92,0x63,0x96,0x6a,0x18,0x80,0xf0,
+   0x58,0x8c,0x57,0x81,0x20,0x00,0x06,
+   0x01 }},
+ {{0xae,0x7f,0x92,0x86,0x94,0x28,0xf5,
+   0x00,0x84,0xff,0x29,0x10,0x00,0x02,
+   0x01 }},
+ {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a,
+   0x00,0x84,0xff,0x29,0x09,0x00,0x07,
+   0x01}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1_H[] =    /* TW: New */
+{
+ {{0x43,0x27,0x87,0x2d,0x1d,0xaa,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 }},
+ {{0x43,0x27,0x87,0x2d,0x1d,0x78,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x43,0x27,0x87,0x2d,0x1d,0xfa,0x1f,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 }},
+ {{0x43,0x27,0x87,0x2d,0x1d,0x78,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 }},
+ {{0x43,0x27,0x87,0x2d,0x1d,0xfa,0x1f,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 }},
+ {{0x4d,0x31,0x91,0x37,0x07,0x72,0xf0,
+   0x58,0x8d,0x57,0x73,0x20,0x00,0x01,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1_H[] =    /* TW: New */
+{
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
+   0x00 }},
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0x82,0x1f,
+   0x60,0x87,0x5D,0x83,0x01,0x00,0x05,
+   0x00}},
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
+   0x00}},
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0x82,0x1f,
+   0x60,0x87,0x5D,0x83,0x01,0x00,0x05,
+   0x00}},
+ {{0x4b,0x27,0x8f,0x2b,0x1c,0x04,0x3e,
+   0xE2,0x89,0xDf,0x05,0x00,0x00,0x05,
+   0x00}},
+ {{0x55,0x31,0x99,0x35,0x06,0x7c,0xf0,
+   0x5A,0x81,0x57,0x7D,0x00,0x00,0x01,
+   0x01}},
+ {{0x63,0x3F,0x87,0x43,0x94,0x24,0xf5,
+   0x02,0x89,0xFf,0x25,0x10,0x00,0x01,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1_H[] =   /* TW: New */
+{
+ {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0xb8,0x1f,
+   0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
+   0x00 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x86,0x1f,
+   0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
+   0x01 }},
+ {{0x56,0x27,0x9a,0x2e,0x1c,0x08,0x3e,
+   0xe0,0x84,0xdf,0x09,0x00,0x00,0x05,
+   0x00 }},
+ {{0x60,0x31,0x84,0x38,0x86,0x80,0xf0,
+   0x58,0x8c,0x57,0x81,0x20,0x00,0x01,
+   0x01 }},
+ {{0x6e,0x3f,0x92,0x46,0x94,0x28,0xf5,
+   0x00,0x84,0xff,0x29,0x10,0x00,0x01,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2[]=   /* TW: New */
+{
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xff,0x84,0x8f,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xe6,0x8b,0x5d,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xff,0x84,0x8f,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xe6,0x8b,0x5d,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
+   0x27,0x8c,0xdf,0x73,0x00,0x00,0x06,
+   0x00 }},
+ {{0x7f,0x63,0x83,0x69,0x19,0x72,0xf0,
+   0x58,0x8d,0x57,0x73,0x20,0x00,0x06,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2[] =   /* TW: New */
+{ 
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x57,0x8e,0x8f,0x25,0x30,0x00,0x06,
+   0x00 }},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x3e,0x85,0x5d,0x25,0x10,0x00,0x06,
+   0x00 }},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x57,0x8e,0x8f,0x25,0x30,0x00,0x06,
+   0x00 }},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x3e,0x85,0x5d,0x25,0x10,0x00,0x06,
+   0x01 }},
+ {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x7f,0x86,0xdf,0x25,0x10,0x00,0x06,
+   0x00 }},
+ {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xbb,0x82,0x57,0x25,0x10,0x00,0x02,
+   0x01 }},
+ {{0xa3,0x7f,0x87,0x83,0x94,0x24,0xf5,
+   0x02,0x89,0xff,0x25,0x10,0x00,0x02,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2[] =  /* TW: New */
+{
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x4f,0x92,0x81,0x0f,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x03,
+   0x00 }},
+ {{0xce,0x63,0x92,0x8b,0x19,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x03,
+   0x01 }},
+ {{0xce,0x7f,0x92,0x99,0x07,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x07,
+   0x01 }},
+ {{0xce,0x9f,0x92,0xa6,0x14,0x28,0x5a,
+   0x00,0x84,0xff,0x29,0x09,0x00,0x07,
+   0x01}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2_H[] =   /* TW: New */
+{ 
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
+   0xff,0x84,0x8f,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
+   0xd6,0x8b,0x5d,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
+   0xff,0x84,0x8f,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
+   0xd6,0x8b,0x5d,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0xba,
+   0x27,0x8c,0xdf,0x73,0x00,0x00,0x01,
+   0x00 }},
+ {{0x4d,0x31,0x91,0x3a,0x0a,0x72,0xf0,
+   0x63,0x88,0x57,0x73,0x00,0x00,0x01,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2_H[] =   /* TW: New */
+{ 
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x57,0x8e,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x3e,0x85,0x5d,0x25,0x10,0x00,0x01,
+   0x00 }},
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x57,0x8e,0x8f,0x25,0x30,0x00,0x01,
+   0x00 }},
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x3e,0x85,0x5d,0x25,0x10,0x00,0x01,
+   0x00 }},
+ {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
+   0x7f,0x86,0xdf,0x25,0x10,0x00,0x01,
+   0x00 }},
+ {{0x71,0x31,0x95,0x46,0x97,0x24,0xf1,
+   0xbb,0x82,0x57,0x25,0x10,0x00,0x01,
+   0x01 }},
+ {{0x63,0x3f,0x87,0x46,0x97,0x24,0xf5,
+   0x0f,0x86,0xff,0x25,0x30,0x00,0x01,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2_H[] =   /* TW: New */
+{
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0xa6,0x27,0x8a,0x59,0x87,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x06,
+   0x00 }},
+ {{0x9c,0x31,0x80,0x59,0x87,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
+   0x01 }},
+ {{0x8e,0x3f,0x92,0x79,0x07,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x06,
+   0x01}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1XXXxXXX_1[] =   /* TW: New */
+{
+ {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
+   0x00}},
+ {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
+   0xe9,0x8b,0xe7,0x04,0x00,0x00,0x05,
+   0x00}},
+ {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01}},
+ {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+   0x01}},
+ {{0xce,0x9f,0x92,0xa9,0x17,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x07,
+   0x01}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1XXXxXXX_1_H[] =   /* TW: New */
+{
+ {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
+   0x00}},
+ {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
+   0x00}},
+ {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
+   0x00}},
+ {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
+   0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
+   0x00}},
+ {{0x38,0x27,0x9c,0x2c,0x80,0x0b,0x3e,
+   0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
+   0x00}},
+ {{0x4d,0x31,0x91,0x3b,0x03,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x01,
+   0x01}},
+ {{0x63,0x3f,0x87,0x4a,0x92,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+   0x01}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_1[] =   /* TW: New */
+{
+ {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0xee,0x1f,
+   0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x83,0x63,0x87,0x68,0x16,0x66,0xf0,
+   0x5a,0x8e,0x57,0x67,0x20,0x00,0x06,
+   0x01}},
+ {{0x9f,0x7f,0x83,0x84,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0x0f,0x10,0x00,0x02,
+   0x01}},
+ {{0xbf,0x9f,0x83,0xa4,0x12,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x07,
+   0x01}},
+ {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10,
+   0x1a,0x80,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_1_H[] =   /* TW: New */
+{
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
+   0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
+   0x92,0x86,0x8f,0x9f,0x30,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
+   0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
+   0x00}},
+ {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
+   0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
+   0x00}},
+ {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0,
+   0x5a,0x8e,0x57,0x67,0x20,0x00,0x01,
+   0x01}},
+ {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf5,
+   0x02,0x86,0xff,0x0f,0x10,0x00,0x01,
+   0x01}},
+ {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
+   0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
+   0x01}},
+ {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10,
+   0x1c,0x80,0x19,0x29,0x0b,0x00,0x05,
+   0x00}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_2[] =    /* TW: New */
+{
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x01}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
+   0x00}},
+ {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x03,
+   0x00}},
+ {{0xce,0x63,0x92,0x96,0x04,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x07,
+   0x01}},
+ {{0xce,0x7f,0x92,0xa4,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x07,
+   0x01}},
+ {{0xce,0x9f,0x92,0xb4,0x02,0x28,0x5a,
+   0x13,0x87,0xff,0x29,0x29,0x00,0x03,
+   0x01}},
+ {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10,
+   0x20,0x84,0x19,0x29,0x0f,0x00,0x03,
+   0x00}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11400x1050_2_H[] =    /* TW: New */
+{
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
+   0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9e,
+   0x03,0x87,0xdf,0x29,0x01,0x00,0x06,
+   0x00}},
+ {{0x9c,0x31,0x80,0x64,0x92,0x28,0xd4,
+   0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
+   0x01}},
+ {{0x8e,0x3f,0x92,0x64,0x12,0x28,0xd4,
+   0x93,0x87,0xff,0x29,0x21,0x00,0x06,
+   0x01}},
+ {{0x7e,0x4f,0x82,0x64,0x12,0x28,0x5a,
+   0x13,0x87,0xff,0x29,0x29,0x00,0x06,
+   0x01}},
+ {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10,
+   0x20,0x84,0x19,0x29,0x0f,0x00,0x05,
+   0x00}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_1[] =
+{
+        {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
+	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
 	  0x00}},
-	{{0x73, 0x4f, 0x97, 0x55, 0x86, 0x97, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x05,
+        {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
+	  0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
 	  0x00}},
-	{{0x73, 0x4f, 0x97, 0x55, 0x86, 0xc4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x05,
+        {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
+	  0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
 	  0x00}},
-	{{0x73, 0x4f, 0x97, 0x55, 0x86, 0x97, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x05,
+        {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
+	  0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
 	  0x00}},
-	{{0x73, 0x4f, 0x97, 0x55, 0x86, 0x04, 0x3e,
-	  0xE2, 0x89, 0xDf, 0x05, 0x00, 0x00, 0x05,
+        {{0x64,0x4f,0x88,0x54,0x9f,0xaf,0xba,
+	  0x3b,0x82,0xdf,0xb0,0x00,0x00,0x01,
 	  0x00}},
-	{{0x87, 0x63, 0x8B, 0x69, 0x1A, 0x7c, 0xf0,
-	  0x5A, 0x8F, 0x57, 0x7D, 0x20, 0x00, 0x26,
+        {{0x7e,0x63,0x82,0x68,0x15,0x1e,0xf1,
+	  0xae,0x85,0x57,0x1f,0x30,0x00,0x26,
 	  0x01}},
-	{{0xA3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xFf, 0x25, 0x10, 0x00, 0x02,
+        {{0xa3,0x7f,0x87,0x86,0x97,0x1e,0xf1,
+	  0xae,0x85,0x57,0x1f,0x30,0x00,0x02,
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1[] = {
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0xb4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x01,
-	  0x00}},
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x82, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x01,
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_1_H[] =
+{
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
 	  0x00}},
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0xb4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x01,
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
+          0x00}},
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
 	  0x00}},
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x82, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x01,
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
 	  0x00}},
-	{{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x04, 0x3e,
-	  0xe2, 0x89, 0xdf, 0x05, 0x00, 0x00, 0x01,
+        {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
 	  0x00}},
-	{{0x7e, 0x63, 0x82, 0x68, 0x15, 0x7c, 0xf0,
-	  0x5a, 0x8f, 0x57, 0x7d, 0x20, 0x00, 0x26,
+        {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
 	  0x01}},
-	{{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1_H[] = {
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0xaf, 0x1f,
-	  0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x04,
-	  0x00}},
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0x83, 0x1f,
-	  0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x04,
-	  0x00}},
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0xaf, 0x1f,
-	  0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x04,
-	  0x00}},
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0x83, 0x1f,
-	  0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x04,
-	  0x00}},
-	{{0x30, 0x27, 0x94, 0x2c, 0x92, 0x04, 0x3e,
-	  0xe0, 0x85, 0xdf, 0xfb, 0x10, 0x00, 0x04,
-	  0x00}},
-	{{0x3d, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x05,
-	  0x01}}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1_H[] = {
-	{{0x37, 0x27, 0x9B, 0x2b, 0x94, 0xc4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x44,
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_2[] =
+{
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x37, 0x27, 0x9B, 0x2b, 0x94, 0x97, 0x1f,
-	  0x60, 0x87, 0x5D, 0x83, 0x01, 0x00, 0x44,
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x37, 0x27, 0x9B, 0x2b, 0x94, 0xc4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x44,
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x37, 0x27, 0x9B, 0x2b, 0x94, 0x97, 0x1f,
-	  0x60, 0x87, 0x5D, 0x83, 0x01, 0x00, 0x44,
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+          0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x37, 0x27, 0x9B, 0x2b, 0x94, 0x04, 0x3e,
-	  0xE2, 0x89, 0xDf, 0x05, 0x00, 0x00, 0x44,
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x41, 0x31, 0x85, 0x35, 0x1d, 0x7c, 0xf0,
-	  0x5A, 0x8F, 0x57, 0x7D, 0x20, 0x00, 0x55,
+        {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
 	  0x01}},
-	{{0x4f, 0x3F, 0x93, 0x45, 0x0D, 0x24, 0xf5,
-	  0x02, 0x88, 0xFf, 0x25, 0x10, 0x00, 0x01,
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1_H[] = {
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0xb4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x04,
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x600_2_H[] =
+{
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x82, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x04,
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0xb4, 0x1f,
-	  0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x04,
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x82, 0x1f,
-	  0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x04,
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x04, 0x3e,
-	  0xe2, 0x89, 0xdf, 0x05, 0x00, 0x00, 0x04,
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x3c, 0x31, 0x80, 0x35, 0x1c, 0x7c, 0xf0,
-	  0x5a, 0x8f, 0x57, 0x7d, 0x20, 0x00, 0x55,
+        {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
 	  0x01}},
-	{{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
-	  0x01}}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2[] = {
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-	  0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-	  0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-	  0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-	  0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0xba,
-	  0x1c, 0x80, 0xdf, 0x73, 0x00, 0x00, 0x06,
-	  0x00}},
-	{{0x7f, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x06,
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2[] = {
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_1[] =
+{
+        {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
 	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
+        {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
 	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
+        {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
 	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
+        {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
 	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x06,
+        {{0x64,0x4f,0x88,0x54,0x9f,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
 	  0x00}},
-	{{0xa3, 0x63, 0x87, 0x78, 0x89, 0x24, 0xf1,
-	  0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x02,
+        {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
 	  0x01}},
-	{{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2[] = {
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_1_H[] =
+{
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
 	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
 	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
+        {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
+	  0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
 	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
+        {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
+	  0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
 	  0x00}},
-	{{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-	  0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x06,
+        {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+	  0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
 	  0x00}},
-	{{0xa3, 0x63, 0x87, 0x78, 0x89, 0x24, 0xf1,
-	  0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x02,
+        {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+	  0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
 	  0x01}},
-	{{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2_H[] = {
-	{{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
-	  0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
-	  0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
-	  0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x27, 0x81, 0x3a, 0x1a, 0x72, 0x3e,
-	  0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0xba,
-	  0x1c, 0x80, 0xdf, 0x73, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x3d, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
-	  0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x05,
-	  0x01}}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2_H[] = {
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_2[] =
+{
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-	  0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x01,
+        {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
 	  0x00}},
-	{{0x4f, 0x31, 0x93, 0x3e, 0x06, 0x24, 0xf1,
-	  0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x01,
+        {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x02,
 	  0x01}},
-	{{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
+        {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x02,
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2_H[] = {
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11152x768_2_H[] =
+{
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-	  0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x01,
+        {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+	  0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
 	  0x00}},
-	{{0x4f, 0x31, 0x93, 0x3e, 0x86, 0x24, 0xf1,
-	  0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x01,
+        {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+	  0xae,0x84,0x57,0x25,0x30,0x00,0x01,
 	  0x01}},
-	{{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	  0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
-	  0x01}}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1UNTSC[] = {
-	{{0x64, 0x4f, 0x88, 0x56, 0x9f, 0x56, 0x3e,
-	  0xe8, 0x84, 0x8f, 0x57, 0x20, 0x00, 0x01,
-	  0x00}},
-	{{0x64, 0x4f, 0x88, 0x56, 0x9f, 0x56, 0x3e,
-	  0xd0, 0x82, 0x5d, 0x57, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x64, 0x4f, 0x88, 0x56, 0x9f, 0x56, 0x3e,
-	  0xe8, 0x84, 0x8f, 0x57, 0x20, 0x00, 0x01,
-	  0x00}},
-	{{0x64, 0x4f, 0x88, 0x56, 0x9f, 0x56, 0x3e,
-	  0xd0, 0x82, 0x5d, 0x57, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x5d, 0x4f, 0x81, 0x53, 0x9c, 0x56, 0xba,
-	  0x18, 0x84, 0xdf, 0x57, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x80, 0x63, 0x84, 0x6c, 0x17, 0xec, 0xf0,
-	  0x90, 0x8c, 0x57, 0xed, 0x20, 0x00, 0x06,
+        {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+	  0x02,0x88,0xff,0x25,0x10,0x00,0x01,
 	  0x01}}
 };
 
-SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1ONTSC[] = {
-	{{0x64, 0x4f, 0x88, 0x5a, 0x9f, 0x0b, 0x3e,
-	  0xc0, 0x84, 0x8f, 0x0c, 0x20, 0x00, 0x01,
-	  0x00}},
-	{{0x64, 0x4f, 0x88, 0x5a, 0x9f, 0x0b, 0x3e,
-	  0xb0, 0x8d, 0x5d, 0x0c, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x64, 0x4f, 0x88, 0x5a, 0x9f, 0x0b, 0x3e,
-	  0xc0, 0x84, 0x8f, 0x0c, 0x20, 0x00, 0x01,
-	  0x00}},
-	{{0x64, 0x4f, 0x88, 0x5a, 0x9f, 0x0b, 0x3e,
-	  0xb0, 0x8d, 0x5d, 0x0c, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x5d, 0x4f, 0x81, 0x56, 0x9c, 0x0b, 0x3e,
-	  0xe8, 0x84, 0xdf, 0x0c, 0x00, 0x00, 0x01,
-	  0x00}},
-	{{0x7d, 0x63, 0x81, 0x6a, 0x16, 0xba, 0xf0,
-	  0x7f, 0x86, 0x57, 0xbb, 0x00, 0x00, 0x06,
-	  0x01}}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1UPAL[] = {
-	{{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-	  0xf8, 0x83, 0x8f, 0x70, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-	  0xde, 0x81, 0x5d, 0x70, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-	  0xf8, 0x83, 0x8f, 0x70, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-	  0xde, 0x81, 0x5d, 0x70, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x64, 0x4f, 0x88, 0x55, 0x80, 0xec, 0xba,
-	  0x50, 0x84, 0xdf, 0xed, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x70, 0x63, 0x94, 0x68, 0x8d, 0x42, 0xf1,
-	  0xc8, 0x8c, 0x57, 0xe9, 0x20, 0x00, 0x05,
-	  0x01}}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1OPAL[] = {
-	{{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-	  0xf0, 0x83, 0x8f, 0x70, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-	  0xde, 0x81, 0x5d, 0x70, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-	  0xf0, 0x83, 0x8f, 0x70, 0x20, 0x00, 0x05,
-	  0x00}},
-	{{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-	  0xde, 0x81, 0x5d, 0x70, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x64, 0x4f, 0x88, 0x55, 0x80, 0x6f, 0xba,
-	  0x20, 0x83, 0xdf, 0x70, 0x00, 0x00, 0x05,
-	  0x00}},
-	{{0x73, 0x63, 0x97, 0x69, 0x8e, 0xec, 0xf0,
-	  0x90, 0x8c, 0x57, 0xed, 0x20, 0x00, 0x05,
-	  0x01}}
-};
-
-typedef struct _SiS310_CHTVRegDataStruct {
-	UCHAR Reg[5];
+SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UNTSC[] =    /* TW: New */
+{ 
+ {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+   0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+   0x00 }},
+ {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+   0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+   0x00 }},
+ {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+   0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+   0x00 }},
+ {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+   0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+   0x00 }},
+ {{0x5d,0x4f,0x81,0x56,0x99,0x56,0xba,
+   0x0a,0x84,0xdf,0x57,0x00,0x00,0x01,
+   0x00 }},
+ {{0x80,0x63,0x84,0x6d,0x0f,0xec,0xf0,
+   0x7a,0x8f,0x57,0xed,0x20,0x00,0x06,
+   0x01 }},
+ {{0x8c,0x7f,0x90,0x86,0x09,0xaf,0xf5,  /* TW: 1024x768 */
+   0x36,0x88,0xff,0xb0,0x10,0x00,0x02,
+   0x01}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1ONTSC[] =    /* TW: New */
+{ 
+ {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+   0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+   0x00 }},
+ {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+   0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+   0x00 }},
+ {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+   0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+   0x00 }},
+ {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
+   0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+   0x00 }},
+ {{0x5d,0x4f,0x81,0x58,0x9d,0x0b,0x3e,
+   0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,
+   0x00 }},
+ {{0x7d,0x63,0x81,0x68,0x0e,0xba,0xf0,
+   0x78,0x8a,0x57,0xbb,0x20,0x00,0x06,
+   0x01 }},
+ {{0x8c,0x7f,0x90,0x82,0x06,0x46,0xf5,   /* TW: 1024x768 */
+   0x15,0x88,0xff,0x47,0x70,0x00,0x02,
+   0x01 }}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UPAL[] =    /* TW: New */
+{ 
+ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+   0x00 }},
+ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+   0x00 }},
+ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+   0x00 }},
+ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+   0x00 }},
+ {{0x64,0x4f,0x88,0x5a,0x9f,0x6f,0xba,
+   0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
+   0x00 }},
+ {{0x73,0x63,0x97,0x69,0x8b,0xec,0xf0,
+   0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
+   0x01 }},
+ {{0xaa,0x7f,0x8e,0x8e,0x96,0xe6,0xf5,   /* TW: 1024x768 */
+   0x50,0x88,0xff,0xe7,0x10,0x00,0x02,
+   0x01}}
+};
+
+SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1OPAL[] =    /* TW: New */
+{ 
+ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+   0x00 }},
+ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+   0x00 }},
+ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+   0x00 }},
+ {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+   0x00 }},
+ {{0x64,0x4f,0x88,0x58,0x9d,0x6f,0xba,
+   0x15,0x83,0xdf,0x70,0x00,0x00,0x01,
+   0x00 }},
+ {{0x71,0x63,0x95,0x69,0x8c,0x6f,0xf0,
+   0x5a,0x8b,0x57,0x70,0x20,0x00,0x05,
+   0x01 }},
+ {{0xaa,0x7f,0x8e,0x8f,0x96,0x69,0xf5,   /* TW:  1024x768 */
+   0x28,0x88,0xff,0x6a,0x10,0x00,0x02,
+   0x01 }}
+};
+
+/* TW: New data for Chrontel 7019 (From 650/LVDS BIOS 1.10.0) */
+typedef struct _SiS310_CHTVRegDataStruct
+{
+ 	UCHAR Reg[16];
 } SiS310_CHTVRegDataStruct;
+
 SiS310_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] = {
-	{{0x00}}
+	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x6a,0x77,0xbb,0x6e,0x84,0x2e,0x02,0x5a,0x04,0x00,0x80,0x20,0x7e,0x80,0x98,0x00}},
+	{{0xcf,0x77,0xb7,0xc8,0x84,0x3b,0x02,0x5a,0x04,0x00,0x80,0x19,0x88,0x30,0x7f,0x00}},
+	{{0xee,0x77,0xbb,0x66,0x87,0x32,0x01,0x5a,0x04,0x00,0x80,0x1b,0xd3,0xf2,0x36,0x00}}
 };
 
 SiS310_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] = {
-	{{0x00}}
+	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x69,0x77,0xbb,0x6e,0x84,0x1e,0x00,0x5a,0x04,0x00,0x80,0x25,0x1a,0x43,0x04,0x00}},
+	{{0xce,0x77,0xb7,0xb6,0x83,0x2c,0x02,0x5a,0x04,0x00,0x80,0x1c,0x00,0x82,0x97,0x00}},
+	{{0xed,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x9f,0xc1,0x0c,0x00}}
 };
 
 SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] = {
-	{{0x00}}
+	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x12,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x26,0x2a,0x55,0x5d,0x00}},
+	{{0xc3,0x7f,0xb7,0x7a,0x84,0x40,0x02,0x5a,0x05,0x00,0x80,0x1f,0x84,0x3d,0x28,0x00}},
+	{{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x20,0x3e,0xe4,0x22,0x00}}
 };
 
 SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] = {
-	{{0x00}}
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
+	{{0x61,0x7f,0xb7,0x99,0x84,0x35,0x04,0x5a,0x05,0x00,0x80,0x26,0x2a,0x55,0x5d,0x00}},
+	{{0xc1,0x7f,0xb7,0x4d,0x8c,0x1e,0x31,0x5a,0x05,0x00,0x80,0x26,0x78,0x19,0x34,0x00}},
+	{{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}}
 };
 
-UCHAR SiS310_CHTVVCLKUNTSC[] = { 0x00 };
+UCHAR SiS310_CHTVVCLKUNTSC[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53};
 
-UCHAR SiS310_CHTVVCLKONTSC[] = { 0x00 };
+UCHAR SiS310_CHTVVCLKONTSC[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51};
 
-UCHAR SiS310_CHTVVCLKUPAL[] = { 0x00 };
+UCHAR SiS310_CHTVVCLKUPAL[]  = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54};
 
-UCHAR SiS310_CHTVVCLKOPAL[] = { 0x00 };
+UCHAR SiS310_CHTVVCLKOPAL[]  = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52};
+/* TW: New end */
diff --git a/drivers/video/sis/325vtbl.h b/drivers/video/sis/325vtbl.h
index 16a1e597b093..237668212253 100644
--- a/drivers/video/sis/325vtbl.h
+++ b/drivers/video/sis/325vtbl.h
@@ -1,4 +1,5 @@
-typedef struct _SiS310_StStruct {
+typedef struct _SiS310_StStruct
+{
 	UCHAR St_ModeID;
 	USHORT St_ModeFlag;
 	UCHAR St_StTableIndex;
@@ -8,31 +9,32 @@ typedef struct _SiS310_StStruct {
 	UCHAR VB_StTVEdgeIndex;
 	UCHAR VB_StTVYFilterIndex;
 } SiS310_StStruct;
-SiS310_StStruct SiS310_SModeIDTable[] =
-{ 
-	{0x01, 0x9208, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00},
-	{0x01, 0x1210, 0x14, 0x01, 0x01, 0x00, 0x01, 0x00},
-	{0x01, 0x1010, 0x17, 0x02, 0x02, 0x00, 0x01, 0x01},
-	{0x03, 0x8208, 0x03, 0x00, 0x00, 0x00, 0x01, 0x02},
-	{0x03, 0x0210, 0x16, 0x01, 0x01, 0x00, 0x01, 0x02},
-	{0x03, 0x0010, 0x18, 0x02, 0x02, 0x00, 0x01, 0x03},
-	{0x05, 0x9209, 0x05, 0x00, 0x00, 0x00, 0x00, 0x04},
-	{0x06, 0x8209, 0x06, 0x00, 0x00, 0x00, 0x00, 0x05},
-	{0x07, 0x0000, 0x07, 0x03, 0x03, 0x00, 0x01, 0x03},
-	{0x07, 0x0000, 0x19, 0x02, 0x02, 0x00, 0x01, 0x03},
-	{0x0d, 0x920a, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x04},
-	{0x0e, 0x820a, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x05},
-	{0x0f, 0x0202, 0x11, 0x01, 0x01, 0x00, 0x00, 0x05},
-	{0x10, 0x0212, 0x12, 0x01, 0x01, 0x00, 0x00, 0x05},
-	{0x11, 0x0212, 0x1a, 0x04, 0x04, 0x00, 0x00, 0x05},
-	{0x12, 0x0212, 0x1b, 0x04, 0x04, 0x00, 0x00, 0x05},
-	{0x13, 0x021b, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x04},
-	{0x12, 0x0010, 0x18, 0x02, 0x02, 0x00, 0x00, 0x05},
-	{0x12, 0x0210, 0x18, 0x01, 0x01, 0x00, 0x00, 0x05},
-	{0xff, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
-};
-
-typedef struct _SiS310_StandTableStruct {
+SiS310_StStruct SiS310_SModeIDTable[]=
+{
+	{0x01,0x9208,0x01,0x00,0x00,0x00,0x01,0x00},
+	{0x01,0x1210,0x14,0x01,0x01,0x00,0x01,0x00},
+	{0x01,0x1010,0x17,0x02,0x02,0x00,0x01,0x01},
+	{0x03,0x8208,0x03,0x00,0x00,0x00,0x01,0x02},
+	{0x03,0x0210,0x16,0x01,0x01,0x00,0x01,0x02},
+	{0x03,0x0010,0x18,0x02,0x02,0x00,0x01,0x03},
+	{0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x04},
+	{0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x05},
+	{0x07,0x0000,0x07,0x03,0x03,0x00,0x01,0x03},
+	{0x07,0x0000,0x19,0x02,0x02,0x00,0x01,0x03},
+	{0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x04},
+	{0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x05},
+	{0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x05},
+	{0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x05},
+	{0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x05},
+	{0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x05},
+	{0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x04},
+	{0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x05},
+	{0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x05},
+	{0xff,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+typedef struct _SiS310_StandTableStruct
+{
 	UCHAR CRT_COLS;
 	UCHAR ROWS;
 	UCHAR CHAR_HEIGHT;
@@ -44,444 +46,446 @@ typedef struct _SiS310_StandTableStruct {
 	UCHAR GRC[9];
 } SiS310_StandTableStruct;
 
-SiS310_StandTableStruct SiS310_StandTable[] = {
+SiS310_StandTableStruct SiS310_StandTable[]=
+{
 /* MD_0_200 */
-	{
-	 0x28, 0x18, 0x08, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_1_200 */
-	{
-	 0x28, 0x18, 0x08, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_2_200 */
-	{
-	 0x50, 0x18, 0x08, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x08,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_3_200 */
-	{
-	 0x50, 0x18, 0x08, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc7, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x08,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_4 */
-	{
-	 0x28, 0x18, 0x08, 0x4000,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
-	  0xff},
-	 {0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x03, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x4000,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff}
+ },
 /* MD_5 */
-	{
-	 0x28, 0x18, 0x08, 0x4000,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
-	  0xff},
-	 {0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x03, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x4000,
+  {0x09,0x03,0x00,0x02},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2,
+   0xff},
+  {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x03,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00,
+   0xff}
+ },
 /* MD_6 */
-	{
-	 0x50, 0x18, 0x08, 0x4000,
-	 {0x01, 0x01, 0x00, 0x06},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2,
-	  0xff},
-	 {0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
-	  0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
-	  0x01, 0x00, 0x01, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x08,0x4000,
+  {0x01,0x01,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xc2,
+   0xff},
+  {0x00,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17,
+   0x01,0x00,0x01,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,
+   0xff}
+ },
 /* MD_7 */
-	{
-	 0x50, 0x18, 0x0e, 0x1000,
-	 {0x00, 0x03, 0x00, 0x03},
-	 0xa6,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x0d, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
-	  0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-	  0x0e, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x00,0x03,0x00,0x03},
+  0xa6,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x0d,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff}
+ },
 /* MDA_DAC */
-	{
-	 0x00, 0x00, 0x00, 0x0000,
-	 {0x00, 0x00, 0x00, 0x15},
-	 0x15,
-	 {0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x3f, 0x3f,
-	  0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x00, 0x00,
-	  0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	  0x15, 0x15, 0x15, 0x15},
-	 {0x15, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x3f}
-	 },
+ {
+  0x00,0x00,0x00,0x0000,
+  {0x00,0x00,0x00,0x15},
+  0x15,
+  {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x00,0x00,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+   0x15,0x15,0x15,0x15},
+  {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f}
+ },
 /* CGA_DAC */
-	{
-	 0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x09, 0x15, 0x00},
-	 0x10,
-	 {0x04, 0x14, 0x01, 0x11, 0x09, 0x15, 0x2a, 0x3a,
-	  0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x2a, 0x3a,
-	  0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x00, 0x10,
-	  0x04},
-	 {0x14, 0x01, 0x11, 0x09, 0x15, 0x00, 0x10, 0x04,
-	  0x14, 0x01, 0x11, 0x09, 0x15, 0x2a, 0x3a, 0x2e,
-	  0x3e, 0x2b, 0x3b, 0x2f},
-	 {0x3f, 0x2a, 0x3a, 0x2e, 0x3e, 0x2b, 0x3b, 0x2f,
-	  0x3f}
-	 },
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x09,0x15,0x00},
+  0x10,
+  {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x2a,0x3a,
+   0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x10,
+   0x04},
+  {0x14,0x01,0x11,0x09,0x15,0x00,0x10,0x04,
+   0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,0x2e,
+   0x3e,0x2b,0x3b,0x2f},
+  {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f}
+ },
 /* EGA_DAC */
-	{
-	 0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x05, 0x15, 0x20},
-	 0x30,
-	 {0x24, 0x34, 0x21, 0x31, 0x25, 0x35, 0x08, 0x18,
-	  0x0c, 0x1c, 0x09, 0x19, 0x0d, 0x1d, 0x28, 0x38,
-	  0x2c, 0x3c, 0x29, 0x39, 0x2d, 0x3d, 0x02, 0x12,
-	  0x06},
-	 {0x16, 0x03, 0x13, 0x07, 0x17, 0x22, 0x32, 0x26,
-	  0x36, 0x23, 0x33, 0x27, 0x37, 0x0a, 0x1a, 0x0e,
-	  0x1e, 0x0b, 0x1b, 0x0f},
-	 {0x1f, 0x2a, 0x3a, 0x2e, 0x3e, 0x2b, 0x3b, 0x2f,
-	  0x3f}
-	 },
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x05,0x15,0x20},
+  0x30,
+  {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18,
+   0x0c,0x1c,0x09,0x19,0x0d,0x1d,0x28,0x38,
+   0x2c,0x3c,0x29,0x39,0x2d,0x3d,0x02,0x12,
+   0x06},
+  {0x16,0x03,0x13,0x07,0x17,0x22,0x32,0x26,
+   0x36,0x23,0x33,0x27,0x37,0x0a,0x1a,0x0e,
+   0x1e,0x0b,0x1b,0x0f},
+  {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f,
+   0x3f}
+ },
 /* VGA_DAC */
-	{
-	 0x00, 0x10, 0x04, 0x0114,
-	 {0x11, 0x09, 0x15, 0x2a},
-	 0x3a,
-	 {0x2e, 0x3e, 0x2b, 0x3b, 0x2f, 0x3f, 0x00, 0x05,
-	  0x08, 0x0b, 0x0e, 0x11, 0x14, 0x18, 0x1c, 0x20,
-	  0x24, 0x28, 0x2d, 0x32, 0x38, 0x3f, 0x00, 0x10,
-	  0x1f},
-	 {0x2f, 0x3f, 0x1f, 0x27, 0x2f, 0x37, 0x3f, 0x2d,
-	  0x31, 0x36, 0x3a, 0x3f, 0x00, 0x07, 0x0e, 0x15,
-	  0x1c, 0x0e, 0x11, 0x15},
-	 {0x18, 0x1c, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x00,
-	  0x04}
-	 },
-	{
-	 0x08, 0x0c, 0x10, 0x0a08,
-	 {0x0c, 0x0e, 0x10, 0x0b},
-	 0x0c,
-	 {0x0d, 0x0f, 0x10, 0x10, 0x01, 0x08, 0x00, 0x00,
-	  0x00, 0x00, 0x01, 0x00, 0x02, 0x02, 0x01, 0x00,
-	  0x04, 0x04, 0x01, 0x00, 0x05, 0x02, 0x05, 0x00,
-	  0x06},
-	 {0x01, 0x06, 0x05, 0x06, 0x00, 0x08, 0x01, 0x08,
-	  0x00, 0x07, 0x02, 0x07, 0x06, 0x07, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00}
-	 },
+ {
+  0x00,0x10,0x04,0x0114,
+  {0x11,0x09,0x15,0x2a},
+  0x3a,
+  {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05,
+   0x08,0x0b,0x0e,0x11,0x14,0x18,0x1c,0x20,
+   0x24,0x28,0x2d,0x32,0x38,0x3f,0x00,0x10,
+   0x1f},
+  {0x2f,0x3f,0x1f,0x27,0x2f,0x37,0x3f,0x2d,
+   0x31,0x36,0x3a,0x3f,0x00,0x07,0x0e,0x15,
+   0x1c,0x0e,0x11,0x15},
+  {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00,
+   0x04}
+ },
+ {
+  0x08,0x0c,0x10,0x0a08,
+  {0x0c,0x0e,0x10,0x0b},
+  0x0c,
+  {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00,
+   0x00,0x00,0x01,0x00,0x02,0x02,0x01,0x00,
+   0x04,0x04,0x01,0x00,0x05,0x02,0x05,0x00,
+   0x06},
+  {0x01,0x06,0x05,0x06,0x00,0x08,0x01,0x08,
+   0x00,0x07,0x02,0x07,0x06,0x07,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}
+ },
 /* MD_D */
-	{
-	 0x28, 0x18, 0x08, 0x2000,
-	 {0x09, 0x0f, 0x00, 0x06},
-	 0x63,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x08,0x2000,
+  {0x09,0x0f,0x00,0x06},
+  0x63,
+  {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
 /* MD_E */
-	{
-	 0x50, 0x18, 0x08, 0x4000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x08,0x4000,
+  {0x01,0x0f,0x00,0x06},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
 /* ExtVGATable */
-	{
-	 0x00, 0x00, 0x00, 0x0000,
-	 {0x01, 0x0f, 0x00, 0x0e},
-	 0x23,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-	  0x01, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x00,0x00,0x00,0x0000,
+  {0x01,0x0f,0x00,0x0e},
+  0x23,
+  {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x01,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff}
+ },
 /* ROM_SAVEPTR */
-	{
-	 0x9f, 0x3b, 0x00, 0x00c0,
-	 {0x00, 0x00, 0x00, 0x00},
-	 0x00,
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbb, 0x3f,
-	  0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x1a, 0x00, 0xac, 0x3e, 0x00, 0xc0,
-	  0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00, 0x00, 0x00, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x00}
-	 },
+ {
+  0x9f,0x3b,0x00,0x00c0,
+  {0x00,0x00,0x00,0x00},
+  0x00,
+  {0x00,0x00,0x00,0x00,0x00,0x00,0xbb,0x3f,
+   0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x1a,0x00,0xac,0x3e,0x00,0xc0,
+   0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00,0x00,0x00,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x00}
+ },
 /* MD_F */
-	{
-	 0x50, 0x18, 0x0e, 0x8000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xa2,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x82, 0x84, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
-	  0xff},
-	 {0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
-	  0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
-	  0x0b, 0x00, 0x05, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x8000,
+  {0x01,0x0f,0x00,0x06},
+  0xa2,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,
+   0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,
+   0x0b,0x00,0x05,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,
+   0xff}
+ },
 /* MD_10 */
-	{
-	 0x50, 0x18, 0x0e, 0x8000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x82, 0x84, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x8000,
+  {0x01,0x0f,0x00,0x06},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
 /* MD_0_350 */
-	{
-	 0x28, 0x18, 0x0e, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xb1, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x14, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x0e,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_1_350 */
-	{
-	 0x28, 0x18, 0x0e, 0x0800,
-	 {0x09, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x14, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x0e,0x0800,
+  {0x09,0x03,0x00,0x02},
+  0xa3,
+  {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_2_350 */
-	{
-	 0x50, 0x18, 0x0e, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_3_350 */
-	{
-	 0x50, 0x18, 0x0e, 0x1000,
-	 {0x01, 0x03, 0x00, 0x02},
-	 0xa3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	  0x83, 0x85, 0x5d, 0x28, 0x1f, 0x63, 0xba, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x08, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x0e,0x1000,
+  {0x01,0x03,0x00,0x02},
+  0xa3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00,
+   0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x08,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_0_1_400 */
-	{
-	 0x28, 0x18, 0x10, 0x0800,
-	 {0x08, 0x03, 0x00, 0x02},
-	 0x67,
-	 {0x2d, 0x27, 0x28, 0x90, 0x2b, 0xb1, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x0c, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x28,0x18,0x10,0x0800,
+  {0x08,0x03,0x00,0x02},
+  0x67,
+  {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_2_3_400 */
-	{
-	 0x50, 0x18, 0x10, 0x1000,
-	 {0x00, 0x03, 0x00, 0x02},
-	 0x67,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x0c, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x10,0x1000,
+  {0x00,0x03,0x00,0x02},
+  0x67,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x0c,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,
+   0xff}
+ },
 /* MD_7_400 */
-	{
-	 0x50, 0x18, 0x10, 0x1000,
-	 {0x00, 0x03, 0x00, 0x02},
-	 0x66,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
-	  0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-	  0x0e, 0x00, 0x0f, 0x08},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x00,
-	  0xff}
-	 },
+ {
+  0x50,0x18,0x10,0x1000,
+  {0x00,0x03,0x00,0x02},
+  0x66,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x0f,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+   0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
+   0x0e,0x00,0x0f,0x08},
+  {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00,
+   0xff}
+ },
 /* MD_11 */
-	{
-	 0x50, 0x1d, 0x10, 0xa000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xe3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xe9, 0x8b, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xc3,
-	  0xff},
-	 {0x00, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x01,
-	  0xff}
-	 },
+ {
+  0x50,0x1d,0x10,0xa000,
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xc3,
+   0xff},
+  {0x00,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01,
+   0xff}
+ },
 /* ExtEGATable */
-	{
-	 0x50, 0x1d, 0x10, 0xa000,
-	 {0x01, 0x0f, 0x00, 0x06},
-	 0xe3,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0x0b, 0x3e,
-	  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0xe9, 0x8b, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
-	  0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-	  0x01, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f,
-	  0xff}
-	 },
+ {
+  0x50,0x1d,0x10,0xa000,
+  {0x01,0x0f,0x00,0x06},
+  0xe3,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+   0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
+   0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,
+   0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,
+   0x01,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,
+   0xff}
+ },
 /* MD_13 */
-	{
-	 0x28, 0x18, 0x08, 0x2000,
-	 {0x01, 0x0f, 0x00, 0x0e},
-	 0x63,
-	 {0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	  0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	  0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3,
-	  0xff},
-	 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	  0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-	  0x41, 0x00, 0x0f, 0x00},
-	 {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f,
-	  0xff}
-	 }
-};
-
-typedef struct _SiS310_ExtStruct {
+ {
+  0x28,0x18,0x08,0x2000,
+  {0x01,0x0f,0x00,0x0e},
+  0x63,
+  {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+   0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,
+   0x9c,0x8e,0x8f,0x28,0x40,0x96,0xb9,0xa3,
+   0xff},
+  {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
+   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,
+   0x41,0x00,0x0f,0x00},
+  {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,
+   0xff}
+ }
+};
+
+typedef struct _SiS310_ExtStruct
+{
 	UCHAR Ext_ModeID;
 	USHORT Ext_ModeFlag;
 	USHORT Ext_ModeInfo;
@@ -494,632 +498,599 @@ typedef struct _SiS310_ExtStruct {
 	UCHAR VB_ExtTVYFilterIndex;
 	UCHAR REFindex;
 } SiS310_ExtStruct;
-SiS310_ExtStruct SiS310_EModeIDTable[] = {
-	
-	    {0x6a, 0x2212, 0x0407, 0x3a81, 0x0102, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x2e, 0x0a1b, 0x0306, 0x3a57, 0x0101, 0x08, 0x06, 0x00, 0x00, 0x05,
-	 0x08},
-	{0x2f, 0x0a1b, 0x0305, 0x3a50, 0x0100, 0x08, 0x05, 0x00, 0x00, 0x05,
-	 0x10},
-	{0x30, 0x2a1b, 0x0407, 0x3a81, 0x0103, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x31, 0x0a1b, 0x030d, 0x3b85, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x06,
-	 0x11},
-	{0x32, 0x0a1b, 0x0a0e, 0x3b8c, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x06,
-	 0x12},
-	{0x33, 0x0a1d, 0x0a0d, 0x3b85, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x06,
-	 0x11},
-	{0x34, 0x2a1d, 0x0a0e, 0x3b8c, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x06,
-	 0x12},
-	{0x35, 0x0a1f, 0x0a0d, 0x3b85, 0x0000, 0x08, 0x0d, 0x00, 0x00, 0x06,
-	 0x11},
-	{0x36, 0x2a1f, 0x0a0e, 0x3b8c, 0x0000, 0x08, 0x0e, 0x00, 0x00, 0x06,
-	 0x12},
-	{0x37, 0x0212, 0x0508, 0x3aab, 0x0104, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x38, 0x0a1b, 0x0508, 0x3aab, 0x0105, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x3a, 0x0e3b, 0x0609, 0x3adc, 0x0107, 0x08, 0x09, 0x00, 0x00, 0x00,
-	 0x1a},
-	{0x3c, 0x063b, 0x070a, 0x3af2, 0x0130, 0x08, 0x0a, 0x00, 0x00, 0x00,
-	 0x1e},
-	{0x3d, 0x067d, 0x070a, 0x3af2, 0x0131, 0x08, 0x0a, 0x00, 0x00, 0x00,
-	 0x1e},
-	{0x40, 0x9a1c, 0x0000, 0x3a34, 0x010d, 0x08, 0x00, 0x00, 0x00, 0x04,
-	 0x25},
-	{0x41, 0x9a1d, 0x0000, 0x3a34, 0x010e, 0x08, 0x00, 0x00, 0x00, 0x04,
-	 0x25},
-	{0x43, 0x0a1c, 0x0306, 0x3a57, 0x0110, 0x08, 0x06, 0x00, 0x00, 0x05,
-	 0x08},
-	{0x44, 0x0a1d, 0x0306, 0x3a57, 0x0111, 0x08, 0x06, 0x00, 0x00, 0x05,
-	 0x08},
-	{0x46, 0x2a1c, 0x0407, 0x3a81, 0x0113, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x47, 0x2a1d, 0x0407, 0x3a81, 0x0114, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x49, 0x0a3c, 0x0508, 0x3aab, 0x0116, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x4a, 0x0a3d, 0x0508, 0x3aab, 0x0117, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x4c, 0x0e7c, 0x0609, 0x3adc, 0x0119, 0x08, 0x09, 0x00, 0x00, 0x00,
-	 0x1a},
-	{0x4d, 0x0e7d, 0x0609, 0x3adc, 0x011a, 0x08, 0x09, 0x00, 0x00, 0x00,
-	 0x1a},
-	{0x50, 0x9a1b, 0x0001, 0x3a3b, 0x0132, 0x08, 0x01, 0x00, 0x00, 0x04,
-	 0x26},
-	{0x51, 0xba1b, 0x0103, 0x3a42, 0x0133, 0x08, 0x03, 0x00, 0x00, 0x07,
-	 0x27},
-	{0x52, 0x9a1b, 0x0204, 0x3a49, 0x0134, 0x08, 0x04, 0x00, 0x00, 0x00,
-	 0x28},
-	{0x56, 0x9a1d, 0x0001, 0x3a3b, 0x0135, 0x08, 0x01, 0x00, 0x00, 0x04,
-	 0x26},
-	{0x57, 0xba1d, 0x0103, 0x3a42, 0x0136, 0x08, 0x03, 0x00, 0x00, 0x07,
-	 0x27},
-	{0x58, 0x9a1d, 0x0204, 0x3a49, 0x0137, 0x08, 0x04, 0x00, 0x00, 0x00,
-	 0x28},
-	{0x59, 0x9a1b, 0x0000, 0x3a34, 0x0138, 0x08, 0x00, 0x00, 0x00, 0x04,
-	 0x25},
-	{0x5d, 0x0a1d, 0x0305, 0x3a50, 0x0139, 0x08, 0x05, 0x00, 0x00, 0x07,
-	 0x10},
-	{0x62, 0x0a3f, 0x0306, 0x3a57, 0x013a, 0x08, 0x06, 0x00, 0x00, 0x05,
-	 0x08},
-	{0x63, 0x2a3f, 0x0407, 0x3a81, 0x013b, 0x08, 0x07, 0x00, 0x00, 0x07,
-	 0x00},
-	{0x64, 0x0a7f, 0x0508, 0x3aab, 0x013c, 0x08, 0x08, 0x00, 0x00, 0x00,
-	 0x13},
-	{0x65, 0x0eff, 0x0609, 0x3adc, 0x013d, 0x08, 0x09, 0x00, 0x00, 0x00,
-	 0x1a},
-	{0x66, 0x06ff, 0x070a, 0x3af2, 0x013e, 0x08, 0x0a, 0x00, 0x00, 0x00,
-	 0x1e},
-	{0x68, 0x067b, 0x080b, 0x3b17, 0x013f, 0x08, 0x0b, 0x00, 0x00, 0x00,
-	 0x29},
-	{0x69, 0x06fd, 0x080b, 0x3b17, 0x0140, 0x08, 0x0b, 0x00, 0x00, 0x00,
-	 0x29},
-	{0x6b, 0x07ff, 0x080b, 0x3b17, 0x0141, 0x10, 0x0b, 0x00, 0x00, 0x00,
-	 0x29},
-	{0x6c, 0x067b, 0x090c, 0x3b37, 0x0000, 0x08, 0x0c, 0x00, 0x00, 0x00,
-	 0x2f},
-	{0x6d, 0x06fd, 0x090c, 0x3b37, 0x0000, 0x10, 0x0c, 0x00, 0x00, 0x00,
-	 0x2f},
-	{0x6e, 0x07ff, 0x090c, 0x3b37, 0x0000, 0x10, 0x0c, 0x00, 0x00, 0x00,
-	 0x2f},
-	{0x70, 0x2a1b, 0x0410, 0x3b52, 0x0000, 0x08, 0x10, 0x00, 0x00, 0x07,
-	 0x34},
-	{0x71, 0x0a1b, 0x0511, 0x3b63, 0x0000, 0x08, 0x11, 0x00, 0x00, 0x00,
-	 0x37},
-	{0x74, 0x0a1d, 0x0511, 0x3b63, 0x0000, 0x08, 0x11, 0x00, 0x00, 0x00,
-	 0x37},
-	{0x75, 0x0a3d, 0x0612, 0x3b74, 0x0000, 0x08, 0x12, 0x00, 0x00, 0x00,
-	 0x3a},
-	{0x76, 0x2a1f, 0x0410, 0x3b52, 0x0000, 0x08, 0x10, 0x00, 0x00, 0x07,
-	 0x34},
-	{0x77, 0x0a1f, 0x0511, 0x3b63, 0x0000, 0x08, 0x11, 0x00, 0x00, 0x00,
-	 0x37},
-	{0x78, 0x0a3f, 0x0612, 0x3b74, 0x0000, 0x08, 0x12, 0x00, 0x00, 0x00,
-	 0x3a},
-	{0x79, 0x0a3b, 0x0612, 0x3b74, 0x0000, 0x08, 0x12, 0x00, 0x00, 0x00,
-	 0x3a},
-	{0x7a, 0x2a1d, 0x0410, 0x3b52, 0x0000, 0x08, 0x10, 0x00, 0x00, 0x07,
-	 0x34},
-	{0x7b, 0x0e3b, 0x060f, 0x3ad0, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00,
-	 0x3d},
-	{0x7c, 0x0e7d, 0x060f, 0x3ad0, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00,
-	 0x3d},
-	{0x7d, 0x0eff, 0x060f, 0x3ad0, 0x0000, 0x08, 0x0f, 0x00, 0x00, 0x00,
-	 0x3d},
-	{0xff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00,
-	 0x00}
-};
-
-typedef struct _SiS310_Ext2Struct {
+
+SiS310_ExtStruct  SiS310_EModeIDTable[]=
+{
+ {0x6a,0x2212,0x0407,0x3a81,0x0102,0x08,0x07,0x00,0x00,0x07,0x00},
+ {0x2e,0x0a1b,0x0306,0x3a57,0x0101,0x08,0x06,0x00,0x00,0x05,0x08},
+ {0x2f,0x0a1b,0x0305,0x3a50,0x0100,0x08,0x05,0x00,0x00,0x05,0x10},
+ {0x30,0x2a1b,0x0407,0x3a81,0x0103,0x08,0x07,0x00,0x00,0x07,0x00},
+ {0x31,0x0a1b,0x030d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},
+ {0x32,0x0a1b,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},
+ {0x33,0x0a1d,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},
+ {0x34,0x2a1d,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},
+ {0x35,0x0a1f,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x11},
+ {0x36,0x2a1f,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x12},
+ {0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x00,0x13},
+ {0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x13},
+ {0x3a,0x0e3b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1a},
+ {0x3c,0x063b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x1e},
+ {0x3d,0x067d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x1e},
+ {0x40,0x9a1c,0x0000,0x3a34,0x010d,0x08,0x00,0x00,0x00,0x04,0x25},
+ {0x41,0x9a1d,0x0000,0x3a34,0x010e,0x08,0x00,0x00,0x00,0x04,0x25},
+ {0x43,0x0a1c,0x0306,0x3a57,0x0110,0x08,0x06,0x00,0x00,0x05,0x08},
+ {0x44,0x0a1d,0x0306,0x3a57,0x0111,0x08,0x06,0x00,0x00,0x05,0x08},
+ {0x46,0x2a1c,0x0407,0x3a81,0x0113,0x08,0x07,0x00,0x00,0x07,0x00},
+ {0x47,0x2a1d,0x0407,0x3a81,0x0114,0x08,0x07,0x00,0x00,0x07,0x00},
+ {0x49,0x0a3c,0x0508,0x3aab,0x0116,0x08,0x08,0x00,0x00,0x00,0x13},
+ {0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x00,0x13},
+ {0x4c,0x0e7c,0x0609,0x3adc,0x0119,0x08,0x09,0x00,0x00,0x00,0x1a},
+ {0x4d,0x0e7d,0x0609,0x3adc,0x011a,0x08,0x09,0x00,0x00,0x00,0x1a},
+ {0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x26},
+ {0x51,0xba1b,0x0103,0x3a42,0x0133,0x08,0x03,0x00,0x00,0x07,0x27},
+ {0x52,0x9a1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x28},
+ {0x56,0x9a1d,0x0001,0x3a3b,0x0135,0x08,0x01,0x00,0x00,0x04,0x26},
+ {0x57,0xba1d,0x0103,0x3a42,0x0136,0x08,0x03,0x00,0x00,0x07,0x27},
+ {0x58,0x9a1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x28},
+ {0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x25},
+ {0x5d,0x0a1d,0x0305,0x3a50,0x0139,0x08,0x05,0x00,0x00,0x07,0x10},
+ {0x62,0x0a3f,0x0306,0x3a57,0x013a,0x08,0x06,0x00,0x00,0x05,0x08},
+ {0x63,0x2a3f,0x0407,0x3a81,0x013b,0x08,0x07,0x00,0x00,0x07,0x00},
+ {0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x00,0x13},
+ {0x65,0x0eff,0x0609,0x3adc,0x013d,0x08,0x09,0x00,0x00,0x00,0x1a},
+ {0x66,0x06ff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x1e},
+ {0x68,0x067b,0x080b,0x3b17,0x013f,0x08,0x0b,0x00,0x00,0x00,0x29},
+ {0x69,0x06fd,0x080b,0x3b17,0x0140,0x08,0x0b,0x00,0x00,0x00,0x29},
+ {0x6b,0x07ff,0x080b,0x3b17,0x0141,0x10,0x0b,0x00,0x00,0x00,0x29},
+ {0x6c,0x067b,0x090c,0x3b37,0x0000,0x08,0x0c,0x00,0x00,0x00,0x2f},
+ {0x6d,0x06fd,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f},
+ {0x6e,0x07ff,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f},
+ {0x70,0x2a1b,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},
+ {0x71,0x0a1b,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},
+ {0x74,0x0a1d,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},
+ {0x75,0x0a3d,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},
+ {0x76,0x2a1f,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},
+ {0x77,0x0a1f,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37},
+ {0x78,0x0a3f,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},
+ {0x79,0x0a3b,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a},
+ {0x7a,0x2a1d,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34},
+ {0x7b,0x0e3b,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},
+ {0x7c,0x0e7d,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},
+ {0x7d,0x0eff,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x3d},
+ {0xff,0x0000,0x0000,0x0000,0x0000,0x00,0x00,0x00,0x00,0x00,0x00}
+};
+
+typedef struct _SiS310_Ext2Struct
+{
 	USHORT Ext_InfoFlag;
 	UCHAR Ext_CRT1CRTC;
 	UCHAR Ext_CRTVCLK;
 	UCHAR Ext_CRT2CRTC;
-	UCHAR ModeID;
+	UCHAR  ModeID;
 	USHORT XRes;
 	USHORT YRes;
 	USHORT ROM_OFFSET;
 } SiS310_Ext2Struct;
-SiS310_Ext2Struct SiS310_RefIndex[] = {
-	{0x005f, 0x0d, 0x03, 0x05, 0x6a, 800, 600, 0x3a81},	/* 0x0 */
-	{0x0467, 0x0e, 0x04, 0x05, 0x6a, 800, 600, 0x3a86},	/* 0x1 */
-	{0x0067, 0x0f, 0x08, 0x48, 0x6a, 800, 600, 0x3a8b},	/* 0x2 */
-	{0x0067, 0x10, 0x07, 0x8b, 0x6a, 800, 600, 0x3a90},	/* 0x3 */
-	{0x0147, 0x11, 0x0a, 0x00, 0x6a, 800, 600, 0x3a95},	/* 0x4 */
-	{0x4147, 0x12, 0x0d, 0x00, 0x6a, 800, 600, 0x3a9a},	/* 0x5 */
-	{0x4047, 0x13, 0x13, 0x00, 0x6a, 800, 600, 0x3a9f},	/* 0x6 */
-	{0x4047, 0x14, 0x1c, 0x00, 0x6a, 800, 600, 0x3aa4},	/* 0x7 */
-	{0xc05f, 0x05, 0x00, 0x04, 0x2e, 640, 480, 0x3a57},	/* 0x8 */
-	{0xc067, 0x06, 0x02, 0x04, 0x2e, 640, 480, 0x3a5c},	/* 0x9 */
-	{0xc067, 0x07, 0x02, 0x47, 0x2e, 640, 480, 0x3a61},	/* 0xa */
-	{0xc067, 0x08, 0x03, 0x8a, 0x2e, 640, 480, 0x3a66},	/* 0xb */
-	{0x4047, 0x09, 0x05, 0x00, 0x2e, 640, 480, 0x3a6b},	/* 0xc */
-	{0x4047, 0x0a, 0x09, 0x00, 0x2e, 640, 480, 0x3a70},	/* 0xd */
-	{0x4047, 0x0b, 0x0e, 0x00, 0x2e, 640, 480, 0x3a75},	/* 0xe */
-	{0xc047, 0x0c, 0x15, 0x00, 0x2e, 640, 480, 0x3a7a},	/* 0xf */
-	{0x407f, 0x04, 0x00, 0x00, 0x2f, 640, 400, 0x3a50},	/* 0x10 */
-	{0xc00f, 0x3c, 0x01, 0x06, 0x31, 720, 480, 0x3b85},	/* 0x11 */
-	{0x000f, 0x3d, 0x03, 0x06, 0x32, 720, 576, 0x3b8c},	/* 0x12 */
-	{0x0187, 0x15, 0x06, 0x00, 0x37, 1024, 768, 0x3aab},	/* 0x13 */
-	{0xc877, 0x16, 0x0b, 0x06, 0x37, 1024, 768, 0x3ab0},	/* 0x14 301b TV1024x768 */
-	{0xc067, 0x17, 0x0f, 0x49, 0x37, 1024, 768, 0x3ab5},	/* 0x15 */
-	{0x0267, 0x18, 0x11, 0x00, 0x37, 1024, 768, 0x3aba},	/* 0x16 */
-	{0x0047, 0x19, 0x16, 0x8c, 0x37, 1024, 768, 0x3abf},	/* 0x17 */
-	{0x4047, 0x1a, 0x1b, 0x00, 0x37, 1024, 768, 0x3ac4},	/* 0x18 */
-	{0x4047, 0x1b, 0x1f, 0x00, 0x37, 1024, 768, 0x3ac9},	/* 0x19 */
-	{0x0387, 0x1c, 0x11, 0x00, 0x3a, 1280, 1024, 0x3adc},	/* 0x1a */
-	{0x0077, 0x1d, 0x19, 0x07, 0x3a, 1280, 1024, 0x3ae1},	/* 0x1b */
-	{0x0047, 0x1e, 0x1e, 0x00, 0x3a, 1280, 1024, 0x3ae6},	/* 0x1c */
-	{0x0007, 0x1f, 0x20, 0x00, 0x3a, 1280, 1024, 0x3aeb},	/* 0x1d */
-	{0x0007, 0x20, 0x21, 0x00, 0x3c, 1600, 1200, 0x3af2},	/* 0x1e */
-	{0x0007, 0x21, 0x22, 0x00, 0x3c, 1600, 1200, 0x3af7},	/* 0x1f */
-	{0x0007, 0x22, 0x23, 0x00, 0x3c, 1600, 1200, 0x3afc},	/* 0x20 */
-	{0x0007, 0x23, 0x25, 0x00, 0x3c, 1600, 1200, 0x3b01},	/* 0x21 */
-	{0x0007, 0x24, 0x26, 0x00, 0x3c, 1600, 1200, 0x3b06},	/* 0x22 */
-	{0x0007, 0x25, 0x2c, 0x00, 0x3c, 1600, 1200, 0x3b0b},	/* 0x23 */
-	{0x0007, 0x26, 0x34, 0x00, 0x3c, 1600, 1200, 0x3b10},	/* 0x24 */
-	{0x407f, 0x00, 0x00, 0x00, 0x40, 320, 200, 0x3a34},	/* 0x25 */
-	{0xc07f, 0x01, 0x00, 0x04, 0x50, 320, 240, 0x3a3b},	/* 0x26 */
-	{0x007f, 0x02, 0x04, 0x05, 0x51, 400, 300, 0x3a42},	/* 0x27 */
-	{0xc077, 0x03, 0x0b, 0x06, 0x52, 512, 384, 0x3a49},	/* 0x28 */
-	{0x8007, 0x27, 0x27, 0x00, 0x68, 1920, 1440, 0x3b17},	/* 0x29 */
-	{0x4007, 0x28, 0x29, 0x00, 0x68, 1920, 1440, 0x3b1c},	/* 0x2a */
-	{0x4007, 0x29, 0x2e, 0x00, 0x68, 1920, 1440, 0x3b21},	/* 0x2b */
-	{0x4007, 0x2a, 0x30, 0x00, 0x68, 1920, 1440, 0x3b26},	/* 0x2c */
-	{0x4007, 0x2b, 0x35, 0x00, 0x68, 1920, 1440, 0x3b2b},	/* 0x2d */
-	{0x4005, 0x2c, 0x39, 0x00, 0x68, 1920, 1440, 0x3b30},	/* 0x2e */
-	{0x4007, 0x2d, 0x2b, 0x00, 0x6c, 2048, 1536, 0x3b37},	/* 0x2f */
-	{0x4007, 0x2e, 0x31, 0x00, 0x6c, 2048, 1536, 0x3b3c},	/* 0x30 */
-	{0x4007, 0x2f, 0x33, 0x00, 0x6c, 2048, 1536, 0x3b41},	/* 0x31 */
-	{0x4007, 0x30, 0x37, 0x00, 0x6c, 2048, 1536, 0x3b46},	/* 0x32 */
-	{0x4005, 0x31, 0x38, 0x00, 0x6c, 2048, 1536, 0x3b4b},	/* 0x33 */
-	{0x0057, 0x32, 0x40, 0x08, 0x70, 800, 480, 0x3b52},	/* 0x34 */
-	{0x0047, 0x33, 0x07, 0x08, 0x70, 800, 480, 0x3b57},	/* 0x35 */
-	{0x0047, 0x34, 0x0a, 0x08, 0x70, 800, 480, 0x3b5c},	/* 0x36 */
-	{0x0057, 0x35, 0x0b, 0x09, 0x71, 1024, 576, 0x3b63},	/* 0x37 */
-	{0x0047, 0x36, 0x11, 0x09, 0x71, 1024, 576, 0x3b68},	/* 0x38 */
-	{0x0047, 0x37, 0x16, 0x09, 0x71, 1024, 576, 0x3b6d},	/* 0x39 */
-	{0x0057, 0x38, 0x19, 0x0a, 0x75, 1280, 720, 0x3b74},	/* 0x3a */
-	{0x0047, 0x39, 0x1e, 0x0a, 0x75, 1280, 720, 0x3b79},	/* 0x3b */
-	{0x0047, 0x3a, 0x20, 0x0a, 0x75, 1280, 720, 0x3b7e},	/* 0x3c */
-	{0x0027, 0x3b, 0x19, 0x08, 0x7b, 1280, 960, 0x3ad0},	/* 0x3d */
-	{0x0027, 0x3b, 0x19, 0x08, 0x7b, 1280, 960, 0x3ad5},	/* 0x3e */
-	{0xffff, 0x00, 0x00, 0x00, 0x00, 0000, 0000, 0x0000}
-};
-
-typedef struct _SiS310_CRT1TableStruct {
+SiS310_Ext2Struct SiS310_RefIndex[]=
+{
+ {0x005f,0x0d,0x03,0x05,0x6a, 800, 600,0x3a81}, /* 0x0 */
+ {0x0467,0x0e,0x04,0x05,0x6a, 800, 600,0x3a86}, /* 0x1 */
+ {0x0067,0x0f,0x08,0x48,0x6a, 800, 600,0x3a8b}, /* 0x2 */
+ {0x0067,0x10,0x07,0x8b,0x6a, 800, 600,0x3a90}, /* 0x3 */
+ {0x0147,0x11,0x0a,0x00,0x6a, 800, 600,0x3a95}, /* 0x4 */
+ {0x4147,0x12,0x0d,0x00,0x6a, 800, 600,0x3a9a}, /* 0x5 */
+ {0x4047,0x13,0x13,0x00,0x6a, 800, 600,0x3a9f}, /* 0x6 */
+ {0x4047,0x14,0x1c,0x00,0x6a, 800, 600,0x3aa4}, /* 0x7 */
+ {0xc05f,0x05,0x00,0x04,0x2e, 640, 480,0x3a57}, /* 0x8 */
+ {0xc067,0x06,0x02,0x04,0x2e, 640, 480,0x3a5c}, /* 0x9 */
+ {0xc067,0x07,0x02,0x47,0x2e, 640, 480,0x3a61}, /* 0xa */
+ {0xc067,0x08,0x03,0x8a,0x2e, 640, 480,0x3a66}, /* 0xb */
+ {0x4047,0x09,0x05,0x00,0x2e, 640, 480,0x3a6b}, /* 0xc */
+ {0x4047,0x0a,0x09,0x00,0x2e, 640, 480,0x3a70}, /* 0xd */
+ {0x4047,0x0b,0x0e,0x00,0x2e, 640, 480,0x3a75}, /* 0xe */
+ {0xc047,0x0c,0x15,0x00,0x2e, 640, 480,0x3a7a}, /* 0xf */
+ {0x407f,0x04,0x00,0x00,0x2f, 640, 400,0x3a50}, /* 0x10 */
+ {0xc00f,0x3c,0x01,0x06,0x31, 720, 480,0x3b85}, /* 0x11 */
+ {0x000f,0x3d,0x03,0x06,0x32, 720, 576,0x3b8c}, /* 0x12 */
+ {0x0187,0x15,0x06,0x00,0x37,1024, 768,0x3aab}, /* 0x13 */
+ {0xc877,0x16,0x0b,0x06,0x37,1024, 768,0x3ab0}, /* 0x14 301b TV1024x768*/
+ {0xc067,0x17,0x0f,0x49,0x37,1024, 768,0x3ab5}, /* 0x15 */
+ {0x0267,0x18,0x11,0x00,0x37,1024, 768,0x3aba}, /* 0x16 */
+ {0x0047,0x19,0x16,0x8c,0x37,1024, 768,0x3abf}, /* 0x17 */
+ {0x4047,0x1a,0x1b,0x00,0x37,1024, 768,0x3ac4}, /* 0x18 */
+ {0x4047,0x1b,0x1f,0x00,0x37,1024, 768,0x3ac9}, /* 0x19 */
+ {0x0387,0x1c,0x11,0x00,0x3a,1280,1024,0x3adc}, /* 0x1a */
+ {0x0077,0x1d,0x19,0x07,0x3a,1280,1024,0x3ae1}, /* 0x1b */
+ {0x0047,0x1e,0x1e,0x00,0x3a,1280,1024,0x3ae6}, /* 0x1c */
+ {0x0007,0x1f,0x20,0x00,0x3a,1280,1024,0x3aeb}, /* 0x1d */
+ {0x0007,0x20,0x21,0x00,0x3c,1600,1200,0x3af2}, /* 0x1e */
+ {0x0007,0x21,0x22,0x00,0x3c,1600,1200,0x3af7}, /* 0x1f */
+ {0x0007,0x22,0x23,0x00,0x3c,1600,1200,0x3afc}, /* 0x20 */
+ {0x0007,0x23,0x25,0x00,0x3c,1600,1200,0x3b01}, /* 0x21 */
+ {0x0007,0x24,0x26,0x00,0x3c,1600,1200,0x3b06}, /* 0x22 */
+ {0x0007,0x25,0x2c,0x00,0x3c,1600,1200,0x3b0b}, /* 0x23 */
+ {0x0007,0x26,0x34,0x00,0x3c,1600,1200,0x3b10}, /* 0x24 */
+ {0x407f,0x00,0x00,0x00,0x40, 320, 200,0x3a34}, /* 0x25 */
+ {0xc07f,0x01,0x00,0x04,0x50, 320, 240,0x3a3b}, /* 0x26 */
+ {0x007f,0x02,0x04,0x05,0x51, 400, 300,0x3a42}, /* 0x27 */
+ {0xc077,0x03,0x0b,0x06,0x52, 512, 384,0x3a49}, /* 0x28 */
+ {0x8007,0x27,0x27,0x00,0x68,1920,1440,0x3b17}, /* 0x29 */
+ {0x4007,0x28,0x29,0x00,0x68,1920,1440,0x3b1c}, /* 0x2a */
+ {0x4007,0x29,0x2e,0x00,0x68,1920,1440,0x3b21}, /* 0x2b */
+ {0x4007,0x2a,0x30,0x00,0x68,1920,1440,0x3b26}, /* 0x2c */
+ {0x4007,0x2b,0x35,0x00,0x68,1920,1440,0x3b2b}, /* 0x2d */
+ {0x4005,0x2c,0x39,0x00,0x68,1920,1440,0x3b30}, /* 0x2e */
+ {0x4007,0x2d,0x2b,0x00,0x6c,2048,1536,0x3b37}, /* 0x2f */
+ {0x4007,0x2e,0x31,0x00,0x6c,2048,1536,0x3b3c}, /* 0x30 */
+ {0x4007,0x2f,0x33,0x00,0x6c,2048,1536,0x3b41}, /* 0x31 */
+ {0x4007,0x30,0x37,0x00,0x6c,2048,1536,0x3b46}, /* 0x32 */
+ {0x4005,0x31,0x38,0x00,0x6c,2048,1536,0x3b4b}, /* 0x33 */
+ {0x0057,0x32,0x40,0x08,0x70, 800, 480,0x3b52}, /* 0x34 */
+ {0x0047,0x33,0x07,0x08,0x70, 800, 480,0x3b57}, /* 0x35 */
+ {0x0047,0x34,0x0a,0x08,0x70, 800, 480,0x3b5c}, /* 0x36 */
+ {0x0057,0x35,0x0b,0x09,0x71,1024, 576,0x3b63}, /* 0x37 */
+ {0x0047,0x36,0x11,0x09,0x71,1024, 576,0x3b68}, /* 0x38 */
+ {0x0047,0x37,0x16,0x09,0x71,1024, 576,0x3b6d}, /* 0x39 */
+ {0x0057,0x38,0x19,0x0a,0x75,1280, 720,0x3b74}, /* 0x3a */
+ {0x0047,0x39,0x1e,0x0a,0x75,1280, 720,0x3b79}, /* 0x3b */
+ {0x0047,0x3a,0x20,0x0a,0x75,1280, 720,0x3b7e}, /* 0x3c */
+ {0x0027,0x3b,0x19,0x08,0x7b,1280, 960,0x3ad0}, /* 0x3d */
+ {0x0027,0x3b,0x19,0x08,0x7b,1280, 960,0x3ad5}, /* 0x3e */
+ {0xffff,0x00,0x00,0x00,0x00,0000,0000,0x0000}
+};
+
+typedef struct _SiS310_CRT1TableStruct
+{
 	UCHAR CR[17];
 } SiS310_CRT1TableStruct;
-SiS310_CRT1TableStruct SiS310_CRT1Table[] = {
-	{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
-	 0x9c, 0x8e, 0x8f, 0x96, 0xb9, 0x30, 0x00, 0x00,
-	 0x00},			/* 0x0 */
-	{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0x0b, 0x3e,
-	 0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x00,
-	 0x00},			/* 0x1 */
-	{0x3d, 0x31, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
-	 0x58, 0x8c, 0x57, 0x57, 0x73, 0x20, 0x00, 0x05,
-	 0x01},			/* 0x2 */
-	{0x4f, 0x3f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
-	 0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x01,
-	 0x01},			/* 0x3 */
-	{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
-	 0x9c, 0x8e, 0x8f, 0x96, 0xb9, 0x30, 0x00, 0x05,
-	 0x00},			/* 0x4 */
-	{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0x0b, 0x3e,
-	 0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x05,
-	 0x00},			/* 0x5 */
-	{0x63, 0x4f, 0x50, 0x86, 0x56, 0x9b, 0x06, 0x3e,
-	 0xe8, 0x8b, 0xdf, 0xe7, 0xff, 0x10, 0x00, 0x01,
-	 0x00},			/* 0x6 */
-	{0x64, 0x4f, 0x4f, 0x88, 0x55, 0x9d, 0xf2, 0x1f,
-	 0xe0, 0x83, 0xdf, 0xdf, 0xf3, 0x10, 0x00, 0x01,
-	 0x00},			/* 0x7 */
-	{0x63, 0x4f, 0x4f, 0x87, 0x5a, 0x81, 0xfb, 0x1f,
-	 0xe0, 0x83, 0xdf, 0xdf, 0xfc, 0x10, 0x00, 0x05,
-	 0x00},			/* 0x8 */
-	{0x65, 0x4f, 0x4f, 0x89, 0x58, 0x80, 0xfb, 0x1f,
-	 0xe0, 0x83, 0xdf, 0xdf, 0xfc, 0x00, 0x00, 0x05,
-	 0x61},			/* 0x9 */
-	{0x65, 0x4f, 0x4f, 0x89, 0x58, 0x80, 0x01, 0x3e,
-	 0xe0, 0x83, 0xdf, 0xdf, 0x02, 0x00, 0x00, 0x05,
-	 0x61},			/* 0xa */
-	{0x67, 0x4f, 0x4f, 0x8b, 0x58, 0x81, 0x0d, 0x3e,
-	 0xe0, 0x83, 0xdf, 0xdf, 0x0e, 0x10, 0x00, 0x05,
-	 0x61},			/* 0xb */
-	{0x65, 0x4f, 0x4f, 0x89, 0x57, 0x9f, 0xfb, 0x1f,
-	 0xe6, 0x8a, 0xe5, 0xe5, 0xfc, 0x00, 0x00, 0x01,
-	 0x00},			/* 0xc */
-	{0x7b, 0x63, 0x63, 0x9f, 0x6a, 0x93, 0x6f, 0xf0,
-	 0x58, 0x8a, 0x57, 0x57, 0x70, 0x20, 0x00, 0x05,
-	 0x01},			/* 0xd */
-	{0x7f, 0x63, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
-	 0x58, 0x8c, 0x57, 0x57, 0x73, 0x20, 0x00, 0x06,
-	 0x01},			/* 0xe */
-	{0x7d, 0x63, 0x63, 0x81, 0x6e, 0x1d, 0x98, 0xf0,
-	 0x7c, 0x82, 0x57, 0x57, 0x99, 0x00, 0x00, 0x06,
-	 0x01},			/* 0xf */
-	{0x7f, 0x63, 0x63, 0x83, 0x69, 0x13, 0x6f, 0xf0,
-	 0x58, 0x8b, 0x57, 0x57, 0x70, 0x20, 0x00, 0x06,
-	 0x01},			/* 0x10 */
-	{0x7e, 0x63, 0x63, 0x82, 0x6b, 0x13, 0x75, 0xf0,
-	 0x58, 0x8b, 0x57, 0x57, 0x76, 0x20, 0x00, 0x06,
-	 0x01},			/* 0x11 */
-	{0x81, 0x63, 0x63, 0x85, 0x6d, 0x18, 0x7a, 0xf0,
-	 0x58, 0x8b, 0x57, 0x57, 0x7b, 0x20, 0x00, 0x06,
-	 0x61},			/* 0x12 */
-	{0x83, 0x63, 0x63, 0x87, 0x6e, 0x19, 0x81, 0xf0,
-	 0x58, 0x8b, 0x57, 0x57, 0x82, 0x20, 0x00, 0x06,
-	 0x61},			/* 0x13 */
-	{0x85, 0x63, 0x63, 0x89, 0x6f, 0x1a, 0x91, 0xf0,
-	 0x58, 0x8b, 0x57, 0x57, 0x92, 0x20, 0x00, 0x06,
-	 0x61},			/* 0x14 */
-	{0x99, 0x7f, 0x7f, 0x9d, 0x84, 0x1a, 0x96, 0x1f,
-	 0x7f, 0x83, 0x7f, 0x7f, 0x97, 0x10, 0x00, 0x02,
-	 0x00},			/* 0x15 */
-	{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
-	 0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
-	 0x01},			/* 0x16 */
-	{0xa1, 0x7f, 0x7f, 0x85, 0x86, 0x97, 0x24, 0xf5,
-	 0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
-	 0x01},			/* 0x17 */
-	{0x9f, 0x7f, 0x7f, 0x83, 0x85, 0x91, 0x1e, 0xf5,
-	 0x00, 0x83, 0xff, 0xff, 0x1f, 0x10, 0x00, 0x02,
-	 0x01},			/* 0x18 */
-	{0xa7, 0x7f, 0x7f, 0x8b, 0x89, 0x95, 0x26, 0xf5,
-	 0x00, 0x83, 0xff, 0xff, 0x27, 0x10, 0x00, 0x02,
-	 0x01},			/* 0x19 */
-	{0xa9, 0x7f, 0x7f, 0x8d, 0x8c, 0x9a, 0x2c, 0xf5,
-	 0x00, 0x83, 0xff, 0xff, 0x2d, 0x14, 0x00, 0x02,
-	 0x62},			/* 0x1a */
-	{0xab, 0x7f, 0x7f, 0x8f, 0x8d, 0x9b, 0x35, 0xf5,
-	 0x00, 0x83, 0xff, 0xff, 0x36, 0x14, 0x00, 0x02,
-	 0x62},			/* 0x1b */
-	{0xcf, 0x9f, 0x9f, 0x93, 0xb2, 0x01, 0x14, 0xba,
-	 0x00, 0x83, 0xff, 0xff, 0x15, 0x00, 0x00, 0x03,
-	 0x00},			/* 0x1c */
-	{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x28, 0x5a,
-	 0x00, 0x83, 0xff, 0xff, 0x29, 0x09, 0x00, 0x07,
-	 0x01},			/* 0x1d */
-	{0xce, 0x9f, 0x9f, 0x92, 0xa5, 0x17, 0x28, 0x5a,
-	 0x00, 0x83, 0xff, 0xff, 0x29, 0x09, 0x00, 0x07,
-	 0x01},			/* 0x1e */
-	{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0x2e, 0x5a,
-	 0x00, 0x83, 0xff, 0xff, 0x2f, 0x09, 0x00, 0x07,
-	 0x01},			/* 0x1f */
-	{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	 0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	 0x00},			/* 0x20 */
-	{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	 0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	 0x00},			/* 0x21 */
-	{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	 0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	 0x00},			/* 0x22 */
-	{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	 0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	 0x00},			/* 0x23 */
-	{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	 0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	 0x00},			/* 0x24 */
-	{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	 0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	 0x00},			/* 0x25 */
-	{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
-	 0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
-	 0x00},			/* 0x26 */
-	{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
-	 0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
-	 0x00},			/* 0x27 */
-	{0x43, 0xef, 0xef, 0x87, 0x06, 0x00, 0xd4, 0x1f,
-	 0xa0, 0x83, 0x9f, 0x9f, 0xd5, 0x1f, 0x41, 0x05,
-	 0x63},			/* 0x28 */
-	{0x45, 0xef, 0xef, 0x89, 0x07, 0x01, 0xd9, 0x1f,
-	 0xa0, 0x83, 0x9f, 0x9f, 0xda, 0x1f, 0x41, 0x05,
-	 0x63},			/* 0x29 */
-	{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
-	 0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
-	 0x00},			/* 0x2a */
-	{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
-	 0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
-	 0x00},			/* 0x2b */
-	{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
-	 0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
-	 0x00},			/* 0x2c */
-	{0x59, 0xff, 0xff, 0x9d, 0x17, 0x13, 0x33, 0xba,
-	 0x00, 0x83, 0xff, 0xff, 0x34, 0x0f, 0x41, 0x05,
-	 0x44},			/* 0x2d */
-	{0x5b, 0xff, 0xff, 0x9f, 0x18, 0x14, 0x38, 0xba,
-	 0x00, 0x83, 0xff, 0xff, 0x39, 0x0f, 0x41, 0x05,
-	 0x44},			/* 0x2e */
-	{0x5b, 0xff, 0xff, 0x9f, 0x18, 0x14, 0x3d, 0xba,
-	 0x00, 0x83, 0xff, 0xff, 0x3e, 0x0f, 0x41, 0x05,
-	 0x44},			/* 0x2f */
-	{0x5d, 0xff, 0xff, 0x81, 0x19, 0x95, 0x41, 0xba,
-	 0x00, 0x84, 0xff, 0xff, 0x42, 0x0f, 0x41, 0x05,
-	 0x44},			/* 0x30 */
-	{0x55, 0xff, 0xff, 0x99, 0x0d, 0x0c, 0x3e, 0xba,
-	 0x00, 0x84, 0xff, 0xff, 0x3f, 0x0f, 0x41, 0x05,
-	 0x00},			/* 0x31 */
-	{0x7f, 0x63, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xba,
-	 0x27, 0x8b, 0xdf, 0xdf, 0x73, 0x00, 0x00, 0x06,
-	 0x01},			/* 0x32 */
-	{0x7f, 0x63, 0x63, 0x83, 0x69, 0x13, 0x6f, 0xba,
-	 0x26, 0x89, 0xdf, 0xdf, 0x6f, 0x00, 0x00, 0x06,
-	 0x01},			/* 0x33 */
-	{0x7f, 0x63, 0x63, 0x82, 0x6b, 0x13, 0x75, 0xba,
-	 0x29, 0x8c, 0xdf, 0xdf, 0x75, 0x00, 0x00, 0x06,
-	 0x01},			/* 0x34 */
-	{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf1,
-	 0xaf, 0x85, 0x3f, 0x3f, 0x25, 0x30, 0x00, 0x02,
-	 0x01},			/* 0x35 */
-	{0x9f, 0x7f, 0x7f, 0x83, 0x85, 0x91, 0x1e, 0xf1,
-	 0xad, 0x81, 0x3f, 0x3f, 0x1f, 0x30, 0x00, 0x02,
-	 0x01},			/* 0x36 */
-	{0xa7, 0x7f, 0x7f, 0x88, 0x89, 0x15, 0x26, 0xf1,
-	 0xb1, 0x85, 0x3f, 0x3f, 0x27, 0x30, 0x00, 0x02,
-	 0x01},			/* 0x37 */
-	{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x28, 0xc4,
-	 0x7a, 0x8e, 0xcf, 0xcf, 0x29, 0x21, 0x00, 0x07,
-	 0x01},			/* 0x38 */
-	{0xce, 0x9f, 0x9f, 0x92, 0xa5, 0x17, 0x28, 0xd4,
-	 0x7a, 0x8e, 0xcf, 0xcf, 0x29, 0x21, 0x00, 0x07,
-	 0x01},			/* 0x39 */
-	{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0x2e, 0xd4,
-	 0x7d, 0x81, 0xcf, 0xcf, 0x2f, 0x21, 0x00, 0x07,
-	 0x01},			/* 0x3a */
-	{0xdc, 0x9f, 0x9f, 0x00, 0xab, 0x19, 0xe6, 0xef,
-	 0xc0, 0xc3, 0xbf, 0xbf, 0xe7, 0x10, 0x00, 0x07,
-	 0x01},			/* 0x3b */
-	{0x6b, 0x59, 0x59, 0x8f, 0x5e, 0x8c, 0x0b, 0x3e,
-	 0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x05,
-	 0x00},			/* 0x3c */
-	{0x7b, 0x59, 0x63, 0x9f, 0x6a, 0x93, 0x6f, 0xf0,
-	 0x58, 0x8a, 0x3f, 0x57, 0x70, 0x20, 0x00, 0x05,
-	 0x01}			/* 0x3d */
-};
-
-typedef struct _SiS310_MCLKDataStruct {
-	UCHAR SR28, SR29, SR2A;
+SiS310_CRT1TableStruct SiS310_CRT1Table[]=
+{
+ {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
+  0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
+  0x00}, /* 0x0 */
+ {0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e,
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00,
+  0x00}, /* 0x1 */
+ {0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0,
+  0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
+  0x01}, /* 0x2 */
+ {0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
+  0x01}, /* 0x3 */
+ {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
+  0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
+  0x00}, /* 0x4 */
+ {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+  0x00}, /* 0x5 */
+ {0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,
+  0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
+  0x00}, /* 0x6 */
+ {0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
+  0x00}, /* 0x7 */
+ {0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
+  0x00}, /* 0x8 */
+ {0x65,0x4f,0x4f,0x89,0x58,0x80,0xfb,0x1f,
+  0xe0,0x83,0xdf,0xdf,0xfc,0x00,0x00,0x05,
+  0x61}, /* 0x9 */
+ {0x65,0x4f,0x4f,0x89,0x58,0x80,0x01,0x3e,
+  0xe0,0x83,0xdf,0xdf,0x02,0x00,0x00,0x05,
+  0x61}, /* 0xa */
+ {0x67,0x4f,0x4f,0x8b,0x58,0x81,0x0d,0x3e,
+  0xe0,0x83,0xdf,0xdf,0x0e,0x10,0x00,0x05,
+  0x61}, /* 0xb */
+ {0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
+  0xe6,0x8a,0xe5,0xe5,0xfc,0x00,0x00,0x01,
+  0x00}, /* 0xc */
+ {0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
+  0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
+  0x01}, /* 0xd */
+ {0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+  0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x06,
+  0x01}, /* 0xe */
+ {0x7d,0x63,0x63,0x81,0x6e,0x1d,0x98,0xf0,
+  0x7c,0x82,0x57,0x57,0x99,0x00,0x00,0x06,
+  0x01}, /* 0xf */
+ {0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xf0,
+  0x58,0x8b,0x57,0x57,0x70,0x20,0x00,0x06,
+  0x01}, /* 0x10 */
+ {0x7e,0x63,0x63,0x82,0x6b,0x13,0x75,0xf0,
+  0x58,0x8b,0x57,0x57,0x76,0x20,0x00,0x06,
+  0x01}, /* 0x11 */
+ {0x81,0x63,0x63,0x85,0x6d,0x18,0x7a,0xf0,
+  0x58,0x8b,0x57,0x57,0x7b,0x20,0x00,0x06,
+  0x61}, /* 0x12 */
+ {0x83,0x63,0x63,0x87,0x6e,0x19,0x81,0xf0,
+  0x58,0x8b,0x57,0x57,0x82,0x20,0x00,0x06,
+  0x61}, /* 0x13 */
+ {0x85,0x63,0x63,0x89,0x6f,0x1a,0x91,0xf0,
+  0x58,0x8b,0x57,0x57,0x92,0x20,0x00,0x06,
+  0x61}, /* 0x14 */
+ {0x99,0x7f,0x7f,0x9d,0x84,0x1a,0x96,0x1f,
+  0x7f,0x83,0x7f,0x7f,0x97,0x10,0x00,0x02,
+  0x00}, /* 0x15 */
+ {0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}, /* 0x16 */
+ {0xa1,0x7f,0x7f,0x85,0x86,0x97,0x24,0xf5,
+  0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
+  0x01}, /* 0x17 */
+ {0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf5,
+  0x00,0x83,0xff,0xff,0x1f,0x10,0x00,0x02,
+  0x01}, /* 0x18 */
+ {0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5,
+  0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02,
+  0x01}, /* 0x19 */
+ {0xa9,0x7f,0x7f,0x8d,0x8c,0x9a,0x2c,0xf5,
+  0x00,0x83,0xff,0xff,0x2d,0x14,0x00,0x02,
+  0x62}, /* 0x1a */
+ {0xab,0x7f,0x7f,0x8f,0x8d,0x9b,0x35,0xf5,
+  0x00,0x83,0xff,0xff,0x36,0x14,0x00,0x02,
+  0x62}, /* 0x1b */
+ {0xcf,0x9f,0x9f,0x93,0xb2,0x01,0x14,0xba,
+  0x00,0x83,0xff,0xff,0x15,0x00,0x00,0x03,
+  0x00}, /* 0x1c */
+ {0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0x5a,
+  0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+  0x01}, /* 0x1d */
+ {0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0x5a,
+  0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
+  0x01}, /* 0x1e */
+ {0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0x5a,
+  0x00,0x83,0xff,0xff,0x2f,0x09,0x00,0x07,
+  0x01}, /* 0x1f */
+ {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}, /* 0x20 */
+ {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}, /* 0x21 */
+ {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}, /* 0x22 */
+ {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}, /* 0x23 */
+ {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}, /* 0x24 */
+ {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}, /* 0x25 */
+ {0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
+  0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
+  0x00}, /* 0x26 */
+ {0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+  0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+  0x00}, /* 0x27 */
+ {0x43,0xef,0xef,0x87,0x06,0x00,0xd4,0x1f,
+  0xa0,0x83,0x9f,0x9f,0xd5,0x1f,0x41,0x05,
+  0x63}, /* 0x28 */
+ {0x45,0xef,0xef,0x89,0x07,0x01,0xd9,0x1f,
+  0xa0,0x83,0x9f,0x9f,0xda,0x1f,0x41,0x05,
+  0x63}, /* 0x29 */
+ {0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+  0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+  0x00}, /* 0x2a */
+ {0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+  0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+  0x00}, /* 0x2b */
+ {0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
+  0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
+  0x00}, /* 0x2c */
+ {0x59,0xff,0xff,0x9d,0x17,0x13,0x33,0xba,
+  0x00,0x83,0xff,0xff,0x34,0x0f,0x41,0x05,
+  0x44}, /* 0x2d */
+ {0x5b,0xff,0xff,0x9f,0x18,0x14,0x38,0xba,
+  0x00,0x83,0xff,0xff,0x39,0x0f,0x41,0x05,
+  0x44}, /* 0x2e */
+ {0x5b,0xff,0xff,0x9f,0x18,0x14,0x3d,0xba,
+  0x00,0x83,0xff,0xff,0x3e,0x0f,0x41,0x05,
+  0x44}, /* 0x2f */
+ {0x5d,0xff,0xff,0x81,0x19,0x95,0x41,0xba,
+  0x00,0x84,0xff,0xff,0x42,0x0f,0x41,0x05,
+  0x44}, /* 0x30 */
+ {0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
+  0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
+  0x00}, /* 0x31 */
+ {0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,
+  0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
+  0x01}, /* 0x32 */
+ {0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
+  0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
+  0x01}, /* 0x33 */
+ {0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
+  0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
+  0x01}, /* 0x34 */
+ {0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
+  0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
+  0x01}, /* 0x35 */
+ {0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
+  0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
+  0x01}, /* 0x36 */
+ {0xa7,0x7f,0x7f,0x88,0x89,0x15,0x26,0xf1,
+  0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
+  0x01}, /* 0x37 */
+ {0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
+  0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+  0x01}, /* 0x38 */
+ {0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
+  0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
+  0x01}, /* 0x39 */
+ {0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
+  0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
+  0x01}, /* 0x3a */
+ {0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef,
+  0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
+  0x01}, /* 0x3b */
+ {0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
+  0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
+  0x00}, /* 0x3c */
+ {0x7b,0x59,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
+  0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05,
+  0x01} /* 0x3d */
+};
+
+typedef struct _SiS310_MCLKDataStruct
+{
+	UCHAR SR28,SR29,SR2A;
 	USHORT CLOCK;
 } SiS310_MCLKDataStruct;
-SiS310_MCLKDataStruct SiS310_MCLKData[] = {
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166}
+
+SiS310_MCLKDataStruct SiS310_MCLKData[]=
+{
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166}
 };
 
-typedef struct _SiS310_ECLKDataStruct {
-	UCHAR SR2E, SR2F, SR30;
+typedef struct _SiS310_ECLKDataStruct
+{
+	UCHAR SR2E,SR2F,SR30;
 	USHORT CLOCK;
 } SiS310_ECLKDataStruct;
-SiS310_ECLKDataStruct SiS310_ECLKData[] = {
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166},
-	{0x5c, 0x23, 0x01, 166}
+SiS310_ECLKDataStruct SiS310_ECLKData[]=
+{
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166},
+	{ 0x5c,0x23,0x01,166}
 };
 
-typedef struct _SiS310_VCLKDataStruct {
-	UCHAR SR2B, SR2C;
+typedef struct _SiS310_VCLKDataStruct
+{
+	UCHAR SR2B,SR2C;
 	USHORT CLOCK;
 } SiS310_VCLKDataStruct;
-SiS310_VCLKDataStruct SiS310_VCLKData[] = {
-	{0x1b, 0xe1, 25},	/* 0x0 */
-	{0x4e, 0xe4, 28},	/* 0x1 */
-	{0x57, 0xe4, 31},	/* 0x2 */
-	{0xc3, 0xc8, 36},	/* 0x3 */
-	{0x42, 0xe2, 40},	/* 0x4 */
-	{0xfe, 0xcd, 43},	/* 0x5 */
-	{0x5d, 0xc4, 44},	/* 0x6 */
-	{0x52, 0xe2, 49},	/* 0x7 */
-	{0x53, 0xe2, 50},	/* 0x8 */
-	{0x74, 0x67, 52},	/* 0x9 */
-	{0x6d, 0x66, 56},	/* 0xa */
-	{0x6c, 0xc3, 65},	/* 0xb */
-	{0x46, 0x44, 67},	/* 0xc */
-	{0xb1, 0x46, 68},	/* 0xd */
-	{0xd3, 0x4a, 72},	/* 0xe */
-	{0x29, 0x61, 75},	/* 0xf */
-	{0x6e, 0x46, 76},	/* 0x10 */
-	{0x2b, 0x61, 78},	/* 0x11 */
-	{0x31, 0x42, 79},	/* 0x12 */
-	{0xab, 0x44, 83},	/* 0x13 */
-	{0x46, 0x25, 84},	/* 0x14 */
-	{0x78, 0x29, 86},	/* 0x15 */
-	{0x62, 0x44, 94},	/* 0x16 */
-	{0x2b, 0x41, 104},	/* 0x17 */
-	{0x3a, 0x23, 105},	/* 0x18 */
-	{0x70, 0x44, 108},	/* 0x19 */
-	{0x3c, 0x23, 109},	/* 0x1a */
-	{0x5e, 0x43, 113},	/* 0x1b */
-	{0xbc, 0x44, 116},	/* 0x1c */
-	{0xe0, 0x46, 132},	/* 0x1d */
-	{0x54, 0x42, 135},	/* 0x1e */
-	{0xea, 0x2a, 139},	/* 0x1f */
-	{0x41, 0x22, 157},	/* 0x20 */
-	{0x70, 0x24, 162},	/* 0x21 */
-	{0x30, 0x21, 175},	/* 0x22 */
-	{0x4e, 0x22, 189},	/* 0x23 */
-	{0xde, 0x26, 194},	/* 0x24 */
-	{0x62, 0x06, 202},	/* 0x25 */
-	{0x3f, 0x03, 229},	/* 0x26 */
-	{0xb8, 0x06, 234},	/* 0x27 */
-	{0x34, 0x02, 253},	/* 0x28 */
-	{0x58, 0x04, 255},	/* 0x29 */
-	{0x24, 0x01, 265},	/* 0x2a */
-	{0x9b, 0x02, 267},	/* 0x2b */
-	{0x70, 0x05, 270},	/* 0x2c */
-	{0x25, 0x01, 272},	/* 0x2d */
-	{0x9c, 0x02, 277},	/* 0x2e */
-	{0x27, 0x01, 286},	/* 0x2f */
-	{0x3c, 0x02, 291},	/* 0x30 */
-	{0xef, 0x0a, 292},	/* 0x31 */
-	{0xf6, 0x0a, 310},	/* 0x32 */
-	{0x95, 0x01, 315},	/* 0x33 */
-	{0xf0, 0x09, 324},	/* 0x34 */
-	{0xfe, 0x0a, 331},	/* 0x35 */
-	{0xf3, 0x09, 332},	/* 0x36 */
-	{0xea, 0x08, 340},	/* 0x37 */
-	{0xe8, 0x07, 376},	/* 0x38 */
-	{0xde, 0x06, 389},	/* 0x39 */
-	{0x52, 0x2a, 54},	/* 0x3a */
-	{0x52, 0x6a, 27},	/* 0x3b */
-	{0x62, 0x24, 70},	/* 0x3c */
-	{0x62, 0x64, 70},	/* 0x3d */
-	{0xa8, 0x4c, 30},	/* 0x3e */
-	{0x20, 0x26, 33},	/* 0x3f */
-	{0x31, 0xc2, 39}	/* 0x40 */
-};
-
-typedef struct _SiS310_VBVCLKDataStruct {
-	UCHAR Part4_A, Part4_B;
+SiS310_VCLKDataStruct SiS310_VCLKData[]=
+{
+	{ 0x1b,0xe1, 25}, /* 0x0 */
+	{ 0x4e,0xe4, 28}, /* 0x1 */
+	{ 0x57,0xe4, 31}, /* 0x2 */
+	{ 0xc3,0xc8, 36}, /* 0x3 */
+	{ 0x42,0xe2, 40}, /* 0x4 */
+	{ 0xfe,0xcd, 43}, /* 0x5 */
+	{ 0x5d,0xc4, 44}, /* 0x6 */
+	{ 0x52,0xe2, 49}, /* 0x7 */
+	{ 0x53,0xe2, 50}, /* 0x8 */
+	{ 0x74,0x67, 52}, /* 0x9 */
+	{ 0x6d,0x66, 56}, /* 0xa */
+	{ 0x6c,0xc3, 65}, /* 0xb */
+	{ 0x46,0x44, 67}, /* 0xc */
+	{ 0xb1,0x46, 68}, /* 0xd */
+	{ 0xd3,0x4a, 72}, /* 0xe */
+	{ 0x29,0x61, 75}, /* 0xf */
+	{ 0x6e,0x46, 76}, /* 0x10 */
+	{ 0x2b,0x61, 78}, /* 0x11 */
+	{ 0x31,0x42, 79}, /* 0x12 */
+	{ 0xab,0x44, 83}, /* 0x13 */
+	{ 0x46,0x25, 84}, /* 0x14 */
+	{ 0x78,0x29, 86}, /* 0x15 */
+	{ 0x62,0x44, 94}, /* 0x16 */
+	{ 0x2b,0x41,104}, /* 0x17 */
+	{ 0x3a,0x23,105}, /* 0x18 */
+	{ 0x70,0x44,108}, /* 0x19 */
+	{ 0x3c,0x23,109}, /* 0x1a */
+	{ 0x5e,0x43,113}, /* 0x1b */
+	{ 0xbc,0x44,116}, /* 0x1c */
+	{ 0xe0,0x46,132}, /* 0x1d */
+	{ 0x54,0x42,135}, /* 0x1e */
+	{ 0xea,0x2a,139}, /* 0x1f */
+	{ 0x41,0x22,157}, /* 0x20 */
+	{ 0x70,0x24,162}, /* 0x21 */
+	{ 0x30,0x21,175}, /* 0x22 */
+	{ 0x4e,0x22,189}, /* 0x23 */
+	{ 0xde,0x26,194}, /* 0x24 */
+	{ 0x62,0x06,202}, /* 0x25 */
+	{ 0x3f,0x03,229}, /* 0x26 */
+	{ 0xb8,0x06,234}, /* 0x27 */
+	{ 0x34,0x02,253}, /* 0x28 */
+	{ 0x58,0x04,255}, /* 0x29 */
+	{ 0x24,0x01,265}, /* 0x2a */
+	{ 0x9b,0x02,267}, /* 0x2b */
+	{ 0x70,0x05,270}, /* 0x2c */
+	{ 0x25,0x01,272}, /* 0x2d */
+	{ 0x9c,0x02,277}, /* 0x2e */
+	{ 0x27,0x01,286}, /* 0x2f */
+	{ 0x3c,0x02,291}, /* 0x30 */
+	{ 0xef,0x0a,292}, /* 0x31 */
+	{ 0xf6,0x0a,310}, /* 0x32 */
+	{ 0x95,0x01,315}, /* 0x33 */
+	{ 0xf0,0x09,324}, /* 0x34 */
+	{ 0xfe,0x0a,331}, /* 0x35 */
+	{ 0xf3,0x09,332}, /* 0x36 */
+	{ 0xea,0x08,340}, /* 0x37 */
+	{ 0xe8,0x07,376}, /* 0x38 */
+	{ 0xde,0x06,389}, /* 0x39 */
+	{ 0x52,0x2a, 54}, /* 0x3a */
+	{ 0x52,0x6a, 27}, /* 0x3b */
+	{ 0x62,0x24, 70}, /* 0x3c */
+	{ 0x62,0x64, 70}, /* 0x3d */
+	{ 0xa8,0x4c, 30}, /* 0x3e */
+	{ 0x20,0x26, 33}, /* 0x3f */
+	{ 0x31,0xc2, 39}  /* 0x40 */
+};
+
+typedef struct _SiS310_VBVCLKDataStruct
+{
+	UCHAR Part4_A,Part4_B;
 	USHORT CLOCK;
 } SiS310_VBVCLKDataStruct;
-SiS310_VBVCLKDataStruct SiS310_VBVCLKData[] = {
-	{0x1b, 0xe1, 25},	/* 0x0 */
-	{0x4e, 0xe4, 28},	/* 0x1 */
-	{0x57, 0xe4, 31},	/* 0x2 */
-	{0xc3, 0xc8, 36},	/* 0x3 */
-	{0x42, 0x47, 40},	/* 0x4 */
-	{0xfe, 0xcd, 43},	/* 0x5 */
-	{0x5d, 0xc4, 44},	/* 0x6 */
-	{0x52, 0x47, 49},	/* 0x7 */
-	{0x53, 0x47, 50},	/* 0x8 */
-	{0x74, 0x67, 52},	/* 0x9 */
-	{0x6d, 0x66, 56},	/* 0xa */
-	{0x5a, 0x64, 65},	/* 0xb */
-	{0x46, 0x44, 67},	/* 0xc */
-	{0xb1, 0x46, 68},	/* 0xd */
-	{0xd3, 0x4a, 72},	/* 0xe */
-	{0x29, 0x61, 75},	/* 0xf */
-	{0x6d, 0x46, 75},	/* 0x10 */
-	{0x41, 0x43, 78},	/* 0x11 */
-	{0x31, 0x42, 79},	/* 0x12 */
-	{0xab, 0x44, 83},	/* 0x13 */
-	{0x46, 0x25, 84},	/* 0x14 */
-	{0x78, 0x29, 86},	/* 0x15 */
-	{0x62, 0x44, 94},	/* 0x16 */
-	{0x2b, 0x22, 104},	/* 0x17 */
-	{0x49, 0x24, 105},	/* 0x18 */
-	{0xf8, 0x2f, 108},	/* 0x19 */
-	{0x3c, 0x23, 109},	/* 0x1a */
-	{0x5e, 0x43, 113},	/* 0x1b */
-	{0xbc, 0x44, 116},	/* 0x1c */
-	{0xe0, 0x46, 132},	/* 0x1d */
-	{0xd4, 0x28, 135},	/* 0x1e */
-	{0xea, 0x2a, 139},	/* 0x1f */
-	{0x41, 0x22, 157},	/* 0x20 */
-	{0x70, 0x24, 162},	/* 0x21 */
-	{0x30, 0x21, 175},	/* 0x22 */
-	{0x4e, 0x22, 189},	/* 0x23 */
-	{0xde, 0x26, 194},	/* 0x24 */
-	{0x70, 0x07, 202},	/* 0x25 */
-	{0x3f, 0x03, 229},	/* 0x26 */
-	{0xb8, 0x06, 234},	/* 0x27 */
-	{0x34, 0x02, 253},	/* 0x28 */
-	{0x58, 0x04, 255},	/* 0x29 */
-	{0x24, 0x01, 265},	/* 0x2a */
-	{0x9b, 0x02, 267},	/* 0x2b */
-	{0x70, 0x05, 270},	/* 0x2c */
-	{0x25, 0x01, 272},	/* 0x2d */
-	{0x9c, 0x02, 277},	/* 0x2e */
-	{0x27, 0x01, 286},	/* 0x2f */
-	{0x3c, 0x02, 291},	/* 0x30 */
-	{0xef, 0x0a, 292},	/* 0x31 */
-	{0xf6, 0x0a, 310},	/* 0x32 */
-	{0x95, 0x01, 315},	/* 0x33 */
-	{0xf0, 0x09, 324},	/* 0x34 */
-	{0xfe, 0x0a, 331},	/* 0x35 */
-	{0xf3, 0x09, 332},	/* 0x36 */
-	{0xea, 0x08, 340},	/* 0x37 */
-	{0xe8, 0x07, 376},	/* 0x38 */
-	{0xde, 0x06, 389},	/* 0x39 */
-	{0x52, 0x2a, 54},	/* 0x3a */
-	{0x52, 0x6a, 27},	/* 0x3b */
-	{0x62, 0x24, 70},	/* 0x3c */
-	{0x62, 0x64, 70},	/* 0x3d */
-	{0xa8, 0x4c, 30},	/* 0x3e */
-	{0x20, 0x26, 33},	/* 0x3f */
-	{0x31, 0xc2, 39}	/* 0x40 */
-};
-
-UCHAR SiS310_ScreenOffset[] =
-    { 0x14, 0x19, 0x20, 0x28, 0x32, 0x40, 0x50, 0x64, 0x78, 0x80, 0x2d, 0x35 };
-
-typedef struct _SiS310_StResInfoStruct {
+
+SiS310_VBVCLKDataStruct SiS310_VBVCLKData[]=
+{
+	{ 0x1b,0xe1, 25}, /* 0x0 */
+	{ 0x4e,0xe4, 28}, /* 0x1 */
+	{ 0x57,0xe4, 31}, /* 0x2 */
+	{ 0xc3,0xc8, 36}, /* 0x3 */
+	{ 0x42,0x47, 40}, /* 0x4 */
+	{ 0xfe,0xcd, 43}, /* 0x5 */
+	{ 0x5d,0xc4, 44}, /* 0x6 */
+	{ 0x52,0x47, 49}, /* 0x7 */
+	{ 0x53,0x47, 50}, /* 0x8 */
+	{ 0x74,0x67, 52}, /* 0x9 */
+	{ 0x6d,0x66, 56}, /* 0xa */
+	{ 0x5a,0x64, 65}, /* 0xb */
+	{ 0x46,0x44, 67}, /* 0xc */
+	{ 0xb1,0x46, 68}, /* 0xd */
+	{ 0xd3,0x4a, 72}, /* 0xe */
+	{ 0x29,0x61, 75}, /* 0xf */
+	{ 0x6d,0x46, 75}, /* 0x10 */
+	{ 0x41,0x43, 78}, /* 0x11 */
+	{ 0x31,0x42, 79}, /* 0x12 */
+	{ 0xab,0x44, 83}, /* 0x13 */
+	{ 0x46,0x25, 84}, /* 0x14 */
+	{ 0x78,0x29, 86}, /* 0x15 */
+	{ 0x62,0x44, 94}, /* 0x16 */
+	{ 0x2b,0x22,104}, /* 0x17 */
+	{ 0x49,0x24,105}, /* 0x18 */
+	{ 0xf8,0x2f,108}, /* 0x19 */
+	{ 0x3c,0x23,109}, /* 0x1a */
+	{ 0x5e,0x43,113}, /* 0x1b */
+	{ 0xbc,0x44,116}, /* 0x1c */
+	{ 0xe0,0x46,132}, /* 0x1d */
+	{ 0xd4,0x28,135}, /* 0x1e */
+	{ 0xea,0x2a,139}, /* 0x1f */
+	{ 0x41,0x22,157}, /* 0x20 */
+	{ 0x70,0x24,162}, /* 0x21 */
+	{ 0x30,0x21,175}, /* 0x22 */
+	{ 0x4e,0x22,189}, /* 0x23 */
+	{ 0xde,0x26,194}, /* 0x24 */
+	{ 0x70,0x07,202}, /* 0x25 */
+	{ 0x3f,0x03,229}, /* 0x26 */
+	{ 0xb8,0x06,234}, /* 0x27 */
+	{ 0x34,0x02,253}, /* 0x28 */
+	{ 0x58,0x04,255}, /* 0x29 */
+	{ 0x24,0x01,265}, /* 0x2a */
+	{ 0x9b,0x02,267}, /* 0x2b */
+	{ 0x70,0x05,270}, /* 0x2c */
+	{ 0x25,0x01,272}, /* 0x2d */
+	{ 0x9c,0x02,277}, /* 0x2e */
+	{ 0x27,0x01,286}, /* 0x2f */
+	{ 0x3c,0x02,291}, /* 0x30 */
+	{ 0xef,0x0a,292}, /* 0x31 */
+	{ 0xf6,0x0a,310}, /* 0x32 */
+	{ 0x95,0x01,315}, /* 0x33 */
+	{ 0xf0,0x09,324}, /* 0x34 */
+	{ 0xfe,0x0a,331}, /* 0x35 */
+	{ 0xf3,0x09,332}, /* 0x36 */
+	{ 0xea,0x08,340}, /* 0x37 */
+	{ 0xe8,0x07,376}, /* 0x38 */
+	{ 0xde,0x06,389}, /* 0x39 */
+	{ 0x52,0x2a, 54}, /* 0x3a */
+	{ 0x52,0x6a, 27}, /* 0x3b */
+	{ 0x62,0x24, 70}, /* 0x3c */
+	{ 0x62,0x64, 70}, /* 0x3d */
+	{ 0xa8,0x4c, 30}, /* 0x3e */
+	{ 0x20,0x26, 33}, /* 0x3f */
+	{ 0x31,0xc2, 39}  /* 0x40 */
+};
+
+UCHAR SiS310_ScreenOffset[]={ 0x14,0x19,0x20,0x28,0x32,0x40,
+                              0x50,0x64,0x78,0x80,0x2d,0x35 };
+
+typedef struct _SiS310_StResInfoStruct
+{
 	USHORT HTotal;
 	USHORT VTotal;
 } SiS310_StResInfoStruct;
-SiS310_StResInfoStruct SiS310_StResInfo[] = {
-	{640, 400},
-	{640, 350},
-	{720, 400},
-	{720, 350},
-	{640, 480}
+
+SiS310_StResInfoStruct SiS310_StResInfo[]=
+{
+	{ 640,400},
+	{ 640,350},
+	{ 720,400},
+	{ 720,350},
+	{ 640,480}
 };
 
-typedef struct _SiS310_ModeResInfoStruct {
+typedef struct _SiS310_ModeResInfoStruct
+{
 	USHORT HTotal;
 	USHORT VTotal;
-	UCHAR XChar;
-	UCHAR YChar;
+	UCHAR  XChar;
+	UCHAR  YChar;
 } SiS310_ModeResInfoStruct;
-SiS310_ModeResInfoStruct SiS310_ModeResInfo[] = {
-	{320, 200, 8, 8},
-	{320, 240, 8, 8},
-	{320, 400, 8, 8},
-	{400, 300, 8, 8},
-	{512, 384, 8, 8},
-	{640, 400, 8, 16},
-	{640, 480, 8, 16},
-	{800, 600, 8, 16},
-	{1024, 768, 8, 16},
-	{1280, 1024, 8, 16},
-	{1600, 1200, 8, 16},
-	{1920, 1440, 8, 16},
-	{2048, 1536, 8, 16},
-	{720, 480, 8, 16},
-	{720, 576, 8, 16},
-	{1280, 960, 8, 16},
-	{800, 480, 8, 16},
-	{1024, 576, 8, 16},
-	{1280, 720, 8, 16}
+
+SiS310_ModeResInfoStruct SiS310_ModeResInfo[]=
+{
+	{  320, 200, 8, 8},
+	{  320, 240, 8, 8},
+	{  320, 400, 8, 8},
+	{  400, 300, 8, 8},
+	{  512, 384, 8, 8},
+	{  640, 400, 8,16},
+	{  640, 480, 8,16},
+	{  800, 600, 8,16},
+	{ 1024, 768, 8,16},
+	{ 1280,1024, 8,16},
+	{ 1600,1200, 8,16},
+	{ 1920,1440, 8,16},
+	{ 2048,1536, 8,16},
+	{  720, 480, 8,16},
+	{  720, 576, 8,16},
+	{ 1280, 960, 8,16},
+	{  800, 480, 8,16},
+	{ 1024, 576, 8,16},
+	{ 1280, 720, 8,16}
 };
 
 UCHAR SiS310_OutputSelect = 0;
+
 UCHAR SiS310_SoftSetting = 30;
-UCHAR SiS310_SR07 = 0x18;
-UCHAR SiS310_SR15[8][4] = {
-	{0x0, 0x4, 0x60, 0x60},
-	{0xf, 0xf, 0xf, 0xf},
-	{0xba, 0xba, 0xba, 0xba},
-	{0xa9, 0xa9, 0xac, 0xac},
-	{0xa0, 0xa0, 0xa0, 0xa8},
-	{0x0, 0x0, 0x2, 0x2},
-	{0x30, 0x30, 0x40, 0x40},
-	{0x0, 0xa5, 0xfb, 0xf6}
-};
-UCHAR SiS310_CR40[5][4] = {
-	{0x77, 0x77, 0x33, 0x33},
-	{0x77, 0x77, 0x33, 0x33},
-	{0x0, 0x0, 0x0, 0x0},
-	{0x5b, 0x5b, 0x3, 0x3},
-	{0x0, 0x0, 0xf0, 0xf8}
-};
-UCHAR SiS310_CR49[] = { 0xaa, 0x88 };
-UCHAR SiS310_SR1F = 0x0;
-UCHAR SiS310_SR21 = 0xa5;
-UCHAR SiS310_SR22 = 0xfb;
-UCHAR SiS310_SR23 = 0xf6;
-UCHAR SiS310_SR24 = 0xd;
-UCHAR SiS310_SR25[] = { 0x33, 0x3 };
-UCHAR SiS310_SR31 = 0x0;
-UCHAR SiS310_SR32 = 0x11;
-UCHAR SiS310_SR33 = 0x0;
+
+UCHAR SiS310_SR07=0x18;
+
+UCHAR SiS310_SR15[8][4]={
+	{0x00,0x04,0x60,0x60},
+	{0x0f,0x0f,0x0f,0x0f},
+	{0xba,0xba,0xba,0xba},
+	{0xa9,0xa9,0xac,0xac},
+	{0xa0,0xa0,0xa0,0xa8},
+	{0x00,0x00,0x02,0x02},
+	{0x30,0x30,0x40,0x40},
+	{0x00,0xa5,0xfb,0xf6}
+};
+UCHAR SiS310_CR40[5][4]={
+	{0x77,0x77,0x33,0x33},
+	{0x77,0x77,0x33,0x33},
+	{0x00,0x00,0x00,0x00},
+	{0x5b,0x5b,0x03,0x03},
+	{0x00,0x00,0xf0,0xf8}
+};
+UCHAR SiS310_CR49[]={0xaa,0x88};
+UCHAR SiS310_SR1F=0x0;
+UCHAR SiS310_SR21=0xa5;
+UCHAR SiS310_SR22=0xfb;
+UCHAR SiS310_SR23=0xf6;
+UCHAR SiS310_SR24=0xd;
+UCHAR SiS310_SR25[]={0x33,0x3};
+UCHAR SiS310_SR31=0x0;
+UCHAR SiS310_SR32=0x11;
+UCHAR SiS310_SR33=0x0;
 UCHAR SiS310_CRT2Data_1_2 = 0x0;
 UCHAR SiS310_CRT2Data_4_D = 0x0;
 UCHAR SiS310_CRT2Data_4_E = 0x0;
@@ -1127,14 +1098,15 @@ UCHAR SiS310_CRT2Data_4_10 = 0x80;
 USHORT SiS310_RGBSenseData = 0xd1;
 USHORT SiS310_VideoSenseData = 0xb9;
 USHORT SiS310_YCSenseData = 0xb3;
-USHORT SiS310_RGBSenseData2 = 0x0190;	/*301b */
+USHORT SiS310_RGBSenseData2 = 0x0190;     /*301b*/
 USHORT SiS310_VideoSenseData2 = 0x0174;
 USHORT SiS310_YCSenseData2 = 0x016b;
-UCHAR SiS310_NTSCPhase[] = { 0x21, 0xed, 0x8a, 0x8 };
+UCHAR SiS310_NTSCPhase[] = {0x21,0xed,0x8a,0x8};
 
-UCHAR SiS310_PALPhase[] = { 0x2a, 0x5, 0xd3, 0x0 };
+UCHAR SiS310_PALPhase[] = {0x2a,0x5,0xd3,0x0};
 
-typedef struct _SiS310_LCDDataStruct {
+typedef struct _SiS310_LCDDataStruct
+{
 	USHORT RVBHCMAX;
 	USHORT RVBHCFACT;
 	USHORT VGAHT;
@@ -1142,99 +1114,109 @@ typedef struct _SiS310_LCDDataStruct {
 	USHORT LCDHT;
 	USHORT LCDVT;
 } SiS310_LCDDataStruct;
-SiS310_LCDDataStruct SiS310_StLCD1024x768Data[] = {
-	{62, 25, 800, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{104, 45, 945, 496, 1344, 806},
-	{62, 25, 800, 546, 1344, 806},
-	{31, 18, 1008, 624, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS310_LCDDataStruct SiS310_ExtLCD1024x768Data[] = {
-	{12, 5, 896, 512, 1344, 806},
-	{12, 5, 896, 510, 1344, 806},
-	{32, 15, 1008, 505, 1344, 806},
-	{32, 15, 1008, 514, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806},
-	{12, 5, 896, 500, 1344, 806},
-	{42, 25, 1024, 625, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS310_LCDDataStruct SiS310_St2LCD1024x768Data[] = {
-	{62, 25, 800, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{32, 15, 930, 546, 1344, 806},
-	{104, 45, 945, 496, 1344, 806},
-	{62, 25, 800, 546, 1344, 806},
-	{31, 18, 1008, 624, 1344, 806},
-	{1, 1, 1344, 806, 1344, 806}
-};
-
-SiS310_LCDDataStruct SiS310_StLCD1280x1024Data[] = {
-	{22, 5, 800, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{13, 5, 1024, 675, 1560, 1152},
-	{16, 9, 1266, 804, 1688, 1072},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS310_LCDDataStruct SiS310_ExtLCD1280x1024Data[] = {
-	{211, 60, 1024, 501, 1688, 1066},
-	{211, 60, 1024, 508, 1688, 1066},
-	{211, 60, 1024, 501, 1688, 1066},
-	{211, 60, 1024, 508, 1688, 1066},
-	{211, 60, 1024, 500, 1688, 1066},
-	{211, 75, 1024, 625, 1688, 1066},
-	{211, 120, 1280, 798, 1688, 1066},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS310_LCDDataStruct SiS310_St2LCD1280x1024Data[] = {
-	{22, 5, 800, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{176, 45, 900, 510, 1650, 1088},
-	{22, 5, 800, 510, 1650, 1088},
-	{13, 5, 1024, 675, 1560, 1152},
-	{16, 9, 1266, 804, 1688, 1072},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS310_LCDDataStruct SiS310_NoScaleData[] = {
-	{1, 1, 800, 449, 800, 449},
-	{1, 1, 800, 449, 800, 449},
-	{1, 1, 900, 449, 900, 449},
-	{1, 1, 900, 449, 900, 449},
-	{1, 1, 800, 525, 800, 525},
-	{1, 1, 1056, 628, 1056, 628},
-	{1, 1, 1344, 806, 1344, 806},
-	{1, 1, 1688, 1066, 1688, 1066}
-};
-
-SiS310_LCDDataStruct SiS310_LCD1280x960Data[] = {
-	{9, 2, 800, 500, 1800, 1000},
-	{9, 2, 800, 500, 1800, 1000},
-	{4, 1, 900, 500, 1800, 1000},
-	{4, 1, 900, 500, 1800, 1000},
-	{9, 2, 800, 500, 1800, 1000},
-	{30, 11, 1056, 625, 1800, 1000},
-	{5, 3, 1350, 800, 1800, 1000},
-	{1, 1, 1576, 1050, 1576, 1050},
-	{1, 1, 1800, 1000, 1800, 1000}
-};
-
-typedef struct _SiS310_TVDataStruct {
+
+SiS310_LCDDataStruct  SiS310_StLCD1024x768Data[]=
+{
+	{   62,  25, 800, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{  104,  45, 945, 496,1344, 806},
+	{   62,  25, 800, 546,1344, 806},
+	{   31,  18,1008, 624,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS310_LCDDataStruct  SiS310_ExtLCD1024x768Data[]=
+{
+	{   12,   5, 896, 512,1344, 806},
+	{   12,   5, 896, 510,1344, 806},
+	{   32,  15,1008, 505,1344, 806},
+	{   32,  15,1008, 514,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806},
+	{   12,   5, 896, 500,1344, 806},
+	{   42,  25,1024, 625,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS310_LCDDataStruct  SiS310_St2LCD1024x768Data[]=
+{
+	{   62,  25, 800, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{   32,  15, 930, 546,1344, 806},
+	{  104,  45, 945, 496,1344, 806},
+	{   62,  25, 800, 546,1344, 806},
+	{   31,  18,1008, 624,1344, 806},
+	{    1,   1,1344, 806,1344, 806}
+};
+
+SiS310_LCDDataStruct  SiS310_StLCD1280x1024Data[]=
+{
+	{   22,   5, 800, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS310_LCDDataStruct  SiS310_ExtLCD1280x1024Data[]=
+{
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 501,1688,1066},
+	{  211,  60,1024, 508,1688,1066},
+	{  211,  60,1024, 500,1688,1066},
+	{  211,  75,1024, 625,1688,1066},
+	{  211, 120,1280, 798,1688,1066},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS310_LCDDataStruct  SiS310_St2LCD1280x1024Data[]=
+{
+	{   22,   5, 800, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{  176,  45, 900, 510,1650,1088},
+	{   22,   5, 800, 510,1650,1088},
+	{   13,   5,1024, 675,1560,1152},
+	{   16,   9,1266, 804,1688,1072},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS310_LCDDataStruct  SiS310_NoScaleData[]=
+{
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 800, 449, 800, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 900, 449, 900, 449},
+	{    1,   1, 800, 525, 800, 525},
+	{    1,   1,1056, 628,1056, 628},
+	{    1,   1,1344, 806,1344, 806},
+	{    1,   1,1688,1066,1688,1066}
+};
+
+SiS310_LCDDataStruct  SiS310_LCD1280x960Data[]=
+{
+	{    9,   2, 800, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    4,   1, 900, 500,1800,1000},
+	{    9,   2, 800, 500,1800,1000},
+	{   30,  11,1056, 625,1800,1000},
+	{    5,   3,1350, 800,1800,1000},
+	{    1,   1,1576,1050,1576,1050},
+	{    1,   1,1800,1000,1800,1000}
+};
+
+typedef struct _SiS310_TVDataStruct
+{
 	USHORT RVBHCMAX;
 	USHORT RVBHCFACT;
 	USHORT VGAHT;
@@ -1249,1070 +1231,1105 @@ typedef struct _SiS310_TVDataStruct {
 	UCHAR RY3COE;
 	UCHAR RY4COE;
 } SiS310_TVDataStruct;
-SiS310_TVDataStruct SiS310_StPALData[] = {
-	{1, 1, 864, 525, 1270, 400, 100, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 350, 100, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 400, 0, 0, 720, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 864, 525, 1270, 350, 0, 0, 720, 0xf4, 0x0b, 0x1c, 0x0a},
-	{1, 1, 864, 525, 1270, 480, 50, 0, 760, 0xf4, 0xff, 0x1c, 0x22},
-	{1, 1, 864, 525, 1270, 600, 50, 0, 0, 0xf4, 0xff, 0x1c, 0x22}
-};
-
-SiS310_TVDataStruct SiS310_ExtPALData[] = {
-	{27, 10, 848, 448, 1270, 530, 50, 0, 50, 0xf4, 0xff, 0x1c, 0x22},
-	{108, 35, 848, 398, 1270, 530, 50, 0, 50, 0xf4, 0xff, 0x1c, 0x22},
-	{12, 5, 954, 448, 1270, 530, 50, 0, 50, 0xf1, 0x04, 0x1f, 0x18},
-	{9, 4, 960, 463, 1644, 438, 50, 0, 50, 0xf4, 0x0b, 0x1c, 0x0a},
-	{9, 4, 848, 528, 1270, 530, 0, 0, 50, 0xf5, 0xfb, 0x1b, 0x2a},
-	{36, 25, 1060, 648, 1316, 530, 438, 0, 438, 0xeb, 0x05, 0x25, 0x16},
-	{3, 2, 1080, 619, 1270, 540, 438, 0, 438, 0xf3, 0x00, 0x1d, 0x20},
-	{1, 1, 1170, 821, 1270, 520, 686, 0, 686, 0xF3, 0x00, 0x1D, 0x20}	/*301b */
-};
-
-SiS310_TVDataStruct SiS310_StNTSCData[] = {
-	{1, 1, 858, 525, 1270, 400, 50, 0, 760, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 350, 50, 0, 640, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 400, 0, 0, 720, 0xf1, 0x04, 0x1f, 0x18},
-	{1, 1, 858, 525, 1270, 350, 0, 0, 720, 0xf4, 0x0b, 0x1c, 0x0a},
-	{1, 1, 858, 525, 1270, 480, 0, 0, 760, 0xf1, 0x04, 0x1f, 0x18}
-};
-
-SiS310_TVDataStruct SiS310_ExtNTSCData[] = {
-	{143, 65, 858, 443, 1270, 440, 171, 0, 171, 0xf1, 0x04, 0x1f, 0x18},
-	{88, 35, 858, 393, 1270, 440, 171, 0, 171, 0xf1, 0x04, 0x1f, 0x18},
-	{143, 70, 924, 443, 1270, 440, 92, 0, 92, 0xf1, 0x04, 0x1f, 0x18},
-	{143, 70, 924, 393, 1270, 440, 92, 0, 92, 0xf4, 0x0b, 0x1c, 0x0a},
-	{143, 76, 836, 523, 1270, 440, 224, 0, 0, 0xf1, 0x05, 0x1f, 0x16},
-	{143, 120, 1056, 643, 1288, 440, 0, 128, 0, 0xf4, 0x10, 0x1c, 0x00},
-	{2, 1, 858, 503, 1270, 480, 0, 128, 0, 0xee, 0x0c, 0x22, 0x08},
-	{65, 64, 1056, 791, 1270, 480, 638, 0, 0, 0xEE, 0x0C, 0x22, 0x08}	/*301b */
-};
-
-SiS310_TVDataStruct SiS310_St1HiTVData[] = {
-	0x00
-};
-
-SiS310_TVDataStruct SiS310_St2HiTVData[] = {
-	0x00
-};
-
-SiS310_TVDataStruct SiS310_ExtHiTVData[] = {
-	0x00
-};
+SiS310_TVDataStruct  SiS310_StPALData[]=
+{
+ {    1,   1, 864, 525,1270, 400, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 350, 100,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 864, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+ {    1,   1, 864, 525,1270, 480,  50,   0, 760,0xf4,0xff,0x1c,0x22},
+ {    1,   1, 864, 525,1270, 600,  50,   0,   0,0xf4,0xff,0x1c,0x22}
+};
+
+SiS310_TVDataStruct  SiS310_ExtPALData[]=
+{
+ {   27,  10, 848, 448,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+ {  108,  35, 848, 398,1270, 530,  50,   0,  50,0xf4,0xff,0x1c,0x22},
+ {   12,   5, 954, 448,1270, 530,  50,   0,  50,0xf1,0x04,0x1f,0x18},
+ {    9,   4, 960, 463,1644, 438,  50,   0,  50,0xf4,0x0b,0x1c,0x0a},
+ {    9,   4, 848, 528,1270, 530,   0,   0,  50,0xf5,0xfb,0x1b,0x2a},
+ {   36,  25,1060, 648,1316, 530, 438,   0, 438,0xeb,0x05,0x25,0x16},
+ {    3,   2,1080, 619,1270, 540, 438,   0, 438,0xf3,0x00,0x1d,0x20},
+ {    1,   1,1170, 821,1270, 520, 686,   0, 686,0xF3,0x00,0x1D,0x20}     /*301b*/
+};
+
+SiS310_TVDataStruct  SiS310_StNTSCData[]=
+{
+ {    1,   1, 858, 525,1270, 400,  50,   0, 760,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 350,  50,   0, 640,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 400,   0,   0, 720,0xf1,0x04,0x1f,0x18},
+ {    1,   1, 858, 525,1270, 350,   0,   0, 720,0xf4,0x0b,0x1c,0x0a},
+ {    1,   1, 858, 525,1270, 480,   0,   0, 760,0xf1,0x04,0x1f,0x18}
+};
+
+SiS310_TVDataStruct  SiS310_ExtNTSCData[]=
+{
+ {  143,  65, 858, 443,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+ {   88,  35, 858, 393,1270, 440, 171,   0, 171,0xf1,0x04,0x1f,0x18},
+ {  143,  70, 924, 443,1270, 440,  92,   0,  92,0xf1,0x04,0x1f,0x18},
+ {  143,  70, 924, 393,1270, 440,  92,   0,  92,0xf4,0x0b,0x1c,0x0a},
+ {  143,  76, 836, 523,1270, 440, 224,   0,   0,0xf1,0x05,0x1f,0x16},
+ {  143, 120,1056, 643,1288, 440,   0, 128,   0,0xf4,0x10,0x1c,0x00},
+ {    2,   1, 858, 503,1270, 480,   0, 128,   0,0xee,0x0c,0x22,0x08},
+ {   65,  64,1056, 791,1270, 480, 638,   0,   0,0xEE,0x0C,0x22,0x08} /*301b*/     
+};
+
+SiS310_TVDataStruct  SiS310_St1HiTVData[]=
+{
+0x00};
+
+SiS310_TVDataStruct  SiS310_St2HiTVData[]=
+{
+0x00};
+
+SiS310_TVDataStruct  SiS310_ExtHiTVData[]=
+{
+0x00};
 
 UCHAR SiS310_NTSCTiming[] = {
-	0x17, 0x1d, 0x03, 0x09, 0x05, 0x06, 0x0c, 0x0c,
-	0x94, 0x49, 0x01, 0x0a, 0x06, 0x0d, 0x04, 0x0a,
-	0x06, 0x14, 0x0d, 0x04, 0x0a, 0x00, 0x85, 0x1b,
-	0x0c, 0x50, 0x00, 0x97, 0x00, 0xda, 0x4a, 0x17,
-	0x7d, 0x05, 0x4b, 0x00, 0x00, 0xe2, 0x00, 0x02,
-	0x03, 0x0a, 0x65, 0x9d, 0x08, 0x92, 0x8f, 0x40,
-	0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x50,
-	0x00, 0x40, 0x44, 0x00, 0xdb, 0x02, 0x3b, 0x00
-};
+  0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
+  0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
+  0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
+  0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17,
+  0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02,
+  0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40,
+  0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50,
+  0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00};
 
 UCHAR SiS310_PALTiming[] = {
-	0x19, 0x52, 0x35, 0x6e, 0x04, 0x38, 0x3d, 0x70,
-	0x94, 0x49, 0x01, 0x12, 0x06, 0x3e, 0x35, 0x6d,
-	0x06, 0x14, 0x3e, 0x35, 0x6d, 0x00, 0x45, 0x2b,
-	0x70, 0x50, 0x00, 0x9b, 0x00, 0xd9, 0x5d, 0x17,
-	0x7d, 0x05, 0x45, 0x00, 0x00, 0xe8, 0x00, 0x02,
-	0x0d, 0x00, 0x68, 0xb0, 0x0b, 0x92, 0x8f, 0x40,
-	0x60, 0x80, 0x14, 0x90, 0x8c, 0x60, 0x14, 0x63,
-	0x00, 0x40, 0x3e, 0x00, 0xe1, 0x02, 0x28, 0x00
-};
+  0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
+  0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
+  0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
+  0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17,
+  0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02,
+  0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40,
+  0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63,
+  0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00};
 
-UCHAR SiS310_HiTVExtTiming[] = { 0x00 };
+UCHAR SiS310_HiTVExtTiming[] = {0x00};
 
-UCHAR SiS310_HiTVSt1Timing[] = { 0x00 };
+UCHAR SiS310_HiTVSt1Timing[] = {0x00};
 
-UCHAR SiS310_HiTVSt2Timing[] = { 0x00 };
+UCHAR SiS310_HiTVSt2Timing[] = {0x00};
 
-UCHAR SiS310_HiTVTextTiming[] = { 0x00 };
+UCHAR SiS310_HiTVTextTiming[] = {0x00};
 
-UCHAR SiS310_HiTVGroup3Data[] = { 0x00 };
+UCHAR SiS310_HiTVGroup3Data[] = {0x00};
 
-UCHAR SiS310_HiTVGroup3Simu[] = { 0x00 };
+UCHAR SiS310_HiTVGroup3Simu[] = {0x00};
 
-UCHAR SiS310_HiTVGroup3Text[] = { 0x00 };
+UCHAR SiS310_HiTVGroup3Text[] = {0x00};
 
-typedef struct _SiS310_PanelDelayTblStruct {
-	UCHAR timer[2];
+typedef struct _SiS310_PanelDelayTblStruct
+{
+ UCHAR timer[2];
 } SiS310_PanelDelayTblStruct;
-SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[] = { {0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00},
-{0x00, 0x00}
-};
-
-typedef struct _SiS310_LVDSDataStruct {
-	USHORT VGAHT;
-	USHORT VGAVT;
-	USHORT LCDHT;
-	USHORT LCDVT;
+SiS310_PanelDelayTblStruct SiS310_PanelDelayTbl[]=
+{{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00},
+{0x00,0x00}};
+
+typedef struct _SiS310_LVDSDataStruct
+{
+ USHORT VGAHT;
+ USHORT VGAVT;
+ USHORT LCDHT;
+ USHORT LCDVT;
 } SiS310_LVDSDataStruct;
-SiS310_LVDSDataStruct SiS310_LVDS800x600Data_1[] = {
-	{848, 433, 1060, 629},
-	{848, 389, 1060, 629},
-	{848, 433, 1060, 629},
-	{848, 389, 1060, 629},
-	{848, 518, 1060, 629},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{800, 449, 1000, 644},
-	{800, 525, 1000, 635}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS800x600Data_2[] = {
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{800, 449, 1000, 644},
-	{800, 525, 1000, 635}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS1024x768Data_1[] = {
-	{840, 438, 1344, 806},
-	{840, 409, 1344, 806},
-	{840, 438, 1344, 806},
-	{840, 409, 1344, 806},
-	{840, 518, 1344, 806},
-	{1050, 638, 1344, 806},
-	{1344, 806, 1344, 806},
-	{800, 449, 1280, 801},
-	{800, 525, 1280, 813}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS1024x768Data_2[] = {
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{800, 449, 1280, 801},
-	{800, 525, 1280, 813}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS1280x1024Data_1[] = {
-	{840, 438, 1344, 806},
-	{840, 409, 1344, 806},
-	{840, 438, 1344, 806},
-	{840, 409, 1344, 806},
-	{840, 518, 1344, 806},
-	{1050, 638, 1344, 806},
-	{1344, 806, 1344, 806},
-	{800, 449, 1280, 801},
-	{800, 525, 1280, 813}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS1280x1024Data_2[] = {
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{1344, 806, 1344, 806},
-	{800, 449, 1280, 801},
-	{800, 525, 1280, 813}
-};
-
-SiS310_LVDSDataStruct SiS310_LVDS640x480Data_1[] = {
-	{800, 449, 800, 449},
-	{800, 449, 800, 449},
-	{800, 449, 800, 449},
-	{800, 449, 800, 449},
-	{800, 525, 800, 525},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628},
-	{1056, 628, 1056, 628}
-};
-
-SiS310_LVDSDataStruct SiS310_CHTVUNTSCData[] = {
-	{840, 600, 840, 600},
-	{840, 600, 840, 600},
-	{840, 600, 840, 600},
-	{840, 600, 840, 600},
-	{784, 600, 784, 600},
-	{1064, 750, 1064, 750}
-};
-
-SiS310_LVDSDataStruct SiS310_CHTVONTSCData[] = {
-	{840, 525, 840, 525},
-	{840, 525, 840, 525},
-	{840, 525, 840, 525},
-	{840, 525, 840, 525},
-	{784, 525, 784, 525},
-	{1040, 700, 1040, 700}
-};
-
-SiS310_LVDSDataStruct SiS310_CHTVUPALData[] = {
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{840, 750, 840, 750},
-	{936, 836, 936, 836}
-};
-
-SiS310_LVDSDataStruct SiS310_CHTVOPALData[] = {
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{1008, 625, 1008, 625},
-	{840, 625, 840, 625},
-	{960, 750, 960, 750}
-};
-
-typedef struct _SiS310_LVDSDesStruct {
-	USHORT LCDHDES;
-	USHORT LCDVDES;
+SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_1[]=
+{
+ {848, 433,1060, 629},
+ {848, 389,1060, 629},
+ {848, 433,1060, 629},
+ {848, 389,1060, 629},
+ {848, 518,1060, 629},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {800, 449,1000, 644},
+ {800, 525,1000, 635}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS800x600Data_2[]=
+{
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {800, 449,1000, 644},
+ {800, 525,1000, 635}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_1[]=
+{
+ {840, 438,1344, 806},
+ {840, 409,1344, 806},
+ {840, 438,1344, 806},
+ {840, 409,1344, 806},
+ {840, 518,1344, 806},
+ {1050, 638,1344, 806},
+ {1344, 806,1344, 806},
+ {800, 449,1280, 801},
+ {800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1024x768Data_2[]=
+{
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {800, 449,1280, 801},
+ {800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_1[]=
+{
+ {840, 438,1344, 806},
+ {840, 409,1344, 806},
+ {840, 438,1344, 806},
+ {840, 409,1344, 806},
+ {840, 518,1344, 806},
+ {1050, 638,1344, 806},
+ {1344, 806,1344, 806},
+ {800, 449,1280, 801},
+ {800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS1280x1024Data_2[]=
+{
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {1344, 806,1344, 806},
+ {800, 449,1280, 801},
+ {800, 525,1280, 813}
+};
+
+SiS310_LVDSDataStruct  SiS310_LVDS640x480Data_1[]=
+{
+ {800, 449, 800, 449},
+ {800, 449, 800, 449},
+ {800, 449, 800, 449},
+ {800, 449, 800, 449},
+ {800, 525, 800, 525},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628},
+ {1056, 628,1056, 628}
+};
+
+SiS310_LVDSDataStruct  SiS310_CHTVUNTSCData[]=
+{
+ {840, 600, 840, 600},
+ {840, 600, 840, 600},
+ {840, 600, 840, 600},
+ {840, 600, 840, 600},
+ {784, 600, 784, 600},
+ {1064, 750,1064, 750}
+};
+
+SiS310_LVDSDataStruct  SiS310_CHTVONTSCData[]=
+{
+ {840, 525, 840, 525},
+ {840, 525, 840, 525},
+ {840, 525, 840, 525},
+ {840, 525, 840, 525},
+ {784, 525, 784, 525},
+ {1040, 700,1040, 700}
+};
+
+SiS310_LVDSDataStruct  SiS310_CHTVUPALData[]=
+{
+ {1008, 625,1008, 625},
+ {1008, 625,1008, 625},
+ {1008, 625,1008, 625},
+ {1008, 625,1008, 625},
+ {840, 750, 840, 750},
+ {936, 836, 936, 836}
+};
+
+SiS310_LVDSDataStruct  SiS310_CHTVOPALData[]=
+{
+ {1008, 625,1008, 625},
+ {1008, 625,1008, 625},
+ {1008, 625,1008, 625},
+ {1008, 625,1008, 625},
+ {840, 625, 840, 625},
+ {960, 750, 960, 750}
+};
+
+typedef struct _SiS310_LVDSDesStruct
+{
+ USHORT LCDHDES;
+ USHORT LCDVDES;
 } SiS310_LVDSDesStruct;
-SiS310_LVDSDesStruct SiS310_PanelType00_1[] = {
-	{1059, 626},
-	{1059, 624},
-	{1059, 626},
-	{1059, 624},
-	{1059, 624},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType01_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType02_1[] = {
-	{1059, 626},
-	{1059, 624},
-	{1059, 626},
-	{1059, 624},
-	{1059, 624},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType03_1[] = {
-	{8, 436},
-	{8, 440},
-	{8, 436},
-	{8, 440},
-	{8, 512},
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType04_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType05_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType06_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType07_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType08_1[] = {
-	{1059, 626},
-	{1059, 624},
-	{1059, 626},
-	{1059, 624},
-	{1059, 624},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType09_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0a_1[] = {
-	{1059, 626},
-	{1059, 624},
-	{1059, 626},
-	{1059, 624},
-	{1059, 624},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0b_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0c_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0d_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0e_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0f_1[] = {
-	{1343, 798},
-	{1343, 794},
-	{1343, 798},
-	{1343, 794},
-	{1343, 0},
-	{1343, 0},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType00_2[] = {
-	{976, 527},
-	{976, 502},
-	{976, 527},
-	{976, 502},
-	{976, 567},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType01_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType02_2[] = {
-	{976, 527},
-	{976, 502},
-	{976, 527},
-	{976, 502},
-	{976, 567},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType03_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{1152, 622},
-	{1152, 597}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType04_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType05_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType06_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType07_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType08_2[] = {
-	{976, 527},
-	{976, 502},
-	{976, 527},
-	{976, 502},
-	{976, 567},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType09_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0a_2[] = {
-	{976, 527},
-	{976, 502},
-	{976, 527},
-	{976, 502},
-	{976, 567},
-	{0, 627},
-	{0, 627},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0b_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0c_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0d_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0e_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_PanelType0f_2[] = {
-	{1152, 622},
-	{1152, 597},
-	{1152, 622},
-	{1152, 597},
-	{1152, 662},
-	{1232, 722},
-	{0, 805},
-	{0, 794},
-	{0, 0}
+SiS310_LVDSDesStruct  SiS310_PanelType00_1[]=
+{
+ {1059, 626},
+ {1059, 624},
+ {1059, 626},
+ {1059, 624},
+ {1059, 624},
+ { 0, 627},
+ { 0, 627},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType01_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType02_1[]=
+{
+ {1059, 626},
+ {1059, 624},
+ {1059, 626},
+ {1059, 624},
+ {1059, 624},
+ { 0, 627},
+ { 0, 627},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType03_1[]=
+{
+ { 8, 436},
+ { 8, 440},
+ { 8, 436},
+ { 8, 440},
+ { 8, 512},
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType04_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType05_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType06_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType07_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType08_1[]=
+{
+ {1059, 626},
+ {1059, 624},
+ {1059, 626},
+ {1059, 624},
+ {1059, 624},
+ { 0, 627},
+ { 0, 627},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType09_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0a_1[]=
+{
+ {1059, 626},
+ {1059, 624},
+ {1059, 626},
+ {1059, 624},
+ {1059, 624},
+ { 0, 627},
+ { 0, 627},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0b_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0c_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0d_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0e_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0f_1[]=
+{
+ {1343, 798},
+ {1343, 794},
+ {1343, 798},
+ {1343, 794},
+ {1343,   0},
+ {1343,   0},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType00_2[]=
+{
+ {976, 527},
+ {976, 502},
+ {976, 527},
+ {976, 502},
+ {976, 567},
+ { 0, 627},
+ { 0, 627},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType01_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType02_2[]=
+{
+ {976, 527},
+ {976, 502},
+ {976, 527},
+ {976, 502},
+ {976, 567},
+ { 0, 627},
+ { 0, 627},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType03_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ {1152, 622},
+ {1152, 597}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType04_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType05_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType06_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType07_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType08_2[]=
+{
+ {976, 527},
+ {976, 502},
+ {976, 527},
+ {976, 502},
+ {976, 567},
+ { 0, 627},
+ { 0, 627},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType09_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0a_2[]=
+{
+ {976, 527},
+ {976, 502},
+ {976, 527},
+ {976, 502},
+ {976, 567},
+ { 0, 627},
+ { 0, 627},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0b_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0c_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0d_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0e_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_PanelType0f_2[]=
+{
+ {1152, 622},
+ {1152, 597},
+ {1152, 622},
+ {1152, 597},
+ {1152, 662},
+ {1232, 722},
+ { 0, 805},
+ { 0, 794},
+ { 0,   0}
 };
 /*301b*/
-SiS310_LVDSDesStruct SiS310_PanelType1076_1[] = {
-	0x00, 0x00
-};
-SiS310_LVDSDesStruct SiS310_PanelType1210_1[] = {
-	0x00, 0x00
-};
-SiS310_LVDSDesStruct SiS310_PanelType1296_1[] = {
-	0x00, 0x00
-};
-SiS310_LVDSDesStruct SiS310_PanelType1076_2[] = {
-	0x00, 0x00
-};
-SiS310_LVDSDesStruct SiS310_PanelType1210_2[] = {
-	0x00, 0x00
-};
-SiS310_LVDSDesStruct SiS310_PanelType1296_2[] = {
-	0x00, 0x00
-};
+SiS310_LVDSDesStruct SiS310_PanelType1076_1[]=
+{
+0x00,0x00};
+SiS310_LVDSDesStruct SiS310_PanelType1210_1[]=
+{
+0x00,0x00};
+SiS310_LVDSDesStruct SiS310_PanelType1296_1[]=
+{
+0x00,0x00};
+SiS310_LVDSDesStruct SiS310_PanelType1076_2[]=
+{
+0x00,0x00};
+SiS310_LVDSDesStruct SiS310_PanelType1210_2[]=
+{
+0x00,0x00};
+SiS310_LVDSDesStruct SiS310_PanelType1296_2[]=
+{
+0x00,0x00};
 /*end 301b*/
 
-SiS310_LVDSDesStruct SiS310_CHTVUNTSCDesData[] = {
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_CHTVONTSCDesData[] = {
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_CHTVUPALDesData[] = {
-	{256, 0},
-	{256, 0},
-	{256, 0},
-	{256, 0},
-	{0, 0},
-	{0, 0}
-};
-
-SiS310_LVDSDesStruct SiS310_CHTVOPALDesData[] = {
-	{256, 0},
-	{256, 0},
-	{256, 0},
-	{256, 0},
-	{0, 0},
-	{0, 0}
-};
-
-typedef struct _SiS310_LVDSCRT1DataStruct {
-	UCHAR CR[17];
+SiS310_LVDSDesStruct  SiS310_CHTVUNTSCDesData[]=
+{
+ { 0,   0},
+ { 0,   0},
+ { 0,   0},
+ { 0,   0},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_CHTVONTSCDesData[]=
+{
+ { 0,   0},
+ { 0,   0},
+ { 0,   0},
+ { 0,   0},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_CHTVUPALDesData[]=
+{
+ {256,   0},
+ {256,   0},
+ {256,   0},
+ {256,   0},
+ { 0,   0},
+ { 0,   0}
+};
+
+SiS310_LVDSDesStruct  SiS310_CHTVOPALDesData[]=
+{
+ {256,   0},
+ {256,   0},
+ {256,   0},
+ {256,   0},
+ { 0,   0},
+ { 0,   0}
+};
+
+typedef struct _SiS310_LVDSCRT1DataStruct
+{
+ UCHAR CR[17];
 } SiS310_LVDSCRT1DataStruct;
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1[] =
-    { {0x65, 0x4f, 0x89, 0x56, 0x83, 0xaf, 0x1f,
-       0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x05,
-       0x00},
-{0x65, 0x4f, 0x89, 0x56, 0x83, 0x83, 0x1f,
- 0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x05,
- 0x00},
-{0x65, 0x4f, 0x89, 0x56, 0x83, 0xaf, 0x1f,
- 0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x05,
- 0x00},
-{0x65, 0x4f, 0x89, 0x56, 0x83, 0x83, 0x1f,
- 0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x05,
- 0x00},
-{0x65, 0x4f, 0x89, 0x56, 0x83, 0x04, 0x3e,
- 0xe0, 0x85, 0xdf, 0xfb, 0x10, 0x00, 0x05,
- 0x00},
-{0x7f, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
- 0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x06,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1[] =
-    { {0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0xc4, 0x1f,
-       0x92, 0x89, 0x8f, 0x8f, 0xb5, 0x30, 0x00, 0x05,
-       0x00},
-{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0x97, 0x1f,
- 0x60, 0x87, 0x5d, 0x5d, 0x83, 0x10, 0x00, 0x05,
- 0x00},
-{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0xc4, 0x1f,
- 0x92, 0x89, 0x8f, 0x8f, 0xb5, 0x30, 0x00, 0x05,
- 0x00},
-{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0x97, 0x1f,
- 0x60, 0x87, 0x5d, 0x5d, 0x83, 0x10, 0x00, 0x05,
- 0x00},
-{0x73, 0x4f, 0x4f, 0x97, 0x55, 0x86, 0x04, 0x3e,
- 0xE2, 0x89, 0xDf, 0xDf, 0x05, 0x00, 0x00, 0x05,
- 0x00},
-{0x87, 0x63, 0x63, 0x8B, 0x69, 0x1A, 0x7c, 0xf0,
- 0x5A, 0x8F, 0x57, 0x57, 0x7D, 0x20, 0x00, 0x26,
- 0x01},
-{0xA3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
- 0x02, 0x88, 0xFf, 0xFf, 0x25, 0x10, 0x00, 0x02,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1[] =
-    { {0x63, 0x4f, 0x87, 0x54, 0x9f, 0xb4, 0x1f,
-       0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x01,
-       0x00},
-{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x82, 0x1f,
- 0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x01,
- 0x00},
-{0x63, 0x4f, 0x87, 0x54, 0x9f, 0xb4, 0x1f,
- 0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x01,
- 0x00},
-{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x82, 0x1f,
- 0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x01,
- 0x00},
-{0x63, 0x4f, 0x87, 0x54, 0x9f, 0x04, 0x3e,
- 0xe2, 0x89, 0xdf, 0x05, 0x00, 0x00, 0x01,
- 0x00},
-{0x7e, 0x63, 0x82, 0x68, 0x15, 0x7c, 0xf0,
- 0x5a, 0x8f, 0x57, 0x7d, 0x20, 0x00, 0x26,
- 0x01},
-{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
- 0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1_H[] =
-    { {0x30, 0x27, 0x94, 0x2c, 0x92, 0xaf, 0x1f,
-       0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x04,
-       0x00},
-{0x30, 0x27, 0x94, 0x2c, 0x92, 0x83, 0x1f,
- 0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x04,
- 0x00},
-{0x30, 0x27, 0x94, 0x2c, 0x92, 0xaf, 0x1f,
- 0x90, 0x85, 0x8f, 0xab, 0x30, 0x00, 0x04,
- 0x00},
-{0x30, 0x27, 0x94, 0x2c, 0x92, 0x83, 0x1f,
- 0x5e, 0x83, 0x5d, 0x79, 0x10, 0x00, 0x04,
- 0x00},
-{0x30, 0x27, 0x94, 0x2c, 0x92, 0x04, 0x3e,
- 0xe0, 0x85, 0xdf, 0xfb, 0x10, 0x00, 0x04,
- 0x00},
-{0x3d, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
- 0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x05,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1_H[] =
-    { {0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0xc4, 0x1f,
-       0x92, 0x89, 0x8f, 0x8f, 0xb5, 0x30, 0x00, 0x44,
-       0x00},
-{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0x97, 0x1f,
- 0x60, 0x87, 0x5D, 0x5D, 0x83, 0x01, 0x00, 0x44,
- 0x00},
-{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0xc4, 0x1f,
- 0x92, 0x89, 0x8f, 0x8f, 0xb5, 0x30, 0x00, 0x44,
- 0x00},
-{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0x97, 0x1f,
- 0x60, 0x87, 0x5D, 0x5D, 0x83, 0x01, 0x00, 0x44,
- 0x00},
-{0x37, 0x27, 0x27, 0x9B, 0x2b, 0x94, 0x04, 0x3e,
- 0xE2, 0x89, 0xDf, 0xDf, 0x05, 0x00, 0x00, 0x44,
- 0x00},
-{0x41, 0x31, 0x31, 0x85, 0x35, 0x1d, 0x7c, 0xf0,
- 0x5A, 0x8F, 0x57, 0x57, 0x7D, 0x20, 0x00, 0x55,
- 0x01},
-{0x4f, 0x3F, 0x3F, 0x93, 0x45, 0x0D, 0x24, 0xf5,
- 0x02, 0x88, 0xFf, 0xFf, 0x25, 0x10, 0x00, 0x01,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1_H[] =
-    { {0x2f, 0x27, 0x93, 0x2b, 0x90, 0xb4, 0x1f,
-       0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x04,
-       0x00},
-{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x82, 0x1f,
- 0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x04,
- 0x00},
-{0x2f, 0x27, 0x93, 0x2b, 0x90, 0xb4, 0x1f,
- 0x92, 0x89, 0x8f, 0xb5, 0x30, 0x00, 0x04,
- 0x00},
-{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x82, 0x1f,
- 0x60, 0x87, 0x5d, 0x83, 0x10, 0x00, 0x04,
- 0x00},
-{0x2f, 0x27, 0x93, 0x2b, 0x90, 0x04, 0x3e,
- 0xe2, 0x89, 0xdf, 0x05, 0x00, 0x00, 0x04,
- 0x00},
-{0x3c, 0x31, 0x80, 0x35, 0x1c, 0x7c, 0xf0,
- 0x5a, 0x8f, 0x57, 0x7d, 0x20, 0x00, 0x55,
- 0x01},
-{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
- 0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2[] =
-    { {0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
-       0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x06,
-       0x00},
-{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
- 0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x06,
- 0x00},
-{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
- 0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x06,
- 0x00},
-{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0x3e,
- 0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x06,
- 0x00},
-{0x7f, 0x4f, 0x83, 0x62, 0x12, 0x72, 0xba,
- 0x1c, 0x80, 0xdf, 0x73, 0x00, 0x00, 0x06,
- 0x00},
-{0x7f, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
- 0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x06,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2[] =
-    { {0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-       0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
-       0x00},
-{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
- 0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
- 0x00},
-{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
- 0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
- 0x00},
-{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
- 0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
- 0x00},
-{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
- 0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x06,
- 0x00},
-{0xa3, 0x63, 0x87, 0x78, 0x89, 0x24, 0xf1,
- 0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x02,
- 0x01},
-{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
- 0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2[] =
-    { {0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
-       0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
-       0x00},
-{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
- 0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
- 0x00},
-{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
- 0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x06,
- 0x00},
-{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
- 0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x06,
- 0x00},
-{0xa3, 0x4f, 0x87, 0x6e, 0x9f, 0x24, 0xbb,
- 0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x06,
- 0x00},
-{0xa3, 0x63, 0x87, 0x78, 0x89, 0x24, 0xf1,
- 0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x02,
- 0x01},
-{0xa3, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
- 0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x02,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2_H[] =
-    { {0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
-       0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x05,
-       0x00},
-{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
- 0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x05,
- 0x00},
-{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0x3e,
- 0xf4, 0x88, 0x8f, 0x73, 0x20, 0x00, 0x05,
- 0x00},
-{0x3d, 0x27, 0x81, 0x3a, 0x1a, 0x72, 0x3e,
- 0xdb, 0x8f, 0x5d, 0x73, 0x20, 0x00, 0x05,
- 0x00},
-{0x3d, 0x27, 0x81, 0x32, 0x1a, 0x72, 0xba,
- 0x1c, 0x80, 0xdf, 0x73, 0x00, 0x00, 0x05,
- 0x00},
-{0x3d, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
- 0x58, 0x8c, 0x57, 0x73, 0x20, 0x00, 0x05,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2_H[] =
-    { {0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
-       0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
-       0x00},
-{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
- 0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
- 0x00},
-{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
- 0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
- 0x00},
-{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
- 0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
- 0x00},
-{0x4f, 0x27, 0x93, 0x39, 0x01, 0x24, 0xbb,
- 0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x01,
- 0x00},
-{0x4f, 0x31, 0x93, 0x3e, 0x06, 0x24, 0xf1,
- 0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x01,
- 0x01},
-{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
- 0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2_H[] =
-    { {0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
-       0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
-       0x00},
-{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
- 0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
- 0x00},
-{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
- 0x4a, 0x80, 0x8f, 0x25, 0x30, 0x00, 0x01,
- 0x00},
-{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
- 0x31, 0x87, 0x5d, 0x25, 0x30, 0x00, 0x01,
- 0x00},
-{0x4f, 0x27, 0x93, 0x39, 0x81, 0x24, 0xbb,
- 0x72, 0x88, 0xdf, 0x25, 0x30, 0x00, 0x01,
- 0x00},
-{0x4f, 0x31, 0x93, 0x3e, 0x86, 0x24, 0xf1,
- 0xae, 0x84, 0x57, 0x25, 0x30, 0x00, 0x01,
- 0x01},
-{0x4f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
- 0x02, 0x88, 0xff, 0x25, 0x10, 0x00, 0x01,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1UNTSC[] =
-    { {0x64, 0x4f, 0x88, 0x56, 0x9f, 0x56, 0x3e,
-       0xe8, 0x84, 0x8f, 0x57, 0x20, 0x00, 0x01,
-       0x00},
-{0x64, 0x4f, 0x88, 0x56, 0x9f, 0x56, 0x3e,
- 0xd0, 0x82, 0x5d, 0x57, 0x00, 0x00, 0x01,
- 0x00},
-{0x64, 0x4f, 0x88, 0x56, 0x9f, 0x56, 0x3e,
- 0xe8, 0x84, 0x8f, 0x57, 0x20, 0x00, 0x01,
- 0x00},
-{0x64, 0x4f, 0x88, 0x56, 0x9f, 0x56, 0x3e,
- 0xd0, 0x82, 0x5d, 0x57, 0x00, 0x00, 0x01,
- 0x00},
-{0x5d, 0x4f, 0x81, 0x53, 0x9c, 0x56, 0xba,
- 0x18, 0x84, 0xdf, 0x57, 0x00, 0x00, 0x01,
- 0x00},
-{0x80, 0x63, 0x84, 0x6c, 0x17, 0xec, 0xf0,
- 0x90, 0x8c, 0x57, 0xed, 0x20, 0x00, 0x06,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1ONTSC[] =
-    { {0x64, 0x4f, 0x88, 0x5a, 0x9f, 0x0b, 0x3e,
-       0xc0, 0x84, 0x8f, 0x0c, 0x20, 0x00, 0x01,
-       0x00},
-{0x64, 0x4f, 0x88, 0x5a, 0x9f, 0x0b, 0x3e,
- 0xb0, 0x8d, 0x5d, 0x0c, 0x00, 0x00, 0x01,
- 0x00},
-{0x64, 0x4f, 0x88, 0x5a, 0x9f, 0x0b, 0x3e,
- 0xc0, 0x84, 0x8f, 0x0c, 0x20, 0x00, 0x01,
- 0x00},
-{0x64, 0x4f, 0x88, 0x5a, 0x9f, 0x0b, 0x3e,
- 0xb0, 0x8d, 0x5d, 0x0c, 0x00, 0x00, 0x01,
- 0x00},
-{0x5d, 0x4f, 0x81, 0x56, 0x9c, 0x0b, 0x3e,
- 0xe8, 0x84, 0xdf, 0x0c, 0x00, 0x00, 0x01,
- 0x00},
-{0x7d, 0x63, 0x81, 0x6a, 0x16, 0xba, 0xf0,
- 0x7f, 0x86, 0x57, 0xbb, 0x00, 0x00, 0x06,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1UPAL[] =
-    { {0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-       0xf8, 0x83, 0x8f, 0x70, 0x20, 0x00, 0x05,
-       0x00},
-{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
- 0xde, 0x81, 0x5d, 0x70, 0x00, 0x00, 0x05,
- 0x00},
-{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
- 0xf8, 0x83, 0x8f, 0x70, 0x20, 0x00, 0x05,
- 0x00},
-{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
- 0xde, 0x81, 0x5d, 0x70, 0x00, 0x00, 0x05,
- 0x00},
-{0x64, 0x4f, 0x88, 0x55, 0x80, 0xec, 0xba,
- 0x50, 0x84, 0xdf, 0xed, 0x00, 0x00, 0x05,
- 0x00},
-{0x70, 0x63, 0x94, 0x68, 0x8d, 0x42, 0xf1,
- 0xc8, 0x8c, 0x57, 0xe9, 0x20, 0x00, 0x05,
- 0x01}
-};
-
-SiS310_LVDSCRT1DataStruct SiS310_CHTVCRT1OPAL[] =
-    { {0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
-       0xf0, 0x83, 0x8f, 0x70, 0x20, 0x00, 0x05,
-       0x00},
-{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
- 0xde, 0x81, 0x5d, 0x70, 0x00, 0x00, 0x05,
- 0x00},
-{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
- 0xf0, 0x83, 0x8f, 0x70, 0x20, 0x00, 0x05,
- 0x00},
-{0x79, 0x4f, 0x9d, 0x5a, 0x90, 0x6f, 0x3e,
- 0xde, 0x81, 0x5d, 0x70, 0x00, 0x00, 0x05,
- 0x00},
-{0x64, 0x4f, 0x88, 0x55, 0x80, 0x6f, 0xba,
- 0x20, 0x83, 0xdf, 0x70, 0x00, 0x00, 0x05,
- 0x00},
-{0x73, 0x63, 0x97, 0x69, 0x8e, 0xec, 0xf0,
- 0x90, 0x8c, 0x57, 0xed, 0x20, 0x00, 0x05,
- 0x01}
-};
-
-typedef struct _SiS310_CHTVRegDataStruct {
-	UCHAR Reg[5];
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1[]=
+{{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 },
+ {0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 },
+ {0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
+   0x00 },
+ {0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
+   0x00 },
+ {0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
+   0x00 },
+ {0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1[]=
+{{0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
+   0x00 },
+ {0x73,0x4f,0x4f,0x97,0x55,0x86,0x97,0x1f,
+   0x60,0x87,0x5d,0x5d,0x83,0x10,0x00,0x05,
+   0x00 },
+ {0x73,0x4f,0x4f,0x97,0x55,0x86,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x05,
+   0x00},
+ {0x73,0x4f,0x4f,0x97,0x55,0x86,0x97,0x1f,
+   0x60,0x87,0x5d,0x5d,0x83,0x10,0x00,0x05,
+   0x00 },
+ {0x73,0x4f,0x4f,0x97,0x55,0x86,0x04,0x3e,
+   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x05,
+   0x00},
+ {0x87,0x63,0x63,0x8B,0x69,0x1A,0x7c,0xf0,
+   0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x26,
+   0x01},
+ {0xA3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x02,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1[]=
+{{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+   0x00 },
+ {0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+   0x00 },
+ {0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
+   0x00 },
+ {0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
+   0x00 },
+ {0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e,
+   0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
+   0x00 },
+ {0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
+   0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
+   0x01 },
+ {0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_1_H[]=
+{{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+   0x00 },
+ {0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+   0x00 },
+ {0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
+   0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
+   0x00 },
+ {0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
+   0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
+   0x00 },
+ {0x30,0x27,0x94,0x2c,0x92,0x04,0x3e,
+   0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04,
+   0x00 },
+ {0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_1_H[]=
+{{0x37,0x27,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
+   0x00 },
+ {0x37,0x27,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+   0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
+   0x00},
+ {0x37,0x27,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
+   0x92,0x89,0x8f,0x8f,0xb5,0x30,0x00,0x44,
+   0x00},
+ {0x37,0x27,0x27,0x9B,0x2b,0x94,0x97,0x1f,
+   0x60,0x87,0x5D,0x5D,0x83,0x01,0x00,0x44,
+   0x00},
+ {0x37,0x27,0x27,0x9B,0x2b,0x94,0x04,0x3e,
+   0xE2,0x89,0xDf,0xDf,0x05,0x00,0x00,0x44,
+   0x00},
+ {0x41,0x31,0x31,0x85,0x35,0x1d,0x7c,0xf0,
+   0x5A,0x8F,0x57,0x57,0x7D,0x20,0x00,0x55,
+   0x01},
+ {0x4f,0x3F,0x3F,0x93,0x45,0x0D,0x24,0xf5,
+   0x02,0x88,0xFf,0xFf,0x25,0x10,0x00,0x01,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_1_H[]=
+{{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+   0x00 },
+ {0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+   0x00 },
+ {0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
+   0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
+   0x00 },
+ {0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
+   0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
+   0x00 },
+ {0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
+   0xe2,0x89,0xdf,0x05,0x00,0x00,0x04,
+   0x00 },
+ {0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
+   0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
+   0x01 },
+ {0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2[]=
+{ {0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+   0x00 },
+ {0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+   0x00 },
+ {0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
+   0x00 },
+ {0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
+   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
+   0x00 },
+ {0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
+   0x1c,0x80,0xdf,0x73,0x00,0x00,0x06,
+   0x00 },
+ {0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2[]=
+{ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+   0x01 },
+ {0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2[]=
+{ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
+   0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
+   0x00 },
+ {0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
+   0xae,0x84,0x57,0x25,0x30,0x00,0x02,
+   0x01 },
+ {0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x02,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT1800x600_2_H[]=
+{ {0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+   0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+   0x00 },
+ {0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+   0x00 },
+ {0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
+   0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
+   0x00 },
+ {0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e,
+   0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
+   0x00 },
+ {0x3d,0x27,0x81,0x32,0x1a,0x72,0xba,
+   0x1c,0x80,0xdf,0x73,0x00,0x00,0x05,
+   0x00 },
+ {0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
+   0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11024x768_2_H[]=
+{ {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
+   0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
+   0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+   0x01 },
+ {0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_LVDSCRT11280x1024_2_H[]=
+{ {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
+   0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
+   0x00 },
+ {0x4f,0x31,0x93,0x3e,0x86,0x24,0xf1,
+   0xae,0x84,0x57,0x25,0x30,0x00,0x01,
+   0x01 },
+ {0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
+   0x02,0x88,0xff,0x25,0x10,0x00,0x01,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UNTSC[]=
+{ {0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+   0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+   0x00 },
+ {0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+   0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+   0x00 },
+ {0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+   0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
+   0x00 },
+ {0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
+   0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,
+   0x00 },
+ {0x5d,0x4f,0x81,0x53,0x9c,0x56,0xba,
+   0x18,0x84,0xdf,0x57,0x00,0x00,0x01,
+   0x00 },
+ {0x80,0x63,0x84,0x6c,0x17,0xec,0xf0,
+   0x90,0x8c,0x57,0xed,0x20,0x00,0x06,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1ONTSC[]=
+{ {0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+   0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+   0x00 },
+ {0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+   0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+   0x00 },
+ {0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+   0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
+   0x00 },
+ {0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
+   0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,
+   0x00 },
+ {0x5d,0x4f,0x81,0x56,0x9c,0x0b,0x3e,
+   0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,
+   0x00 },
+ {0x7d,0x63,0x81,0x6a,0x16,0xba,0xf0,
+   0x7f,0x86,0x57,0xbb,0x00,0x00,0x06,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1UPAL[]=
+{ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+   0x00 },
+ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+   0x00 },
+ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
+   0x00 },
+ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+   0x00 },
+ {0x64,0x4f,0x88,0x55,0x80,0xec,0xba,
+   0x50,0x84,0xdf,0xed,0x00,0x00,0x05,
+   0x00 },
+ {0x70,0x63,0x94,0x68,0x8d,0x42,0xf1,
+   0xc8,0x8c,0x57,0xe9,0x20,0x00,0x05,
+   0x01 }};
+
+SiS310_LVDSCRT1DataStruct  SiS310_CHTVCRT1OPAL[]=
+{ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+   0x00 },
+ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+   0x00 },
+ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
+   0x00 },
+ {0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
+   0xde,0x81,0x5d,0x70,0x00,0x00,0x05,
+   0x00 },
+ {0x64,0x4f,0x88,0x55,0x80,0x6f,0xba,
+   0x20,0x83,0xdf,0x70,0x00,0x00,0x05,
+   0x00 },
+ {0x73,0x63,0x97,0x69,0x8e,0xec,0xf0,
+   0x90,0x8c,0x57,0xed,0x20,0x00,0x05,
+   0x01 }};
+
+typedef struct _SiS310_CHTVRegDataStruct
+{
+ UCHAR Reg[5];
 } SiS310_CHTVRegDataStruct;
 SiS310_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] = {
-	0x00
-};
+0x00 };
 
 SiS310_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] = {
-	0x00
-};
+0x00 };
 
 SiS310_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] = {
-	0x00
-};
+0x00 };
 
 SiS310_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] = {
-	0x00
-};
+0x00 };
+
+UCHAR SiS310_CHTVVCLKUNTSC[]={0x00 };
 
-UCHAR SiS310_CHTVVCLKUNTSC[] = { 0x00 };
+UCHAR SiS310_CHTVVCLKONTSC[]={0x00 };
 
-UCHAR SiS310_CHTVVCLKONTSC[] = { 0x00 };
+UCHAR SiS310_CHTVVCLKUPAL[]={0x00 };
 
-UCHAR SiS310_CHTVVCLKUPAL[] = { 0x00 };
+UCHAR SiS310_CHTVVCLKOPAL[]={0x00 };
 
-UCHAR SiS310_CHTVVCLKOPAL[] = { 0x00 };
diff --git a/drivers/video/sis/init.c b/drivers/video/sis/init.c
index 1573adbb0989..ac3f0c367a2b 100644
--- a/drivers/video/sis/init.c
+++ b/drivers/video/sis/init.c
@@ -1,809 +1,958 @@
-/* Function: Support NT X.0  MM function  */
-/* Version : V 0.80      [ynlai] 04/12/98 */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init.c,v 1.3 2002/24/04 01:16:16 dawes Exp $ */
+/*
+ * Mode switching code (CRT1 section) for SiS 300/540/630/730/315/550/650/740
+ * (Universal module for Linux kernel framebuffer and XFree86 4.x)
+ *
+ * Assembler-To-C translation
+ * Parts Copyright 2002 by Thomas Winischhofer <thomas@winischhofer.net>
+ *
+ * Based on BIOS
+ *     1.10.07 (1.10a) for SiS650/LVDS+CH7019
+ *     1.07.1b for SiS650/301(B/LV)
+ *     2.04.50 (I) and 2.04.5c (II) for SiS630/301(B)
+ *     2.02.3b, 2.03.02 and 2.04.5c for 630/LVDS/LVDS+CH7005
+ *     1.09b for 315/301(B)
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of the copyright holder not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  The copyright holder makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
 
 #include "init.h"
-#ifdef CONFIG_FB_SIS_300
+
+#ifdef SIS300
 #include "300vtbl.h"
 #endif
-#ifdef CONFIG_FB_SIS_315
+
+#ifdef SIS315H
 #include "310vtbl.h"
 #endif
 
-BOOLEAN SiSInit (PSIS_HW_DEVICE_INFO HwDeviceExtension);
-BOOLEAN SiSSetMode (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT ModeNo);
+#ifdef LINUX_XF86
+BOOLEAN SiSBIOSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                       ScrnInfoPtr pScrn, DisplayModePtr mode);
+#ifdef SISDUALHEAD /* TW: For dual head */
+BOOLEAN SiSBIOSSetModeCRT1(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                       ScrnInfoPtr pScrn, DisplayModePtr mode);
+BOOLEAN SiSBIOSSetModeCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                       ScrnInfoPtr pScrn, DisplayModePtr mode);
+#endif /* dual head */
+#endif /* linux_xf86 */
+
+#ifndef LINUX_XF86
+BOOLEAN SiSInit(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#endif
+
+#ifdef LINUX_XF86
+BOOLEAN SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                   ScrnInfoPtr pScrn,USHORT ModeNo);
+#else
+BOOLEAN SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo);
+#endif
 
 #if defined(ALLOC_PRAGMA)
 #pragma alloc_text(PAGE,SiSSetMode)
 #pragma alloc_text(PAGE,SiSInit)
 #endif
 
-void SiS_SetReg1 (USHORT, USHORT, USHORT);
-void SiS_SetReg2 (USHORT, USHORT, USHORT);
-void SiS_SetReg3 (USHORT, USHORT);
-void SiS_SetReg4 (USHORT, ULONG);
-UCHAR SiS_GetReg1 (USHORT, USHORT);
-UCHAR SiS_GetReg2 (USHORT);
-ULONG SiS_GetReg3 (USHORT);
-void SiS_ClearDAC (ULONG);
+void DelaySeconds(int seconds);
+void DebugCode(UCHAR code);
+
+#ifdef LINUX_XF86
+/* TW: Mode table for X driver */
+UShort  ModeIndex_320x480[]      = {0x5A, 0x5B, 0x00, 0x00};  /* DSTN/FSTN */
+UShort  ModeIndex_512x384[]      = {0x52, 0x58, 0x00, 0x5c};
+UShort  ModeIndex_640x480[]      = {0x2E, 0x44, 0x00, 0x62};
+UShort  ModeIndex_720x480[]      = {0x31, 0x33, 0x00, 0x35};
+UShort  ModeIndex_720x576[]      = {0x32, 0x34, 0x00, 0x36};
+UShort  ModeIndex_800x480[]      = {0x70, 0x7a, 0x00, 0x76};  /* 310/325 series only */
+UShort  ModeIndex_800x600[]      = {0x30, 0x47, 0x00, 0x63};
+UShort  ModeIndex_1024x768[]     = {0x38, 0x4A, 0x00, 0x64};
+UShort  ModeIndex_1024x576[]     = {0x71, 0x74, 0x00, 0x77};  /* 310/325 series only */
+UShort  ModeIndex_1024x600[]     = {0x20, 0x21, 0x00, 0x22};  /* 300 series only */
+UShort  ModeIndex_1280x1024[]    = {0x3A, 0x4D, 0x00, 0x65};
+UShort  ModeIndex_300_1280x960[] = {0x6e, 0x6f, 0x00, 0x7b};
+UShort  ModeIndex_310_1280x960[] = {0x7C, 0x7D, 0x00, 0x7E};
+UShort  ModeIndex_1152x768[]     = {0x23, 0x24, 0x00, 0x25};  /* 300 series only */
+UShort  ModeIndex_1280x768[]     = {0x23, 0x24, 0x00, 0x25};  /* 310/325 series only */
+UShort  ModeIndex_1280x720[]     = {0x79, 0x75, 0x00, 0x78};  /* 310/325 series only */
+UShort  ModeIndex_1400x1050[]    = {0x26, 0x27, 0x00, 0x28};  /* 310/325 series only */
+UShort  ModeIndex_1600x1200[]    = {0x3C, 0x3D, 0x00, 0x66};
+UShort  ModeIndex_1920x1440[]    = {0x68, 0x69, 0x00, 0x6B};
+UShort  ModeIndex_2048x1536[]    = {0x6c, 0x6d, 0x00, 0x6e};  /* 310/325 series only */
+#endif
+
+void
+DelaySeconds(int seconds)
+{
+  int i;
+#ifdef WIN2000
+  int j;
+#endif
+
+  for (i=0;i<seconds;i++) {
+#ifdef TC
+    delay(1000);
+#endif
+
+#ifdef WIN2000
+    for (j=0;j<20000;j++)
+      VideoPortStallExecution(50);
+#endif
+
+#ifdef WINCE_HEADER
+#endif
+
+#ifdef LINUX_KERNEL
+#endif
+  }
+}
+
+void
+DebugCode(UCHAR code)
+{
+  OutPortByte ( 0x80, code);
+  /*OutPortByte ( 0x300, code);*/
+  DelaySeconds(0x3);
+}
 
-#ifdef CONFIG_FB_SIS_300
+#ifdef SIS300
 void
-InitTo300Pointer (void)
-{
-	SiS_SModeIDTable = (SiS_StStruct *) SiS300_SModeIDTable;
-	SiS_VBModeIDTable = (SiS_VBModeStruct *) SiS300_VBModeIDTable;	/*add for 300 oem util */
-	SiS_StandTable = (SiS_StandTableStruct *) SiS300_StandTable;
-	SiS_EModeIDTable = (SiS_ExtStruct *) SiS300_EModeIDTable;
-	SiS_RefIndex = (SiS_Ext2Struct *) SiS300_RefIndex;
-	SiS_CRT1Table = (SiS_CRT1TableStruct *) SiS300_CRT1Table;
-	SiS_MCLKData = (SiS_MCLKDataStruct *) SiS300_MCLKData;
-	SiS_ECLKData = (SiS_ECLKDataStruct *) SiS300_ECLKData;
-	SiS_VCLKData = (SiS_VCLKDataStruct *) SiS300_VCLKData;
-	SiS_VBVCLKData = (SiS_VBVCLKDataStruct *) SiS300_VCLKData;
-	SiS_ScreenOffset = SiS300_ScreenOffset;
-	SiS_StResInfo = (SiS_StResInfoStruct *) SiS300_StResInfo;
-	SiS_ModeResInfo = (SiS_ModeResInfoStruct *) SiS300_ModeResInfo;
-
-	pSiS_OutputSelect = &SiS300_OutputSelect;
-	pSiS_SoftSetting = &SiS300_SoftSetting;
-	pSiS_SR07 = &SiS300_SR07;
-	SiS_SR15 = SiS300_SR15;
-	SiS_CR40 = SiS300_CR40;
-	SiS_CR49 = SiS300_CR49;
-	pSiS_SR1F = &SiS300_SR1F;
-	pSiS_SR21 = &SiS300_SR21;
-	pSiS_SR22 = &SiS300_SR22;
-	pSiS_SR23 = &SiS300_SR23;
-	pSiS_SR24 = &SiS300_SR24;
-	SiS_SR25 = SiS300_SR25;
-	pSiS_SR31 = &SiS300_SR31;
-	pSiS_SR32 = &SiS300_SR32;
-	pSiS_SR33 = &SiS300_SR33;
-	pSiS_CRT2Data_1_2 = &SiS300_CRT2Data_1_2;
-	pSiS_CRT2Data_4_D = &SiS300_CRT2Data_4_D;
-	pSiS_CRT2Data_4_E = &SiS300_CRT2Data_4_E;
-	pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
-	pSiS_RGBSenseData = &SiS300_RGBSenseData;
-	pSiS_VideoSenseData = &SiS300_VideoSenseData;
-	pSiS_YCSenseData = &SiS300_YCSenseData;
-	pSiS_RGBSenseData2 = &SiS300_RGBSenseData2;
-	pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
-	pSiS_YCSenseData2 = &SiS300_YCSenseData2;
-
-	SiS_NTSCPhase = SiS300_NTSCPhase;
-	SiS_PALPhase = SiS300_PALPhase;
-	SiS_NTSCPhase2 = SiS300_NTSCPhase2;
-	SiS_PALPhase2 = SiS300_PALPhase2;
-	SiS_PALMPhase = SiS300_PALMPhase;	/*add for PALMN */
-	SiS_PALNPhase = SiS300_PALNPhase;
-
-	SiS_StLCD1024x768Data = (SiS_LCDDataStruct *) SiS300_StLCD1024x768Data;
-	SiS_ExtLCD1024x768Data =
-	    (SiS_LCDDataStruct *) SiS300_ExtLCD1024x768Data;
-	SiS_St2LCD1024x768Data =
-	    (SiS_LCDDataStruct *) SiS300_St2LCD1024x768Data;
-	SiS_StLCD1280x1024Data =
-	    (SiS_LCDDataStruct *) SiS300_StLCD1280x1024Data;
-	SiS_ExtLCD1280x1024Data =
-	    (SiS_LCDDataStruct *) SiS300_ExtLCD1280x1024Data;
-	SiS_St2LCD1280x1024Data =
-	    (SiS_LCDDataStruct *) SiS300_St2LCD1280x1024Data;
-	SiS_NoScaleData = (SiS_LCDDataStruct *) SiS300_NoScaleData;
-	SiS_LCD1280x960Data = (SiS_LCDDataStruct *) SiS300_LCD1280x960Data;
-	SiS_StPALData = (SiS_TVDataStruct *) SiS300_StPALData;
-	SiS_ExtPALData = (SiS_TVDataStruct *) SiS300_ExtPALData;
-	SiS_StNTSCData = (SiS_TVDataStruct *) SiS300_StNTSCData;
-	SiS_ExtNTSCData = (SiS_TVDataStruct *) SiS300_ExtNTSCData;
-	SiS_St1HiTVData = (SiS_TVDataStruct *) SiS300_St1HiTVData;
-	SiS_St2HiTVData = (SiS_TVDataStruct *) SiS300_St2HiTVData;
-	SiS_ExtHiTVData = (SiS_TVDataStruct *) SiS300_ExtHiTVData;
-	SiS_NTSCTiming = SiS300_NTSCTiming;
-	SiS_PALTiming = SiS300_PALTiming;
-	SiS_HiTVSt1Timing = SiS300_HiTVSt1Timing;
-	SiS_HiTVSt2Timing = SiS300_HiTVSt2Timing;
-	SiS_HiTVTextTiming = SiS300_HiTVTextTiming;
-	SiS_HiTVGroup3Data = SiS300_HiTVGroup3Data;
-	SiS_HiTVGroup3Simu = SiS300_HiTVGroup3Simu;
-	SiS_HiTVGroup3Text = SiS300_HiTVGroup3Text;
-
-	SiS_PanelDelayTbl = (SiS_PanelDelayTblStruct *) SiS300_PanelDelayTbl;
-	SiS_LVDS800x600Data_1 = (SiS_LVDSDataStruct *) SiS300_LVDS800x600Data_1;
-	SiS_LVDS800x600Data_2 = (SiS_LVDSDataStruct *) SiS300_LVDS800x600Data_2;
-	SiS_LVDS1024x768Data_1 =
-	    (SiS_LVDSDataStruct *) SiS300_LVDS1024x768Data_1;
-	SiS_LVDS1024x768Data_2 =
-	    (SiS_LVDSDataStruct *) SiS300_LVDS1024x768Data_2;
-	SiS_LVDS1280x1024Data_1 =
-	    (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_1;
-	SiS_LVDS1280x1024Data_2 =
-	    (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_2;
-	SiS_LVDS640x480Data_1 = (SiS_LVDSDataStruct *) SiS300_LVDS640x480Data_1;
-	SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *) SiS300_CHTVUNTSCData;
-	SiS_CHTVONTSCData = (SiS_LVDSDataStruct *) SiS300_CHTVONTSCData;
-	SiS_CHTVUPALData = (SiS_LVDSDataStruct *) SiS300_CHTVUPALData;
-	SiS_CHTVOPALData = (SiS_LVDSDataStruct *) SiS300_CHTVOPALData;
-	SiS_PanelType00_1 = (SiS_LVDSDesStruct *) SiS300_PanelType00_1;
-	SiS_PanelType01_1 = (SiS_LVDSDesStruct *) SiS300_PanelType01_1;
-	SiS_PanelType02_1 = (SiS_LVDSDesStruct *) SiS300_PanelType02_1;
-	SiS_PanelType03_1 = (SiS_LVDSDesStruct *) SiS300_PanelType03_1;
-	SiS_PanelType04_1 = (SiS_LVDSDesStruct *) SiS300_PanelType04_1;
-	SiS_PanelType05_1 = (SiS_LVDSDesStruct *) SiS300_PanelType05_1;
-	SiS_PanelType06_1 = (SiS_LVDSDesStruct *) SiS300_PanelType06_1;
-	SiS_PanelType07_1 = (SiS_LVDSDesStruct *) SiS300_PanelType07_1;
-	SiS_PanelType08_1 = (SiS_LVDSDesStruct *) SiS300_PanelType08_1;
-	SiS_PanelType09_1 = (SiS_LVDSDesStruct *) SiS300_PanelType09_1;
-	SiS_PanelType0a_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0a_1;
-	SiS_PanelType0b_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0b_1;
-	SiS_PanelType0c_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0c_1;
-	SiS_PanelType0d_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0d_1;
-	SiS_PanelType0e_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0e_1;
-	SiS_PanelType0f_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0f_1;
-	SiS_PanelType00_2 = (SiS_LVDSDesStruct *) SiS300_PanelType00_2;
-	SiS_PanelType01_2 = (SiS_LVDSDesStruct *) SiS300_PanelType01_2;
-	SiS_PanelType02_2 = (SiS_LVDSDesStruct *) SiS300_PanelType02_2;
-	SiS_PanelType03_2 = (SiS_LVDSDesStruct *) SiS300_PanelType03_2;
-	SiS_PanelType04_2 = (SiS_LVDSDesStruct *) SiS300_PanelType04_2;
-	SiS_PanelType05_2 = (SiS_LVDSDesStruct *) SiS300_PanelType05_2;
-	SiS_PanelType06_2 = (SiS_LVDSDesStruct *) SiS300_PanelType06_2;
-	SiS_PanelType07_2 = (SiS_LVDSDesStruct *) SiS300_PanelType07_2;
-	SiS_PanelType08_2 = (SiS_LVDSDesStruct *) SiS300_PanelType08_2;
-	SiS_PanelType09_2 = (SiS_LVDSDesStruct *) SiS300_PanelType09_2;
-	SiS_PanelType0a_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0a_2;
-	SiS_PanelType0b_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0b_2;
-	SiS_PanelType0c_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0c_2;
-	SiS_PanelType0d_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0d_2;
-	SiS_PanelType0e_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0e_2;
-	SiS_PanelType0f_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0f_2;
-	SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *) SiS300_CHTVUNTSCDesData;
-	SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *) SiS300_CHTVONTSCDesData;
-	SiS_CHTVUPALDesData = (SiS_LVDSDesStruct *) SiS300_CHTVUPALDesData;
-	SiS_CHTVOPALDesData = (SiS_LVDSDesStruct *) SiS300_CHTVOPALDesData;
-	SiS_LVDSCRT1800x600_1 =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_1;
-	SiS_LVDSCRT11024x768_1 =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_1;
-	SiS_LVDSCRT11280x1024_1 =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_1;
-	SiS_LVDSCRT1800x600_1_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_1_H;
-	SiS_LVDSCRT11024x768_1_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_1_H;
-	SiS_LVDSCRT11280x1024_1_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_1_H;
-	SiS_LVDSCRT1800x600_2 =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_2;
-	SiS_LVDSCRT11024x768_2 =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_2;
-	SiS_LVDSCRT11280x1024_2 =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_2;
-	SiS_LVDSCRT1800x600_2_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_2_H;
-	SiS_LVDSCRT11024x768_2_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_2_H;
-	SiS_LVDSCRT11280x1024_2_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_2_H;
-	SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1UNTSC;
-	SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1ONTSC;
-	SiS_CHTVCRT1UPAL = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1UPAL;
-	SiS_CHTVCRT1OPAL = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1OPAL;
-	SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_UNTSC;
-	SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_ONTSC;
-	SiS_CHTVReg_UPAL = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_UPAL;
-	SiS_CHTVReg_OPAL = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_OPAL;
-	SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
-	SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
-	SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
-	SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
-	/* 300 customization related */
-}
-#endif
-
-#ifdef CONFIG_FB_SIS_315
+InitTo300Pointer(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   SiS_SModeIDTable = (SiS_StStruct *) SiS300_SModeIDTable;
+   SiS_VBModeIDTable = (SiS_VBModeStruct *) SiS300_VBModeIDTable;
+   SiS_StandTable = (SiS_StandTableStruct *) SiS300_StandTable;
+   SiS_EModeIDTable = (SiS_ExtStruct *) SiS300_EModeIDTable;
+   SiS_RefIndex = (SiS_Ext2Struct *) SiS300_RefIndex;
+   SiS_CRT1Table = (SiS_CRT1TableStruct *) SiS300_CRT1Table;
+   SiS_MCLKData_0 = (SiS_MCLKDataStruct *) SiS300_MCLKData;
+   SiS_ECLKData = (SiS_ECLKDataStruct *) SiS300_ECLKData;
+   SiS_VCLKData = (SiS_VCLKDataStruct *) SiS300_VCLKData;
+   SiS_VBVCLKData = (SiS_VBVCLKDataStruct *) SiS300_VCLKData;
+   SiS_ScreenOffset = SiS300_ScreenOffset;
+   SiS_StResInfo = (SiS_StResInfoStruct *) SiS300_StResInfo;
+   SiS_ModeResInfo = (SiS_ModeResInfoStruct *) SiS300_ModeResInfo;
+
+   pSiS_OutputSelect = &SiS300_OutputSelect;
+   pSiS_SoftSetting = &SiS300_SoftSetting;
+   pSiS_SR07 = &SiS300_SR07;
+   SiS_SR15 = SiS300_SR15;
+   SiS_CR40 = SiS300_CR40;
+   SiS_CR49 = SiS300_CR49;
+   pSiS_SR1F = &SiS300_SR1F;
+   pSiS_SR21 = &SiS300_SR21;
+   pSiS_SR22 = &SiS300_SR22;
+   pSiS_SR23 = &SiS300_SR23;
+   pSiS_SR24 = &SiS300_SR24;
+   SiS_SR25 = SiS300_SR25;
+   pSiS_SR31 = &SiS300_SR31;
+   pSiS_SR32 = &SiS300_SR32;
+   pSiS_SR33 = &SiS300_SR33;
+   pSiS_CRT2Data_1_2 = &SiS300_CRT2Data_1_2;
+   pSiS_CRT2Data_4_D = &SiS300_CRT2Data_4_D;
+   pSiS_CRT2Data_4_E = &SiS300_CRT2Data_4_E;
+   pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
+   pSiS_RGBSenseData = &SiS300_RGBSenseData;
+   pSiS_VideoSenseData = &SiS300_VideoSenseData;
+   pSiS_YCSenseData = &SiS300_YCSenseData;
+   pSiS_RGBSenseData2 = &SiS300_RGBSenseData2;
+   pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
+   pSiS_YCSenseData2 = &SiS300_YCSenseData2;
+
+   SiS_NTSCPhase  = SiS300_NTSCPhase;
+   SiS_PALPhase   = SiS300_PALPhase;
+   SiS_NTSCPhase2 = SiS300_NTSCPhase2;
+   SiS_PALPhase2  = SiS300_PALPhase2;
+   SiS_PALMPhase  = SiS300_PALMPhase;
+   SiS_PALNPhase  = SiS300_PALNPhase;
+   SiS_PALMPhase2 = SiS300_PALMPhase2;
+   SiS_PALNPhase2 = SiS300_PALNPhase2;
+
+   SiS_StLCD1024x768Data = (SiS_LCDDataStruct *) SiS300_StLCD1024x768Data;
+   SiS_ExtLCD1024x768Data = (SiS_LCDDataStruct *) SiS300_ExtLCD1024x768Data;
+   SiS_St2LCD1024x768Data = (SiS_LCDDataStruct *) SiS300_St2LCD1024x768Data;
+   SiS_StLCD1280x1024Data = (SiS_LCDDataStruct *) SiS300_StLCD1280x1024Data;
+   SiS_ExtLCD1280x1024Data = (SiS_LCDDataStruct *) SiS300_ExtLCD1280x1024Data;
+   SiS_St2LCD1280x1024Data = (SiS_LCDDataStruct *) SiS300_St2LCD1280x1024Data;
+   SiS_NoScaleData1024x768  = (SiS_LCDDataStruct *) SiS300_NoScaleData1024x768;
+   SiS_NoScaleData1280x1024 = (SiS_LCDDataStruct *) SiS300_NoScaleData1280x1024;
+   SiS_LCD1280x960Data = (SiS_LCDDataStruct *) SiS300_LCD1280x960Data;
+   SiS_StPALData = (SiS_TVDataStruct *) SiS300_StPALData;
+   SiS_ExtPALData = (SiS_TVDataStruct *) SiS300_ExtPALData;
+   SiS_StNTSCData = (SiS_TVDataStruct *) SiS300_StNTSCData;
+   SiS_ExtNTSCData = (SiS_TVDataStruct *) SiS300_ExtNTSCData;
+   SiS_St1HiTVData = (SiS_TVDataStruct *) SiS300_St1HiTVData;
+   SiS_St2HiTVData = (SiS_TVDataStruct *) SiS300_St2HiTVData;
+   SiS_ExtHiTVData = (SiS_TVDataStruct *) SiS300_ExtHiTVData;
+   SiS_NTSCTiming = SiS300_NTSCTiming;
+   SiS_PALTiming = SiS300_PALTiming;
+   SiS_HiTVSt1Timing = SiS300_HiTVSt1Timing;
+   SiS_HiTVSt2Timing = SiS300_HiTVSt2Timing;
+   SiS_HiTVTextTiming = SiS300_HiTVTextTiming;
+   SiS_HiTVGroup3Data = SiS300_HiTVGroup3Data;
+   SiS_HiTVGroup3Simu = SiS300_HiTVGroup3Simu;
+   SiS_HiTVGroup3Text = SiS300_HiTVGroup3Text;
+
+   SiS_PanelDelayTbl = (SiS_PanelDelayTblStruct *) SiS300_PanelDelayTbl;
+   SiS_PanelDelayTblLVDS = (SiS_PanelDelayTblStruct *) SiS300_PanelDelayTblLVDS;
+
+   SiS_LVDS800x600Data_1   = (SiS_LVDSDataStruct *) SiS300_LVDS800x600Data_1;
+   SiS_LVDS800x600Data_2   = (SiS_LVDSDataStruct *) SiS300_LVDS800x600Data_2;
+   SiS_LVDS1024x768Data_1  = (SiS_LVDSDataStruct *) SiS300_LVDS1024x768Data_1;
+   SiS_LVDS1024x768Data_2  = (SiS_LVDSDataStruct *) SiS300_LVDS1024x768Data_2;
+   SiS_LVDS1280x1024Data_1 = (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_1;
+   SiS_LVDS1280x1024Data_2 = (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_2;
+   SiS_LVDS1280x960Data_1  = (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_1;
+   SiS_LVDS1280x960Data_2  = (SiS_LVDSDataStruct *) SiS300_LVDS1280x1024Data_2;
+   SiS_LVDS640x480Data_1   = (SiS_LVDSDataStruct *) SiS300_LVDS640x480Data_1;
+   SiS_LVDS1024x600Data_1  = (SiS_LVDSDataStruct *) SiS300_LVDS1024x600Data_1;
+   SiS_LVDS1024x600Data_2  = (SiS_LVDSDataStruct *) SiS300_LVDS1024x600Data_2;
+   SiS_LVDS1152x768Data_1  = (SiS_LVDSDataStruct *) SiS300_LVDS1152x768Data_1;
+   SiS_LVDS1152x768Data_2  = (SiS_LVDSDataStruct *) SiS300_LVDS1152x768Data_2;
+   SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *) SiS300_CHTVUNTSCData;
+   SiS_CHTVONTSCData = (SiS_LVDSDataStruct *) SiS300_CHTVONTSCData;
+   SiS_CHTVUPALData  = (SiS_LVDSDataStruct *) SiS300_CHTVUPALData;
+   SiS_CHTVOPALData  = (SiS_LVDSDataStruct *) SiS300_CHTVOPALData;
+   SiS_PanelType00_1 = (SiS_LVDSDesStruct *) SiS300_PanelType00_1;
+   SiS_PanelType01_1 = (SiS_LVDSDesStruct *) SiS300_PanelType01_1;
+   SiS_PanelType02_1 = (SiS_LVDSDesStruct *) SiS300_PanelType02_1;
+   SiS_PanelType03_1 = (SiS_LVDSDesStruct *) SiS300_PanelType03_1;
+   SiS_PanelType04_1 = (SiS_LVDSDesStruct *) SiS300_PanelType04_1;
+   SiS_PanelType05_1 = (SiS_LVDSDesStruct *) SiS300_PanelType05_1;
+   SiS_PanelType06_1 = (SiS_LVDSDesStruct *) SiS300_PanelType06_1;
+   SiS_PanelType07_1 = (SiS_LVDSDesStruct *) SiS300_PanelType07_1;
+   SiS_PanelType08_1 = (SiS_LVDSDesStruct *) SiS300_PanelType08_1;
+   SiS_PanelType09_1 = (SiS_LVDSDesStruct *) SiS300_PanelType09_1;
+   SiS_PanelType0a_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0a_1;
+   SiS_PanelType0b_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0b_1;
+   SiS_PanelType0c_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0c_1;
+   SiS_PanelType0d_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0d_1;
+   SiS_PanelType0e_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0e_1;
+   SiS_PanelType0f_1 = (SiS_LVDSDesStruct *) SiS300_PanelType0f_1;
+   SiS_PanelType00_2 = (SiS_LVDSDesStruct *) SiS300_PanelType00_2;
+   SiS_PanelType01_2 = (SiS_LVDSDesStruct *) SiS300_PanelType01_2;
+   SiS_PanelType02_2 = (SiS_LVDSDesStruct *) SiS300_PanelType02_2;
+   SiS_PanelType03_2 = (SiS_LVDSDesStruct *) SiS300_PanelType03_2;
+   SiS_PanelType04_2 = (SiS_LVDSDesStruct *) SiS300_PanelType04_2;
+   SiS_PanelType05_2 = (SiS_LVDSDesStruct *) SiS300_PanelType05_2;
+   SiS_PanelType06_2 = (SiS_LVDSDesStruct *) SiS300_PanelType06_2;
+   SiS_PanelType07_2 = (SiS_LVDSDesStruct *) SiS300_PanelType07_2;
+   SiS_PanelType08_2 = (SiS_LVDSDesStruct *) SiS300_PanelType08_2;
+   SiS_PanelType09_2 = (SiS_LVDSDesStruct *) SiS300_PanelType09_2;
+   SiS_PanelType0a_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0a_2;
+   SiS_PanelType0b_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0b_2;
+   SiS_PanelType0c_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0c_2;
+   SiS_PanelType0d_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0d_2;
+   SiS_PanelType0e_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0e_2;
+   SiS_PanelType0f_2 = (SiS_LVDSDesStruct *) SiS300_PanelType0f_2;
+   SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *) SiS300_CHTVUNTSCDesData;
+   SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *) SiS300_CHTVONTSCDesData;
+   SiS_CHTVUPALDesData = (SiS_LVDSDesStruct *) SiS300_CHTVUPALDesData;
+   SiS_CHTVOPALDesData = (SiS_LVDSDesStruct *) SiS300_CHTVOPALDesData;
+   SiS_LVDSCRT1800x600_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_1;
+   SiS_LVDSCRT11024x768_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_1;
+   SiS_LVDSCRT11280x1024_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_1;
+   SiS_LVDSCRT11024x600_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x600_1;
+   SiS_LVDSCRT11152x768_1 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11152x768_1;
+   SiS_LVDSCRT1800x600_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_1_H;
+   SiS_LVDSCRT11024x768_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_1_H;
+   SiS_LVDSCRT11280x1024_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_1_H;
+   SiS_LVDSCRT11024x600_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x600_1_H;
+   SiS_LVDSCRT11152x768_1_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11152x768_1_H;
+   SiS_LVDSCRT1800x600_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_2;
+   SiS_LVDSCRT11024x768_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_2;
+   SiS_LVDSCRT11280x1024_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_2;
+   SiS_LVDSCRT11024x600_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x600_2;
+   SiS_LVDSCRT11152x768_2 = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11152x768_2;
+   SiS_LVDSCRT1800x600_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT1800x600_2_H;
+   SiS_LVDSCRT11024x768_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x768_2_H;
+   SiS_LVDSCRT11280x1024_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11280x1024_2_H;
+   SiS_LVDSCRT11024x600_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11024x600_2_H;
+   SiS_LVDSCRT11152x768_2_H = (SiS_LVDSCRT1DataStruct *) SiS300_LVDSCRT11152x768_2_H;
+   SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1UNTSC;
+   SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1ONTSC;
+   SiS_CHTVCRT1UPAL = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1UPAL;
+   SiS_CHTVCRT1OPAL = (SiS_LVDSCRT1DataStruct *) SiS300_CHTVCRT1OPAL;
+   SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_UNTSC;
+   SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_ONTSC;
+   SiS_CHTVReg_UPAL = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_UPAL;
+   SiS_CHTVReg_OPAL = (SiS_CHTVRegDataStruct *) SiS300_CHTVReg_OPAL;
+   SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
+   SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
+   SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
+   SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
+
+   Panel320x480 = Panel300_320x480;
+   Panel640x480 = Panel300_640x480;
+   Panel800x600 = Panel300_800x600;
+   Panel1024x768 = Panel300_1024x768;
+   Panel1280x1024 = Panel300_1280x1024;
+   Panel1280x960 = Panel300_1280x960;
+   Panel1024x600 = Panel300_1024x600;
+   Panel1152x768 = Panel300_1152x768;
+   Panel1600x1200 = 16;  /*Panel300_1600x1200;  OLD */
+   Panel1400x1050 = 16;  /* TW: Something illegal */
+   Panel1152x864 = 16;   /* TW: Something illegal */
+   Panel1280x768 = 16;   /* TW: Something illegal */
+   Panel1024x600 = 16;   /* TW: Something illegal */
+   PanelMax = Panel300_320x480;        /* TW: highest value */
+   PanelMinLVDS = Panel300_800x600;    /* TW: Lowest value LVDS */
+   PanelMin301 = Panel310_1024x768;    /* TW: lowest value 301 */
+
+}
+#endif
+
+#ifdef SIS315H
 void
-InitTo310Pointer (void)
-{
-	SiS_SModeIDTable = (SiS_StStruct *) SiS310_SModeIDTable;
-	SiS_StandTable = (SiS_StandTableStruct *) SiS310_StandTable;
-	SiS_EModeIDTable = (SiS_ExtStruct *) SiS310_EModeIDTable;
-	SiS_RefIndex = (SiS_Ext2Struct *) SiS310_RefIndex;
-	SiS_CRT1Table = (SiS_CRT1TableStruct *) SiS310_CRT1Table;
-	SiS_MCLKData = (SiS_MCLKDataStruct *) SiS310_MCLKData;
-	SiS_ECLKData = (SiS_ECLKDataStruct *) SiS310_ECLKData;
-	SiS_VCLKData = (SiS_VCLKDataStruct *) SiS310_VCLKData;
-	SiS_VBVCLKData = (SiS_VBVCLKDataStruct *) SiS310_VBVCLKData;
-	SiS_ScreenOffset = SiS310_ScreenOffset;
-	SiS_StResInfo = (SiS_StResInfoStruct *) SiS310_StResInfo;
-	SiS_ModeResInfo = (SiS_ModeResInfoStruct *) SiS310_ModeResInfo;
-
-	pSiS_OutputSelect = &SiS310_OutputSelect;
-	pSiS_SoftSetting = &SiS310_SoftSetting;
-	pSiS_SR07 = &SiS310_SR07;
-	SiS_SR15 = SiS310_SR15;
-	SiS_CR40 = SiS310_CR40;
-	SiS_CR49 = SiS310_CR49;
-	pSiS_SR1F = &SiS310_SR1F;
-	pSiS_SR21 = &SiS310_SR21;
-	pSiS_SR22 = &SiS310_SR22;
-	pSiS_SR23 = &SiS310_SR23;
-	pSiS_SR24 = &SiS310_SR24;
-	SiS_SR25 = SiS310_SR25;
-	pSiS_SR31 = &SiS310_SR31;
-	pSiS_SR32 = &SiS310_SR32;
-	pSiS_SR33 = &SiS310_SR33;
-	pSiS_CRT2Data_1_2 = &SiS310_CRT2Data_1_2;
-	pSiS_CRT2Data_4_D = &SiS310_CRT2Data_4_D;
-	pSiS_CRT2Data_4_E = &SiS310_CRT2Data_4_E;
-	pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
-	pSiS_RGBSenseData = &SiS310_RGBSenseData;
-	pSiS_VideoSenseData = &SiS310_VideoSenseData;
-	pSiS_YCSenseData = &SiS310_YCSenseData;
-	pSiS_RGBSenseData2 = &SiS310_RGBSenseData2;
-	pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
-	pSiS_YCSenseData2 = &SiS310_YCSenseData2;
-	SiS_NTSCPhase = SiS310_NTSCPhase;
-	SiS_PALPhase = SiS310_PALPhase;
-	SiS_NTSCPhase2 = SiS310_NTSCPhase2;
-	SiS_PALPhase2 = SiS310_PALPhase2;
-	SiS_PALMPhase = SiS310_PALMPhase;	/*add for PALMN */
-	SiS_PALNPhase = SiS310_PALNPhase;
-
-	SiS_StLCD1024x768Data = (SiS_LCDDataStruct *) SiS310_StLCD1024x768Data;
-	SiS_ExtLCD1024x768Data =
-	    (SiS_LCDDataStruct *) SiS310_ExtLCD1024x768Data;
-	SiS_St2LCD1024x768Data =
-	    (SiS_LCDDataStruct *) SiS310_St2LCD1024x768Data;
-	SiS_StLCD1280x1024Data =
-	    (SiS_LCDDataStruct *) SiS310_StLCD1280x1024Data;
-	SiS_ExtLCD1280x1024Data =
-	    (SiS_LCDDataStruct *) SiS310_ExtLCD1280x1024Data;
-	SiS_St2LCD1280x1024Data =
-	    (SiS_LCDDataStruct *) SiS310_St2LCD1280x1024Data;
-	SiS_NoScaleData = (SiS_LCDDataStruct *) SiS310_NoScaleData;
-	SiS_LCD1280x960Data = (SiS_LCDDataStruct *) SiS310_LCD1280x960Data;
-	SiS_StPALData = (SiS_TVDataStruct *) SiS310_StPALData;
-	SiS_ExtPALData = (SiS_TVDataStruct *) SiS310_ExtPALData;
-	SiS_StNTSCData = (SiS_TVDataStruct *) SiS310_StNTSCData;
-	SiS_ExtNTSCData = (SiS_TVDataStruct *) SiS310_ExtNTSCData;
-	SiS_St1HiTVData = (SiS_TVDataStruct *) SiS310_St1HiTVData;
-	SiS_St2HiTVData = (SiS_TVDataStruct *) SiS310_St2HiTVData;
-	SiS_ExtHiTVData = (SiS_TVDataStruct *) SiS310_ExtHiTVData;
-	SiS_NTSCTiming = SiS310_NTSCTiming;
-	SiS_PALTiming = SiS310_PALTiming;
-	SiS_HiTVSt1Timing = SiS310_HiTVSt1Timing;
-	SiS_HiTVSt2Timing = SiS310_HiTVSt2Timing;
-	SiS_HiTVTextTiming = SiS310_HiTVTextTiming;
-	SiS_HiTVGroup3Data = SiS310_HiTVGroup3Data;
-	SiS_HiTVGroup3Simu = SiS310_HiTVGroup3Simu;
-	SiS_HiTVGroup3Text = SiS310_HiTVGroup3Text;
-
-	SiS_PanelDelayTbl = (SiS_PanelDelayTblStruct *) SiS310_PanelDelayTbl;
-	SiS_LVDS800x600Data_1 = (SiS_LVDSDataStruct *) SiS310_LVDS800x600Data_1;
-	SiS_LVDS800x600Data_2 = (SiS_LVDSDataStruct *) SiS310_LVDS800x600Data_2;
-	SiS_LVDS1024x768Data_1 =
-	    (SiS_LVDSDataStruct *) SiS310_LVDS1024x768Data_1;
-	SiS_LVDS1024x768Data_2 =
-	    (SiS_LVDSDataStruct *) SiS310_LVDS1024x768Data_2;
-	SiS_LVDS1280x1024Data_1 =
-	    (SiS_LVDSDataStruct *) SiS310_LVDS1280x1024Data_1;
-	SiS_LVDS1280x1024Data_2 =
-	    (SiS_LVDSDataStruct *) SiS310_LVDS1280x1024Data_2;
-	SiS_LVDS640x480Data_1 = (SiS_LVDSDataStruct *) SiS310_LVDS640x480Data_1;
-	SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *) SiS310_CHTVUNTSCData;
-	SiS_CHTVONTSCData = (SiS_LVDSDataStruct *) SiS310_CHTVONTSCData;
-	SiS_CHTVUPALData = (SiS_LVDSDataStruct *) SiS310_CHTVUPALData;
-	SiS_CHTVOPALData = (SiS_LVDSDataStruct *) SiS310_CHTVOPALData;
-	SiS_PanelType00_1 = (SiS_LVDSDesStruct *) SiS310_PanelType00_1;
-	SiS_PanelType01_1 = (SiS_LVDSDesStruct *) SiS310_PanelType01_1;
-	SiS_PanelType02_1 = (SiS_LVDSDesStruct *) SiS310_PanelType02_1;
-	SiS_PanelType03_1 = (SiS_LVDSDesStruct *) SiS310_PanelType03_1;
-	SiS_PanelType04_1 = (SiS_LVDSDesStruct *) SiS310_PanelType04_1;
-	SiS_PanelType05_1 = (SiS_LVDSDesStruct *) SiS310_PanelType05_1;
-	SiS_PanelType06_1 = (SiS_LVDSDesStruct *) SiS310_PanelType06_1;
-	SiS_PanelType07_1 = (SiS_LVDSDesStruct *) SiS310_PanelType07_1;
-	SiS_PanelType08_1 = (SiS_LVDSDesStruct *) SiS310_PanelType08_1;
-	SiS_PanelType09_1 = (SiS_LVDSDesStruct *) SiS310_PanelType09_1;
-	SiS_PanelType0a_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0a_1;
-	SiS_PanelType0b_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0b_1;
-	SiS_PanelType0c_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0c_1;
-	SiS_PanelType0d_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0d_1;
-	SiS_PanelType0e_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0e_1;
-	SiS_PanelType0f_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0f_1;
-	SiS_PanelType00_2 = (SiS_LVDSDesStruct *) SiS310_PanelType00_2;
-	SiS_PanelType01_2 = (SiS_LVDSDesStruct *) SiS310_PanelType01_2;
-	SiS_PanelType02_2 = (SiS_LVDSDesStruct *) SiS310_PanelType02_2;
-	SiS_PanelType03_2 = (SiS_LVDSDesStruct *) SiS310_PanelType03_2;
-	SiS_PanelType04_2 = (SiS_LVDSDesStruct *) SiS310_PanelType04_2;
-	SiS_PanelType05_2 = (SiS_LVDSDesStruct *) SiS310_PanelType05_2;
-	SiS_PanelType06_2 = (SiS_LVDSDesStruct *) SiS310_PanelType06_2;
-	SiS_PanelType07_2 = (SiS_LVDSDesStruct *) SiS310_PanelType07_2;
-	SiS_PanelType08_2 = (SiS_LVDSDesStruct *) SiS310_PanelType08_2;
-	SiS_PanelType09_2 = (SiS_LVDSDesStruct *) SiS310_PanelType09_2;
-	SiS_PanelType0a_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0a_2;
-	SiS_PanelType0b_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0b_2;
-	SiS_PanelType0c_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0c_2;
-	SiS_PanelType0d_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0d_2;
-	SiS_PanelType0e_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0e_2;
-	SiS_PanelType0f_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0f_2;
-	/*301b */
-	LVDS1024x768Des_1 = (SiS_LVDSDesStruct *) SiS310_PanelType1076_1;
-	LVDS1280x1024Des_1 = (SiS_LVDSDesStruct *) SiS310_PanelType1210_1;
-	LVDS1280x960Des_1 = (SiS_LVDSDesStruct *) SiS310_PanelType1296_1;
-	LVDS1024x768Des_2 = (SiS_LVDSDesStruct *) SiS310_PanelType1076_2;
-	LVDS1280x1024Des_2 = (SiS_LVDSDesStruct *) SiS310_PanelType1210_2;
-	LVDS1280x960Des_2 = (SiS_LVDSDesStruct *) SiS310_PanelType1296_2;
-	/*end 301b */
-
-	SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *) SiS310_CHTVUNTSCDesData;
-	SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *) SiS310_CHTVONTSCDesData;
-	SiS_CHTVUPALDesData = (SiS_LVDSDesStruct *) SiS310_CHTVUPALDesData;
-	SiS_CHTVOPALDesData = (SiS_LVDSDesStruct *) SiS310_CHTVOPALDesData;
-	SiS_LVDSCRT1800x600_1 =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_1;
-	SiS_LVDSCRT11024x768_1 =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_1;
-	SiS_LVDSCRT11280x1024_1 =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_1;
-	SiS_LVDSCRT1800x600_1_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_1_H;
-	SiS_LVDSCRT11024x768_1_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_1_H;
-	SiS_LVDSCRT11280x1024_1_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_1_H;
-	SiS_LVDSCRT1800x600_2 =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_2;
-	SiS_LVDSCRT11024x768_2 =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_2;
-	SiS_LVDSCRT11280x1024_2 =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_2;
-	SiS_LVDSCRT1800x600_2_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_2_H;
-	SiS_LVDSCRT11024x768_2_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_2_H;
-	SiS_LVDSCRT11280x1024_2_H =
-	    (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_2_H;
-	SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1UNTSC;
-	SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1ONTSC;
-	SiS_CHTVCRT1UPAL = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1UPAL;
-	SiS_CHTVCRT1OPAL = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1OPAL;
-	SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_UNTSC;
-	SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_ONTSC;
-	SiS_CHTVReg_UPAL = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_UPAL;
-	SiS_CHTVReg_OPAL = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_OPAL;
-	/*add for LCDA */
-	SiS_LCDACRT1800x600_1 =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_1;
-	SiS_LCDACRT11024x768_1 =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_1;
-	SiS_LCDACRT11280x1024_1 =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_1;
-	SiS_LCDACRT1800x600_1_H =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_1_H;
-	SiS_LCDACRT11024x768_1_H =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_1_H;
-	SiS_LCDACRT11280x1024_1_H =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_1_H;
-	SiS_LCDACRT1800x600_2 =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_2;
-	SiS_LCDACRT11024x768_2 =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_2;
-	SiS_LCDACRT11280x1024_2 =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_2;
-	SiS_LCDACRT1800x600_2_H =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_2_H;
-	SiS_LCDACRT11024x768_2_H =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_2_H;
-	SiS_LCDACRT11280x1024_2_H =
-	    (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_2_H;
-	/*end for 301b */
-
-	SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
-	SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
-	SiS_CHTVVCLKUPAL = SiS310_CHTVVCLKUPAL;
-	SiS_CHTVVCLKOPAL = SiS310_CHTVVCLKOPAL;
-	/* 310 customization related */
+InitTo310Pointer(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   SiS_SModeIDTable = (SiS_StStruct *) SiS310_SModeIDTable;
+   SiS_StandTable   = (SiS_StandTableStruct *) SiS310_StandTable;
+   SiS_EModeIDTable = (SiS_ExtStruct *) SiS310_EModeIDTable;
+   SiS_RefIndex     = (SiS_Ext2Struct *) SiS310_RefIndex;
+   SiS_CRT1Table    = (SiS_CRT1TableStruct *) SiS310_CRT1Table;
+
+   /* TW: MCLK is different */
+   if(HwDeviceExtension->jChipType > SIS_315PRO) {
+      SiS_MCLKData_0 = (SiS_MCLKDataStruct *) SiS310_MCLKData_0_650;  /* 550, 650 */
+   } else {
+      SiS_MCLKData_0 = (SiS_MCLKDataStruct *) SiS310_MCLKData_0_315;  /* 315 */
+   }
+   SiS_MCLKData_1    = (SiS_MCLKDataStruct *) SiS310_MCLKData_1;
+   SiS_ECLKData      = (SiS_ECLKDataStruct *) SiS310_ECLKData;
+   SiS_VCLKData      = (SiS_VCLKDataStruct *) SiS310_VCLKData;
+   SiS_VBVCLKData    = (SiS_VBVCLKDataStruct *) SiS310_VBVCLKData;
+
+   SiS_ScreenOffset = SiS310_ScreenOffset;
+   SiS_StResInfo = (SiS_StResInfoStruct *) SiS310_StResInfo;
+   SiS_ModeResInfo = (SiS_ModeResInfoStruct *) SiS310_ModeResInfo;
+
+   pSiS_OutputSelect = &SiS310_OutputSelect;
+   pSiS_SoftSetting = &SiS310_SoftSetting;
+   pSiS_SR07 = &SiS310_SR07;
+   SiS_SR15 = SiS310_SR15;
+   SiS_CR40 = SiS310_CR40;
+   SiS_CR49 = SiS310_CR49;
+   pSiS_SR1F = &SiS310_SR1F;
+   pSiS_SR21 = &SiS310_SR21;
+   pSiS_SR22 = &SiS310_SR22;
+   pSiS_SR23 = &SiS310_SR23;
+   pSiS_SR24 = &SiS310_SR24;
+   SiS_SR25 = SiS310_SR25;
+   pSiS_SR31 = &SiS310_SR31;
+   pSiS_SR32 = &SiS310_SR32;
+   pSiS_SR33 = &SiS310_SR33;
+   pSiS_CRT2Data_1_2 = &SiS310_CRT2Data_1_2;
+   pSiS_CRT2Data_4_D = &SiS310_CRT2Data_4_D;
+   pSiS_CRT2Data_4_E = &SiS310_CRT2Data_4_E;
+   pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
+   pSiS_RGBSenseData = &SiS310_RGBSenseData;
+   pSiS_VideoSenseData = &SiS310_VideoSenseData;
+   pSiS_YCSenseData = &SiS310_YCSenseData;
+   pSiS_RGBSenseData2 = &SiS310_RGBSenseData2;
+   pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
+   pSiS_YCSenseData2 = &SiS310_YCSenseData2;
+   SiS_NTSCPhase = SiS310_NTSCPhase;
+   SiS_PALPhase = SiS310_PALPhase;
+   SiS_NTSCPhase2 = SiS310_NTSCPhase2;
+   SiS_PALPhase2 = SiS310_PALPhase2;
+   SiS_PALMPhase = SiS310_PALMPhase;
+   SiS_PALNPhase = SiS310_PALNPhase;
+   SiS_PALMPhase2 = SiS310_PALMPhase2;
+   SiS_PALNPhase2 = SiS310_PALNPhase2;
+
+   SiS_StLCD1024x768Data = (SiS_LCDDataStruct *) SiS310_StLCD1024x768Data;
+   SiS_ExtLCD1024x768Data = (SiS_LCDDataStruct *) SiS310_ExtLCD1024x768Data;
+   SiS_St2LCD1024x768Data = (SiS_LCDDataStruct *) SiS310_St2LCD1024x768Data;
+   SiS_StLCD1280x1024Data = (SiS_LCDDataStruct *) SiS310_StLCD1280x1024Data;
+   SiS_ExtLCD1280x1024Data = (SiS_LCDDataStruct *) SiS310_ExtLCD1280x1024Data;
+   SiS_St2LCD1280x1024Data = (SiS_LCDDataStruct *) SiS310_St2LCD1280x1024Data;
+   SiS_NoScaleData1024x768  = (SiS_LCDDataStruct *) SiS310_NoScaleData1024x768;
+   SiS_NoScaleData1280x1024 = (SiS_LCDDataStruct *) SiS310_NoScaleData1280x1024;
+   SiS_LCD1280x960Data = (SiS_LCDDataStruct *) SiS310_LCD1280x960Data;
+   SiS_StPALData = (SiS_TVDataStruct *) SiS310_StPALData;
+   SiS_ExtPALData = (SiS_TVDataStruct *) SiS310_ExtPALData;
+   SiS_StNTSCData = (SiS_TVDataStruct *) SiS310_StNTSCData;
+   SiS_ExtNTSCData = (SiS_TVDataStruct *) SiS310_ExtNTSCData;
+   SiS_St1HiTVData = (SiS_TVDataStruct *) SiS310_St1HiTVData;
+   SiS_St2HiTVData = (SiS_TVDataStruct *) SiS310_St2HiTVData;
+   SiS_ExtHiTVData = (SiS_TVDataStruct *) SiS310_ExtHiTVData;
+   SiS_NTSCTiming = SiS310_NTSCTiming;
+   SiS_PALTiming = SiS310_PALTiming;
+   SiS_HiTVSt1Timing = SiS310_HiTVSt1Timing;
+   SiS_HiTVSt2Timing = SiS310_HiTVSt2Timing;
+   SiS_HiTVTextTiming = SiS310_HiTVTextTiming;
+   SiS_HiTVGroup3Data = SiS310_HiTVGroup3Data;
+   SiS_HiTVGroup3Simu = SiS310_HiTVGroup3Simu;
+   SiS_HiTVGroup3Text = SiS310_HiTVGroup3Text;
+
+   SiS_PanelDelayTbl = (SiS_PanelDelayTblStruct *) SiS310_PanelDelayTbl;
+   SiS_PanelDelayTblLVDS = (SiS_PanelDelayTblStruct *) SiS310_PanelDelayTblLVDS;
+
+   SiS_LVDS800x600Data_1   = (SiS_LVDSDataStruct *) SiS310_LVDS800x600Data_1;
+   SiS_LVDS800x600Data_2   = (SiS_LVDSDataStruct *) SiS310_LVDS800x600Data_2;
+   SiS_LVDS1024x768Data_1  = (SiS_LVDSDataStruct *) SiS310_LVDS1024x768Data_1;
+   SiS_LVDS1024x768Data_2  = (SiS_LVDSDataStruct *) SiS310_LVDS1024x768Data_2;
+   SiS_LVDS1280x1024Data_1 = (SiS_LVDSDataStruct *) SiS310_LVDS1280x1024Data_1;
+   SiS_LVDS1280x1024Data_2 = (SiS_LVDSDataStruct *) SiS310_LVDS1280x1024Data_2;
+   SiS_LVDS1280x960Data_1  = (SiS_LVDSDataStruct *) SiS310_LVDS1280x960Data_1;
+   SiS_LVDS1280x960Data_2  = (SiS_LVDSDataStruct *) SiS310_LVDS1280x960Data_2;
+   SiS_LVDS1400x1050Data_1 = (SiS_LVDSDataStruct *) SiS310_LVDS1400x1050Data_1;
+   SiS_LVDS1400x1050Data_2 = (SiS_LVDSDataStruct *) SiS310_LVDS1400x1050Data_2;
+   SiS_LVDS1024x600Data_1  = (SiS_LVDSDataStruct *) SiS310_LVDS1024x600Data_1;
+   SiS_LVDS1024x600Data_2  = (SiS_LVDSDataStruct *) SiS310_LVDS1024x600Data_2;
+   SiS_LVDS1152x768Data_1  = (SiS_LVDSDataStruct *) SiS310_LVDS1152x768Data_1;
+   SiS_LVDS1152x768Data_2  = (SiS_LVDSDataStruct *) SiS310_LVDS1152x768Data_2;
+   SiS_LVDSXXXxXXXData_1   = (SiS_LVDSDataStruct *) SiS310_LVDSXXXxXXXData_1;
+   SiS_LVDS320x480Data_1   = (SiS_LVDSDataStruct *) SiS310_LVDS320x480Data_1;
+   SiS_LVDS640x480Data_1   = (SiS_LVDSDataStruct *) SiS310_LVDS640x480Data_1;
+   SiS_CHTVUNTSCData = (SiS_LVDSDataStruct *) SiS310_CHTVUNTSCData;
+   SiS_CHTVONTSCData = (SiS_LVDSDataStruct *) SiS310_CHTVONTSCData;
+   SiS_CHTVUPALData  = (SiS_LVDSDataStruct *) SiS310_CHTVUPALData;
+   SiS_CHTVOPALData  = (SiS_LVDSDataStruct *) SiS310_CHTVOPALData;
+   SiS_PanelType00_1 = (SiS_LVDSDesStruct *) SiS310_PanelType00_1;
+   SiS_PanelType01_1 = (SiS_LVDSDesStruct *) SiS310_PanelType01_1;
+   SiS_PanelType02_1 = (SiS_LVDSDesStruct *) SiS310_PanelType02_1;
+   SiS_PanelType03_1 = (SiS_LVDSDesStruct *) SiS310_PanelType03_1;
+   SiS_PanelType04_1 = (SiS_LVDSDesStruct *) SiS310_PanelType04_1;
+   SiS_PanelType05_1 = (SiS_LVDSDesStruct *) SiS310_PanelType05_1;
+   SiS_PanelType06_1 = (SiS_LVDSDesStruct *) SiS310_PanelType06_1;
+   SiS_PanelType07_1 = (SiS_LVDSDesStruct *) SiS310_PanelType07_1;
+   SiS_PanelType08_1 = (SiS_LVDSDesStruct *) SiS310_PanelType08_1;
+   SiS_PanelType09_1 = (SiS_LVDSDesStruct *) SiS310_PanelType09_1;
+   SiS_PanelType0a_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0a_1;
+   SiS_PanelType0b_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0b_1;
+   SiS_PanelType0c_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0c_1;
+   SiS_PanelType0d_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0d_1;
+   SiS_PanelType0e_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0e_1;
+   SiS_PanelType0f_1 = (SiS_LVDSDesStruct *) SiS310_PanelType0f_1;
+   SiS_PanelType00_2 = (SiS_LVDSDesStruct *) SiS310_PanelType00_2;
+   SiS_PanelType01_2 = (SiS_LVDSDesStruct *) SiS310_PanelType01_2;
+   SiS_PanelType02_2 = (SiS_LVDSDesStruct *) SiS310_PanelType02_2;
+   SiS_PanelType03_2 = (SiS_LVDSDesStruct *) SiS310_PanelType03_2;
+   SiS_PanelType04_2 = (SiS_LVDSDesStruct *) SiS310_PanelType04_2;
+   SiS_PanelType05_2 = (SiS_LVDSDesStruct *) SiS310_PanelType05_2;
+   SiS_PanelType06_2 = (SiS_LVDSDesStruct *) SiS310_PanelType06_2;
+   SiS_PanelType07_2 = (SiS_LVDSDesStruct *) SiS310_PanelType07_2;
+   SiS_PanelType08_2 = (SiS_LVDSDesStruct *) SiS310_PanelType08_2;
+   SiS_PanelType09_2 = (SiS_LVDSDesStruct *) SiS310_PanelType09_2;
+   SiS_PanelType0a_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0a_2;
+   SiS_PanelType0b_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0b_2;
+   SiS_PanelType0c_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0c_2;
+   SiS_PanelType0d_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0d_2;
+   SiS_PanelType0e_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0e_2;
+   SiS_PanelType0f_2 = (SiS_LVDSDesStruct *) SiS310_PanelType0f_2;
+
+   LVDS1024x768Des_1 = (SiS_LVDSDesStruct *) SiS310_PanelType1076_1;
+   LVDS1280x1024Des_1= (SiS_LVDSDesStruct *) SiS310_PanelType1210_1;
+   LVDS1280x960Des_1 = (SiS_LVDSDesStruct *) SiS310_PanelType1296_1 ;
+   LVDS1024x768Des_2 = (SiS_LVDSDesStruct *) SiS310_PanelType1076_2;
+   LVDS1280x1024Des_2= (SiS_LVDSDesStruct *) SiS310_PanelType1210_2;
+   LVDS1280x960Des_2 = (SiS_LVDSDesStruct *) SiS310_PanelType1296_2;
+
+   /* TW: New from 650/301LV BIOS */
+   SiS_CRT2Part2_1024x768_1  = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1024x768_1;
+   SiS_CRT2Part2_1280x1024_1 = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1280x1024_1;
+   SiS_CRT2Part2_1024x768_2  = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1024x768_2;
+   SiS_CRT2Part2_1280x1024_2 = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1280x1024_2;
+   SiS_CRT2Part2_1024x768_3  = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1024x768_3;
+   SiS_CRT2Part2_1280x1024_3 = (SiS_Part2PortTblStruct *) SiS310_CRT2Part2_1280x1024_3;
+
+   SiS_CHTVUNTSCDesData = (SiS_LVDSDesStruct *) SiS310_CHTVUNTSCDesData;
+   SiS_CHTVONTSCDesData = (SiS_LVDSDesStruct *) SiS310_CHTVONTSCDesData;
+   SiS_CHTVUPALDesData  = (SiS_LVDSDesStruct *) SiS310_CHTVUPALDesData;
+   SiS_CHTVOPALDesData  = (SiS_LVDSDesStruct *) SiS310_CHTVOPALDesData;
+
+   SiS_LVDSCRT1800x600_1     = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_1;
+   SiS_LVDSCRT11024x768_1    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_1;
+   SiS_LVDSCRT11280x1024_1   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_1;
+   SiS_LVDSCRT11400x1050_1   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11400x1050_1;
+   SiS_LVDSCRT11024x600_1    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x600_1;
+   SiS_LVDSCRT11152x768_1    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11152x768_1;
+   SiS_LVDSCRT1800x600_1_H   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_1_H;
+   SiS_LVDSCRT11024x768_1_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_1_H;
+   SiS_LVDSCRT11280x1024_1_H = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_1_H;
+   SiS_LVDSCRT11400x1050_1_H = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11400x1050_1_H;
+   SiS_LVDSCRT11024x600_1_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x600_1_H;
+   SiS_LVDSCRT11152x768_1_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11152x768_1_H;
+   SiS_LVDSCRT1800x600_2     = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_2;
+   SiS_LVDSCRT11024x768_2    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_2;
+   SiS_LVDSCRT11280x1024_2   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_2;
+   SiS_LVDSCRT11400x1050_2   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11400x1050_2;
+   SiS_LVDSCRT11024x600_2    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x600_2;
+   SiS_LVDSCRT11152x768_2    = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11152x768_2;
+   SiS_LVDSCRT1800x600_2_H   = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1800x600_2_H;
+   SiS_LVDSCRT11024x768_2_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x768_2_H;
+   SiS_LVDSCRT11280x1024_2_H = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11280x1024_2_H;
+   SiS_LVDSCRT11400x1050_2_H = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11400x1050_2_H;
+   SiS_LVDSCRT11024x600_2_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11024x600_2_H;
+   SiS_LVDSCRT11152x768_2_H  = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT11152x768_2_H;
+   SiS_LVDSCRT1XXXxXXX_1     = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1XXXxXXX_1;
+   SiS_LVDSCRT1320x480_1     = (SiS_LVDSCRT1DataStruct *) SiS310_LVDSCRT1320x480_1;
+   SiS_CHTVCRT1UNTSC = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1UNTSC;
+   SiS_CHTVCRT1ONTSC = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1ONTSC;
+   SiS_CHTVCRT1UPAL  = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1UPAL;
+   SiS_CHTVCRT1OPAL  = (SiS_LVDSCRT1DataStruct *) SiS310_CHTVCRT1OPAL;
+   SiS_CHTVReg_UNTSC = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_UNTSC;
+   SiS_CHTVReg_ONTSC = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_ONTSC;
+   SiS_CHTVReg_UPAL  = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_UPAL;
+   SiS_CHTVReg_OPAL  = (SiS_CHTVRegDataStruct *) SiS310_CHTVReg_OPAL;
+   SiS_LCDACRT1800x600_1     = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_1;
+   SiS_LCDACRT11024x768_1    = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_1;
+   SiS_LCDACRT11280x1024_1   = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_1;
+   SiS_LCDACRT1800x600_1_H   = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_1_H;
+   SiS_LCDACRT11024x768_1_H  = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_1_H;
+   SiS_LCDACRT11280x1024_1_H = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_1_H;
+   SiS_LCDACRT1800x600_2     = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_2;
+   SiS_LCDACRT11024x768_2    = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_2;
+   SiS_LCDACRT11280x1024_2   = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_2;
+   SiS_LCDACRT1800x600_2_H   = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT1800x600_2_H;
+   SiS_LCDACRT11024x768_2_H  = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11024x768_2_H;
+   SiS_LCDACRT11280x1024_2_H = (SiS_LCDACRT1DataStruct *) SiS310_LCDACRT11280x1024_2_H;
+   SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
+   SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
+   SiS_CHTVVCLKUPAL  = SiS310_CHTVVCLKUPAL;
+   SiS_CHTVVCLKOPAL  = SiS310_CHTVVCLKOPAL;
+
+   Panel320x480 = Panel310_320x480;
+   Panel640x480 = Panel310_640x480;
+   Panel800x600 = Panel310_800x600;
+   Panel1024x768 = Panel310_1024x768;
+   Panel1280x1024 = Panel310_1280x1024;
+   Panel1280x960 = Panel310_1280x960;
+   Panel1600x1200 = Panel310_1600x1200;
+   Panel1400x1050 = Panel310_1400x1050;
+   Panel1152x768 = Panel310_1152x768;
+   Panel1152x864 = Panel310_1152x864;
+   Panel1280x768 = Panel310_1280x768;
+   Panel1024x600 = Panel310_1024x600;
+   PanelMax = Panel310_320x480;       /* TW: highest value */
+   PanelMinLVDS = Panel310_800x600;   /* TW: lowest value LVDS */
+   PanelMin301 = Panel310_1024x768;   /* TW: lowest value 301 */
 
 }
 #endif
 
+#ifndef LINUX_XF86
+/* -------------- SiSInit -----------------*/
 BOOLEAN
-SiSInit (PSIS_HW_DEVICE_INFO HwDeviceExtension)
-{
-	ULONG ROMAddr = (ULONG) HwDeviceExtension->pjVirtualRomBase;
-	ULONG FBAddr = (ULONG) HwDeviceExtension->pjVideoMemoryAddress;
-	USHORT BaseAddr = (USHORT) HwDeviceExtension->ulIOAddress;
-	UCHAR i, temp = 0;
-	UCHAR SR11, temp1;
-	ULONG base;
-	UCHAR SR12 = 0, SR13 = 0, SR14 = 0, SR16 = 0, SR17 = 0, SR18 = 0, SR19 =
-	    0, SR1A = 0;
-#ifdef CONFIG_FB_SIS_315
-	/* ULONG   j, k;   */
-	UCHAR CR39 = 0, CR3A = 0, CR3B = 0, CR3C = 0, CR3D = 0, CR3E = 0, CR3F =
-	    0;
-	UCHAR CR79 = 0, CR7A = 0, CR7B = 0, CR7C = 0;
-	PSIS_DSReg pSR;
-	ULONG Temp;
-#endif
-	UCHAR VBIOSVersion[5];
-
-/* if(ROMAddr==0)   return (FALSE);*/
-	if (FBAddr == 0)
-		return (FALSE);
-	if (BaseAddr == 0)
-		return (FALSE);
-
-	SiS_SetReg3 ((USHORT) (BaseAddr + 0x12), 0x67);	/* 3c2 <- 67 ,ynlai */
-#ifdef CONFIG_FB_SIS_315
-	/*if(HwDeviceExtension->jChipType > SIS_315H) */
-	if (HwDeviceExtension->jChipType > SIS_315PRO) {
-		if (!HwDeviceExtension->bIntegratedMMEnabled)
-			return (FALSE);	/* alan  */
-	}
+SiSInit(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   ULONG   FBAddr   = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
+   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+   UCHAR   i,temp=0;
+   UCHAR   SR11;
+#ifdef LINUX_KERNEL
+   UCHAR   temp1;
+   ULONG   base;
+#endif
+   UCHAR   SR13=0,SR14=0,SR16=0,SR17=0,SR19=0,SR1A=0;
+#ifdef SIS300
+   UCHAR   SR18=0,SR12=0;
 #endif
+#ifdef SIS315H
+   UCHAR   CR37=0,CR38=0,CR79=0,CR7A=0,CR7B=0,CR7C=0;
+   UCHAR   SR1B=0,SR15=0;
+   PSIS_DSReg  pSR;
+   ULONG   Temp;
+#endif
+   UCHAR   VBIOSVersion[5];
 
-	SiS_MemoryCopy (VBIOSVersion, HwDeviceExtension->szVBIOSVer, 4);
-
-	VBIOSVersion[4] = 0x0;
-	/* 09/07/99 modify by domao */
-
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_315H) ||
-	    (HwDeviceExtension->jChipType == SIS_315PRO) ||
-	    (HwDeviceExtension->jChipType == SIS_550) ||	/* 05/02/01 ynlai for 550 */
-	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-	    (HwDeviceExtension->jChipType == SIS_740))	/* 09/03/01 chiawen for 650 */
-		InitTo310Pointer ();
-#endif
-
-#ifdef CONFIG_FB_SIS_300
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730) ||
-	    (HwDeviceExtension->jChipType == SIS_300))
-		InitTo300Pointer ();
-#endif
-
-	SiS_P3c4 = BaseAddr + 0x14;
-	SiS_P3d4 = BaseAddr + 0x24;
-	SiS_P3c0 = BaseAddr + 0x10;
-	SiS_P3ce = BaseAddr + 0x1e;
-	SiS_P3c2 = BaseAddr + 0x12;
-	SiS_P3ca = BaseAddr + 0x1a;
-	SiS_P3c6 = BaseAddr + 0x16;
-	SiS_P3c7 = BaseAddr + 0x17;
-	SiS_P3c8 = BaseAddr + 0x18;
-	SiS_P3c9 = BaseAddr + 0x19;
-	SiS_P3da = BaseAddr + 0x2A;
-	SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
-	SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
-	SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
-	SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
-	SiS_Set_LVDS_TRUMPION (HwDeviceExtension);	/*2/29/00 by Mars Wen for LVDS and Trumpion  */
-
-	SiS_SetReg1 (SiS_P3c4, 0x05, 0x86);	/* 1.Openkey  */
+   if(FBAddr==0)    return (FALSE);
+   if(BaseAddr==0)  return (FALSE);
 
-#ifdef LINUX_KERNEL
-#ifdef CONFIG_FB_SIS_300	/* add to set SR14 */
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		base = 0x80000060;
-		OutPortLong (base, 0xcf8);
-		temp1 = InPortLong (0xcfc);
-		temp1 = temp1 >> (16 + 8 + 4);
-		temp1 = temp1 & (0x07);
-		temp1 = temp1 + 1;
-		temp1 = 1 << temp1;
-		SR14 = temp1 - 1;
-		base = 0x80000064;
-		OutPortLong (base, 0xcf8);
-		temp1 = InPortLong (0xcfc);
-		temp1 = temp1 & (0x00000020);
-		if (temp1)
-			SR14 = (0x10000000) | SR14;
-		else
-			SR14 = (0x01000000) | SR14;
-	}
+   SiS_SetReg3((USHORT)(BaseAddr+0x12),  0x67);  /* 3c2 <- 67 ,ynlai */
+
+#ifdef SIS315H
+   /*if(HwDeviceExtension->jChipType > SIS_315H)*/
+   if(HwDeviceExtension->jChipType > SIS_315PRO) {
+     if(!HwDeviceExtension->bIntegratedMMEnabled)
+     	return (FALSE);  /* alan  */
+   }
 #endif
 
-#ifdef CONFIG_FB_SIS_315	/* add to set SR14 */
-	if ((HwDeviceExtension->jChipType == SIS_550)) {
-		base = 0x80000060;
-		OutPortLong (base, 0xcf8);
-		temp1 = InPortLong (0xcfc);
-		temp1 = temp1 >> (16 + 8 + 4);
-		temp1 = temp1 & (0x07);
-		temp1 = temp1 + 1;
-		temp1 = 1 << temp1;
-		SR14 = temp1 - 1;
-		base = 0x80000064;
-		OutPortLong (base, 0xcf8);
-		temp1 = InPortLong (0xcfc);
-		temp1 = temp1 & (0x00000020);
-		if (temp1)
-			SR14 = (0x10000000) | SR14;
-		else
-			SR14 = (0x01000000) | SR14;
-	}
+   SiS_MemoryCopy(VBIOSVersion,HwDeviceExtension->szVBIOSVer,4);
+   VBIOSVersion[4]= 0x0;
+   /* 09/07/99 modify by domao */
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H)||
+      (HwDeviceExtension->jChipType == SIS_315PRO)||
+      (HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650))
+     InitTo310Pointer(HwDeviceExtension);
+#endif
 
-	if ((HwDeviceExtension->jChipType == SIS_640)
-	    || (HwDeviceExtension->jChipType == SIS_740)) {
-		base = 0x80000064;
-		OutPortLong (base, 0xcf8);
-		temp1 = InPortLong (0xcfc);
-		temp1 = temp >> 4;
-		temp1 = temp1 & (0x07);
-		if (temp1 > 2) {
-			temp = temp1;
-			switch (temp) {
-			case 3:
-				temp1 = 0x07;
-				break;
-			case 4:
-				temp1 = 0x0F;
-				break;
-			case 5:
-				temp1 = 0x1F;
-				break;
-			case 6:
-				temp1 = 0x05;
-				break;
-			case 7:
-				temp1 = 0x17;
-				break;
-			case 8:
-				break;
-			case 9:
-				break;
-			}
-		}
-		SR14 = temp1;
-		base = 0x8000007C;
-		OutPortLong (base, 0xcf8);
-		temp1 = InPortLong (0xcfc);
-		temp1 = temp1 & (0x00000020);
-		if (temp1)
-			SR14 = (0x10000000) | SR14;
-	}
+#ifdef SIS300
+   if ((HwDeviceExtension->jChipType == SIS_540)||
+       (HwDeviceExtension->jChipType == SIS_630)||
+       (HwDeviceExtension->jChipType == SIS_730)||
+       (HwDeviceExtension->jChipType == SIS_300))
+     InitTo300Pointer(HwDeviceExtension);
 #endif
 
+   /* TW: Set SiS Register globals */
+   SiSRegInit(BaseAddr);
+
+   /* TW: Determine LVDS/CH70xx/TRUMPION */
+   SiS_Set_LVDS_TRUMPION(HwDeviceExtension);
+
+   SiS_SetReg1(SiS_P3c4,0x05,0x86);                     /* 1.Openkey - unlock registers */
+
+#ifdef LINUX_KERNEL
+
+#ifdef SIS300                                         	/* Set SR14*/
+   if((HwDeviceExtension->jChipType==SIS_540)||
+      (HwDeviceExtension->jChipType==SIS_630)||
+      (HwDeviceExtension->jChipType==SIS_730)) {
+     base=0x80000060;
+     OutPortLong(base,0xcf8);
+     temp1=InPortLong(0xcfc);
+     temp1 >>= (16+8+4);
+     temp1 &= 0x07;
+     temp1++;
+     temp1 = 1 << temp1;
+     SR14 = temp1 - 1;
+     base=0x80000064;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 &= 0x00000020;
+     if(temp1) 	SR14 |= 0x80;
+     else      	SR14 |= 0x40;
+   }
 #endif
 
-#ifdef CONFIG_FB_SIS_300
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		SR12 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x12);
-		SR13 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x13);
-		SR14 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x14);
-		SR16 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x16);
-		SR17 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x17);
-		SR18 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x18);
-		SR19 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x19);
-		SR1A = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x1A);
-	} else {
-		SR13 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x13);
-		SR14 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x14);
-	}
+#ifdef SIS315H                                         /* Set SR14*/
+   if(HwDeviceExtension->jChipType==SIS_550) {
+     base=0x80000060;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 >>= (16+8+4);
+     temp1 &= 0x07;
+     temp1++;
+     temp1 = 1 << temp1;
+     SR14 = temp1 - 1;
+     base=0x80000064;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 &= 0x00000020;
+     if(temp1)  SR14 |= 0x80;
+     else       SR14 |= 0x40;
+   }
+
+   if((HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+     base=0x80000064;
+     OutPortLong(base,0xcf8);
+     temp1=InPortLong(0xcfc);
+     temp1 >>= 4;
+     temp1 &= 0x07;
+     if(temp1 > 2) {
+       temp = temp1;
+       switch(temp) {
+        case 3: temp1=0x07;  break;
+        case 4: temp1=0x0F;  break;
+        case 5: temp1=0x1F;  break;
+        case 6: temp1=0x05;  break;
+        case 7: temp1=0x17;  break;
+        case 8: break;
+        case 9: break;
+       }
+     }
+     SR14 = temp1;
+     base=0x8000007C;
+     OutPortLong(base,0xcf8);
+     temp1 = InPortLong(0xcfc);
+     temp1 &= 0x00000020;
+     if(temp1)  SR14 |= 0x80;
+   }
 #endif
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_550)) {
-		CR39 = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x39);
-		CR3A = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3A);
-		CR3B = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3B);
-		CR3C = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3C);
-		CR3D = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3D);
-		CR3E = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3E);
-		CR3F = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x3F);
-		CR79 = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x79);
-		CR7A = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x7A);
-		CR7B = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x7B);
-		CR7C = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x7C);
-	} else if ((HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-		   (HwDeviceExtension->jChipType == SIS_740)) {
-		SR12 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x12);
-		SR13 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x13);
-		SR14 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x14);
-		SR16 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x16);
-		SR17 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x17);
-		SR18 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x18);
-		SR19 = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x19);
-		SR1A = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x1A);
-	}
+
+#endif  /* Linux kernel */
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540)||
+      (HwDeviceExtension->jChipType == SIS_630)||
+      (HwDeviceExtension->jChipType == SIS_730)) {
+     SR12 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x12);
+     SR13 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x13);
+     SR14 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x14);
+     SR16 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x16);
+     SR17 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x17);
+     SR18 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x18);
+     SR19 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x19);
+     SR1A = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1A);
+   } else if(HwDeviceExtension->jChipType == SIS_300){
+     SR13 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x13);
+     SR14 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x14);
+   }
+#endif
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+     SR19 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x19);
+     SR19 = (SR19)||0x01;  /* TW: ??? || ??? */
+     if(SR19==0x00) {
+     	SR13 = 0x22;
+     	SR14 = 0x00;
+    	SR15 = 0x01;
+     	SR16 = 0x00;
+     	SR17 = 0x00;
+     	SR1A = 0x00;
+     	SR1B = 0x00;
+     	CR37 = 0x00;
+     	CR38 = 0x00;
+     	CR79 = 0x00;
+     	CR7A = 0x00;
+     	CR7B = 0x00;
+     	CR7C = 0x00;
+     } else {
+     	SR13 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x13);
+     	SR14 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x14);
+     	SR15 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x15);
+     	SR16 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x16);
+     	SR17 = (UCHAR)SiS_GetReg1(SiS_P3c4,0x17);
+     	SR1A = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1A);
+     	SR1B = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1B);
+     	CR37 = (UCHAR)SiS_GetReg1(SiS_P3d4,0x37);  /* TW: Was 0x02 - why? */
+     	CR38 = (UCHAR)SiS_GetReg1(SiS_P3d4,0x38);
+     	CR79 = (UCHAR)SiS_GetReg1(SiS_P3d4,0x79);
+     	CR7A = (UCHAR)SiS_GetReg1(SiS_P3d4,0x7A);
+     	CR7B = (UCHAR)SiS_GetReg1(SiS_P3d4,0x7B);
+     	CR7C = (UCHAR)SiS_GetReg1(SiS_P3d4,0x7C);
+     }
+   }
 #endif
-/* ResetExtReg begin */
-	for (i = 0x06; i < 0x20; i++)
-		SiS_SetReg1 (SiS_P3c4, i, 0);	/* 2.Reset Extended register */
-	for (i = 0x21; i <= 0x27; i++)
-		SiS_SetReg1 (SiS_P3c4, i, 0);	/*   Reset Extended register */
-	for (i = 0x31; i <= 0x3D; i++)
-		SiS_SetReg1 (SiS_P3c4, i, 0);
 
-#ifdef CONFIG_FB_SIS_300H
-	for (i = 0x38; i <= 0x3F; i++)
-		SiS_SetReg1 (SiS_P3d4, i, 0);
+/* ResetExtReg begin: Reset extended registers */
+
+   for(i=0x06;i< 0x20;i++) SiS_SetReg1(SiS_P3c4,i,0);   /* 2.Reset Extended registers */
+   for(i=0x21;i<=0x27;i++) SiS_SetReg1(SiS_P3c4,i,0);
+   for(i=0x31;i<=0x3D;i++) SiS_SetReg1(SiS_P3c4,i,0);
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540)||
+      (HwDeviceExtension->jChipType == SIS_630)||
+      (HwDeviceExtension->jChipType == SIS_730)||
+      (HwDeviceExtension->jChipType == SIS_300)) {
+     	for(i=0x38;i<=0x3F;i++) SiS_SetReg1(SiS_P3d4,i,0);
+   }
 #endif
 
-#ifdef CONFIG_FB_SIS_315
-	for (i = 0x37; i <= 0x3F; i++)
-		SiS_SetReg1 (SiS_P3d4, i, 0);
-	for (i = 0x79; i <= 0x7C; i++)
-		SiS_SetReg1 (SiS_P3d4, i, 0);
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H)||
+      (HwDeviceExtension->jChipType == SIS_315PRO)||
+      (HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+   	for(i=0x12;i<=0x1B;i++) SiS_SetReg1(SiS_P3c4,i,0);
+   	for(i=0x79;i<=0x7C;i++) SiS_SetReg1(SiS_P3d4,i,0);
+   }
 #endif
+
 /* ResetExtReg end */
-#ifdef CONFIG_FB_SIS_300
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		SiS_SetReg1 (SiS_P3c4, 0x12, SR12);
-		SiS_SetReg1 (SiS_P3c4, 0x13, SR13);
-		SiS_SetReg1 (SiS_P3c4, 0x14, SR14);
-		SiS_SetReg1 (SiS_P3c4, 0x16, SR16);
-		SiS_SetReg1 (SiS_P3c4, 0x17, SR17);
-		SiS_SetReg1 (SiS_P3c4, 0x18, SR18);
-		SiS_SetReg1 (SiS_P3c4, 0x19, SR19);
-		SiS_SetReg1 (SiS_P3c4, 0x1A, SR1A);
-	}
-#endif
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_550)) {
-		SiS_SetReg1 (SiS_P3d4, 0x39, CR39);
-		SiS_SetReg1 (SiS_P3d4, 0x3A, CR3A);
-		SiS_SetReg1 (SiS_P3d4, 0x3B, CR3B);
-		SiS_SetReg1 (SiS_P3d4, 0x3C, CR3C);
-		SiS_SetReg1 (SiS_P3d4, 0x3D, CR3D);
-		SiS_SetReg1 (SiS_P3d4, 0x3E, CR3E);
-		SiS_SetReg1 (SiS_P3d4, 0x3F, CR3F);
-		SiS_SetReg1 (SiS_P3d4, 0x79, CR79);
-		SiS_SetReg1 (SiS_P3d4, 0x7A, CR7A);
-		SiS_SetReg1 (SiS_P3d4, 0x7B, CR7B);
-		SiS_SetReg1 (SiS_P3d4, 0x7C, CR7C);
-	} else if ((HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-		   (HwDeviceExtension->jChipType == SIS_740)) {
-		SiS_SetReg1 (SiS_P3c4, 0x12, SR12);
-		SiS_SetReg1 (SiS_P3c4, 0x13, SR13);
-		SiS_SetReg1 (SiS_P3c4, 0x14, SR14);
-		SiS_SetReg1 (SiS_P3c4, 0x16, SR16);
-		SiS_SetReg1 (SiS_P3c4, 0x17, SR17);
-		SiS_SetReg1 (SiS_P3c4, 0x18, SR18);
-		SiS_SetReg1 (SiS_P3c4, 0x19, SR19);
-		SiS_SetReg1 (SiS_P3c4, 0x1A, SR1A);
-	}
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540)||
+      (HwDeviceExtension->jChipType == SIS_630)||
+      (HwDeviceExtension->jChipType == SIS_730)) {
+     SiS_SetReg1(SiS_P3c4,0x12,SR12);
+     SiS_SetReg1(SiS_P3c4,0x13,SR13);
+     SiS_SetReg1(SiS_P3c4,0x14,SR14);
+     SiS_SetReg1(SiS_P3c4,0x16,SR16);
+     SiS_SetReg1(SiS_P3c4,0x17,SR17);
+     SiS_SetReg1(SiS_P3c4,0x18,SR18);
+     SiS_SetReg1(SiS_P3c4,0x19,SR19);
+     SiS_SetReg1(SiS_P3c4,0x1A,SR1A);
+   }
 #endif
 
-/* detect ExtChip Type */
-	SiS_Set_LVDS_TRUMPION (HwDeviceExtension);	/*2/29/00 by Mars Wen for LVDS and Trumpion  */
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+     SiS_SetReg1(SiS_P3c4,0x13,SR13);
+     SiS_SetReg1(SiS_P3c4,0x14,SR14);
+     SiS_SetReg1(SiS_P3c4,0x15,SR15);
+     SiS_SetReg1(SiS_P3c4,0x16,SR16);
+     SiS_SetReg1(SiS_P3c4,0x17,SR17);
+     SiS_SetReg1(SiS_P3c4,0x19,SR19);
+     SiS_SetReg1(SiS_P3c4,0x1A,SR1A);
+     SiS_SetReg1(SiS_P3c4,0x1B,SR1B);
+     SiS_SetReg1(SiS_P3d4,0x37,CR37);
+     SiS_SetReg1(SiS_P3d4,0x38,CR38);
+     SiS_SetReg1(SiS_P3d4,0x79,CR79);
+     SiS_SetReg1(SiS_P3d4,0x7A,CR7A);
+     SiS_SetReg1(SiS_P3d4,0x7B,CR7B);
+     SiS_SetReg1(SiS_P3d4,0x7C,CR7C);
+   }
+#endif
 
-#ifdef CONFIG_FB_SIS_300
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		temp = (UCHAR) SR1A;
-	} else
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType==SIS_540)||
+      (HwDeviceExtension->jChipType==SIS_630)||
+      (HwDeviceExtension->jChipType==SIS_730)) {
+     	temp = (UCHAR)SR1A & 0x03;
+   } else if(HwDeviceExtension->jChipType==SIS_300) {
+        /* TW: Nothing? */
+   }
+#endif
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H )||
+      (HwDeviceExtension->jChipType == SIS_315PRO)) {
+      	if((*pSiS_SoftSetting & SoftDRAMType) == 0){
+          	temp = (UCHAR)SiS_GetReg1(SiS_P3c4,0x3A) & 0x03;
+        }
+   }
+   if((HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+        if((*pSiS_SoftSetting & SoftDRAMType) == 0){
+          	temp = (UCHAR)SiS_GetReg1(SiS_P3c4,0x13) & 0x07;
+        }
+   }
 #endif
-	{
-		if ((*pSiS_SoftSetting & SoftDRAMType) == 0) {
-			temp = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x3A);
-		}
-	}
 
-	SiS_RAMType = temp & 0x03;
-	SiS_SetMemoryClock (ROMAddr);
-
-/* SetDefExt1Regs  begin */
-	SiS_SetReg1 (SiS_P3c4, 0x07, *pSiS_SR07);
-	if ((HwDeviceExtension->jChipType != SIS_540) &&
-	    (HwDeviceExtension->jChipType != SIS_630) &&
-	    (HwDeviceExtension->jChipType != SIS_730)) {
-		for (i = 0x15; i < 0x1C; i++) {
-			SiS_SetReg1 (SiS_P3c4, i,
-				     SiS_SR15[i - 0x15][SiS_RAMType]);
-		}
-	}
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_315H) ||
-	    (HwDeviceExtension->jChipType == SIS_315PRO)) {
-		for (i = 0x40; i <= 0x44; i++) {
-			SiS_SetReg1 (SiS_P3d4, i,
-				     SiS_CR40[i - 0x40][SiS_RAMType]);
-		}
-		SiS_SetReg1 (SiS_P3d4, 0x48, 0x23);
-		SiS_SetReg1 (SiS_P3d4, 0x49, SiS_CR49[0]);
-		/* /SiS_SetReg1(SiS_P3c4,0x25,SiS_SR25[0]);  */
-	}
+   SiS_RAMType = temp;
+   SiS_SetMemoryClock(ROMAddr,HwDeviceExtension);
+
+/* SetDefExt1Regs begin: Set default register contents */
+
+   SiS_SetReg1(SiS_P3c4,0x07,*pSiS_SR07); 		/* DAC speed */
+
+   if((HwDeviceExtension->jChipType != SIS_540) &&
+      (HwDeviceExtension->jChipType != SIS_630) &&
+      (HwDeviceExtension->jChipType != SIS_730)){
+     	for(i=0x15;i<0x1C;i++) {
+       		SiS_SetReg1(SiS_P3c4,i,SiS_SR15[i-0x15][SiS_RAMType]);
+     	}
+   }
+
+#ifdef SIS315H
+   if ((HwDeviceExtension->jChipType == SIS_315H )||
+       (HwDeviceExtension->jChipType == SIS_315PRO)) {
+     	for(i=0x40;i<=0x44;i++) {
+       		SiS_SetReg1(SiS_P3d4,i,SiS_CR40[i-0x40][SiS_RAMType]);
+     	}
+     	SiS_SetReg1(SiS_P3d4,0x48,0x23);
+     	SiS_SetReg1(SiS_P3d4,0x49,SiS_CR49[0]);
+    /*  SiS_SetReg1(SiS_P3c4,0x25,SiS_SR25[0]);  */
+   }
 #endif
 
-	SiS_SetReg1 (SiS_P3c4, 0x1F, *pSiS_SR1F);
-	/*SiS_SetReg1(SiS_P3c4,0x20,0x20); */
-	SiS_SetReg1 (SiS_P3c4, 0x20, 0xA0);	/* alan, 2001/6/26 Frame buffer can read/write */
-	SiS_SetReg1 (SiS_P3c4, 0x23, *pSiS_SR23);
-	SiS_SetReg1 (SiS_P3c4, 0x24, *pSiS_SR24);
-	SiS_SetReg1 (SiS_P3c4, 0x25, SiS_SR25[0]);
-#ifdef CONFIG_FB_SIS_300
-	if (HwDeviceExtension->jChipType == SIS_300) {
-		SiS_SetReg1 (SiS_P3c4, 0x21, 0x84);
-		SiS_SetReg1 (SiS_P3c4, 0x22, 0x00);
-	}
+   SiS_SetReg1(SiS_P3c4,0x1F,*pSiS_SR1F); 	/* DAC pedestal */
+   SiS_SetReg1(SiS_P3c4,0x20,0xA0);
+   SiS_SetReg1(SiS_P3c4,0x23,*pSiS_SR23);
+   SiS_SetReg1(SiS_P3c4,0x24,*pSiS_SR24);
+   SiS_SetReg1(SiS_P3c4,0x25,SiS_SR25[0]);
+
+#ifdef SIS300
+   if(HwDeviceExtension->jChipType==SIS_300) {
+     	SiS_SetReg1(SiS_P3c4,0x21,0x84);
+     	SiS_SetReg1(SiS_P3c4,0x22,0x00);
+   }
 #endif
-	SR11 = 0x0F;
-	SiS_SetReg1 (SiS_P3c4, 0x11, SR11);
-
-	SiS_UnLockCRT2 (HwDeviceExtension, BaseAddr);
-	SiS_SetReg1 (SiS_Part1Port, 0x00, 0x00);
-	SiS_SetReg1 (SiS_Part1Port, 0x02, *pSiS_CRT2Data_1_2);
-#ifdef CONFIG_FB_SIS_315	/* 05/02/01 ynlai  for sis550 */
-	if ((HwDeviceExtension->jChipType == SIS_315H) ||
-	    (HwDeviceExtension->jChipType == SIS_315PRO) ||
-	    (HwDeviceExtension->jChipType == SIS_550) ||
-	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-	    (HwDeviceExtension->jChipType == SIS_740))
-		/* 09/03/01 chiawen for 650 */
-		SiS_SetReg1 (SiS_Part1Port, 0x2E, 0x08);	/* use VB */
-#endif
-
-	temp = *pSiS_SR32;
-	if (SiS_BridgeIsOn (BaseAddr)) {
-		temp = temp & 0xEF;
-	}
-	SiS_SetReg1 (SiS_P3c4, 0x32, temp);
-
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_315H) ||
-	    (HwDeviceExtension->jChipType == SIS_315PRO)) {
-		HwDeviceExtension->pQueryVGAConfigSpace (HwDeviceExtension,
-							 0x50, 0, &Temp);	/* Get */
-
-		Temp >>= 20;
-		Temp &= 0xF;
-		if (Temp != 1) {
-			SiS_SetReg1 (SiS_P3c4, 0x25, SiS_SR25[1]);
-			SiS_SetReg1 (SiS_P3d4, 0x49, SiS_CR49[1]);
-		}
 
-		SiS_SetReg1 (SiS_P3c4, 0x27, 0x1F);
+   SR11=0x0F;
+   SiS_SetReg1(SiS_P3c4,0x11,SR11);		/* Power Management & DDC port */
+
+   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+   SiS_SetReg1(SiS_Part1Port,0x00,0x00);
+   SiS_SetReg1(SiS_Part1Port,0x02,*pSiS_CRT2Data_1_2);
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO) ||
+      (HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650))
+     	SiS_SetReg1(SiS_Part1Port,0x2E,0x08);    /* use VB */
+#endif
 
-		SiS_SetReg1 (SiS_P3c4, 0x31, *pSiS_SR31);
-		SiS_SetReg1 (SiS_P3c4, 0x32, *pSiS_SR32);
-		SiS_SetReg1 (SiS_P3c4, 0x33, *pSiS_SR33);
-	}
+   temp=*pSiS_SR32;
+   if(SiS_BridgeIsOn(BaseAddr)) {
+     	temp &= 0xEF;
+   }
+   SiS_SetReg1(SiS_P3c4,0x32,temp);
+
+#ifdef SIS315H
+   if ((HwDeviceExtension->jChipType == SIS_315H) ||
+       (HwDeviceExtension->jChipType == SIS_315PRO)) {
+     HwDeviceExtension->pQueryVGAConfigSpace(HwDeviceExtension,0x50,0,&Temp);  /* Get */
+     Temp >>= 20;
+     Temp &= 0xF;
+     if (Temp!=1) {
+     	SiS_SetReg1(SiS_P3c4,0x25,SiS_SR25[1]);
+     	SiS_SetReg1(SiS_P3d4,0x49,SiS_CR49[1]);
+     }
+
+     SiS_SetReg1(SiS_P3c4,0x27,0x1F);
+
+     SiS_SetReg1(SiS_P3c4,0x31,*pSiS_SR31);
+     SiS_SetReg1(SiS_P3c4,0x32,*pSiS_SR32);
+     SiS_SetReg1(SiS_P3c4,0x33,*pSiS_SR33);
+   }
 #endif
 
-	if (SiS_BridgeIsOn (BaseAddr) == 1) {
-		if (SiS_IF_DEF_LVDS == 0) {
-			SiS_SetReg1 (SiS_Part2Port, 0x00, 0x1C);
-			SiS_SetReg1 (SiS_Part4Port, 0x0D, *pSiS_CRT2Data_4_D);
-			SiS_SetReg1 (SiS_Part4Port, 0x0E, *pSiS_CRT2Data_4_E);
-			SiS_SetReg1 (SiS_Part4Port, 0x10, *pSiS_CRT2Data_4_10);
-			SiS_SetReg1 (SiS_Part4Port, 0x0F, 0x3F);
-		}
-		SiS_LockCRT2 (HwDeviceExtension, BaseAddr);
-	}
-	SiS_SetReg1 (SiS_P3d4, 0x83, 0x00);
+   if (SiS_BridgeIsOn(BaseAddr) == 0) {
+     	if(SiS_IF_DEF_LVDS==0) {
+       		SiS_SetReg1(SiS_Part2Port,0x00,0x1C);
+       		SiS_SetReg1(SiS_Part4Port,0x0D,*pSiS_CRT2Data_4_D);
+       		SiS_SetReg1(SiS_Part4Port,0x0E,*pSiS_CRT2Data_4_E);
+       		SiS_SetReg1(SiS_Part4Port,0x10,*pSiS_CRT2Data_4_10);
+       		SiS_SetReg1(SiS_Part4Port,0x0F,0x3F);
+     	}
+     	SiS_LockCRT2(HwDeviceExtension, BaseAddr);
+   }
+   SiS_SetReg1(SiS_P3d4,0x83,0x00);
+
 /*   SetDefExt1Regs end */
 
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_315H) ||
-	    (HwDeviceExtension->jChipType == SIS_315PRO)
-	    ) {			/* 05/02/01 ynlai */
-		/* For SiS 300,310 Chip  */
-		if (HwDeviceExtension->bSkipDramSizing == TRUE) {
-			SiS_SetDRAMModeRegister (ROMAddr);
-			pSR = HwDeviceExtension->pSR;
-			if (pSR != NULL) {
-				while (pSR->jIdx != 0xFF) {
-					SiS_SetReg1 (SiS_P3c4, pSR->jIdx,
-						     pSR->jVal);
-					pSR++;
-				}
-			}
-		} else
-			SiS_SetDRAMSize_310 (HwDeviceExtension);
-	}
+#ifdef SIS315H
+   if ((HwDeviceExtension->jChipType==SIS_315H)||
+       (HwDeviceExtension->jChipType==SIS_315PRO)) {
+       	if (HwDeviceExtension->bSkipDramSizing==TRUE) {
+         	SiS_SetDRAMModeRegister(ROMAddr,HwDeviceExtension);
+         	pSR = HwDeviceExtension->pSR;
+         	if (pSR!=NULL) {
+           		while (pSR->jIdx!=0xFF) {
+             			SiS_SetReg1(SiS_P3c4,pSR->jIdx,pSR->jVal);
+             			pSR++;
+           		}
+         	}
+       } else SiS_SetDRAMSize_310(HwDeviceExtension);
+   }
 #endif
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_550)) {	/* 05/02/01 ynlai For SiS 550 */
-		/* SetDRAMConfig begin */
+
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType==SIS_550)){
+       /* SetDRAMConfig begin */
 /*     SiS_SetReg1(SiS_P3c4,0x12,SR12);
        SiS_SetReg1(SiS_P3c4,0x13,SR13);
        SiS_SetReg1(SiS_P3c4,0x14,SR14);
@@ -812,2973 +961,3514 @@ SiSInit (PSIS_HW_DEVICE_INFO HwDeviceExtension)
        SiS_SetReg1(SiS_P3c4,0x18,SR18);
        SiS_SetReg1(SiS_P3c4,0x19,SR19);
        SiS_SetReg1(SiS_P3c4,0x1A,SR1A);   */
-		/* SetDRAMConfig end */
-	}
+       /* SetDRAMConfig end */
+   }
 #endif
-#ifdef CONFIG_FB_SIS_300
-	if (HwDeviceExtension->jChipType == SIS_300) {	/* For SiS 300 Chip  */
-		if (HwDeviceExtension->bSkipDramSizing == TRUE) {
-/*       SiS_SetDRAMModeRegister(ROMAddr);
-         temp = (HwDeviceExtension->pSR)->jVal;
-         SiS_SetReg1(SiS_P3c4,0x13,temp);
-         temp = (HwDeviceExtension->pSR)->jVal;
-         SiS_SetReg1(SiS_P3c4,0x14,temp);   */
-		} else {
+
+#ifdef SIS300
+   if( HwDeviceExtension->jChipType==SIS_300) {
+       	if (HwDeviceExtension->bSkipDramSizing==TRUE) {
+/*       	SiS_SetDRAMModeRegister(ROMAddr,HwDeviceExtension);
+         	temp = (HwDeviceExtension->pSR)->jVal;
+         	SiS_SetReg1(SiS_P3c4,0x13,temp);
+         	temp = (HwDeviceExtension->pSR)->jVal;
+         	SiS_SetReg1(SiS_P3c4,0x14,temp);   */
+       } else {
 #ifdef TC
-			SiS_SetReg1 (SiS_P3c4, 0x13, SR13);
-			SiS_SetReg1 (SiS_P3c4, 0x14, SR14);
-			SiS_SetRegANDOR (SiS_P3c4, 0x15, 0xFF, 0x04);
+         	SiS_SetReg1(SiS_P3c4,0x13,SR13);
+         	SiS_SetReg1(SiS_P3c4,0x14,SR14);
+         	SiS_SetRegANDOR(SiS_P3c4,0x15,0xFF,0x04);
 #else
-			SiS_SetDRAMSize_300 (HwDeviceExtension);
-			SiS_SetDRAMSize_300 (HwDeviceExtension);
+         	SiS_SetDRAMSize_300(HwDeviceExtension);
+         	SiS_SetDRAMSize_300(HwDeviceExtension);
 #endif
-		}
-	}
-	if ((HwDeviceExtension->jChipType == SIS_540) ||	/* For SiS 630/540/730 Chip  */
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		/* SetDRAMConfig begin */
-/*     SiS_SetReg1(SiS_P3c4,0x12,SR12);
-       SiS_SetReg1(SiS_P3c4,0x13,SR13);
-       SiS_SetReg1(SiS_P3c4,0x14,SR14);
-       SiS_SetReg1(SiS_P3c4,0x16,SR16);
-       SiS_SetReg1(SiS_P3c4,0x17,SR17);
-       SiS_SetReg1(SiS_P3c4,0x18,SR18);
-       SiS_SetReg1(SiS_P3c4,0x19,SR19);
-       SiS_SetReg1(SiS_P3c4,0x1A,SR1A);    */
-		/* SetDRAMConfig end */
-	}
-/* SetDRAMSize end */
+       }
+   }
+   if((HwDeviceExtension->jChipType==SIS_540)||
+      (HwDeviceExtension->jChipType==SIS_630)||
+      (HwDeviceExtension->jChipType==SIS_730)){
+       	/* SetDRAMConfig begin */
+#if 0
+     	SiS_SetReg1(SiS_P3c4,0x12,SR12);
+       	SiS_SetReg1(SiS_P3c4,0x13,SR13);
+       	SiS_SetReg1(SiS_P3c4,0x14,SR14);
+       	SiS_SetReg1(SiS_P3c4,0x16,SR16);
+       	SiS_SetReg1(SiS_P3c4,0x17,SR17);
+       	SiS_SetReg1(SiS_P3c4,0x18,SR18);
+       	SiS_SetReg1(SiS_P3c4,0x19,SR19);
+       	SiS_SetReg1(SiS_P3c4,0x1A,SR1A);
 #endif
+       	/* SetDRAMConfig end */
+   }
+/* SetDRAMSize end */
+#endif /* SIS300 */
 
 /*   SetDefExt2Regs begin  */
-/* AGP=1;
+#if 0
+   AGP=1;
    temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x3A);
    temp=temp&0x30;
    if(temp==0x30) AGP=0;
    if(AGP==0) *pSiS_SR21=*pSiS_SR21&0xEF;
    SiS_SetReg1(SiS_P3c4,0x21,*pSiS_SR21);
    if(AGP==1) *pSiS_SR22=*pSiS_SR22&0x20;
-   SiS_SetReg1(SiS_P3c4,0x22,*pSiS_SR22);  */
-
-	SiS_SetReg1 (SiS_P3c4, 0x21, *pSiS_SR21);
-	SiS_SetReg1 (SiS_P3c4, 0x22, *pSiS_SR22);
+   SiS_SetReg1(SiS_P3c4,0x22,*pSiS_SR22);
+#endif
+   SiS_SetReg1(SiS_P3c4,0x21,*pSiS_SR21);
+   SiS_SetReg1(SiS_P3c4,0x22,*pSiS_SR22);
 /*   SetDefExt2Regs end  */
 
-/* SiS_SetReg3(SiS_P3c6,0xff);
-   SiS_ClearDAC(SiS_P3c8);        [ynlai] 05/22/01            */
+#if 0
+   SiS_SetReg3(SiS_P3c6,0xff);
+   SiS_ClearDAC(SiS_P3c8);        /* [ynlai] 05/22/01 */
+#endif
 
-	SiS_DetectMonitor (HwDeviceExtension, BaseAddr);
-	SiS_GetSenseStatus (HwDeviceExtension, ROMAddr);	/* sense CRT2 */
+#ifdef LINUXBIOS   /* TW: This is not needed for our purposes */
+   SiS_DetectMonitor(HwDeviceExtension,BaseAddr);
+   SiS_GetSenseStatus(HwDeviceExtension,ROMAddr);      /* sense CRT2 */
+#endif
 
-	return (TRUE);
+   return(TRUE);
 }
 
 void
-SiS_Set_LVDS_TRUMPION (PSIS_HW_DEVICE_INFO HwDeviceExtension)
-{
-	USHORT temp;
-
-#ifdef CONFIG_FB_SIS_300
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		temp = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x1A);
-		temp = (temp & 0xE0) >> 4;
-		SiS_SetRegANDOR (SiS_P3d4, 0x37, 0xF1, temp);
-		temp = temp >> 1;
-		if ((temp == 0) || (temp == 1)) {	/* for 301 */
-			SiS_IF_DEF_LVDS = 0;
-			SiS_IF_DEF_CH7005 = 0;
-			SiS_IF_DEF_TRUMPION = 0;
-		}
-		if ((temp >= 2) && (temp <= 5)) {
-			SiS_IF_DEF_LVDS = 1;
-		}
-		if (temp == 3)
-			SiS_IF_DEF_TRUMPION = 1;
-		if ((temp == 4) || (temp == 5))
-			SiS_IF_DEF_CH7005 = 1;
-	} else {
-		SiS_IF_DEF_LVDS = 0;
-		SiS_IF_DEF_TRUMPION = 0;
-		SiS_IF_DEF_CH7005 = 0;
-	}
-#else
-	if ((HwDeviceExtension->jChipType == SIS_550) ||
-	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-	    (HwDeviceExtension->jChipType == SIS_740))
-	 {			/* 09/03/01 chiawen for 650 */
-		SiS_IF_DEF_LVDS = 0;
-		SiS_IF_DEF_TRUMPION = 0;
-		SiS_IF_DEF_CH7005 = 0;
-	}
+SiS_Set_LVDS_TRUMPION(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT temp=0;
+
+#ifdef SiS300
+  if ((HwDeviceExtension->jChipType == SIS_540)||
+      (HwDeviceExtension->jChipType == SIS_630)||
+      (HwDeviceExtension->jChipType == SIS_730)) {
+        /* TW: Read POWER_ON_TRAP and copy to CR37 */
+    	temp = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1A);
+    	temp = (temp & 0xE0) >> 4;
+   	SiS_SetRegANDOR(SiS_P3d4,0x37,0xF1,temp);
+  }
+#endif
+#ifdef SIS315H
+  if ((HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+#if 0 /* TW: This is not required */
+        /* TW: Read POWER_ON_TRAP and copy to CR37 */
+    	temp = (UCHAR)SiS_GetReg1(SiS_P3c4,0x1A);
+    	temp = (temp & 0xE0) >> 4;
+   	SiS_SetRegANDOR(SiS_P3d4,0x37,0xF1,temp);
 #endif
+  }
+#endif
+
+   /* Set globals SiS_IF_DEF... */
+   SiSSetLVDSetc(HwDeviceExtension, 0);
 }
 
-/* ===============  for 300 dram sizing begin  =============== */
-#ifdef CONFIG_FB_SIS_300
+/* ===============  SiS 300 dram sizing begin  =============== */
+#ifdef SIS300
 void
-SiS_SetDRAMSize_300 (PSIS_HW_DEVICE_INFO HwDeviceExtension)
-{
-	/*ULONG   ROMAddr  = (ULONG)HwDeviceExtension->pjVirtualRomBase; */
-	ULONG FBAddr = (ULONG) HwDeviceExtension->pjVideoMemoryAddress;
-	/*USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress; */
-	USHORT SR13, SR14 = 0, buswidth, Done;
-	SHORT i, j, k;
-	USHORT data, TotalCapacity, PhysicalAdrOtherPage = 0;
-	ULONG Addr;
-	UCHAR temp;
-
-	int PseudoRankCapacity, PseudoTotalCapacity, PseudoAdrPinCount;
-	int RankCapacity, AdrPinCount, BankNumHigh, BankNumMid, MB2Bank;
-	/*int PageCapacity,PhysicalAdrHigh,PhysicalAdrHalfPage,PhysicalAdrAnotherPage; */
-	int PageCapacity, PhysicalAdrHigh, PhysicalAdrHalfPage;
-
-	SiSSetMode (HwDeviceExtension, 0x2e);
-	data = SiS_GetReg1 (SiS_P3c4, 0x1);
-	data = data | 0x20;
-	SiS_SetReg1 (SiS_P3c4, 0x01, data);	/* Turn OFF Display  */
-
-	SiS_SetReg1 (SiS_P3c4, 0x13, 0x00);
-	SiS_SetReg1 (SiS_P3c4, 0x14, 0xBF);
-	buswidth = SiS_ChkBUSWidth_300 (FBAddr);
-
-	MB2Bank = 16;
-	Done = 0;
-	for (i = 6; i >= 0; i--) {
-		if (Done == 1)
-			break;
-		PseudoRankCapacity = 1 << i;
-		for (j = 4; j >= 1; j--) {
-			if (Done == 1)
-				break;
-			PseudoTotalCapacity = PseudoRankCapacity * j;
-			PseudoAdrPinCount = 15 - j;
-			if (PseudoTotalCapacity <= 64) {
-				for (k = 0; k <= 16; k++) {
-					if (Done == 1)
-						break;
-					RankCapacity =
-					    buswidth * SiS_DRAMType[k][3];
-					AdrPinCount =
-					    SiS_DRAMType[k][2] +
-					    SiS_DRAMType[k][0];
-					if (RankCapacity == PseudoRankCapacity)
-						if (AdrPinCount <=
-						    PseudoAdrPinCount) {
-							if (j == 3) {	/* Rank No */
-								BankNumHigh =
-								    RankCapacity
-								    * MB2Bank *
-								    3 - 1;
-								BankNumMid =
-								    RankCapacity
-								    * MB2Bank *
-								    1 - 1;
-							} else {
-								BankNumHigh =
-								    RankCapacity
-								    * MB2Bank *
-								    j - 1;
-								BankNumMid =
-								    RankCapacity
-								    * MB2Bank *
-								    j / 2 - 1;
-							}
-							PageCapacity =
-							    (1 <<
-							     SiS_DRAMType[k][1])
-							    * buswidth * 4;
-							PhysicalAdrHigh =
-							    BankNumHigh;
-							PhysicalAdrHalfPage =
-							    (PageCapacity / 2 +
-							     PhysicalAdrHigh) %
-							    PageCapacity;
-							PhysicalAdrOtherPage =
-							    PageCapacity *
-							    SiS_DRAMType[k][2] +
-							    PhysicalAdrHigh;
-							/* Write data */
-							/*Test */
-							temp =
-							    (UCHAR)
-							    SiS_GetReg1
-							    (SiS_P3c4, 0x15);
-							SiS_SetReg1 (SiS_P3c4,
-								     0x15,
-								     (USHORT)
-								     (temp &
-								      0xFB));
-
-							temp =
-							    (UCHAR)
-							    SiS_GetReg1
-							    (SiS_P3c4, 0x15);
-							SiS_SetReg1 (SiS_P3c4,
-								     0x15,
-								     (USHORT)
-								     (temp |
-								      0x04));
-							/*Test */
-							TotalCapacity =
-							    SiS_DRAMType[k][3] *
-							    buswidth;
-							SR13 =
-							    SiS_DRAMType[k][4];
-							if (buswidth == 4)
-								SR14 =
-								    (TotalCapacity
-								     -
-								     1) | 0x80;
-							if (buswidth == 2)
-								SR14 =
-								    (TotalCapacity
-								     -
-								     1) | 0x40;
-							if (buswidth == 1)
-								SR14 =
-								    (TotalCapacity
-								     -
-								     1) | 0x00;
-							SiS_SetReg1 (SiS_P3c4,
-								     0x13,
-								     SR13);
-							SiS_SetReg1 (SiS_P3c4,
-								     0x14,
-								     SR14);
-
-							Addr =
-							    FBAddr +
-							    (BankNumHigh) * 64 *
-							    1024 +
-							    PhysicalAdrHigh;
-							*((USHORT *) (Addr)) =
-							    (USHORT)
-							    PhysicalAdrHigh;
-							Addr =
-							    FBAddr +
-							    (BankNumMid) * 64 *
-							    1024 +
-							    PhysicalAdrHigh;
-							*((USHORT *) (Addr)) =
-							    (USHORT) BankNumMid;
-							Addr =
-							    FBAddr +
-							    (BankNumHigh) * 64 *
-							    1024 +
-							    PhysicalAdrHalfPage;
-							*((USHORT *) (Addr)) =
-							    (USHORT)
-							    PhysicalAdrHalfPage;
-							Addr =
-							    FBAddr +
-							    (BankNumHigh) * 64 *
-							    1024 +
-							    PhysicalAdrOtherPage;
-							*((USHORT *) (Addr)) =
-							    PhysicalAdrOtherPage;
-
-							/* Read data */
-							Addr =
-							    FBAddr +
-							    (BankNumHigh) * 64 *
-							    1024 +
-							    PhysicalAdrHigh;
-							data =
-							    *((USHORT *)
-							      (Addr));
-							if (data ==
-							    PhysicalAdrHigh)
-								    Done = 1;
-						}	/* if struct */
-				}	/* for loop (k) */
-			}	/* if struct */
-		}		/* for loop (j) */
-	}			/* for loop (i) */
+SiS_SetDRAMSize_300(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   ULONG   FBAddr = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
+   USHORT  SR13,SR14=0,buswidth,Done;
+   SHORT   i,j,k;
+   USHORT  data, TotalCapacity, PhysicalAdrOtherPage=0;
+   ULONG   Addr;
+   UCHAR   temp;
+   int     PseudoRankCapacity,PseudoTotalCapacity,PseudoAdrPinCount;
+   int     RankCapacity,AdrPinCount,BankNumHigh,BankNumMid,MB2Bank;
+   int     PageCapacity,PhysicalAdrHigh,PhysicalAdrHalfPage;
+
+   SiSSetMode(HwDeviceExtension,0x2e);
+
+   data=SiS_GetReg1(SiS_P3c4,0x01);
+   data=data|0x20;
+   SiS_SetReg1(SiS_P3c4,0x01,data);                    /* Turn OFF Display  */
+
+   SiS_SetReg1(SiS_P3c4,0x13,0x00);
+   SiS_SetReg1(SiS_P3c4,0x14,0xBF);
+   buswidth=SiS_ChkBUSWidth_300(FBAddr);
+
+   MB2Bank=16;
+   Done=0;
+   for(i=6;i>=0;i--) {
+      if(Done==1) break;
+      PseudoRankCapacity=1<<i;
+      for(j=4;j>=1;j--) {
+         if(Done==1) break;
+         PseudoTotalCapacity=PseudoRankCapacity*j;
+         PseudoAdrPinCount=15-j;
+         if(PseudoTotalCapacity <= 64) {
+            for(k=0;k<=16;k++) {
+               if(Done==1) break;
+               RankCapacity=buswidth*SiS_DRAMType[k][3];
+               AdrPinCount=SiS_DRAMType[k][2]+SiS_DRAMType[k][0];
+               if(RankCapacity==PseudoRankCapacity)
+                 if(AdrPinCount<=PseudoAdrPinCount) {
+                    if(j==3) {             /* Rank No */
+                       BankNumHigh=RankCapacity*MB2Bank*3-1;
+                       BankNumMid=RankCapacity*MB2Bank*1-1;
+                    }
+                    else {
+                       BankNumHigh=RankCapacity*MB2Bank*j-1;
+                       BankNumMid=RankCapacity*MB2Bank*j/2-1;
+                    }
+                    PageCapacity=(1<<SiS_DRAMType[k][1])*buswidth*4;
+                    PhysicalAdrHigh =BankNumHigh;
+                    PhysicalAdrHalfPage=(PageCapacity/2+PhysicalAdrHigh)%PageCapacity;
+                    PhysicalAdrOtherPage=PageCapacity*SiS_DRAMType[k][2]+PhysicalAdrHigh;
+                    /* Write data */
+                    /*Test */
+                    temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x15);
+                    SiS_SetReg1(SiS_P3c4,0x15,(USHORT)(temp&0xFB));
+
+                    temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x15);
+                    SiS_SetReg1(SiS_P3c4,0x15,(USHORT)(temp|0x04));
+                    /*Test */
+                    TotalCapacity=SiS_DRAMType[k][3]*buswidth;
+                    SR13=SiS_DRAMType[k][4];
+                    if(buswidth==4) SR14=(TotalCapacity-1)|0x80;
+                    if(buswidth==2) SR14=(TotalCapacity-1)|0x40;
+                    if(buswidth==1) SR14=(TotalCapacity-1)|0x00;
+                    SiS_SetReg1(SiS_P3c4,0x13,SR13);
+                    SiS_SetReg1(SiS_P3c4,0x14,SR14);
+
+                    Addr=FBAddr+(BankNumHigh)*64*1024+PhysicalAdrHigh;
+                    *((USHORT *)(Addr)) = (USHORT) PhysicalAdrHigh;
+                    Addr=FBAddr+(BankNumMid)*64*1024+PhysicalAdrHigh;
+                    *((USHORT *)(Addr)) = (USHORT) BankNumMid;
+                    Addr=FBAddr+(BankNumHigh)*64*1024+PhysicalAdrHalfPage;
+                    *((USHORT *)(Addr)) = (USHORT) PhysicalAdrHalfPage;
+                    Addr=FBAddr+(BankNumHigh)*64*1024+PhysicalAdrOtherPage;
+                    *((USHORT *)(Addr))=PhysicalAdrOtherPage;
+
+                    /* Read data */
+                    Addr=FBAddr+(BankNumHigh)*64*1024+PhysicalAdrHigh;
+                    data=*((USHORT *)(Addr));
+                    if(data==PhysicalAdrHigh) Done=1;
+                 }  /* if struct */
+            }  /* for loop (k) */
+         }  /* if struct */
+      }  /* for loop (j) */
+   }  /* for loop (i) */
 }
 
 USHORT
-SiS_ChkBUSWidth_300 (ULONG FBAddress)
+SiS_ChkBUSWidth_300(ULONG FBAddress)
 {
-	/*USHORT  data; */
-	PULONG pVideoMemory;
-
-	pVideoMemory = (PULONG) FBAddress;
-
-	pVideoMemory[0] = 0x01234567L;
-	pVideoMemory[1] = 0x456789ABL;
-	pVideoMemory[2] = 0x89ABCDEFL;
-	pVideoMemory[3] = 0xCDEF0123L;
-	if (pVideoMemory[3] == 0xCDEF0123L) {	/*ChannelA128Bit */
-		return (4);
-	}
-	if (pVideoMemory[1] == 0x456789ABL) {	/*ChannelB64Bit */
-		return (2);
-	}
-	return (1);
+   /*USHORT  data;*/
+   PULONG  pVideoMemory;
+
+   pVideoMemory = (PULONG) FBAddress;
+
+   pVideoMemory[0] = 0x01234567L;
+   pVideoMemory[1] = 0x456789ABL;
+   pVideoMemory[2] = 0x89ABCDEFL;
+   pVideoMemory[3] = 0xCDEF0123L;
+   if (pVideoMemory[3]==0xCDEF0123L) { /*ChannelA128Bit */
+     return(4);
+   }
+   if (pVideoMemory[1]==0x456789ABL) {  /*ChannelB64Bit */
+     return(2);
+   }
+   return(1);
 }
 #endif
+/* ===============  SiS 300 dram sizing end    =============== */
 
-/* ===============  for 300 dram sizing end    =============== */
+/* ==============  SiS 310 dram sizing begin ================= */
+#ifdef SIS315H
 
-/* ============== alan ====================== */
-#ifdef CONFIG_FB_SIS_315
-UCHAR
-SiS_Get310DRAMType (ULONG ROMAddr)
-{
-	UCHAR data;
-
-	/* 
-	   index=SiS_GetReg1(SiS_P3c4,0x1A);
-	   index=index&07;
-	 */
-	if (*pSiS_SoftSetting & SoftDRAMType)
-		data = *pSiS_SoftSetting & 0x03;
-	else
-		data = SiS_GetReg1 (SiS_P3c4, 0x3a) & 0x03;
-
-	return data;
-}
+/* TW: Moved Get310DRAMType further down */
 
 void
-SiS_Delay15us (ULONG ulMicrsoSec)
+SiS_Delay15us(ULONG ulMicrsoSec)
 {
 }
 
 void
-SiS_SDR_MRS (void)
+SiS_SDR_MRS(void)
 {
-	USHORT data;
-
-	data = SiS_GetReg1 (SiS_P3c4, 0x16);
-	data = data & 0x3F;	/*/ SR16 D7=0,D6=0 */
-	SiS_SetReg1 (SiS_P3c4, 0x16, data);	/*/ enable mode register set(MRS) low */
-	SiS_Delay15us (0x100);
-	data = data | 0x80;	/*/ SR16 D7=1,D6=0 */
-	SiS_SetReg1 (SiS_P3c4, 0x16, data);	/*/ enable mode register set(MRS) high */
-	SiS_Delay15us (0x100);
+   USHORT  data;
+
+   data=SiS_GetReg1(SiS_P3c4,0x16);
+   data=data & 0x3F;          		/* SR16 D7=0,D6=0 */
+   SiS_SetReg1(SiS_P3c4,0x16,data);   	/* enable mode register set(MRS) low */
+   SiS_Delay15us(0x100);
+   data=data | 0x80;          		/* SR16 D7=1,D6=0 */
+   SiS_SetReg1(SiS_P3c4,0x16,data);   	/* enable mode register set(MRS) high */
+   SiS_Delay15us(0x100);
 }
 
 void
-SiS_DDR_MRS (void)
+SiS_DDR_MRS(void)
 {
-	USHORT data;
-
-	/* SR16 <- 1F,DF,2F,AF */
-
-	/* enable DLL of DDR SD/SGRAM , SR16 D4=1 */
-	data = SiS_GetReg1 (SiS_P3c4, 0x16);
-	data &= 0x0F;
-	data |= 0x10;
-	SiS_SetReg1 (SiS_P3c4, 0x16, data);
-
-	if (!(SiS_SR15[1][SiS_RAMType] & 0x10)) {
-		data &= 0x0F;
-	}
-	/* SR16 D7=1,D6=1 */
-	data |= 0xC0;
-	SiS_SetReg1 (SiS_P3c4, 0x16, data);
-
-	/* SR16 D7=1,D6=0,D5=1,D4=0 */
-	data &= 0x0F;
-	data |= 0x20;
-	SiS_SetReg1 (SiS_P3c4, 0x16, data);
-	if (!(SiS_SR15[1][SiS_RAMType] & 0x10)) {
-		data &= 0x0F;
-	}
-	/* SR16 D7=1 */
-	data |= 0x80;
-	SiS_SetReg1 (SiS_P3c4, 0x16, data);
+   USHORT  data;
+
+   /* SR16 <- 1F,DF,2F,AF */
+
+   /* enable DLL of DDR SD/SGRAM , SR16 D4=1 */
+   data=SiS_GetReg1(SiS_P3c4,0x16);
+   data &= 0x0F;
+   data |= 0x10;
+   SiS_SetReg1(SiS_P3c4,0x16,data);
+
+   if (!(SiS_SR15[1][SiS_RAMType] & 0x10))
+     data &= 0x0F;
+
+   /* SR16 D7=1,D6=1 */
+   data |= 0xC0;
+   SiS_SetReg1(SiS_P3c4,0x16,data);
+   
+   /* SR16 D7=1,D6=0,D5=1,D4=0 */
+   data &= 0x0F;
+   data |= 0x20;
+   SiS_SetReg1(SiS_P3c4,0x16,data);
+   if (!(SiS_SR15[1][SiS_RAMType] & 0x10))
+     data &= 0x0F;
+
+   /* SR16 D7=1 */
+   data |= 0x80;
+   SiS_SetReg1(SiS_P3c4,0x16,data);
 }
 
 void
-SiS_SetDRAMModeRegister (ULONG ROMAddr)
+SiS_SetDRAMModeRegister(UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-
-	if (SiS_Get310DRAMType (ROMAddr) < 2) {
-		SiS_SDR_MRS ();
-	} else {
-		/* SR16 <- 0F,CF,0F,8F */
-		SiS_DDR_MRS ();
-	}
+    if (SiS_Get310DRAMType(ROMAddr,HwDeviceExtension) < 2)
+        SiS_SDR_MRS();
+    else
+        /* SR16 <- 0F,CF,0F,8F */
+        SiS_DDR_MRS();
 }
 
 void
-SiS_DisableRefresh (void)
+SiS_DisableRefresh(void)
 {
-	USHORT data;
+   USHORT  data;
 
-	data = SiS_GetReg1 (SiS_P3c4, 0x17);
-	data &= 0xF8;
-	SiS_SetReg1 (SiS_P3c4, 0x17, data);
-
-	data = SiS_GetReg1 (SiS_P3c4, 0x19);
-	data |= 0x03;
-	SiS_SetReg1 (SiS_P3c4, 0x19, data);
+   data=SiS_GetReg1(SiS_P3c4,0x17);
+   data &= 0xF8;
+   SiS_SetReg1(SiS_P3c4,0x17,data);
 
+   data=SiS_GetReg1(SiS_P3c4,0x19);
+   data |= 0x03;
+   SiS_SetReg1(SiS_P3c4,0x19,data);
 }
 
 void
-SiS_EnableRefresh (ULONG ROMAddr)
+SiS_EnableRefresh(UCHAR *ROMAddr)
 {
-
-	SiS_SetReg1 (SiS_P3c4, 0x17, SiS_SR15[2][SiS_RAMType]);	/* SR17 */
-
-	SiS_SetReg1 (SiS_P3c4, 0x19, SiS_SR15[4][SiS_RAMType]);	/* SR19 */
-
+   SiS_SetReg1(SiS_P3c4,0x17,SiS_SR15[2][SiS_RAMType]);  /* SR17 */
+   SiS_SetReg1(SiS_P3c4,0x19,SiS_SR15[4][SiS_RAMType]);  /* SR19 */
 }
 
 void
-SiS_DisableChannelInterleaving (int index, USHORT SiS_DDRDRAM_TYPE[][5])
+SiS_DisableChannelInterleaving(int index,USHORT SiS_DDRDRAM_TYPE[][5])
 {
-	USHORT data;
-
-	data = SiS_GetReg1 (SiS_P3c4, 0x15);
-	data &= 0x1F;
-	switch (SiS_DDRDRAM_TYPE[index][3]) {
-	case 64:
-		data |= 0;
-		break;
-	case 32:
-		data |= 0x20;
-		break;
-	case 16:
-		data |= 0x40;
-		break;
-	case 4:
-		data |= 0x60;
-		break;
-	}
-	SiS_SetReg1 (SiS_P3c4, 0x15, data);
-
+   USHORT  data;
+
+   data=SiS_GetReg1(SiS_P3c4,0x15);
+   data &= 0x1F;
+   switch (SiS_DDRDRAM_TYPE[index][3])
+   {
+     case 64: data |= 0; 	break;
+     case 32: data |= 0x20;	break;
+     case 16: data |= 0x40;     break;
+     case 4:  data |= 0x60;     break;
+   }
+   SiS_SetReg1(SiS_P3c4,0x15,data);
 }
 
 void
-SiS_SetDRAMSizingType (int index, USHORT DRAMTYPE_TABLE[][5])
+SiS_SetDRAMSizingType(int index,USHORT DRAMTYPE_TABLE[][5])
 {
-	USHORT data;
+   USHORT  data;
 
-	data = DRAMTYPE_TABLE[index][4];
-	SiS_SetReg1 (SiS_P3c4, 0x13, data);
-
-	/* should delay 50 ns */
+   data = DRAMTYPE_TABLE[index][4];
+   SiS_SetReg1(SiS_P3c4,0x13,data);
 
+   /* should delay 50 ns */
 }
 
 void
-SiS_CheckBusWidth_310 (ULONG ROMAddress, ULONG FBAddress)
-{
-	USHORT data;
-	PULONG volatile pVideoMemory;
-
-	pVideoMemory = (PULONG) FBAddress;
-	if (SiS_Get310DRAMType (ROMAddress) < 2) {
-
-		SiS_SetReg1 (SiS_P3c4, 0x13, 0x00);
-		SiS_SetReg1 (SiS_P3c4, 0x14, 0x12);
-		/* should delay */
-		SiS_SDR_MRS ();
-
-		SiS_ChannelAB = 0;
-		SiS_DataBusWidth = 128;
-		pVideoMemory[0] = 0x01234567L;
-		pVideoMemory[1] = 0x456789ABL;
-		pVideoMemory[2] = 0x89ABCDEFL;
-		pVideoMemory[3] = 0xCDEF0123L;
-		pVideoMemory[4] = 0x55555555L;
-		pVideoMemory[5] = 0x55555555L;
-		pVideoMemory[6] = 0xFFFFFFFFL;
-		pVideoMemory[7] = 0xFFFFFFFFL;
-		if ((pVideoMemory[3] != 0xCDEF0123L)
-		    || (pVideoMemory[2] != 0x89ABCDEFL)) {
-			/*ChannelA64Bit */
-			SiS_DataBusWidth = 64;
-			SiS_ChannelAB = 0;
-			data = SiS_GetReg1 (SiS_P3c4, 0x14);
-			SiS_SetReg1 (SiS_P3c4, 0x14, (USHORT) (data & 0xFD));
-		}
-
-		if ((pVideoMemory[1] != 0x456789ABL)
-		    || (pVideoMemory[0] != 0x01234567L)) {
-			/*ChannelB64Bit */
-			SiS_DataBusWidth = 64;
-			SiS_ChannelAB = 1;
-			data = SiS_GetReg1 (SiS_P3c4, 0x14);
-			SiS_SetReg1 (SiS_P3c4, 0x14,
-				     (USHORT) ((data & 0xFD) | 0x01));
-		}
-		return;
-
-	} else {
-		/* DDR Dual channel */
-		SiS_SetReg1 (SiS_P3c4, 0x13, 0x00);
-		SiS_SetReg1 (SiS_P3c4, 0x14, 0x02);	/* Channel A, 64bit */
-		/* should delay */
-		SiS_DDR_MRS ();
-
-		SiS_ChannelAB = 0;
-		SiS_DataBusWidth = 64;
-		pVideoMemory[0] = 0x01234567L;
-		pVideoMemory[1] = 0x456789ABL;
-		pVideoMemory[2] = 0x89ABCDEFL;
-		pVideoMemory[3] = 0xCDEF0123L;
-		pVideoMemory[4] = 0x55555555L;
-		pVideoMemory[5] = 0x55555555L;
-		pVideoMemory[6] = 0xAAAAAAAAL;
-		pVideoMemory[7] = 0xAAAAAAAAL;
-
-		if (pVideoMemory[1] == 0x456789ABL) {
-			if (pVideoMemory[0] == 0x01234567L) {
-				/* Channel A 64bit */
-				return;
-			}
-		} else {
-			if (pVideoMemory[0] == 0x01234567L) {
-				/* Channel A 32bit */
-				SiS_DataBusWidth = 32;
-				SiS_SetReg1 (SiS_P3c4, 0x14, 0x00);
-				return;
-			}
-
-		}
-
-		SiS_SetReg1 (SiS_P3c4, 0x14, 0x03);	/* Channel B, 64bit */
-		SiS_DDR_MRS ();
-
-		SiS_ChannelAB = 1;
-		SiS_DataBusWidth = 64;
-		pVideoMemory[0] = 0x01234567L;
-		pVideoMemory[1] = 0x456789ABL;
-		pVideoMemory[2] = 0x89ABCDEFL;
-		pVideoMemory[3] = 0xCDEF0123L;
-		pVideoMemory[4] = 0x55555555L;
-		pVideoMemory[5] = 0x55555555L;
-		pVideoMemory[6] = 0xAAAAAAAAL;
-		pVideoMemory[7] = 0xAAAAAAAAL;
-		if (pVideoMemory[1] == 0x456789ABL) {
-			/* Channel B 64 */
-			if (pVideoMemory[0] == 0x01234567L) {
-				/* Channel B 64bit */
-				return;
-			} else {
-				/* error */
-			}
-		} else {
-			if (pVideoMemory[0] == 0x01234567L) {
-				/* Channel B 32 */
-				SiS_DataBusWidth = 32;
-				SiS_SetReg1 (SiS_P3c4, 0x14, 0x01);
-			} else {
-				/* error */
-			}
-		}
-	}
+SiS_CheckBusWidth_310(UCHAR *ROMAddress,ULONG FBAddress,
+                      PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   USHORT  data;
+   PULONG volatile pVideoMemory;
+
+   pVideoMemory = (PULONG) FBAddress;
+   if (SiS_Get310DRAMType(ROMAddress,HwDeviceExtension) < 2) {
+
+     SiS_SetReg1(SiS_P3c4,0x13,0x00);
+     SiS_SetReg1(SiS_P3c4,0x14,0x12);
+     /* should delay */
+     SiS_SDR_MRS();
+
+     SiS_ChannelAB = 0;
+     SiS_DataBusWidth = 128;
+     pVideoMemory[0] = 0x01234567L;
+     pVideoMemory[1] = 0x456789ABL;
+     pVideoMemory[2] = 0x89ABCDEFL;
+     pVideoMemory[3] = 0xCDEF0123L;
+     pVideoMemory[4] = 0x55555555L;
+     pVideoMemory[5] = 0x55555555L;
+     pVideoMemory[6] = 0xFFFFFFFFL;
+     pVideoMemory[7] = 0xFFFFFFFFL;
+     if ((pVideoMemory[3]!=0xCDEF0123L) || (pVideoMemory[2] != 0x89ABCDEFL)) {
+       /*ChannelA64Bit */
+       SiS_DataBusWidth = 64;
+       SiS_ChannelAB = 0;
+       data=SiS_GetReg1(SiS_P3c4,0x14);
+       SiS_SetReg1(SiS_P3c4,  0x14, (USHORT) (data & 0xFD));
+     }
+
+     if ((pVideoMemory[1]!=0x456789ABL) || (pVideoMemory[0] != 0x01234567L)) {
+       /*ChannelB64Bit */
+       SiS_DataBusWidth = 64;
+       SiS_ChannelAB = 1;
+       data=SiS_GetReg1(SiS_P3c4,0x14);
+       SiS_SetReg1(SiS_P3c4,0x14,(USHORT)((data&0xFD)|0x01));
+     }
+     return;
+
+   } else {
+     /* DDR Dual channel */
+     SiS_SetReg1(SiS_P3c4,0x13,0x00);
+     SiS_SetReg1(SiS_P3c4,0x14,0x02); /* Channel A, 64bit */
+     /* should delay */
+     SiS_DDR_MRS();
+
+     SiS_ChannelAB = 0;
+     SiS_DataBusWidth = 64;
+     pVideoMemory[0] = 0x01234567L;
+     pVideoMemory[1] = 0x456789ABL;
+     pVideoMemory[2] = 0x89ABCDEFL;
+     pVideoMemory[3] = 0xCDEF0123L;
+     pVideoMemory[4] = 0x55555555L;
+     pVideoMemory[5] = 0x55555555L;
+     pVideoMemory[6] = 0xAAAAAAAAL;
+     pVideoMemory[7] = 0xAAAAAAAAL;
+
+     if (pVideoMemory[1] == 0x456789ABL) {
+       if (pVideoMemory[0] == 0x01234567L) {
+         /* Channel A 64bit */
+         return;
+       }
+     } else {
+       if (pVideoMemory[0] == 0x01234567L) {
+         /* Channel A 32bit */
+         SiS_DataBusWidth = 32;
+         SiS_SetReg1(SiS_P3c4,0x14,0x00);
+         return;
+       }
+     }
+
+     SiS_SetReg1(SiS_P3c4,0x14,0x03); /* Channel B, 64bit */
+     SiS_DDR_MRS();
+
+     SiS_ChannelAB = 1;
+     SiS_DataBusWidth = 64;
+     pVideoMemory[0] = 0x01234567L;
+     pVideoMemory[1] = 0x456789ABL;
+     pVideoMemory[2] = 0x89ABCDEFL;
+     pVideoMemory[3] = 0xCDEF0123L;
+     pVideoMemory[4] = 0x55555555L;
+     pVideoMemory[5] = 0x55555555L;
+     pVideoMemory[6] = 0xAAAAAAAAL;
+     pVideoMemory[7] = 0xAAAAAAAAL;
+     if (pVideoMemory[1] == 0x456789ABL) {
+       /* Channel B 64 */
+       if (pVideoMemory[0] == 0x01234567L) {
+         /* Channel B 64bit */
+         return;
+       } else {
+         /* error */
+       }
+     } else {
+       if (pVideoMemory[0] == 0x01234567L) {
+         /* Channel B 32 */
+         SiS_DataBusWidth = 32;
+         SiS_SetReg1(SiS_P3c4,0x14,0x01);
+       } else {
+         /* error */
+       }
+     }
+   }
 }
 
 int
-SiS_SetRank (int index, UCHAR RankNo, UCHAR SiS_ChannelAB,
-	     USHORT DRAMTYPE_TABLE[][5])
+SiS_SetRank(int index,UCHAR RankNo,UCHAR SiS_ChannelAB,USHORT DRAMTYPE_TABLE[][5])
 {
-	USHORT data;
-	int RankSize;
-
-	if ((RankNo == 2) && (DRAMTYPE_TABLE[index][0] == 2))
-		return 0;
-
-	RankSize = DRAMTYPE_TABLE[index][3] / 2 * SiS_DataBusWidth / 32;
-
-	if (RankNo * RankSize <= 128) {
-		data = 0;
-		while ((RankSize >>= 1) > 0) {
-			data += 0x10;
-		}
-		data |= (RankNo - 1) << 2;
-		data |= (SiS_DataBusWidth / 64) & 2;
-		data |= SiS_ChannelAB;
-		SiS_SetReg1 (SiS_P3c4, 0x14, data);
-		/* should delay */
-		SiS_SDR_MRS ();
-		return 1;
-	} else
-		return 0;
-
+  USHORT  data;
+  int RankSize;
+
+  if ((RankNo==2)&&(DRAMTYPE_TABLE[index][0]==2))
+         return 0;
+
+  RankSize = DRAMTYPE_TABLE[index][3]/2 * SiS_DataBusWidth/32;
+
+  if (RankNo*RankSize<=128) {
+    data = 0;
+    while ((RankSize>>=1)>0) {
+      data+=0x10;
+    }
+    data |= (RankNo-1)<<2;
+    data |= (SiS_DataBusWidth/64)&2;
+    data |= SiS_ChannelAB;
+    SiS_SetReg1(SiS_P3c4,0x14,data);
+    /* should delay */
+    SiS_SDR_MRS();
+    return 1;
+  } else
+    return 0;
 }
 
 int
-SiS_SetDDRChannel (int index, UCHAR ChannelNo, UCHAR SiS_ChannelAB,
-		   USHORT DRAMTYPE_TABLE[][5])
-{
-	USHORT data;
-	int RankSize;
-
-	RankSize = DRAMTYPE_TABLE[index][3] / 2 * SiS_DataBusWidth / 32;
-	/* RankSize = DRAMTYPE_TABLE[index][3]; */
-	if (ChannelNo * RankSize <= 128) {
-		data = 0;
-		while ((RankSize >>= 1) > 0) {
-			data += 0x10;
-		}
-		if (ChannelNo == 2)
-			data |= 0x0C;
-
-		data |= (SiS_DataBusWidth / 32) & 2;
-		data |= SiS_ChannelAB;
-		SiS_SetReg1 (SiS_P3c4, 0x14, data);
-		/* should delay */
-		SiS_DDR_MRS ();
-		return 1;
-	} else
-		return 0;
-
+SiS_SetDDRChannel(int index,UCHAR ChannelNo,UCHAR SiS_ChannelAB,
+                  USHORT DRAMTYPE_TABLE[][5])
+{
+  USHORT  data;
+  int RankSize;
+
+  RankSize = DRAMTYPE_TABLE[index][3]/2 * SiS_DataBusWidth/32;
+  /* RankSize = DRAMTYPE_TABLE[index][3]; */
+  if (ChannelNo*RankSize<=128) {
+    data = 0;
+    while ((RankSize>>=1)>0) {
+      data+=0x10;
+    }
+    if (ChannelNo==2)
+      data |= 0x0C;
+
+    data |= (SiS_DataBusWidth/32)&2;
+    data |= SiS_ChannelAB;
+    SiS_SetReg1(SiS_P3c4,0x14,data);
+    /* should delay */
+    SiS_DDR_MRS();
+    return 1;
+  } else
+    return 0;
 }
 
 int
-SiS_CheckColumn (int index, USHORT DRAMTYPE_TABLE[][5], ULONG FBAddress)
+SiS_CheckColumn(int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
-	int i;
-	ULONG Increment, Position;
+  int i;
+  ULONG Increment,Position;
 
-	/*Increment = 1<<(DRAMTYPE_TABLE[index][2] + SiS_DataBusWidth / 64 + 1); */
-	Increment = 1 << (10 + SiS_DataBusWidth / 64);
+  /*Increment = 1<<(DRAMTYPE_TABLE[index][2] + SiS_DataBusWidth / 64 + 1); */
+  Increment = 1<<(10 + SiS_DataBusWidth / 64);
 
-	for (i = 0, Position = 0; i < 2; i++) {
-		*((PULONG) (FBAddress + Position)) = Position;
-		Position += Increment;
-	}
+  for (i=0,Position=0;i<2;i++) {
+         *((PULONG)(FBAddress+Position))=Position;
+         Position += Increment;
+  }
 
-	for (i = 0, Position = 0; i < 2; i++) {
+  for (i=0,Position=0;i<2;i++) {
 /*    if (FBAddress[Position]!=Position) */
-		if ((*(PULONG) (FBAddress + Position)) != Position)
-			return 0;
-		Position += Increment;
-	}
-	return 1;
+         if ( (*(PULONG) (FBAddress + Position)) !=Position)
+                return 0;
+         Position += Increment;
+  }
+  return 1;
 }
 
 int
-SiS_CheckBanks (int index, USHORT DRAMTYPE_TABLE[][5], ULONG FBAddress)
+SiS_CheckBanks(int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
-	int i;
-	ULONG Increment, Position;
-	Increment = 1 << (DRAMTYPE_TABLE[index][2] + SiS_DataBusWidth / 64 + 2);
+  int i;
+  ULONG Increment,Position;
+  Increment = 1<<(DRAMTYPE_TABLE[index][2] + SiS_DataBusWidth / 64 + 2);
 
-	for (i = 0, Position = 0; i < 4; i++) {
+  for (i=0,Position=0;i<4;i++) {
 /*    FBAddress[Position]=Position; */
-		*((PULONG) (FBAddress + Position)) = Position;
-		Position += Increment;
-	}
+    *((PULONG)(FBAddress+Position))=Position;
+    Position += Increment;
+  }
 
-	for (i = 0, Position = 0; i < 4; i++) {
+  for (i=0,Position=0;i<4;i++) {
 /*    if (FBAddress[Position]!=Position) */
-		if ((*(PULONG) (FBAddress + Position)) != Position)
-			return 0;
-		Position += Increment;
-	}
-	return 1;
+    if ( (*(PULONG) (FBAddress + Position)) !=Position)
+      return 0;
+    Position += Increment;
+  }
+  return 1;
 }
 
 int
-SiS_CheckRank (int RankNo, int index, USHORT DRAMTYPE_TABLE[][5],
-	       ULONG FBAddress)
+SiS_CheckRank(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
-	int i;
-	ULONG Increment, Position;
-	Increment = 1 << (DRAMTYPE_TABLE[index][2] + DRAMTYPE_TABLE[index][1] +
-			  DRAMTYPE_TABLE[index][0] + SiS_DataBusWidth / 64 +
-			  RankNo);
+  int i;
+  ULONG Increment,Position;
+  Increment = 1<<(DRAMTYPE_TABLE[index][2] + DRAMTYPE_TABLE[index][1] +
+                  DRAMTYPE_TABLE[index][0] + SiS_DataBusWidth / 64 + RankNo);
 
-	for (i = 0, Position = 0; i < 2; i++) {
+  for (i=0,Position=0;i<2;i++) {
 /*    FBAddress[Position]=Position; */
-		*((PULONG) (FBAddress + Position)) = Position;
-		/* *((PULONG)(FBAddress))=Position; */
-		Position += Increment;
-	}
+    *((PULONG)(FBAddress+Position))=Position;
+    /* *((PULONG)(FBAddress))=Position; */
+    Position += Increment;
+  }
 
-	for (i = 0, Position = 0; i < 2; i++) {
+  for (i=0,Position=0;i<2;i++) {
 /*    if (FBAddress[Position]!=Position) */
-		if ((*(PULONG) (FBAddress + Position)) != Position)
-			/*if ( (*(PULONG) (FBAddress )) !=Position) */
-			return 0;
-		Position += Increment;
-	}
-	return 1;
-
+         if ( (*(PULONG) (FBAddress + Position)) !=Position)
+    /*if ( (*(PULONG) (FBAddress )) !=Position) */
+      return 0;
+    Position += Increment;
+  }
+  return 1;
 }
 
 int
-SiS_CheckDDRRank (int RankNo, int index, USHORT DRAMTYPE_TABLE[][5],
-		  ULONG FBAddress)
+SiS_CheckDDRRank(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
-	ULONG Increment, Position;
-	USHORT data;
-
-	Increment = 1 << (DRAMTYPE_TABLE[index][2] + DRAMTYPE_TABLE[index][1] +
-			  DRAMTYPE_TABLE[index][0] + SiS_DataBusWidth / 64 +
-			  RankNo);
-
-	Increment += Increment / 2;
-
-	Position = 0;
-	*((PULONG) (FBAddress + Position + 0)) = 0x01234567;
-	*((PULONG) (FBAddress + Position + 1)) = 0x456789AB;
-	*((PULONG) (FBAddress + Position + 2)) = 0x55555555;
-	*((PULONG) (FBAddress + Position + 3)) = 0x55555555;
-	*((PULONG) (FBAddress + Position + 4)) = 0xAAAAAAAA;
-	*((PULONG) (FBAddress + Position + 5)) = 0xAAAAAAAA;
-
-	if ((*(PULONG) (FBAddress + 1)) == 0x456789AB)
-		return 1;
-
-	if ((*(PULONG) (FBAddress + 0)) == 0x01234567)
-		return 0;
-
-	data = SiS_GetReg1 (SiS_P3c4, 0x14);
-	data &= 0xF3;
-	data |= 0x08;
-	SiS_SetReg1 (SiS_P3c4, 0x14, data);
-	data = SiS_GetReg1 (SiS_P3c4, 0x15);
-	data += 0x20;
-	SiS_SetReg1 (SiS_P3c4, 0x15, data);
-
-	return 1;
-
+  ULONG Increment,Position;
+  USHORT  data;
+  
+  Increment = 1<<(DRAMTYPE_TABLE[index][2] + DRAMTYPE_TABLE[index][1] +
+                  DRAMTYPE_TABLE[index][0] + SiS_DataBusWidth / 64 + RankNo);
+
+  Increment += Increment/2;
+  
+  Position =0;
+  *((PULONG)(FBAddress+Position+0))=0x01234567;
+  *((PULONG)(FBAddress+Position+1))=0x456789AB;
+  *((PULONG)(FBAddress+Position+2))=0x55555555;
+  *((PULONG)(FBAddress+Position+3))=0x55555555;
+  *((PULONG)(FBAddress+Position+4))=0xAAAAAAAA;
+  *((PULONG)(FBAddress+Position+5))=0xAAAAAAAA;
+
+  if ( (*(PULONG) (FBAddress + 1))==0x456789AB)
+    return 1;
+
+  if ( (*(PULONG) (FBAddress + 0))==0x01234567)
+    return 0;
+
+  data=SiS_GetReg1(SiS_P3c4,0x14);
+  data &= 0xF3;
+  data |= 0x08;
+  SiS_SetReg1(SiS_P3c4,0x14,data);
+  data=SiS_GetReg1(SiS_P3c4,0x15);
+  data += 0x20;
+  SiS_SetReg1(SiS_P3c4,0x15,data);
+
+  return 1;
 }
 
 int
-SiS_CheckRanks (int RankNo, int index, USHORT DRAMTYPE_TABLE[][5],
-		ULONG FBAddress)
+SiS_CheckRanks(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
-	int r;
+  int r;
 
-	for (r = RankNo; r >= 1; r--) {
-		if (!SiS_CheckRank (r, index, DRAMTYPE_TABLE, FBAddress))
-			return 0;
-	}
-	if (!SiS_CheckBanks (index, DRAMTYPE_TABLE, FBAddress))
-		return 0;
+  for (r=RankNo;r>=1;r--) {
+    if (!SiS_CheckRank(r,index,DRAMTYPE_TABLE,FBAddress))
+      return 0;
+  }
+  if (!SiS_CheckBanks(index,DRAMTYPE_TABLE,FBAddress))
+    return 0;
 
-	if (!SiS_CheckColumn (index, DRAMTYPE_TABLE, FBAddress))
-		return 0;
-	return 1;
+  if (!SiS_CheckColumn(index,DRAMTYPE_TABLE,FBAddress))
+    return 0;
 
+  return 1;
 }
 
 int
-SiS_CheckDDRRanks (int RankNo, int index, USHORT DRAMTYPE_TABLE[][5],
-		   ULONG FBAddress)
+SiS_CheckDDRRanks(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress)
 {
-	int r;
+  int r;
 
-	for (r = RankNo; r >= 1; r--) {
-		if (!SiS_CheckDDRRank (r, index, DRAMTYPE_TABLE, FBAddress))
-			return 0;
-	}
-	if (!SiS_CheckBanks (index, DRAMTYPE_TABLE, FBAddress))
-		return 0;
+  for (r=RankNo;r>=1;r--) {
+    if (!SiS_CheckDDRRank(r,index,DRAMTYPE_TABLE,FBAddress))
+      return 0;
+  }
+  if (!SiS_CheckBanks(index,DRAMTYPE_TABLE,FBAddress))
+    return 0;
 
-	if (!SiS_CheckColumn (index, DRAMTYPE_TABLE, FBAddress))
-		return 0;
-	return 1;
+  if (!SiS_CheckColumn(index,DRAMTYPE_TABLE,FBAddress))
+    return 0;
 
+  return 1;
 }
 
 int
-SiS_SDRSizing (ULONG FBAddress)
-{
-	int i;
-	UCHAR j;
-
-	for (i = 0; i < 13; i++) {
-		SiS_SetDRAMSizingType (i, SiS_SDRDRAM_TYPE);
-		for (j = 2; j > 0; j--) {
-
-			if (!SiS_SetRank
-			    (i, (UCHAR) j, SiS_ChannelAB,
-			     SiS_SDRDRAM_TYPE)) continue;
-			else {
-				if (SiS_CheckRanks
-				    (j, i, SiS_SDRDRAM_TYPE,
-				     FBAddress)) return 1;
-			}
-		}
-	}
-	return 0;
+SiS_SDRSizing(ULONG FBAddress)
+{
+  int    i;
+  UCHAR  j;
+
+  for (i=0;i<13;i++) {
+    SiS_SetDRAMSizingType(i, SiS_SDRDRAM_TYPE);
+    for (j=2;j>0;j--) {
+      if (!SiS_SetRank(i,(UCHAR) j, SiS_ChannelAB,SiS_SDRDRAM_TYPE))
+        continue;
+      else {
+        if (SiS_CheckRanks(j,i,SiS_SDRDRAM_TYPE, FBAddress))
+          return 1;
+      }
+    }
+  }
+  return 0;
 }
 
 int
-SiS_DDRSizing (ULONG FBAddress)
-{
-
-	int i;
-	UCHAR j;
-
-	for (i = 0; i < 4; i++) {
-		SiS_SetDRAMSizingType (i, SiS_DDRDRAM_TYPE);
-		SiS_DisableChannelInterleaving (i, SiS_DDRDRAM_TYPE);
-		for (j = 2; j > 0; j--) {
-			SiS_SetDDRChannel (i, j, SiS_ChannelAB,
-					   SiS_DDRDRAM_TYPE);
-			if (!SiS_SetRank
-			    (i, (UCHAR) j, SiS_ChannelAB,
-			     SiS_DDRDRAM_TYPE)) continue;
-			else {
-				if (SiS_CheckDDRRanks
-				    (j, i, SiS_DDRDRAM_TYPE,
-				     FBAddress)) return 1;
-			}
-		}
-	}
-	return 0;
+SiS_DDRSizing(ULONG FBAddress)
+{
+
+  int    i;
+  UCHAR  j;
+
+  for (i=0;i<4;i++){
+    SiS_SetDRAMSizingType(i,SiS_DDRDRAM_TYPE);
+    SiS_DisableChannelInterleaving(i,SiS_DDRDRAM_TYPE);
+    for (j=2;j>0;j--) {
+      SiS_SetDDRChannel(i, j, SiS_ChannelAB, SiS_DDRDRAM_TYPE);
+      if (!SiS_SetRank(i,(UCHAR) j, SiS_ChannelAB,SiS_DDRDRAM_TYPE))
+        continue;
+      else {
+        if (SiS_CheckDDRRanks(j,i,SiS_DDRDRAM_TYPE, FBAddress))
+          return 1;
+      }
+    }
+  }
+  return 0;
 }
 
 /*
-
  check if read cache pointer is correct
-
 */
 void
-SiS_VerifyMclk (ULONG FBAddr)
-{
-	PUCHAR pVideoMemory = (PUCHAR) FBAddr;
-	UCHAR i, j;
-	USHORT Temp, SR21;
-
-	pVideoMemory[0] = 0xaa;	/* alan */
-	pVideoMemory[16] = 0x55;	/* note: PCI read cache is off */
-
-	if ((pVideoMemory[0] != 0xaa) || (pVideoMemory[16] != 0x55)) {
-		for (i = 0, j = 16; i < 2; i++, j += 16) {
-			SR21 = SiS_GetReg1 (SiS_P3c4, 0x21);
-			Temp = SR21 & 0xFB;	/* disable PCI post write buffer empty gating */
-			SiS_SetReg1 (SiS_P3c4, 0x21, Temp);
-
-			Temp = SiS_GetReg1 (SiS_P3c4, 0x3C);
-			Temp = Temp | 0x01;	/*MCLK reset */
-			SiS_SetReg1 (SiS_P3c4, 0x3C, Temp);
-			Temp = SiS_GetReg1 (SiS_P3c4, 0x3C);
-			Temp = Temp & 0xFE;	/* MCLK normal operation */
-			SiS_SetReg1 (SiS_P3c4, 0x3C, Temp);
-			SiS_SetReg1 (SiS_P3c4, 0x21, SR21);
-
-			pVideoMemory[16 + j] = j;
-			if (pVideoMemory[16 + j] == j) {
-				pVideoMemory[j] = j;
-				break;
-			}
-		}
-	}
-
+SiS_VerifyMclk(ULONG FBAddr)
+{
+   PUCHAR  pVideoMemory = (PUCHAR) FBAddr;
+   UCHAR i,j;
+   USHORT Temp,SR21;
+
+   pVideoMemory[0]=0xaa;  /* alan */
+   pVideoMemory[16]=0x55; /* note: PCI read cache is off */
+
+   if ((pVideoMemory[0]!=0xaa)||(pVideoMemory[16]!=0x55)) {
+     for (i=0,j=16;i<2;i++,j+=16)  {
+       SR21 = SiS_GetReg1(SiS_P3c4, 0x21);
+       Temp = SR21 & 0xFB;     /* disable PCI post write buffer empty gating */
+       SiS_SetReg1(SiS_P3c4, 0x21, Temp);
+
+       Temp = SiS_GetReg1(SiS_P3c4, 0x3C);
+       Temp = Temp | 0x01;                 /*MCLK reset */
+       SiS_SetReg1(SiS_P3c4, 0x3C, Temp);
+       Temp = SiS_GetReg1(SiS_P3c4, 0x3C);
+       Temp = Temp & 0xFE;                 /* MCLK normal operation */
+       SiS_SetReg1(SiS_P3c4, 0x3C, Temp);
+       SiS_SetReg1(SiS_P3c4, 0x21, SR21);
+
+       pVideoMemory[16+j] = j;
+       if (pVideoMemory[16+j]==j)  {
+         pVideoMemory[j] = j;
+         break;
+       }
+     }
+   }
 }
 
+/* TW: Is this a 315E? */
 int
-Is315E (void)
+Is315E(void)
 {
-	USHORT data;
+   USHORT  data;
 
-	data = SiS_GetReg1 (SiS_P3d4, 0x5F);
-	if (data & 0x10)
-		return 1;
-	else
-		return 0;
+   data=SiS_GetReg1(SiS_P3d4,0x5F);
+   if (data&0x10) return 1;
+   else return 0;
 }
 
+/* TW: For 315 only */
 void
-SiS_SetDRAMSize_310 (PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetDRAMSize_310(PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	ULONG ROMAddr = (ULONG) HwDeviceExtension->pjVirtualRomBase;
-	ULONG FBAddr = (ULONG) HwDeviceExtension->pjVideoMemoryAddress;
-	/*USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress; */
-	USHORT data;
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   ULONG   FBAddr   = (ULONG)HwDeviceExtension->pjVideoMemoryAddress;
+   USHORT  data;
 
-#ifdef SIS301
-	/*SiS_SetReg1(SiS_P3d4,0x30,0x40);   */
+#ifdef SIS301	/* TW: SIS301 ??? */
+   /*SiS_SetReg1(SiS_P3d4,0x30,0x40);   */
 #endif
-#ifdef SIS302
-	SiS_SetReg1 (SiS_P3d4, 0x30, 0x4D);	/* alan,should change value */
-	SiS_SetReg1 (SiS_P3d4, 0x31, 0xc0);	/* alan,should change value */
-	SiS_SetReg1 (SiS_P3d4, 0x34, 0x3F);	/* alan,should change value */
+#ifdef SIS302   /* TW: SIS302 ??? */
+   SiS_SetReg1(SiS_P3d4,0x30,0x4D);  /* alan,should change value */
+   SiS_SetReg1(SiS_P3d4,0x31,0xc0);  /* alan,should change value */
+   SiS_SetReg1(SiS_P3d4,0x34,0x3F);  /* alan,should change value */
 #endif
 
-	SiSSetMode (HwDeviceExtension, 0x2e);
+   SiSSetMode(HwDeviceExtension,0x2e);
 
-	data = SiS_GetReg1 (SiS_P3c4, 0x21);
-	SiS_SetReg1 (SiS_P3c4, 0x21, (USHORT) (data & 0xDF));	/* disable read cache */
+   data=SiS_GetReg1(SiS_P3c4,0x21);
+   SiS_SetReg1(SiS_P3c4,0x21,(USHORT) (data&0xDF));   /* disable read cache */
 
-	data = SiS_GetReg1 (SiS_P3c4, 0x1);
-	data = data | 0x20;
-	SiS_SetReg1 (SiS_P3c4, 0x01, data);	/* Turn OFF Display */
+   data=SiS_GetReg1(SiS_P3c4,0x1);
+   data=data|0x20;
+   SiS_SetReg1(SiS_P3c4,0x01,data);                   /* Turn OFF Display */
 
-	data = SiS_GetReg1 (SiS_P3c4, 0x16);
-	SiS_SetReg1 (SiS_P3c4, 0x16, (USHORT) (data | 0x0F));	/* assume lowest speed DRAM */
+   data=SiS_GetReg1(SiS_P3c4,0x16);
+   SiS_SetReg1(SiS_P3c4,0x16,(USHORT) (data|0x0F));   /* assume lowest speed DRAM */
 
-	SiS_SetDRAMModeRegister (ROMAddr);
-	SiS_DisableRefresh ();
-	SiS_CheckBusWidth_310 (ROMAddr, FBAddr);
+   SiS_SetDRAMModeRegister(ROMAddr,HwDeviceExtension);
+   SiS_DisableRefresh();
+   SiS_CheckBusWidth_310(ROMAddr,FBAddr,HwDeviceExtension);
 
-	SiS_VerifyMclk (FBAddr);	/* alan 2000/7/3 */
+   SiS_VerifyMclk(FBAddr); /* alan 2000/7/3 */
 
-	if (SiS_Get310DRAMType (ROMAddr) < 2) {
-		SiS_SDRSizing (FBAddr);
-	} else {
-		SiS_DDRSizing (FBAddr);
-	}
+   if (SiS_Get310DRAMType(ROMAddr, HwDeviceExtension)<2)
+     SiS_SDRSizing(FBAddr);
+   else
+     SiS_DDRSizing(FBAddr);
 
-	if (Is315E ()) {
-		data = SiS_GetReg1 (SiS_P3c4, 0x14);
-		if ((data & 0x0C) == 0x0C) {	/* dual channel */
-			if ((data & 0xF0) > 0x40)
-				data = (data & 0x0F) | 0x40;
-		} else {	/* single channel */
+   if (Is315E()) {
+     data=SiS_GetReg1(SiS_P3c4,0x14);
+     if ((data&0x0C)==0x0C) { 	/* dual channel */
+     	if ((data&0xF0)>0x40)
+     	  data = (data & 0x0F) | 0x40;
+     } else { 			/* single channel */
+     	if ((data&0xF0)>0x50)
+     	  data = (data & 0x0F) | 0x50;
+     }
+   }
 
-			if ((data & 0xF0) > 0x50)
-				data = (data & 0x0F) | 0x50;
-		}
-
-	}
-
-	SiS_SetReg1 (SiS_P3c4, 0x16, SiS_SR15[1][SiS_RAMType]);	/* restore SR16 */
-
-	SiS_EnableRefresh (ROMAddr);
-	data = SiS_GetReg1 (SiS_P3c4, 0x21);
-	SiS_SetReg1 (SiS_P3c4, 0x21, (USHORT) (data | 0x20));	/* enable read cache */
+   SiS_SetReg1(SiS_P3c4,0x16,SiS_SR15[1][SiS_RAMType]);  /* restore SR16 */
 
+   SiS_EnableRefresh(ROMAddr);
+   data=SiS_GetReg1(SiS_P3c4,0x21);
+   SiS_SetReg1(SiS_P3c4,0x21,(USHORT) (data|0x20));      /* enable read cache */
 }
 #endif
 
 void
-SiS_SetMemoryClock (ULONG ROMAddr)
-{
-	SiS_SetReg1 (SiS_P3c4, 0x28, SiS_MCLKData[SiS_RAMType].SR28);
-	SiS_SetReg1 (SiS_P3c4, 0x29, SiS_MCLKData[SiS_RAMType].SR29);
-	SiS_SetReg1 (SiS_P3c4, 0x2A, SiS_MCLKData[SiS_RAMType].SR2A);
-	SiS_SetReg1 (SiS_P3c4, 0x2E, SiS_ECLKData[SiS_RAMType].SR2E);
-	SiS_SetReg1 (SiS_P3c4, 0x2F, SiS_ECLKData[SiS_RAMType].SR2F);
-	SiS_SetReg1 (SiS_P3c4, 0x30, SiS_ECLKData[SiS_RAMType].SR30);
-
-#ifdef CONFIG_FB_SIS_315
-	if (Is315E ()) {
-		SiS_SetReg1 (SiS_P3c4, 0x28, 0x3B);	/* 143 */
-		SiS_SetReg1 (SiS_P3c4, 0x29, 0x22);
-		SiS_SetReg1 (SiS_P3c4, 0x2E, 0x3B);	/* 143 */
-		SiS_SetReg1 (SiS_P3c4, 0x2F, 0x22);
-	}
+SiS_SetMemoryClock(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   SiS_SetReg1(SiS_P3c4,0x28,SiS_MCLKData_0[SiS_RAMType].SR28);
+   SiS_SetReg1(SiS_P3c4,0x29,SiS_MCLKData_0[SiS_RAMType].SR29);
+   SiS_SetReg1(SiS_P3c4,0x2A,SiS_MCLKData_0[SiS_RAMType].SR2A);
+   SiS_SetReg1(SiS_P3c4,0x2E,SiS_ECLKData[SiS_RAMType].SR2E);
+   SiS_SetReg1(SiS_P3c4,0x2F,SiS_ECLKData[SiS_RAMType].SR2F);
+   SiS_SetReg1(SiS_P3c4,0x30,SiS_ECLKData[SiS_RAMType].SR30);
+
+#ifdef SIS315H
+   if (Is315E()) {
+     SiS_SetReg1(SiS_P3c4,0x28,0x3B); /* 143 */
+     SiS_SetReg1(SiS_P3c4,0x29,0x22);
+     SiS_SetReg1(SiS_P3c4,0x2E,0x3B); /* 143 */
+     SiS_SetReg1(SiS_P3c4,0x2F,0x22);
+   }
 #endif
-
 }
 
-/*
-=========================================
- ======== SiS SetMode Function  ==========
-=========================================
-*/
-BOOLEAN
-SiSSetMode (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT ModeNo)
-{
-	ULONG temp;
-	USHORT ModeIdIndex, KeepLockReg;
-	ULONG ROMAddr = (ULONG) HwDeviceExtension->pjVirtualRomBase;
-	/*ULONG   FBAddr   = (ULONG)HwDeviceExtension->pjVideoMemoryAddress; */
-	USHORT BaseAddr = (USHORT) HwDeviceExtension->ulIOAddress;
-
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_315H) ||	/* 05/02/01 ynlai for sis550 */
-	    (HwDeviceExtension->jChipType == SIS_315PRO) ||
-	    (HwDeviceExtension->jChipType == SIS_550) ||
-	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-	    (HwDeviceExtension->jChipType == SIS_740))	/* 09/03/01 chiawen for 650 */
-		InitTo310Pointer ();
-#endif
-
-#ifdef CONFIG_FB_SIS_300
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730) ||
-	    (HwDeviceExtension->jChipType == SIS_300))
-		InitTo300Pointer ();
-#endif
-
-	SiS_P3c4 = BaseAddr + 0x14;
-	SiS_P3d4 = BaseAddr + 0x24;
-	SiS_P3c0 = BaseAddr + 0x10;
-	SiS_P3ce = BaseAddr + 0x1e;
-	SiS_P3c2 = BaseAddr + 0x12;
-	SiS_P3ca = BaseAddr + 0x1a;
-	SiS_P3c6 = BaseAddr + 0x16;
-	SiS_P3c7 = BaseAddr + 0x17;
-	SiS_P3c8 = BaseAddr + 0x18;
-	SiS_P3c9 = BaseAddr + 0x19;
-	SiS_P3da = BaseAddr + 0x2A;
-	SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
-	SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
-	SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
-	SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
-
-	SiS_IF_DEF_LVDS = 0;
-	SiS_IF_DEF_CH7005 = 0;
-	SiS_IF_DEF_HiVision = 0;
-	SiS_IF_DEF_DSTN = 0;	/*for 550 dstn */
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730) ||
-	    (HwDeviceExtension->jChipType == SIS_550) ||
-	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-	    (HwDeviceExtension->jChipType == SIS_740)) {	/* 09/03/01 chiawen for 650 */
-		temp = SiS_GetReg1 (SiS_P3d4, 0x37);
-		temp = (temp & 0x0E) >> 1;
-		if ((temp == 0) || (temp == 1)) {	/* for 301 */
-			SiS_IF_DEF_LVDS = 0;
-			SiS_IF_DEF_CH7005 = 0;
-			SiS_IF_DEF_TRUMPION = 0;
-		}
-		if ((temp >= 2) && (temp <= 5)) {
-			SiS_IF_DEF_LVDS = 1;
-		}
-		if (temp == 3)
-			SiS_IF_DEF_TRUMPION = 1;
-		if ((temp == 4) || (temp == 5))
-			SiS_IF_DEF_CH7005 = 1;
-	} else {
-		SiS_IF_DEF_LVDS = 0;
-		SiS_IF_DEF_TRUMPION = 0;
-		SiS_IF_DEF_CH7005 = 0;
-	}
+#endif /* ifndef LINUX_XF86 */
 
-	if (ModeNo & 0x80) {
-		ModeNo = ModeNo & 0x7F;
-		flag_clearbuffer = 0;
-	} else {
-		flag_clearbuffer = 1;
-	}
+#ifdef SIS315H
+UCHAR
+SiS_Get310DRAMType(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   UCHAR   data;
+
+   if (*pSiS_SoftSetting & SoftDRAMType) {
+     data = *pSiS_SoftSetting & 0x03;
+   } else {
+     if(HwDeviceExtension->jChipType > SIS_315PRO) {
+        data = SiS_GetReg1(SiS_P3c4,0x13) & 0x07;
+     } else {	/* TW: 315 */
+        data = SiS_GetReg1(SiS_P3c4,0x3a) & 0x03;
+     }
+   }
+
+   return data;
+}
+#endif
 
-	SiS_PresetScratchregister (SiS_P3d4, HwDeviceExtension);	/*add for CRT2  */
-	KeepLockReg = SiS_GetReg1 (SiS_P3c4, 0x05);
-	SiS_SetReg1 (SiS_P3c4, 0x05, 0x86);	/* 1.Openkey */
-	temp = SiS_SearchModeID (ROMAddr, ModeNo, &ModeIdIndex);	/* 2.Get ModeID Table  */
-	if (temp == 0)
-		return (0);
-	/*301b */
-	SiS_GetVBType (BaseAddr);
-	/*end 301b */
-	SiS_GetVBInfo301 (BaseAddr, ROMAddr, ModeNo, ModeIdIndex, HwDeviceExtension);	/*add for CRT2 */
-	SiS_GetLCDResInfo301 (ROMAddr, SiS_P3d4, ModeNo, ModeIdIndex);	/*add for CRT2 */
-
-	temp = SiS_CheckMemorySize (ROMAddr, HwDeviceExtension, ModeNo, ModeIdIndex);	/*3.Check memory size */
-	if (temp == 0)
-		return (0);
-	if (SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) {	/*301b */
-		SiS_SetCRT1Group (ROMAddr, HwDeviceExtension, ModeNo,
-				  ModeIdIndex);
-	} else {
-		if (!(SiS_VBInfo & SwitchToCRT2)) {
-			SiS_SetCRT1Group (ROMAddr, HwDeviceExtension, ModeNo,
-					  ModeIdIndex);
-		}
-	}
+/* SiSInit END */
 
-	if (SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA)) {	/*301b */
-		switch (HwDeviceExtension->ujVBChipID) {
-/*karl*/
-		case VB_CHIP_301:
-		case VB_CHIP_301B:
-			SiS_SetCRT2Group301 (BaseAddr, ROMAddr, ModeNo, HwDeviceExtension);	/*add for CRT2 */
-			break;
-		case VB_CHIP_302:
-			SiS_SetCRT2Group301 (BaseAddr, ROMAddr, ModeNo,
-					     HwDeviceExtension);
-			break;
-		case VB_CHIP_303:
-/*        SetCRT2Group302(BaseAddr,ROMAddr,ModeNo, HwDeviceExtension);                       add for CRT2   */
-			break;
-		case VB_CHIP_UNKNOWN:	/*add for lvds ch7005 */
-			temp = SiS_GetReg1 (SiS_P3d4, 0x37);
-			if (temp &
-			    (ExtChipLVDS | ExtChipTrumpion | ExtChipCH7005)) {
-				SiS_SetCRT2Group301 (BaseAddr, ROMAddr, ModeNo,
-						     HwDeviceExtension);
-			}
-			break;
-		}
-	}
-	if (KeepLockReg == 0xA1)
-		SiS_SetReg1 (SiS_P3c4, 0x05, 0x86);	/* 05/02/01 ynlai */
-	else
-		SiS_SetReg1 (SiS_P3c4, 0x05, 0x00);
-	return TRUE;
+/* ----------------------------------------- */
+
+void SiSRegInit(USHORT BaseAddr)
+{
+   SiS_P3c4=BaseAddr+0x14;
+   SiS_P3d4=BaseAddr+0x24;
+   SiS_P3c0=BaseAddr+0x10;
+   SiS_P3ce=BaseAddr+0x1e;
+   SiS_P3c2=BaseAddr+0x12;
+   SiS_P3ca=BaseAddr+0x1a;
+   SiS_P3c6=BaseAddr+0x16;
+   SiS_P3c7=BaseAddr+0x17;
+   SiS_P3c8=BaseAddr+0x18;
+   SiS_P3c9=BaseAddr+0x19;
+   SiS_P3da=BaseAddr+0x2A;
+   SiS_Part1Port=BaseAddr+SIS_CRT2_PORT_04;   /* Digital video interface registers (LCD) */
+   SiS_Part2Port=BaseAddr+SIS_CRT2_PORT_10;   /* 301 TV Encoder registers */
+   SiS_Part3Port=BaseAddr+SIS_CRT2_PORT_12;   /* 301 Macrovision registers */
+   SiS_Part4Port=BaseAddr+SIS_CRT2_PORT_14;   /* 301 VGA2 registers */
+   SiS_Part5Port=BaseAddr+SIS_CRT2_PORT_14+2; /* 301 palette address port registers */
+   SiS_DDC_Port=BaseAddr+0x14;  /* 0x3c4; */  /* DDC Port ( = P3C4) */
 }
 
 void
-SiS_SetCRT1Group (ULONG ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		  USHORT ModeNo, USHORT ModeIdIndex)
-{
-	USHORT StandTableIndex, RefreshRateTableIndex;
-	USHORT temp;
-
-	/*SiS_SetReg1(SiS_P3d4,0x34,ModeNo); */
-	SiS_CRT1Mode = ModeNo;
-	/* set CR34->CRT1 ModeNofor CRT2 FIFO */
-	StandTableIndex = SiS_GetModePtr (ROMAddr, ModeNo, ModeIdIndex);	/* 4.GetModePtr  */
-	SiS_SetSeqRegs (ROMAddr, StandTableIndex);	/* 5.SetSeqRegs  */
-	SiS_SetMiscRegs (ROMAddr, StandTableIndex);	/* 6.SetMiscRegs */
-	SiS_SetCRTCRegs (ROMAddr, HwDeviceExtension, StandTableIndex);	/* 7.SetCRTCRegs */
-	SiS_SetATTRegs (ROMAddr, StandTableIndex);	/* 8.SetATTRegs  */
-	SiS_SetGRCRegs (ROMAddr, StandTableIndex);	/* 9.SetGRCRegs  */
-	SiS_ClearExt1Regs ();	/* 10.Clear Ext1Regs */
-	temp = ~ProgrammingCRT2;	/*       11.GetRatePtr  */
-	SiS_SetFlag = SiS_SetFlag & temp;
-	SiS_SelectCRT2Rate = 0;
-	/*301b */
-	if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-		if (SiS_VBInfo & SetCRT2ToLCDA) {
-			SiS_SetFlag = SiS_SetFlag | ProgrammingCRT2;
-			/*   SiS_SelectCRT2Rate=4; */
-		}
-	}
-	/*end 301b */
-
-	RefreshRateTableIndex = SiS_GetRatePtrCRT2 (ROMAddr, ModeNo, ModeIdIndex);	/* 11.GetRatePtr */
+SiSInitPCIetc(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+#ifdef LINUX_XF86
+   if ((HwDeviceExtension->jChipType == SIS_540)||
+       (HwDeviceExtension->jChipType == SIS_630)||
+       (HwDeviceExtension->jChipType == SIS_730)||
+       (HwDeviceExtension->jChipType == SIS_300)) {
+       /* TW: Set - PCI LINEAR ADDRESSING ENABLE (0x80)
+		  - PCI IO ENABLE  (0x20)
+		  - MMIO ENABLE (0x1)
+  	*/
+       SiS_SetReg1(SiS_P3c4,0x20,0xa1);
+       /* TW: Enable 2D (0x42) & 3D accelerator (0x18) */
+       SiS_SetRegANDOR(SiS_P3c4,0x1E,0xFF,0x5A);
+   }
+   if((HwDeviceExtension->jChipType == SIS_315H)||
+      (HwDeviceExtension->jChipType == SIS_315PRO)||
+      (HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650)) {
+      /* TW: This seems to be done the same way on these chipsets */
+      SiS_SetReg1(SiS_P3c4,0x20,0xa1);
+      SiS_SetRegANDOR(SiS_P3c4,0x1E,0xFF,0x5A);
+   }
+#endif
+}
 
-	/*301b */
-	if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-		if (!(SiS_VBInfo & SetCRT2ToLCDA)) {
-			SiS_SetFlag = SiS_SetFlag & (~ProgrammingCRT2);
-		}
-	}
-	/*end 301b */
-
-	if (RefreshRateTableIndex != 0xFFFF) {
-		SiS_SetSync (ROMAddr, RefreshRateTableIndex);	/* 12.SetSync */
-		SiS_SetCRT1CRTC (ROMAddr, ModeNo, ModeIdIndex, RefreshRateTableIndex);	/* 13.SetCRT1CRTC  */
-		SiS_SetCRT1Offset (ROMAddr, ModeNo, ModeIdIndex,
-				   RefreshRateTableIndex, HwDeviceExtension);	/* 14.SetCRT1Offset */
-		SiS_SetCRT1VCLK (ROMAddr, ModeNo, ModeIdIndex,
-				 HwDeviceExtension, RefreshRateTableIndex);	/* 15.SetCRT1VCLK  */
-	}
-#ifdef CONFIG_FB_SIS_300
-	if ((HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_540)) {
-		SiS_SetCRT1FIFO2 (ROMAddr, ModeNo, HwDeviceExtension,
-				  RefreshRateTableIndex);
-	}
+void
+SiSSetLVDSetc(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+{
+   ULONG   temp;
+
+   SiS_IF_DEF_LVDS = 0;
+   SiS_IF_DEF_TRUMPION = 0;
+   SiS_IF_DEF_CH70xx = 0;
+   SiS_IF_DEF_HiVision = 0;
+   SiS_IF_DEF_DSTN = 0;
+   SiS_IF_DEF_FSTN = 0;
+
+   SiS_ChrontelInit = 0;
+
+   if((ModeNo == 0x5a) || (ModeNo == 0x5b)) {
+   	SiS_IF_DEF_DSTN = 1;   /* for 550 dstn */
+   	SiS_IF_DEF_FSTN = 1;   /* for fstn */
+   }
+
+#ifdef SIS300
+   if((HwDeviceExtension->jChipType == SIS_540)||
+      (HwDeviceExtension->jChipType == SIS_630)||
+      (HwDeviceExtension->jChipType == SIS_730))
+    {
+      	temp=SiS_GetReg1(SiS_P3d4,0x37);
+      	temp = (temp & 0x0E) >> 1;
+      	if((temp >= 2) && (temp <= 5)) SiS_IF_DEF_LVDS = 1;
+      	if(temp == 3)   SiS_IF_DEF_TRUMPION = 1;
+      	if((temp == 4) || (temp == 5)) {
+		/* TW: Save power status (and error check) */
+		SiS_Backup70xx = SiS_GetCH700x(0x0e);
+		if (SiS_Backup70xx != 0xFFFF)
+			SiS_IF_DEF_CH70xx = 1;
+        }
+   }
 #endif
-#ifdef CONFIG_FB_SIS_315
-	if (HwDeviceExtension->jChipType >= SIS_315H) {
-		SiS_SetCRT1FIFO (ROMAddr, ModeNo, HwDeviceExtension);
-	}
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650))
+    {
+        /* TW: CR37 is different on 310 series */
+        if (SiS_IF_DEF_FSTN)                       /* fstn: set CR37=0x04 */
+             SiS_SetReg1(SiS_P3d4,0x37,0x04);      /* (fake LVDS bridge) */
+
+	temp=SiS_GetReg1(SiS_P3d4,0x37);
+      	temp = (temp & 0x0E) >> 1;
+      	if((temp >= 2) && (temp <= 3)) SiS_IF_DEF_LVDS = 1;
+      	if(temp == 3)  {
+#if 0  /* Don't know how to do this on Chrontel 7019 */
+		/* TW: Save power status (and error check) */
+		SiS_Backup70xx = SiS_GetCH700x(0x0e);
+		if (SiS_Backup70xx != 0xFFFF)
+#endif
+			SiS_IF_DEF_CH70xx = 2;
+        }
+	SiS_IF_DEF_HiVision = 1;
+    }
 #endif
-	SiS_SetCRT1ModeRegs (ROMAddr, HwDeviceExtension, ModeNo, ModeIdIndex,
-			     RefreshRateTableIndex);
-	SiS_SetVCLKState (ROMAddr, HwDeviceExtension, ModeNo,
-			  RefreshRateTableIndex);
-#ifdef CONFIG_FB_SIS_315
-	if (HwDeviceExtension->jChipType > SIS_315H)
-		SiS_SetInterlace (ROMAddr, ModeNo, RefreshRateTableIndex);
-#endif
-	SiS_LoadDAC (ROMAddr, ModeNo, ModeIdIndex);
-	if (flag_clearbuffer)
-		SiS_ClearBuffer (HwDeviceExtension, ModeNo);
-
-	if (!(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA))) {	/*301b */
-		SiS_LongWait ();
-		SiS_DisplayOn ();
-	}
 }
 
 void
-SiS_GetVBType (USHORT BaseAddr)
-{
-	USHORT flag;
-
-	flag = SiS_GetReg1 (SiS_Part4Port, 0x00);
-	if (flag >= 2)
-		SiS_VBType = VB_SIS302B;
-	else {
-		flag = SiS_GetReg1 (SiS_Part4Port, 0x01);
-		if (flag >= 0xB0)
-			SiS_VBType = VB_SIS301B;
-		else
-			SiS_VBType = VB_SIS301;
-
-		flag = SiS_GetReg1 (SiS_Part4Port, 0x23);	/*301dlvds */
-		if (!(flag & 0x02))
-			SiS_VBType = SiS_VBType | VB_NoLCD;
-	}
+SiSInitPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+#ifdef SIS315H
+   if((HwDeviceExtension->jChipType == SIS_315H)||
+      (HwDeviceExtension->jChipType == SIS_315PRO)||
+      (HwDeviceExtension->jChipType == SIS_550)||
+      (HwDeviceExtension->jChipType == SIS_640)||
+      (HwDeviceExtension->jChipType == SIS_740)||
+      (HwDeviceExtension->jChipType == SIS_650))
+     InitTo310Pointer(HwDeviceExtension);
+#endif
 
+#ifdef SIS300
+   if ((HwDeviceExtension->jChipType == SIS_540)||
+       (HwDeviceExtension->jChipType == SIS_630)||
+       (HwDeviceExtension->jChipType == SIS_730)||
+       (HwDeviceExtension->jChipType == SIS_300))
+     InitTo300Pointer(HwDeviceExtension);
+#endif
 }
 
-/* win2000 MM adapter not support standard mode  */
+/*
+ 	=========================================
+ 	======== SiS SetMode Function  ==========
+ 	=========================================
+*/
+#ifdef LINUX_XF86
+/* TW: This is used for non-Dual-Head mode from X */
 BOOLEAN
-SiS_SearchModeID (ULONG ROMAddr, USHORT ModeNo, USHORT * ModeIdIndex)
-{
-	PUCHAR VGA_INFO = "\0x11";
-
-	if (ModeNo <= 5)
-		ModeNo |= 1;
-	if (ModeNo <= 0x13) {
-		/* for (*ModeIdIndex=0;*ModeIdIndex<sizeof(SiS_SModeIDTable)/sizeof(SiS_StStruct);(*ModeIdIndex)++) */
-		for (*ModeIdIndex = 0;; (*ModeIdIndex)++) {
-			if (SiS_SModeIDTable[*ModeIdIndex].St_ModeID == ModeNo)
-				break;
-			if (SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF)
-				return FALSE;
-		}
+SiSBIOSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+               DisplayModePtr mode)
+{
+   UShort  ModeNo=0;
 
-#ifdef TC
-		VGA_INFO = (PUCHAR) MK_FP (0, 0x489);
-#endif
-		if (ModeNo == 0x07) {
-			if ((*VGA_INFO & 0x10) != 0)
-				(*ModeIdIndex)++;	/* 400 lines */
-			/* else 350 lines */
-		}
-		if (ModeNo <= 3) {
-			if ((*VGA_INFO & 0x80) == 0) {
-				(*ModeIdIndex)++;
-				if ((*VGA_INFO & 0x10) != 0)
-					(*ModeIdIndex)++;;	/* 400 lines  */
-				/* else 350 lines  */
-			}
-			/* else 200 lines  */
-		}
-	} else {
-		/* for (*ModeIdIndex=0;*ModeIdIndex<sizeof(SiS_EModeIDTable)/sizeof(SiS_ExtStruct);(*ModeIdIndex)++) */
-		for (*ModeIdIndex = 0;; (*ModeIdIndex)++) {
-			if (SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == ModeNo)
-				break;
-			if (SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF)
-				return FALSE;
-		}
-	}
-	return TRUE;
+   ModeNo = SiS_CalcModeIndex(pScrn, mode);
+   if (!ModeNo) return FALSE;
+
+   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x\n", ModeNo);
+
+   return(SiSSetMode(HwDeviceExtension, pScrn, ModeNo));
 }
 
-/*add for 300 oem util for search VBModeID*/
+#ifdef SISDUALHEAD
+/* TW: Set CRT1 mode (used for dual head) */
 BOOLEAN
-SiS_SearchVBModeID (ULONG ROMAddr, USHORT ModeNo)
+SiSBIOSSetModeCRT1(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+               DisplayModePtr mode)
 {
-	USHORT ModeIdIndex;
+   ULONG   temp;
+   USHORT  ModeIdIndex;
+#ifndef LINUX_XF86
+   USHORT  KeepLockReg;
+#endif
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+   SISPtr  pSiS = SISPTR(pScrn);
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
 
-	// PUCHAR VGA_INFO;
+   UShort  ModeNo=0;
 
-	if (ModeNo <= 5)
-		ModeNo |= 1;
-	/* for (ModeIdIndex=0;ModeIdIndex<sizeof(SiS_SModeIDTable)/sizeof(SiS_StStruct);(*ModeIdIndex)++) */
-	for (ModeIdIndex = 0;; (ModeIdIndex)++) {
-		if (SiS_VBModeIDTable[ModeIdIndex].ModeID == ModeNo)
-			break;
-		if (SiS_VBModeIDTable[ModeIdIndex].ModeID == 0xFF)
-			return FALSE;
-	}
-#ifdef TC
-	VGA_INFO = (PUCHAR) MK_FP (0, 0x489);
-	if (ModeNo == 0x07) {
-		if ((*VGA_INFO & 0x10) != 0)
-			(ModeIdIndex)++;	/* 400 lines */
-		/* else 350 lines */
-	}
-	if (ModeNo <= 3) {
-		if ((*VGA_INFO & 0x80) == 0) {
-			(ModeIdIndex)++;
-			if ((*VGA_INFO & 0x10) != 0)
-				(ModeIdIndex)++;;	/* 400 lines  */
-			/* else 350 lines  */
-		}
-		/* else 200 lines  */
-	}
-#endif
-	return ((BOOLEAN) ModeIdIndex);
-}
+   ModeNo = SiS_CalcModeIndex(pScrn, mode);
+   if (!ModeNo) return FALSE;
 
-/*end*/
+   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x on CRT1\n", ModeNo);
 
-/* win2000 MM adapter not support standard mode!  */
+   SiSInitPtr(HwDeviceExtension);
 
-BOOLEAN
-SiS_CheckMemorySize (ULONG ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		     USHORT ModeNo, USHORT ModeIdIndex)
-{
-	USHORT memorysize;
-	USHORT modeflag;
-	USHORT temp;
+   SiSRegInit(BaseAddr);
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-	}
+   SiSInitPCIetc(HwDeviceExtension);
 
-/*  ModeType=modeflag&ModeInfoFlag;                           Get mode type  */
-
-	memorysize = modeflag & MemoryInfoFlag;
-	memorysize = memorysize > MemorySizeShift;
-	memorysize++;		/* Get memory size */
-
-	temp = SiS_GetReg1 (SiS_P3c4, 0x14);	/* Get DRAM Size    */
-	if ((HwDeviceExtension->jChipType == SIS_315H) ||
-	    (HwDeviceExtension->jChipType == SIS_315PRO)) {
-		temp = 1 << ((temp & 0x0F0) >> 4);
-		if ((temp & 0x0c) == 0x08) {	/* DDR asymetric */
-			temp += temp / 2;
-		} else {
-			if ((temp & 0x0c) != 0) {
-				temp <<= 1;
-			}
-		}
-	} else {		/* 300, 540 , 630 */
+   SiSSetLVDSetc(HwDeviceExtension, ModeNo);
 
-		temp = temp & 0x3F;
-		temp++;
-		/*  temp=1 << ((temp&0x0F0)>>4); */
-	}
+   /* TW: We don't clear the buffer under X */
+   flag_clearbuffer=0;
 
-	if ((HwDeviceExtension->jChipType == SIS_550) ||	/* 05/02/01 ynlai for sis550 */
-	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-	    (HwDeviceExtension->jChipType == SIS_740)) {	/* 09/03/01 chiawen for 650 */
-		return (TRUE);
-	}
+   SiS_SetReg1(SiS_P3c4,0x05,0x86);                             		/* 1.Openkey */
 
-	if (temp < memorysize)
-		return (FALSE);
-	else
-		return (TRUE);
-}
+   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
 
-UCHAR
-SiS_GetModePtr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
-{
-	UCHAR index;
+   temp = SiS_SearchModeID(ROMAddr,&ModeNo,&ModeIdIndex);        		/* 2.Get ModeID Table  */
+   if(temp==0)  return(0);
 
-	if (ModeNo <= 0x13) {
-		index = SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
-	} else {
-		if (SiS_ModeType <= 0x02)
-			index = 0x1B;	/* 02 -> ModeEGA  */
-		else
-			index = 0x0F;
-	}
+   /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
+   SiS_GetVBType(BaseAddr,HwDeviceExtension);
+
+   /* TW: Get VB information (connectors, connected devices) */
+   SiS_GetVBInfo301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+   SiS_SetHiVision(BaseAddr,HwDeviceExtension);
+   SiS_GetLCDResInfo301(ROMAddr,SiS_P3d4,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   /* TW: I am not sure the flag's name is correct */
+   if((SiS_IF_DEF_LVDS == 1) && (HwDeviceExtension->jChipType >= SIS_315H)) {
+      if(SiS_GetReg1(SiS_P3c4,0x17) & 0x08)  SiS_SetFlag |= CRT2IsVGA;
+   }
+
+   /* TW: Set mode on CRT1 */
+   SiS_SetCRT1Group(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+
+   pSiSEnt->CRT1ModeNo = ModeNo;
+   pSiSEnt->CRT1DMode = mode;
+
+   /* TW: SetPitch: Adapt to virtual size & position */
+   SiS_SetPitchCRT1(pScrn, BaseAddr);
 
-	return index;		/* Get SiS_StandTable index  */
+   /* We have to reset CRT2 if changing mode on CRT1 */
+   if (pSiSEnt->CRT2ModeNo != -1) {
+        xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "(Re-)Setting mode 0x%x on CRT2\n",
+				pSiSEnt->CRT2ModeNo);
+	SiSBIOSSetModeCRT2(HwDeviceExtension, pSiSEnt->pScrn_1,
+				pSiSEnt->CRT2DMode);
+   }
+
+   if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 0)) {
+      SiS_SetRegAND(SiS_P3d4,0x63,0xbf);
+      temp = SiS_GetReg1(SiS_P3c4,0x15);
+      if(!(temp & 0x01)) {
+          if(!(temp & 0xa0)) {
+	     if(SiS_GetReg1(SiS_P3c4,0x16) & 0x01) {
+	        SiS_SetRegOR(SiS_P3d4,0x64,0x40);
+	     }
+	  } else {
+	     SiS_SetRegOR(SiS_P3d4,0x64,0x40);
+	  }
+      }
+   }
+
+   /* Backup/Set ModeNo in MMIO */
+   SiS_GetSetModeID(pScrn,ModeNo);
+
+   return TRUE;
 }
 
-void
-SiS_SetSeqRegs (ULONG ROMAddr, USHORT StandTableIndex)
+/* TW: Set CRT2 mode (used for dual head) */
+BOOLEAN
+SiSBIOSSetModeCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension, ScrnInfoPtr pScrn,
+               DisplayModePtr mode)
 {
-	UCHAR SRdata;
-	USHORT i;
+   ULONG   temp;
+   USHORT  ModeIdIndex;
+#ifndef LINUX_XF86
+   USHORT  KeepLockReg;
+#endif
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+   UShort  ModeNo=0;
+   SISPtr  pSiS = SISPTR(pScrn);
+   SISEntPtr pSiSEnt = pSiS->entityPrivate;
+
+   ModeNo = SiS_CalcModeIndex(pScrn, mode);
+   if (!ModeNo) return FALSE;
+
+   SiSInitPtr(HwDeviceExtension);
+
+   SiSRegInit(BaseAddr);
+
+   SiSInitPCIetc(HwDeviceExtension);
+
+   SiSSetLVDSetc(HwDeviceExtension, ModeNo);
+
+   /* TW: We don't clear the buffer under X */
+   flag_clearbuffer=0;
+
+   /* TW: Save ModeNo so we can set it from within SetMode for CRT1 */
+   pSiSEnt->CRT2ModeNo = ModeNo;
+   pSiSEnt->CRT2DMode = mode;
+
+   /* TW: We can't set CRT2 mode before CRT1 mode is set */
+   if (pSiSEnt->CRT1ModeNo == -1) {
+   	xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+		"Setting CRT2 mode delayed until after setting CRT1 mode\n");
+   	return TRUE;
+   }
+
+   xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Setting mode 0x%x on CRT2\n", ModeNo);
+
+   /* 1.Openkey */
+   SiS_SetReg1(SiS_P3c4,0x05,0x86);
+
+   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+
+   /* 2.Get ModeID */
+   temp = SiS_SearchModeID(ROMAddr,&ModeNo,&ModeIdIndex);
+   if(temp==0)  return(0);
+
+   /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
+   SiS_GetVBType(BaseAddr,HwDeviceExtension);
+
+   /* TW: Get VB information (connectors, connected devices) */
+   SiS_GetVBInfo301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+   SiS_SetHiVision(BaseAddr,HwDeviceExtension);
+   SiS_GetLCDResInfo301(ROMAddr,SiS_P3d4,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   /* TW: I am not sure the flag's name is correct */
+   if((SiS_IF_DEF_LVDS == 1) && (HwDeviceExtension->jChipType >= SIS_315H)) {
+      if(SiS_GetReg1(SiS_P3c4,0x17) & 0x08)  SiS_SetFlag |= CRT2IsVGA;
+   }
+
+   /* Set mode on CRT2 */
+   switch (HwDeviceExtension->ujVBChipID) {
+     case VB_CHIP_301:
+     case VB_CHIP_301B:
+     case VB_CHIP_301LV:
+     case VB_CHIP_302:
+     case VB_CHIP_302B:
+     case VB_CHIP_302LV:
+        SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+        break;
+     case VB_CHIP_303:
+        break;
+     case VB_CHIP_UNKNOWN:
+        if (SiS_IF_DEF_LVDS == 1 || SiS_IF_DEF_CH70xx == 1 || SiS_IF_DEF_TRUMPION != 0)
+             	SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+        break;
+   }
+
+   if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 0)) {
+      SiS_SetRegAND(SiS_P3d4,0x63,0xbf);
+      temp = SiS_GetReg1(SiS_P3c4,0x15);
+      if(!(temp & 0x01)) {
+          if(!(temp & 0xa0)) {
+	     if(SiS_GetReg1(SiS_P3c4,0x16) & 0x01) {
+	        SiS_SetRegOR(SiS_P3d4,0x64,0x40);
+	     }
+	  } else {
+	     SiS_SetRegOR(SiS_P3d4,0x64,0x40);
+	  }
+      }
+   }
+
+   /* TW: SetPitch: Adapt to virtual size & position */
+   SiS_SetPitchCRT2(pScrn, BaseAddr);
+
+   /* Backup/Set ModeNo in MMIO - don't do this for CRT2 */
+   /* SiS_GetSetModeID(pScrn,ModeNo); */
+
+   return TRUE;
+}
+#endif /* Dualhead */
+#endif /* Linux_XF86 */
 
-	SiS_SetReg1 (SiS_P3c4, 0x00, 0x03);	/* Set SR0  */
-	SRdata = SiS_StandTable[StandTableIndex].SR[0];
-	/*301b */
-	if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-		if (SiS_VBInfo & SetCRT2ToLCDA) {
-			SRdata = SRdata | 0x01;
-		}
-	}
+#ifdef LINUX_XF86
+/* TW: We need pScrn for setting the pitch correctly */
+BOOLEAN
+SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,ScrnInfoPtr pScrn,USHORT ModeNo)
+#else
+BOOLEAN
+SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+#endif
+{
+   ULONG   temp;
+   USHORT  ModeIdIndex,KeepLockReg;
+   UCHAR  *ROMAddr  = HwDeviceExtension->pjVirtualRomBase;
+   USHORT  BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
 
-	/*end 301b */
+   SiSInitPtr(HwDeviceExtension);
 
-	if (SiS_IF_DEF_LVDS == 1) {
-		if (SiS_IF_DEF_CH7005 == 1) {
-			if (SiS_VBInfo & SetCRT2ToTV) {
-				if (SiS_VBInfo & SetInSlaveMode) {
-					SRdata = SRdata | 0x01;	/* 8 dot clock  */
-				}
-			}
-		}
-		if (SiS_VBInfo & SetCRT2ToLCD) {
-			if (SiS_VBInfo & SetInSlaveMode) {
-				SRdata = SRdata | 0x01;	/* 8 dot clock  */
-			}
-		}
-	}
+   SiSRegInit(BaseAddr);
 
-	SRdata = SRdata | 0x20;	/* screen off  */
-	SiS_SetReg1 (SiS_P3c4, 0x01, SRdata);	/* Set SR1 */
-	for (i = 02; i <= 04; i++) {
-		SRdata = SiS_StandTable[StandTableIndex].SR[i - 1];	/* Get SR2,3,4 from file */
-		SiS_SetReg1 (SiS_P3c4, i, SRdata);	/* Set SR2 3 4 */
-	}
+   SiSInitPCIetc(HwDeviceExtension);
+
+   SiSSetLVDSetc(HwDeviceExtension, ModeNo);
+
+#ifdef LINUX_XF86
+   /* TW: We don't clear the buffer in X */
+   ModeNo |= 0x8000;
+#endif
+
+   if(ModeNo & 0x8000) {
+     	ModeNo &= 0x007F;
+     	flag_clearbuffer=0;
+   } else {
+     	flag_clearbuffer=1;
+   }
+
+   /* 1.Openkey */
+   KeepLockReg = SiS_GetReg1(SiS_P3c4,0x05);
+   SiS_SetReg1(SiS_P3c4,0x05,0x86);
+
+   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+
+   /* 2.Get ModeID Table  */
+   temp = SiS_SearchModeID(ROMAddr,&ModeNo,&ModeIdIndex);
+   if(temp==0) return(0);
+
+   /* TW: Determine VBType (301,301B,301LV,302B,302LV) */
+   SiS_GetVBType(BaseAddr,HwDeviceExtension);
+
+   /* TW: Get VB information (connectors, connected devices) */
+   SiS_GetVBInfo301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+   SiS_SetHiVision(BaseAddr,HwDeviceExtension);
+   SiS_GetLCDResInfo301(ROMAddr,SiS_P3d4,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   /* TW: I am not sure the flag's name is correct */
+   if((SiS_IF_DEF_LVDS == 1) && (HwDeviceExtension->jChipType >= SIS_315H)) {
+      if(SiS_GetReg1(SiS_P3c4,0x17) & 0x08)  SiS_SetFlag |= CRT2IsVGA;
+   }
+
+   /* 3.Check memory size */
+   temp = SiS_CheckMemorySize(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex);
+   if(!temp) return(0);
+
+   /* TW: Set mode on CRT1 */
+   if(SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) {
+   	SiS_SetCRT1Group(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+   } else {
+     if(!(SiS_VBInfo & SwitchToCRT2)) {
+       	SiS_SetCRT1Group(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,BaseAddr);
+     }
+   }
+
+   /* TW: Set mode on CRT2 */
+   if(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA)) {
+     switch (HwDeviceExtension->ujVBChipID) {
+     case VB_CHIP_301:
+     case VB_CHIP_301B:
+     case VB_CHIP_301LV:
+     case VB_CHIP_302:
+     case VB_CHIP_302B:
+     case VB_CHIP_302LV:
+        SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+        break;
+     case VB_CHIP_303:
+        break;
+     case VB_CHIP_UNKNOWN:
+	if (SiS_IF_DEF_LVDS == 1 || SiS_IF_DEF_CH70xx != 0 || SiS_IF_DEF_TRUMPION != 0)
+             	SiS_SetCRT2Group301(BaseAddr,ROMAddr,ModeNo,HwDeviceExtension);
+        break;
+     }
+   }
+
+   /* TW: Inserted from 650/301LV BIOS */
+   if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 0)) {
+      SiS_SetRegAND(SiS_P3d4,0x63,0xbf);
+      temp = SiS_GetReg1(SiS_P3c4,0x15);
+      if(!(temp & 0x01)) {
+          if(!(temp & 0xa0)) {
+	     if(SiS_GetReg1(SiS_P3c4,0x16) & 0x01) {
+	        SiS_SetRegOR(SiS_P3d4,0x64,0x40);
+	     }
+	  } else {
+	     SiS_SetRegOR(SiS_P3d4,0x64,0x40);
+	  }
+      }
+   }
+
+#ifdef LINUX_XF86
+   /* TW: SetPitch: Adapt to virtual size & position */
+   if(pScrn)
+      SiS_SetPitch(pScrn, BaseAddr);
+
+   /* Backup/Set ModeNo in MMIO */
+   SiS_GetSetModeID(pScrn,ModeNo);
+#endif
+
+#ifndef LINUX_XF86  /* TW: We never lock registers in XF86 */
+   if(KeepLockReg==0xA1) SiS_SetReg1(SiS_P3c4,0x05,0x86);
+   else SiS_SetReg1(SiS_P3c4,0x05,0x00);
+#endif
+
+   return TRUE;
 }
 
 void
-SiS_SetMiscRegs (ULONG ROMAddr, USHORT StandTableIndex)
+SetEnableDstn()		/* TW: Called from sis_main.c */
 {
-	UCHAR Miscdata;
-
-	Miscdata = SiS_StandTable[StandTableIndex].MISC;	/* Get Misc from file */
-	/*301b */
-	if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-		if (SiS_VBInfo & SetCRT2ToLCDA) {
-			Miscdata = Miscdata | 0x0C;
-		}
-	}
-	/*end 301b */
-	SiS_SetReg3 (SiS_P3c2, Miscdata);	/* Set Misc(3c2) */
+   SiS_IF_DEF_DSTN=1;   /* for 550 dstn */
 }
 
 void
-SiS_SetCRTCRegs (ULONG ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		 USHORT StandTableIndex)
+SiS_SetCRT1Group(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                 USHORT ModeNo,USHORT ModeIdIndex,USHORT BaseAddr)
 {
-	UCHAR CRTCdata;
-	USHORT i;
+  USHORT  StandTableIndex,RefreshRateTableIndex;
+
+  SiS_CRT1Mode = ModeNo;
+  StandTableIndex = SiS_GetModePtr(ROMAddr,ModeNo,ModeIdIndex);
+  if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+    if(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2)) {
+      SiS_DisableBridge(HwDeviceExtension,BaseAddr);
+    }
+  }
+
+  SiS_SetSeqRegs(ROMAddr,StandTableIndex);
+  SiS_SetMiscRegs(ROMAddr,StandTableIndex);
+  SiS_SetCRTCRegs(ROMAddr,HwDeviceExtension,StandTableIndex);
+  SiS_SetATTRegs(ROMAddr,StandTableIndex,ModeNo,HwDeviceExtension);
+  SiS_SetGRCRegs(ROMAddr,StandTableIndex);
+  SiS_ClearExt1Regs(HwDeviceExtension);
+  SiS_ResetCRT1VCLK(ROMAddr,HwDeviceExtension);
+  SiS_SelectCRT2Rate=0;
+  SiS_SetFlag &= (~ProgrammingCRT2);
+
+#ifdef LINUX_XF86
+  xf86DrvMsg(0, X_INFO, "(init: VBType = %x, LVDS=%d, VBInfo=%x)\n",
+                    SiS_VBType, SiS_IF_DEF_LVDS, SiS_VBInfo);
+#endif
 
-	CRTCdata = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x11);
-	CRTCdata = CRTCdata & 0x7f;
-	SiS_SetReg1 (SiS_P3d4, 0x11, CRTCdata);	/* Unlock CRTC */
+  /* TW: Inserted this entire if-section from 650/LVDS and 650/301 BIOS */
+  if(SiS_VBInfo & SetSimuScanMode) {
+     if(SiS_VBInfo & SetInSlaveMode) {
+        SiS_SetFlag |= ProgrammingCRT2;
+     }
+  }
+  /* TW: Removed 301B301LV302B302LV check here */
+  if(SiS_VBInfo & SetCRT2ToLCDA) {
+	 SiS_SetFlag |= ProgrammingCRT2;
+  }
+
+  RefreshRateTableIndex = SiS_GetRatePtrCRT2(ROMAddr,ModeNo,ModeIdIndex);
+
+  /* TW: Removed 301B301LV302B302LV check here */
+  if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
+	 SiS_SetFlag &= (~ProgrammingCRT2);
+  }
+
+  if (RefreshRateTableIndex != 0xFFFF) {
+    SiS_SetSync(ROMAddr,RefreshRateTableIndex);
+    SiS_SetCRT1CRTC(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+    SiS_SetCRT1Offset(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+    SiS_SetCRT1VCLK(ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension,RefreshRateTableIndex);
+  }
+
+#ifdef SIS300
+  if((HwDeviceExtension->jChipType == SIS_630)||
+     (HwDeviceExtension->jChipType == SIS_730)||
+     (HwDeviceExtension->jChipType == SIS_540)) {
+     	SiS_SetCRT1FIFO_300(ROMAddr,ModeNo,HwDeviceExtension,RefreshRateTableIndex);
+  }
+#endif
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     	SiS_SetCRT1FIFO_310(ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+  }
+#endif
 
-	for (i = 0; i <= 0x18; i++) {
-		CRTCdata = SiS_StandTable[StandTableIndex].CRTC[i];	/* Get CRTC from file */
-		SiS_SetReg1 (SiS_P3d4, i, CRTCdata);	/* Set CRTC(3d4) */
-	}
-	if ((HwDeviceExtension->jChipType == SIS_630) &&
-	    (HwDeviceExtension->jChipRevision == 0x30)) {	/* for 630S0 */
-		if (SiS_VBInfo & SetInSlaveMode) {
-			if (SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
-				SiS_SetReg1 (SiS_P3d4, 0x18, 0xFE);
-			}
-		}
-	}
-}
+  SiS_SetCRT1ModeRegs(ROMAddr,HwDeviceExtension,ModeNo,ModeIdIndex,RefreshRateTableIndex);
 
-void
-SiS_SetATTRegs (ULONG ROMAddr, USHORT StandTableIndex)
-{
-	UCHAR ARdata;
-	USHORT i;
-
-	for (i = 0; i <= 0x13; i++) {
-		ARdata = SiS_StandTable[StandTableIndex].ATTR[i];	/* Get AR for file  */
-		/*301b */
-		if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-			if (SiS_VBInfo & SetCRT2ToLCDA) {
-				if (i == 0x13) {
-					ARdata = 0;
-				}
-			}
-		}
-		/*end 301b */
-		if (SiS_IF_DEF_LVDS == 1) {	/*for LVDS  */
-			if (SiS_IF_DEF_CH7005 == 1) {
-				if (SiS_VBInfo & SetCRT2ToTV) {
-					if (SiS_VBInfo & SetInSlaveMode) {
-						if (i == 0x13) {
-							ARdata = 0;
-						}
-					}
-				}
-			}
-			if (SiS_VBInfo & SetCRT2ToLCD) {
-				if (SiS_VBInfo & SetInSlaveMode) {
-					if (SiS_LCDInfo & LCDNonExpanding) {
-						if (i == 0x13) {
-							ARdata = 0;
-						}
-					}
-				}
-			}
-		}
-		SiS_GetReg2 (SiS_P3da);	/* reset 3da  */
-		SiS_SetReg3 (SiS_P3c0, i);	/* set index  */
-		SiS_SetReg3 (SiS_P3c0, ARdata);	/* set data   */
-	}
-	SiS_GetReg2 (SiS_P3da);	/* reset 3da  */
-	SiS_SetReg3 (SiS_P3c0, 0x14);	/* set index  */
-	SiS_SetReg3 (SiS_P3c0, 0x00);	/* set data   */
+#if 0  /* TW: Not done in any BIOS */
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+    if (RefreshRateTableIndex != 0xFFFF) {
+      	SiS_SetInterlace(ROMAddr,ModeNo,RefreshRateTableIndex);
+    }
+#endif
+  }
+#endif
+
+  SiS_LoadDAC(ROMAddr,ModeNo,ModeIdIndex);
+
+  if(flag_clearbuffer) SiS_ClearBuffer(HwDeviceExtension,ModeNo);
 
-	SiS_GetReg2 (SiS_P3da);	/* Enable Attribute  */
-	SiS_SetReg3 (SiS_P3c0, 0x20);
+  if(!(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2 | SetCRT2ToLCDA))) {
+    SiS_LongWait();
+    SiS_DisplayOn();
+  }
 }
 
+#ifdef LINUX_XF86
 void
-SiS_SetGRCRegs (ULONG ROMAddr, USHORT StandTableIndex)
+SiS_SetPitch(ScrnInfoPtr pScrn, UShort BaseAddr)
 {
-	UCHAR GRdata;
-	USHORT i;
-
-	for (i = 0; i <= 0x08; i++) {
-		GRdata = SiS_StandTable[StandTableIndex].GRC[i];	/* Get GR from file */
-		SiS_SetReg1 (SiS_P3ce, i, GRdata);	/* Set GR(3ce) */
-	}
-
-	if (SiS_ModeType > ModeVGA) {
-		GRdata = (UCHAR) SiS_GetReg1 (SiS_P3ce, 0x05);
-		GRdata = GRdata & 0xBF;	/* 256 color disable */
-		SiS_SetReg1 (SiS_P3ce, 0x05, GRdata);
-	}
+   SISPtr pSiS = SISPTR(pScrn);
+
+   /* TW: We need to set pitch for CRT1 if bridge is in SlaveMode, too */
+   if( (pSiS->VBFlags & DISPTYPE_DISP1) ||
+       ( (pSiS->VBFlags & VB_VIDEOBRIDGE) &&
+         ( ((pSiS->VGAEngine == SIS_300_VGA) && (SiS_GetReg1(SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
+           ((pSiS->VGAEngine == SIS_315_VGA) && (SiS_GetReg1(SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) ) {
+   	SiS_SetPitchCRT1(pScrn, BaseAddr);
+   }
+   if (pSiS->VBFlags & DISPTYPE_DISP2) {
+   	SiS_SetPitchCRT2(pScrn, BaseAddr);
+   }
 }
 
 void
-SiS_ClearExt1Regs ()
+SiS_SetPitchCRT1(ScrnInfoPtr pScrn, UShort BaseAddr)
 {
-	USHORT i;
+    SISPtr pSiS = SISPTR(pScrn);
+    ULong  HDisplay,temp;
 
-	for (i = 0x0A; i <= 0x0E; i++)
-		SiS_SetReg1 (SiS_P3c4, i, 0x00);	/* Clear SR0A-SR0E */
+    HDisplay = pSiS->scrnPitch / 8;
+    SiS_SetReg1(SiS_P3d4, 0x13, (HDisplay & 0xFF));
+    temp = (SiS_GetReg1(SiS_P3c4, 0x0E) & 0xF0) | (HDisplay>>8);
+    SiS_SetReg1(SiS_P3c4, 0x0E, temp);
 }
 
 void
-SiS_SetSync (ULONG ROMAddr, USHORT RefreshRateTableIndex)
+SiS_SetPitchCRT2(ScrnInfoPtr pScrn, UShort BaseAddr)
 {
-	USHORT sync;
-	USHORT temp;
+    SISPtr pSiS = SISPTR(pScrn);
+    ULong  HDisplay,temp;
+
+    HDisplay = pSiS->scrnPitch / 8;
 
-	sync = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;	/* di+0x00 */
+    /* Unlock CRT2 */
+    if (pSiS->VGAEngine == SIS_315_VGA)
+        SiS_SetRegANDOR(SiS_Part1Port,0x2F, 0xFF, 0x01);
+    else
+        SiS_SetRegANDOR(SiS_Part1Port,0x24, 0xFF, 0x01);
 
-	sync = sync & 0xC0;
-	temp = 0x2F;
-	temp = temp | sync;
-	SiS_SetReg3 (SiS_P3c2, temp);	/* Set Misc(3c2) */
+    SiS_SetReg1(SiS_Part1Port,0x07, (HDisplay & 0xFF));
+    temp = (SiS_GetReg1(SiS_Part1Port,0x09) & 0xF0) | ((HDisplay >> 8) & 0xFF);
+    SiS_SetReg1(SiS_Part1Port,0x09, temp);
 }
+#endif
 
+/* TW: Checked against 650/301 and 630/301B BIOS */
 void
-SiS_SetCRT1CRTC (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		 USHORT RefreshRateTableIndex)
-{
-	UCHAR index;
-	UCHAR data;
-	USHORT temp, tempah, i, modeflag, j;
-	USHORT ResInfo, DisplayType;
-	SiS_LCDACRT1DataStruct *LCDACRT1Ptr = NULL;
-	if ((SiS_VBType & VB_SIS302B) && (SiS_VBInfo & SetCRT2ToLCDA)) {
-		/*add crt1ptr */
-		if (ModeNo <= 0x13) {
-			modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-		} else {
-			modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-		}
-		temp =
-		    SiS_GetLCDACRT1Ptr (ROMAddr, ModeNo, ModeIdIndex,
-					RefreshRateTableIndex, &ResInfo,
-					&DisplayType);
-
-		switch (DisplayType) {
-		case 0:
-			LCDACRT1Ptr = SiS_LCDACRT1800x600_1;
-			break;
-		case 1:
-			LCDACRT1Ptr = SiS_LCDACRT11024x768_1;
-			break;
-		case 2:
-			LCDACRT1Ptr = SiS_LCDACRT11280x1024_1;
-			break;
-		case 3:
-			LCDACRT1Ptr = SiS_LCDACRT1800x600_1_H;
-			break;
-		case 4:
-			LCDACRT1Ptr = SiS_LCDACRT11024x768_1_H;
-			break;
-		case 5:
-			LCDACRT1Ptr = SiS_LCDACRT11280x1024_1_H;
-			break;
-		case 6:
-			LCDACRT1Ptr = SiS_LCDACRT1800x600_2;
-			break;
-		case 7:
-			LCDACRT1Ptr = SiS_LCDACRT11024x768_2;
-			break;
-		case 8:
-			LCDACRT1Ptr = SiS_LCDACRT11280x1024_2;
-			break;
-		case 9:
-			LCDACRT1Ptr = SiS_LCDACRT1800x600_2_H;
-			break;
-		case 10:
-			LCDACRT1Ptr = SiS_LCDACRT11024x768_2_H;
-			break;
-		case 11:
-			LCDACRT1Ptr = SiS_LCDACRT11280x1024_2_H;
-			break;
-			/*case 12: LCDACRT1Ptr = SiS_CHTVCRT1UNTSC;               break;
-			   case 13: LCDACRT1Ptr = SiS_CHTVCRT1ONTSC;               break;
-			   case 14: LCDACRT1Ptr = SiS_CHTVCRT1UPAL;                break;
-			   case 15: LCDACRT1Ptr = SiS_CHTVCRT1OPAL;                break; */
-		}
+SiS_GetVBType(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT flag;
+
+  SiS_VBType = 0;
+  
+  if(SiS_IF_DEF_LVDS == 1) return;
+
+  flag = SiS_GetReg1(SiS_Part4Port,0x00);
+
+  /* TW: Illegal values not welcome... */
+  if(flag > 10) return;
+
+  if (flag >= 2) {
+  	flag=SiS_GetReg1(SiS_Part4Port,0x01);
+        if(flag >= 0xB0){
+            	SiS_VBType = VB_SIS302B;
+            	if(flag >= 0xD0)
+               		SiS_VBType = VB_SIS302LV;
+        }
+  } else if (flag == 1) {
+        flag=SiS_GetReg1(SiS_Part4Port,0x01);
+        if(flag >= 0xB0){
+            	SiS_VBType = VB_SIS301B;
+            	if(flag >= 0xD0)
+               		SiS_VBType = VB_SIS301LV;
+        } else
+            SiS_VBType = VB_SIS301;
+  }
+  /* TW: This is checked in 630 BIOS, but not used */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+    if(SiS_VBType & VB_SIS301BLV302BLV) {
+      flag = SiS_GetReg1(SiS_Part4Port,0x23);
+      if(!(flag & 0x02))
+       	SiS_VBType |= VB_NoLCD;
+    }
+  }
+}
 
-		tempah = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x11);	/*unlock cr0-7  */
-		tempah = tempah & 0x7F;
-		SiS_SetReg1 (SiS_P3d4, 0x11, tempah);
-		tempah = (LCDACRT1Ptr + ResInfo)->CR[0];
-		SiS_SetReg1 (SiS_P3d4, 0x0, tempah);
-		for (i = 0x01, j = 1; i <= 0x07; i++, j++) {
-			tempah = (LCDACRT1Ptr + ResInfo)->CR[j];
-			SiS_SetReg1 (SiS_P3d4, i, tempah);
-		}
-/* for(i=0x06,j=5;i<=0x07;i++,j++){
-   tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
-    SiS_SetReg1(SiS_P3d4,i,tempah);
-  }*/
-		for (i = 0x10, j = 8; i <= 0x12; i++, j++) {
-			tempah = (LCDACRT1Ptr + ResInfo)->CR[j];
-			SiS_SetReg1 (SiS_P3d4, i, tempah);
-		}
-		for (i = 0x15, j = 11; i <= 0x16; i++, j++) {
-			tempah = (LCDACRT1Ptr + ResInfo)->CR[j];
-			SiS_SetReg1 (SiS_P3d4, i, tempah);
-		}
+BOOLEAN
+SiS_SearchModeID(UCHAR *ROMAddr,USHORT *ModeNo,USHORT *ModeIdIndex)
+{
+   UCHAR VGAINFO = 0x11;  /* TW: Replaces ds:449 */
 
-		for (i = 0x0A, j = 13; i <= 0x0C; i++, j++) {
-			tempah = (LCDACRT1Ptr + ResInfo)->CR[j];
-			SiS_SetReg1 (SiS_P3c4, i, tempah);
-		}
+   if(*ModeNo <= 0x13) {
 
-		tempah = (LCDACRT1Ptr + ResInfo)->CR[16];
-		tempah = tempah & 0x0E0;
-		SiS_SetReg1 (SiS_P3c4, 0x0E, tempah);
+      if((*ModeNo) <= 5) (*ModeNo) |= 1;
 
-		tempah = (LCDACRT1Ptr + ResInfo)->CR[16];
-		tempah = tempah & 0x01;
-		tempah = tempah << 5;
-		if (modeflag & DoubleScanMode) {
-			tempah = tempah | 0x080;
-		}
-		SiS_SetRegANDOR (SiS_P3d4, 0x09, ~0x020, tempah);
-		if (SiS_ModeType > 0x03)
-			SiS_SetReg1 (SiS_P3d4, 0x14, 0x4F);
-/*end 301b*/
-	} else {
-		index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;	/* Get index */
-		index = index & 0x3F;
+      for (*ModeIdIndex=0;;(*ModeIdIndex)++) {
+         if (SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break;
+         if (SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF)   return FALSE;
+      }
 
-		data = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x11);
-		data = data & 0x7F;
-		SiS_SetReg1 (SiS_P3d4, 0x11, data);	/* Unlock CRTC */
+      if(*ModeNo == 0x07) {
+          if(VGAINFO & 0x10) (*ModeIdIndex)++;   /* 400 lines */
+          /* else 350 lines */
+      }
+      if(*ModeNo <= 3) {
+         if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
+         if(VGAINFO & 0x10)    (*ModeIdIndex)++; /* 400 lines  */
+         /* else 350 lines  */
+      }
+      /* else 200 lines  */
 
-		for (i = 0, j = 0; i <= 07; i++, j++) {
-			data = SiS_CRT1Table[index].CR[i];
-			SiS_SetReg1 (SiS_P3d4, j, data);
-		}
-		for (j = 0x10; i <= 10; i++, j++) {
-			data = SiS_CRT1Table[index].CR[i];
-			SiS_SetReg1 (SiS_P3d4, j, data);
-		}
-		for (j = 0x15; i <= 12; i++, j++) {
-			data = SiS_CRT1Table[index].CR[i];
-			SiS_SetReg1 (SiS_P3d4, j, data);
-		}
-		for (j = 0x0A; i <= 15; i++, j++) {
-			data = SiS_CRT1Table[index].CR[i];
-			SiS_SetReg1 (SiS_P3c4, j, data);
-		}
+   } else {
 
-		data = SiS_CRT1Table[index].CR[16];
-		data = data & 0xE0;
-		SiS_SetReg1 (SiS_P3c4, 0x0E, data);
-
-		data = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x09);
-		data = data & 0xDF;	/* clear CR9 D[5] */
-		i = SiS_CRT1Table[index].CR[16];
-		i = i & 0x01;
-		i = i << 5;
-		data = data | i;
-
-		if (ModeNo <= 0x13)
-			i = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-		else
-			i = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-
-		i = i & DoubleScanMode;
-		if (i)
-			data = data | 0x80;
-		SiS_SetReg1 (SiS_P3d4, 0x09, data);
-
-		if (SiS_ModeType > 0x03)
-			SiS_SetReg1 (SiS_P3d4, 0x14, 0x4F);
-	}
+      for (*ModeIdIndex=0;;(*ModeIdIndex)++) {
+         if (SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break;
+         if (SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF)   return FALSE;
+      }
+
+   }
+   return TRUE;
+}
+
+/* For SiS 300 oem util: Search VBModeID */
+BOOLEAN
+SiS_SearchVBModeID(UCHAR *ROMAddr, USHORT *ModeNo)
+{
+   USHORT ModeIdIndex;
+   UCHAR VGAINFO = 0x11;  /* TW: Replaces ds:449 */
+
+   if(*ModeNo <= 5) *ModeNo |= 1;
+
+   for(ModeIdIndex=0; ; ModeIdIndex++) {
+       if (SiS_VBModeIDTable[ModeIdIndex].ModeID == *ModeNo) break;
+       if (SiS_VBModeIDTable[ModeIdIndex].ModeID == 0xFF)   return FALSE;
+   }
+
+   if(*ModeNo != 0x07) {
+        if(*ModeNo > 0x03) return ((BOOLEAN)ModeIdIndex);
+	if(VGAINFO & 0x80) return ((BOOLEAN)ModeIdIndex);
+	ModeIdIndex++;
+   }
+   if(VGAINFO & 0x10) ModeIdIndex++;   /* 400 lines */
+	                               /* else 350 lines */
+   return ((BOOLEAN)ModeIdIndex);
+}
+
+/* TW: Checked against 630/301B and 315 BIOS */
+BOOLEAN
+SiS_CheckMemorySize(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                    USHORT ModeNo,USHORT ModeIdIndex)
+{
+  USHORT memorysize,modeflag,temp;
+
+  if((HwDeviceExtension->jChipType == SIS_550)||
+     (HwDeviceExtension->jChipType == SIS_640)||
+     (HwDeviceExtension->jChipType == SIS_740)||
+     (HwDeviceExtension->jChipType == SIS_650))
+    return(TRUE);
+
+  if (ModeNo<=0x13) {
+    modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  } else {
+    modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  }
+
+  memorysize = modeflag & MemoryInfoFlag;
+  memorysize >>= MemorySizeShift;
+  memorysize++;                                        		/* Get memory size */
+
+  temp = SiS_GetReg1(SiS_P3c4,0x14);                            /* Get DRAM Size    */
+
+  if((HwDeviceExtension->jChipType == SIS_315H)||
+     (HwDeviceExtension->jChipType == SIS_315PRO)) {		/* 315 */
+    temp = 1 << ((temp & 0x0F0) >> 4);
+    if ((temp & 0x0c) == 0x08) {   /* DDR asymetric */
+      temp += (temp/2);
+    } else {
+      if ((temp & 0x0c) != 0) temp <<= 1;
+    }
+  } else { 							/* 300, 540, 630, 730 */
+    temp &= 0x3F;
+    temp++;
+  }
+
+  if(temp < memorysize) return(FALSE);
+  else return(TRUE);
+}
+
+UCHAR
+SiS_GetModePtr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+{
+   UCHAR index;
+
+   if(ModeNo<=0x13) {
+     	index = SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
+   } else {
+     	if(SiS_ModeType <= 0x02) index=0x1B;    /* 02 -> ModeEGA  */
+     	else index=0x0F;
+   }
+   return index;
 }
+
+/* TW: Checked against 650/LVDS (1.10.07, 1.10a) and 650/301LV BIOS */
 void
-SiS_SetCRT1Offset (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		   USHORT RefreshRateTableIndex,
-		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
-{
-	USHORT temp, ah, al;
-	USHORT temp2, i;
-	USHORT DisplayUnit;
-
-	/* Alan */
-	temp = SiS_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
-	if (HwDeviceExtension->jChipType >= SIS_315H) {
-		temp = temp >> 8;	/* sis310 *//* index */
-	} else {
-		temp = temp >> 4;	/* sis300 *//* index */
-	}
-	temp = SiS_ScreenOffset[temp];
-	if ((ModeNo >= 0x7C) && (ModeNo <= 0x7E)) {
-		temp = 0x6B;
-		temp2 = ModeNo - 0x7C;
-	} else {
-		temp2 = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
-		temp2 = temp2 & InterlaceMode;
-		if (temp2)
-			temp = temp << 1;
-		temp2 = SiS_ModeType - ModeEGA;
-	}
-	switch (temp2) {
-	case 0:
-		temp2 = 1;
-		break;
-	case 1:
-		temp2 = 2;
-		break;
-	case 2:
-		temp2 = 4;
-		break;
-	case 3:
-		temp2 = 4;
-		break;
-	case 4:
-		temp2 = 6;
-		break;
-	case 5:
-		temp2 = 8;
-		break;
-	}
-	temp = temp * temp2;
-	DisplayUnit = temp;
-
-	temp2 = temp;
-	temp = temp >> 8;	/* ah */
-	temp = temp & 0x0F;
-	i = SiS_GetReg1 (SiS_P3c4, 0x0E);
-	i = i & 0xF0;
-	i = i | temp;
-	SiS_SetReg1 (SiS_P3c4, 0x0E, i);
-
-	temp = (UCHAR) temp2;
-	temp = temp & 0xFF;	/* al */
-	SiS_SetReg1 (SiS_P3d4, 0x13, temp);
-
-	temp2 = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
-	temp2 = temp2 & InterlaceMode;
-	if (temp2)
-		DisplayUnit >>= 1;
-
-	DisplayUnit = DisplayUnit << 5;
-	ah = (DisplayUnit & 0xff00) >> 8;
-	al = DisplayUnit & 0x00ff;
-	if (al == 0)
-		ah = ah + 1;
-	else
-		ah = ah + 2;
-	SiS_SetReg1 (SiS_P3c4, 0x10, ah);
+SiS_SetSeqRegs(UCHAR *ROMAddr,USHORT StandTableIndex)
+{
+   UCHAR SRdata;
+   USHORT i;
+
+   SiS_SetReg1(SiS_P3c4,0x00,0x03);           		/* Set SR0  */
+
+   SRdata=SiS_StandTable[StandTableIndex].SR[0];
+
+   if(SiS_VBType & VB_SIS301BLV302BLV) {
+      	if(SiS_VBInfo & SetCRT2ToLCDA) {
+        	SRdata |= 0x01;
+        }
+   }
+   if(SiS_IF_DEF_LVDS == 1) {
+     if(SiS_IF_DEF_CH70xx != 0) {
+       if(SiS_VBInfo & SetCRT2ToTV) {
+         if(SiS_VBInfo & SetInSlaveMode) {
+           SRdata |= 0x01;        			/* 8 dot clock  */
+         }
+       }
+     }
+     if(SiS_VBInfo & SetCRT2ToLCD) {
+       if(SiS_VBInfo & SetInSlaveMode) {
+         /* TW: wdr/300: if(SiS_LCDInfo & LCDNonExpanding) { */
+         SRdata |= 0x01;          			/* 8 dot clock  */
+       }
+     }
+   }
+
+   SRdata |= 0x20;                			/* screen off  */
+
+   SiS_SetReg1(SiS_P3c4,0x01,SRdata);
+
+   for(i=02;i<=04;i++) {
+       	SRdata=SiS_StandTable[StandTableIndex].SR[i-1];
+     	SiS_SetReg1(SiS_P3c4,i,SRdata);
+   }
 }
 
+/* Checked against 650/301LV and 65/LVDS 1.10.07 BIOS */
 void
-SiS_SetCRT1VCLK (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		 PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		 USHORT RefreshRateTableIndex)
-{
-	UCHAR index, data;
-	USHORT vclkindex;
-	if (SiS_IF_DEF_LVDS == 1) {
-		vclkindex =
-		    SiS_GetVCLK2Ptr (ROMAddr, ModeNo, ModeIdIndex,
-				     RefreshRateTableIndex, HwDeviceExtension);
-		data = SiS_GetReg1 (SiS_P3c4, 0x31) & 0xCF;
-		SiS_SetReg1 (SiS_P3c4, 0x31, data);
-
-		data = SiS_VCLKData[vclkindex].SR2B;
-		SiS_SetReg1 (SiS_P3c4, 0x2B, data);
-		data = SiS_VCLKData[vclkindex].SR2C;
-		SiS_SetReg1 (SiS_P3c4, 0x2C, data);
-
-		if (HwDeviceExtension->jChipType < SIS_315H)
-			SiS_SetReg1 (SiS_P3c4, 0x2D, 0x80);
-		else
-			SiS_SetReg1 (SiS_P3c4, 0x2D, 0x01);
+SiS_SetMiscRegs(UCHAR *ROMAddr,USHORT StandTableIndex)
+{
+   UCHAR Miscdata;
 
-	}
-		else
-	    if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-		&& (SiS_VBInfo & SetCRT2ToLCDA) && (SiS_IF_DEF_LVDS == 0)) {
-		vclkindex =
-		    SiS_GetVCLK2Ptr (ROMAddr, ModeNo, ModeIdIndex,
-				     RefreshRateTableIndex, HwDeviceExtension);
-		data = SiS_GetReg1 (SiS_P3c4, 0x31) & 0xCF;
-		SiS_SetReg1 (SiS_P3c4, 0x31, data);
-
-		data = SiS_VBVCLKData[vclkindex].Part4_A;
-		SiS_SetReg1 (SiS_P3c4, 0x2B, data);
-		data = SiS_VBVCLKData[vclkindex].Part4_B;
-		SiS_SetReg1 (SiS_P3c4, 0x2C, data);
-
-		if (HwDeviceExtension->jChipType < SIS_315H)
-			SiS_SetReg1 (SiS_P3c4, 0x2D, 0x80);	/* for300 series */
-		else
-			SiS_SetReg1 (SiS_P3c4, 0x2D, 0x01);
+   Miscdata = SiS_StandTable[StandTableIndex].MISC;
 
-	} else {
-		index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
-		/*if(HwDeviceExtension->jChipType < SIS_315H) { */
-		index = index & 0x3F;
-		/*} */
-		data = SiS_GetReg1 (SiS_P3c4, 0x31) & 0xCF;
-/*SiS_SetReg1(SiS_P3c4,0x31,0x00); *//* for300 */
-		SiS_SetReg1 (SiS_P3c4, 0x31, data);
-		SiS_SetReg1 (SiS_P3c4, 0x2B, SiS_VCLKData[index].SR2B);
-		SiS_SetReg1 (SiS_P3c4, 0x2C, SiS_VCLKData[index].SR2C);
-		if (HwDeviceExtension->jChipType < SIS_315H)
-			SiS_SetReg1 (SiS_P3c4, 0x2D, 0x80);	/* for300 series */
-		else
-			SiS_SetReg1 (SiS_P3c4, 0x2D, 0x01);	/* for310 series */
-	}
+   if(SiS_VBType & VB_SIS301BLV302BLV) {
+      if(SiS_VBInfo & SetCRT2ToLCDA) {
+        Miscdata |= 0x0C;
+      }
+    }
+
+   SiS_SetReg3(SiS_P3c2,Miscdata);
 }
+
+/* Checked against 650/LVDS (1.10.07) and 650/301LV BIOS (630 code still there!) */
 void
-SiS_IsLowResolution (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
-{
-	USHORT data;
-	USHORT ModeFlag;
-
-	data = SiS_GetReg1 (SiS_P3c4, 0x0F);
-	data = data & 0x7F;
-	SiS_SetReg1 (SiS_P3c4, 0x0F, data);
-
-	if (ModeNo > 0x13) {
-		ModeFlag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-		if ((ModeFlag & HalfDCLK) && (ModeFlag & DoubleScanMode)) {
-			data = SiS_GetReg1 (SiS_P3c4, 0x0F);
-			data = data | 0x80;
-			SiS_SetReg1 (SiS_P3c4, 0x0F, data);
-			data = SiS_GetReg1 (SiS_P3c4, 0x01);
-			data = data & 0xF7;
-			SiS_SetReg1 (SiS_P3c4, 0x01, data);
-		}
-	}
+SiS_SetCRTCRegs(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                USHORT StandTableIndex)
+{
+  UCHAR CRTCdata;
+  USHORT i;
+
+  SiS_SetRegAND(SiS_P3d4,0x11,0x7f);                       /* Unlock CRTC */
+
+  for(i=0;i<=0x18;i++) {
+     CRTCdata=SiS_StandTable[StandTableIndex].CRTC[i];
+     SiS_SetReg1(SiS_P3d4,i,CRTCdata);                     /* Set CRTC(3d4) */
+  }
+  if( ( (HwDeviceExtension->jChipType == SIS_630) ||
+        (HwDeviceExtension->jChipType == SIS_730) )  &&
+      (HwDeviceExtension->jChipRevision >= 0x30) ) {       /* for 630S0 */
+    if(SiS_VBInfo & SetInSlaveMode) {
+      if(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
+        SiS_SetReg1(SiS_P3d4,0x18,0xFE);
+      }
+    }
+  }
 }
 
+/* TW: Checked against 650/LVDS (1.10.07), 650/301LV and 630/301B BIOS */
 void
-SiS_SetCRT1ModeRegs (ULONG ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		     USHORT ModeNo, USHORT ModeIdIndex,
-		     USHORT RefreshRateTableIndex)
+SiS_SetATTRegs(UCHAR *ROMAddr,USHORT StandTableIndex,USHORT ModeNo,
+               PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT data, data2, data3;
-	USHORT infoflag = 0, modeflag;
-	USHORT resindex, xres;
-
-	if (ModeNo > 0x13) {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-		infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+   UCHAR ARdata;
+   USHORT i;
+
+   for(i=0;i<=0x13;i++) {
+    ARdata = SiS_StandTable[StandTableIndex].ATTR[i];
+#if 0
+    if((i <= 0x0f) || (i == 0x11)) {
+        if(ds:489 & 0x08) {
+	   continue;
+        }
+    }
+#endif
+    if(i == 0x13) {
+      if(SiS_VBType & VB_SIS301BLV302BLV) {
+        if(SiS_VBInfo & SetCRT2ToLCDA)  ARdata=0;
+      }
+      if(SiS_IF_DEF_LVDS == 1) {
+        if(SiS_IF_DEF_CH70xx != 0) {
+          if(SiS_VBInfo & SetCRT2ToTV) {
+            if(SiS_VBInfo & SetInSlaveMode) ARdata=0;
+          }
+        }
+      }
+      if(SiS_VBInfo & SetCRT2ToLCD) {
+        if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 1)) {
+	  /* TW: From 650/LVDS 1.10.07, 1.10a */
+	  ARdata = 0;
 	} else {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ModeFlag */
-	}
-	SiS_SetRegANDOR (SiS_P3c4, 0x1F, 0x3F, 0x00);
-	if (ModeNo > 0x13)
-		data = infoflag;
-	else
-		data = 0;
-	data2 = 0;
-	if (ModeNo > 0x13) {
-		if (SiS_ModeType > 0x02) {
-			data2 = data2 | 0x02;
-			data3 = SiS_ModeType - ModeVGA;
-			data3 = data3 << 2;
-			data2 = data2 | data3;
-		}
-	}
-	data = data & InterlaceMode;
-	if (data)
-		data2 = data2 | 0x20;
-	SiS_SetReg1 (SiS_P3c4, 0x06, data2);
-	if ((HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		resindex = SiS_GetResInfo (ROMAddr, ModeNo, ModeIdIndex);
-		if (ModeNo <= 0x13) {
-			xres = SiS_StResInfo[resindex].HTotal;
-		} else {
-			xres = SiS_ModeResInfo[resindex].HTotal;	/* xres->ax */
-		}
-		data = 0x0000;
-		if (infoflag & InterlaceMode) {
-			if (xres == 1024)
-				data = 0x0035;
-			if (xres == 1280)
-				data = 0x0048;
-		}
-		data2 = data & 0x00FF;
-		SiS_SetRegANDOR (SiS_P3d4, 0x19, 0xFF, data2);
-		data2 = (data & 0xFF00) >> 8;
-		SiS_SetRegANDOR (SiS_P3d4, 0x19, 0xFC, data2);
-	}
-	if (modeflag & HalfDCLK) {
-		SiS_SetRegANDOR (SiS_P3c4, 0x01, 0xFF, 0x01);
+          if(SiS_VBInfo & SetInSlaveMode) {
+	     /* TW: wdr: if(SiS_LCDInfo & LCDNonExpanding) { */
+	     ARdata=0;
+          }
 	}
+      }
+    }
+    SiS_GetReg2(SiS_P3da);                              /* reset 3da  */
+    SiS_SetReg3(SiS_P3c0,i);                            /* set index  */
+    SiS_SetReg3(SiS_P3c0,ARdata);                       /* set data   */
+   }
+   SiS_GetReg2(SiS_P3da);                                /* reset 3da  */
+   SiS_SetReg3(SiS_P3c0,0x14);                           /* set index  */
+   SiS_SetReg3(SiS_P3c0,0x00);                           /* set data   */
+
+   SiS_GetReg2(SiS_P3da);                                /* Enable Attribute  */
+   SiS_SetReg3(SiS_P3c0,0x20);
+}
 
-	if ((HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-	} else {
-		if (modeflag & LineCompareOff) {
-			SiS_SetRegANDOR (SiS_P3c4, 0x0F, 0xF7, 0x08);
-		} else {
-			SiS_SetRegANDOR (SiS_P3c4, 0x0F, 0xF7, 0x00);
-		}
-	}
+/* TW: Checked against 650/LVDS (1.10.07, 1.10a) and 650/301LV BIOS */
+void
+SiS_SetGRCRegs(UCHAR *ROMAddr,USHORT StandTableIndex)
+{
+   UCHAR GRdata;
+   USHORT i;
 
-	data = 0x60;
-	if (SiS_ModeType != ModeText) {
-		data = data ^ 0x60;
-		if (SiS_ModeType != ModeEGA) {
-			data = data ^ 0xA0;
-		}
-	}
-	SiS_SetRegANDOR (SiS_P3c4, 0x21, 0x1F, data);
+   for(i=0;i<=0x08;i++) {
+     GRdata = SiS_StandTable[StandTableIndex].GRC[i]; 	  /* Get GR from file */
+     SiS_SetReg1(SiS_P3ce,i,GRdata);                      /* Set GR(3ce) */
+   }
+
+   if(SiS_ModeType > ModeVGA) {
+     SiS_SetRegAND(SiS_P3ce,0x05,0xBF);			  /* 256 color disable */
+   }
 }
 
+/* TW: Checked against 650/LVDS (1.10.07, 1.10a), 650/301LV and 630/301B BIOS */
 void
-SiS_SetVCLKState (ULONG ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		  USHORT ModeNo, USHORT RefreshRateTableIndex)
-{
-	USHORT data, data2 = 0;
-	USHORT VCLK;
-	UCHAR index;
-
-	if (ModeNo <= 0x13)
-		VCLK = 0;
-	else {
-		index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
-		/*if(HwDeviceExtension->jChipType < SIS_315H) { */
-		index = index & 0x3F;
-		/*} */
-		VCLK = SiS_VCLKData[index].CLOCK;
-	}
+SiS_ClearExt1Regs(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT i;
 
-	if (HwDeviceExtension->jChipType < SIS_315H) {
-		data2 = 0x00;
-		if (VCLK > 150)
-			data2 = data2 | 0x80;
-		SiS_SetRegANDOR (SiS_P3c4, 0x07, 0x7B, data2);
-
-		data2 = 0x00;
-		if (VCLK >= 150)
-			data2 = data2 | 0x08;	/* VCLK > 150 */
-		SiS_SetRegANDOR (SiS_P3c4, 0x32, 0xF7, data2);
-	} else {		/* 310 series */
-
-		data = SiS_GetReg1 (SiS_P3c4, 0x32);
-		data = data & 0xf3;
-		if (VCLK >= 200)
-			data = data | 0x0c;	/* VCLK > 200 */
-		SiS_SetReg1 (SiS_P3c4, 0x32, data);
-		data = SiS_GetReg1 (SiS_P3c4, 0x1F);
-		data &= 0xE7;
-		if (VCLK < 200)
-			data |= 0x10;
-		SiS_SetReg1 (SiS_P3c4, 0x1F, data);
-	}
+  for(i=0x0A;i<=0x0E;i++) SiS_SetReg1(SiS_P3c4,i,0x00);      /* Clear SR0A-SR0E */
 
-	if ((VCLK >= 0) && (VCLK < 135))
-		data2 = 0x03;
-	if ((VCLK >= 135) && (VCLK < 160))
-		data2 = 0x02;
-	if ((VCLK >= 160) && (VCLK < 260))
-		data2 = 0x01;
-	if (VCLK > 260)
-		data2 = 0x00;
-	/* disable 24bit palette RAM gamma correction  */
-
-	if (HwDeviceExtension->jChipType == SIS_540) {
-		if ((VCLK == 203) || (VCLK < 234))
-			data2 = 0x02;
-	}
-	SiS_SetRegANDOR (SiS_P3c4, 0x07, 0xFC, data2);
+  /* TW: New from 650/LVDS/301LV BIOSes: */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     SiS_SetRegAND(SiS_P3c4,0x37,0xFE);
+  }
 }
 
+/* TW: Checked against 650/LVDS (1.10.07) and 650/301LV BIOS */
 void
-SiS_LoadDAC (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+SiS_SetSync(UCHAR *ROMAddr,USHORT RefreshRateTableIndex)
 {
-	USHORT data, data2;
-	USHORT time, i, j, k;
-	USHORT m, n, o;
-	USHORT si, di, bx, dl;
-	USHORT al, ah, dh;
-	USHORT *table = NULL;
+  USHORT sync;
+  USHORT temp;
 
-	if (ModeNo <= 0x13)
-		data = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-	else
-		data = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  sync = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;
 
-	data = data & DACInfoFlag;
-	time = 64;
-	if (data == 0x00)
-		table = SiS_MDA_DAC;
-	if (data == 0x08)
-		table = SiS_CGA_DAC;
-	if (data == 0x10)
-		table = SiS_EGA_DAC;
-	if (data == 0x18) {
-		time = 256;
-		table = SiS_VGA_DAC;
-	}
-	if (time == 256)
-		j = 16;
-	else
-		j = time;
+  sync &= 0xC0;
+  temp = 0x2F | sync;
+  SiS_SetReg3(SiS_P3c2,temp);                                 /* Set Misc(3c2) */
+}
 
-	SiS_SetReg3 (SiS_P3c6, 0xFF);
-	SiS_SetReg3 (SiS_P3c8, 0x00);
+/* TW: Checked against 650/LVDS (1.10.07) and 650/301LV BIOS */
+void
+SiS_SetCRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                USHORT RefreshRateTableIndex,
+		PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  UCHAR  index;
+  USHORT temp,tempah,i,modeflag,j;
+  USHORT ResInfo,DisplayType;
+  SiS_LCDACRT1DataStruct *LCDACRT1Ptr=NULL;
+
+  SiS_SetRegAND(SiS_P3d4,0x11,0x7f);		/*unlock cr0-7  */
+
+  if(ModeNo<=0x13) {
+        modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  } else {
+        modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  }
+
+  if((SiS_VBType & (VB_SIS302B | VB_SIS302LV))
+                        && (SiS_VBInfo & SetCRT2ToLCDA)) {
+
+     /* 302B LCDA - TW: Not done in any BIOS version */
+
+     temp = SiS_GetLCDACRT1Ptr(ROMAddr,ModeNo,ModeIdIndex,
+                       RefreshRateTableIndex,&ResInfo,&DisplayType);
+  
+     switch(DisplayType) {
+      case 0 : LCDACRT1Ptr = SiS_LCDACRT1800x600_1;           break;
+      case 1 : LCDACRT1Ptr = SiS_LCDACRT11024x768_1;          break;
+      case 2 : LCDACRT1Ptr = SiS_LCDACRT11280x1024_1;         break;
+      case 3 : LCDACRT1Ptr = SiS_LCDACRT1800x600_1_H;         break;
+      case 4 : LCDACRT1Ptr = SiS_LCDACRT11024x768_1_H;        break;
+      case 5 : LCDACRT1Ptr = SiS_LCDACRT11280x1024_1_H;       break;
+      case 6 : LCDACRT1Ptr = SiS_LCDACRT1800x600_2;           break;
+      case 7 : LCDACRT1Ptr = SiS_LCDACRT11024x768_2;          break;
+      case 8 : LCDACRT1Ptr = SiS_LCDACRT11280x1024_2;         break;
+      case 9 : LCDACRT1Ptr = SiS_LCDACRT1800x600_2_H;         break;
+      case 10: LCDACRT1Ptr = SiS_LCDACRT11024x768_2_H;        break;
+      case 11: LCDACRT1Ptr = SiS_LCDACRT11280x1024_2_H;       break;
+     }
+
+     tempah = (LCDACRT1Ptr+ResInfo)->CR[0];
+     SiS_SetReg1(SiS_P3d4,0x00,tempah);
+     for(i=0x01,j=1;i<=0x07;i++,j++){
+       tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
+       SiS_SetReg1(SiS_P3d4,i,tempah);
+     }
+     for(i=0x10,j=8;i<=0x12;i++,j++){
+       tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
+       SiS_SetReg1(SiS_P3d4,i,tempah);
+     }
+     for(i=0x15,j=11;i<=0x16;i++,j++){
+       tempah =(LCDACRT1Ptr+ResInfo)->CR[j];
+       SiS_SetReg1(SiS_P3d4,i,tempah);
+     }
+     for(i=0x0A,j=13;i<=0x0C;i++,j++){
+       tempah = (LCDACRT1Ptr+ResInfo)->CR[j];
+       SiS_SetReg1(SiS_P3c4,i,tempah);
+     }
+  
+     tempah = (LCDACRT1Ptr+ResInfo)->CR[16];
+     tempah &= 0x0E0;
+     SiS_SetReg1(SiS_P3c4,0x0E,tempah);
+
+     tempah = (LCDACRT1Ptr+ResInfo)->CR[16];
+     tempah &= 0x01;
+     tempah <<= 5;
+     if(modeflag & DoubleScanMode)  tempah |= 0x080;
+
+     SiS_SetRegANDOR(SiS_P3d4,0x09,~0x020,tempah);
+     if(SiS_ModeType > 0x03) SiS_SetReg1(SiS_P3d4,0x14,0x4F);
+
+  } else {
+
+     /* LVDS, 301, 301B, 301LV, 302LV, (302B non-LCDA) */
+
+     index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;  	/* Get index */
+     if(HwDeviceExtension->jChipType < SIS_315H) {
+        index &= 0x3F;
+     }
+
+     for(i=0,j=0;i<=07;i++,j++) {
+       tempah=SiS_CRT1Table[index].CR[i];
+       SiS_SetReg1(SiS_P3d4,j,tempah);
+     }
+     for(j=0x10;i<=10;i++,j++) {
+       tempah=SiS_CRT1Table[index].CR[i];
+       SiS_SetReg1(SiS_P3d4,j,tempah);
+     }
+     for(j=0x15;i<=12;i++,j++) {
+       tempah=SiS_CRT1Table[index].CR[i];
+       SiS_SetReg1(SiS_P3d4,j,tempah);
+     }
+     for(j=0x0A;i<=15;i++,j++) {
+       tempah=SiS_CRT1Table[index].CR[i];
+       SiS_SetReg1(SiS_P3c4,j,tempah);
+     }
+
+     tempah = SiS_CRT1Table[index].CR[16];
+     tempah &= 0xE0;
+     SiS_SetReg1(SiS_P3c4,0x0E,tempah);
+
+     tempah = SiS_CRT1Table[index].CR[16];
+     tempah &= 0x01;
+     tempah <<= 5;
+     if(modeflag & DoubleScanMode)  tempah |= 0x80;
+     SiS_SetRegANDOR(SiS_P3d4,0x09,0xDF,tempah);
+
+     if(SiS_ModeType > 0x03) SiS_SetReg1(SiS_P3d4,0x14,0x4F);
+  }
+}
 
-	for (i = 0; i < j; i++) {
-		data = table[i];
-		for (k = 0; k < 3; k++) {
-			data2 = 0;
-			if (data & 0x01)
-				data2 = 0x2A;
-			if (data & 0x02)
-				data2 = data2 + 0x15;
-			SiS_SetReg3 (SiS_P3c9, data2);
-			data = data >> 2;
-		}
-	}
+/* TW: Set offset and pitch - partly overruled by SetPitch() in XF86 */
+/* TW: Checked against 650/LVDS (1.10.07), 650/301LV and 315 BIOS */
+void
+SiS_SetCRT1Offset(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                  USHORT RefreshRateTableIndex,
+		  PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   USHORT temp, DisplayUnit, infoflag;
 
-	if (time == 256) {
-		for (i = 16; i < 32; i++) {
-			data = table[i];
-			for (k = 0; k < 3; k++)
-				SiS_SetReg3 (SiS_P3c9, data);
-		}
-		si = 32;
-		for (m = 0; m < 9; m++) {
-			di = si;
-			bx = si + 0x04;
-			dl = 0;
-			for (n = 0; n < 3; n++) {
-				for (o = 0; o < 5; o++) {
-					dh = table[si];
-					ah = table[di];
-					al = table[bx];
-					si++;
-					SiS_WriteDAC (dl, ah, al, dh);
-				}	/* for 5 */
-				si = si - 2;
-				for (o = 0; o < 3; o++) {
-					dh = table[bx];
-					ah = table[di];
-					al = table[si];
-					si--;
-					SiS_WriteDAC (dl, ah, al, dh);
-				}	/* for 3 */
-				dl++;
-			}	/* for 3 */
-			si = si + 5;
-		}		/* for 9 */
-	}
+   infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+
+   DisplayUnit = SiS_GetOffset(ROMAddr,ModeNo,ModeIdIndex,
+                     RefreshRateTableIndex,HwDeviceExtension);
+
+   temp = (DisplayUnit >> 8) & 0x0f;
+   SiS_SetRegANDOR(SiS_P3c4,0x0E,0xF0,temp);
+
+   temp = DisplayUnit & 0xFF;
+   SiS_SetReg1(SiS_P3d4,0x13,temp);
+
+   if(infoflag & InterlaceMode) DisplayUnit >>= 1;
+
+   DisplayUnit <<= 5;
+   temp = (DisplayUnit & 0xff00) >> 8;
+   if (DisplayUnit & 0xff) temp++;
+   temp++;
+   SiS_SetReg1(SiS_P3c4,0x10,temp);
 }
 
+/* TW: New from 650/LVDS 1.10.07, 630/301B and 630/LVDS BIOS */
 void
-SiS_WriteDAC (USHORT dl, USHORT ah, USHORT al, USHORT dh)
-{
-	USHORT temp;
-	USHORT bh, bl;
-
-	bh = ah;
-	bl = al;
-	if (dl != 0) {
-		temp = bh;
-		bh = dh;
-		dh = temp;
-		if (dl == 1) {
-			temp = bl;
-			bl = dh;
-			dh = temp;
-		} else {
-			temp = bl;
-			bl = bh;
-			bh = temp;
-		}
-	}
-	SiS_SetReg3 (SiS_P3c9, (USHORT) dh);
-	SiS_SetReg3 (SiS_P3c9, (USHORT) bh);
-	SiS_SetReg3 (SiS_P3c9, (USHORT) bl);
+SiS_ResetCRT1VCLK(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+   USHORT index;
+
+   /* TW: We only need to do this if Panel Link is to be
+    *     initialized, thus on 630/LVDS/301B, and 650/LVDS
+    */
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+       if (SiS_IF_DEF_LVDS == 0)  return;
+   } else {
+       if( (SiS_IF_DEF_LVDS == 0) &&
+           (!(SiS_VBType & VB_SIS301BLV302BLV)) ) {
+	   return;
+      }
+   }
+
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+   	SiS_SetRegANDOR(SiS_P3c4,0x31,0xCF,0x20);
+   } else {
+   	SiS_SetReg1(SiS_P3c4,0x31,0x20);
+   }
+   index = 1;
+   SiS_SetReg1(SiS_P3c4,0x2B,SiS_VCLKData[index].SR2B);
+   SiS_SetReg1(SiS_P3c4,0x2C,SiS_VCLKData[index].SR2C);
+   SiS_SetReg1(SiS_P3c4,0x2D,0x80);
+   if(HwDeviceExtension->jChipType >= SIS_315H) {
+   	SiS_SetRegANDOR(SiS_P3c4,0x31,0xcf,0x10);
+   } else {
+   	SiS_SetReg1(SiS_P3c4,0x31,0x10);
+   }
+   index = 0;
+   SiS_SetReg1(SiS_P3c4,0x2B,SiS_VCLKData[index].SR2B);
+   SiS_SetReg1(SiS_P3c4,0x2C,SiS_VCLKData[index].SR2C);
+   SiS_SetReg1(SiS_P3c4,0x2D,0x80);
 }
 
+/* TW: Checked against 650/LVDS, 650/301LV, 315, 630/301B, 630/LVDS BIOS */
 void
-SiS_ClearBuffer (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT ModeNo)
-{
-	PVOID VideoMemoryAddress =
-	    (PVOID) HwDeviceExtension->pjVideoMemoryAddress;
-	ULONG AdapterMemorySize = (ULONG) HwDeviceExtension->ulVideoMemorySize;
-	PUSHORT pBuffer;
-	int i;
-
-	if (SiS_ModeType >= ModeEGA) {
-		if (ModeNo > 0x13) {
-			SiS_SetMemory (VideoMemoryAddress, AdapterMemorySize,
-				       0);
-		} else {
-			pBuffer = VideoMemoryAddress;
-			for (i = 0; i < 0x4000; i++)
-				pBuffer[i] = 0x0000;
-		}
+SiS_SetCRT1VCLK(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                PSIS_HW_DEVICE_INFO HwDeviceExtension,
+		USHORT RefreshRateTableIndex)
+{
+  USHORT  index;
+
+#if 0	/* TW: Wrong. 650/301LV uses same table for LCDA and CRT1 */
+  if( (SiS_VBType & VB_SIS301BLV302BLV)
+                       && (SiS_VBInfo & SetCRT2ToLCDA) ){
+
+        /* TW: For 302B/302LV LCDA */
+
+    	index = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
+	                RefreshRateTableIndex,HwDeviceExtension);
+
+    	SiS_SetRegAND(SiS_P3c4,0x31,0xCF);
+
+    	SiS_SetReg1(SiS_P3c4,0x2B,SiS_VBVCLKData[index].Part4_A);
+    	SiS_SetReg1(SiS_P3c4,0x2C,SiS_VBVCLKData[index].Part4_B);
+
+    	if(HwDeviceExtension->jChipType >= SIS_315H) {
+		SiS_SetReg1(SiS_P3c4,0x2D,0x01);
+   	} else {
+    		SiS_SetReg1(SiS_P3c4,0x2D,0x80);
+    	}
+
+  } else {
+#endif
+
+        index = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
+	                  RefreshRateTableIndex,HwDeviceExtension);
+
+#if 0   /* TW: All BIOSes use GetVCLK2Ptr instead */
+    	index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+    	index &= 0x3F;
+#endif
+
+	if(HwDeviceExtension->jChipType >= SIS_315H) {
+	    SiS_SetRegAND(SiS_P3c4,0x31,0xCF);
 	} else {
-		pBuffer = VideoMemoryAddress;
-		if (SiS_ModeType == ModeCGA) {
-			for (i = 0; i < 0x4000; i++)
-				pBuffer[i] = 0x0720;
-		} else {
-			for (i = 0; i < 0x4000; i++)
-				pBuffer[i] = 0x0000;
-		}
+	    SiS_SetReg1(SiS_P3c4,0x31,0x00);
 	}
+
+    	SiS_SetReg1(SiS_P3c4,0x2B,SiS_VCLKData[index].SR2B);
+    	SiS_SetReg1(SiS_P3c4,0x2C,SiS_VCLKData[index].SR2C);
+
+    	if(HwDeviceExtension->jChipType >= SIS_315H) {
+	    SiS_SetReg1(SiS_P3c4,0x2D,0x01);
+	} else {
+      	    SiS_SetReg1(SiS_P3c4,0x2D,0x80);
+        }
+#if 0
+  }
+#endif
 }
 
+#if 0  /* TW: Not used */
 void
-SiS_DisplayOn (void)
+SiS_IsLowResolution(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
+  USHORT ModeFlag;
+
+  SiS_SetRegAND(SiS_P3c4,0x0F,0x7F);
 
-	SiS_SetRegANDOR (SiS_P3c4, 0x01, 0xDF, 0x00);
+  if(ModeNo > 0x13) {
+    ModeFlag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    if ((ModeFlag & HalfDCLK) && (ModeFlag & DoubleScanMode)) {
+      SiS_SetRegOR(SiS_P3c4,0x0F,0x80);
+      SiS_SetRegAND(SiS_P3c4,0x01,0xF7);
+    }
+  }
 }
+#endif
 
+/* TW: Checked against 630/LVDS, 650/LVDS and 315 BIOS */
 void
-SiS_DisplayOff (void)
+SiS_SetCRT1ModeRegs(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                    USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex)
 {
+  USHORT data,data2,data3;
+  USHORT infoflag=0,modeflag;
+  USHORT resindex,xres;
+
+  if(ModeNo > 0x13) {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+  } else {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  }
+
+  SiS_SetRegAND(SiS_P3c4,0x1F,0x3F); 		/* DAC pedestal */
+
+  if(ModeNo > 0x13) data = infoflag;
+  else data = 0;
+
+  data2 = SiS_GetReg1(SiS_P3c4,0x06) & 0xC0;  	/* TW: Preserve Xv display mode (DCLK/TCLK) ! */
+  if(ModeNo > 0x13) {
+    if(SiS_ModeType > 0x02) {
+       data2 |= 0x02;
+       data3 = (SiS_ModeType - ModeVGA) << 2;
+       data2 |= data3;
+    }
+  }
+  if(data & InterlaceMode) data2 |= 0x20;
+  SiS_SetReg1(SiS_P3c4,0x06,data2);
+
+  resindex = SiS_GetResInfo(ROMAddr,ModeNo,ModeIdIndex);
+  if(ModeNo <= 0x13) {
+      	xres = SiS_StResInfo[resindex].HTotal;
+  } else {
+      	xres = SiS_ModeResInfo[resindex].HTotal;
+  }
+
+  data = 0x0000;
+  if(infoflag & InterlaceMode) {
+      if(xres == 1024) data = 0x0035;
+      else data = 0x0048;
+  }
+  data2 = data & 0x00FF;
+  SiS_SetReg1(SiS_P3d4,0x19,data2);
+  data2 = (data & 0xFF00) >> 8;
+  SiS_SetRegANDOR(SiS_P3d4,0x1a,0xFC,data2);
+
+  if(modeflag & HalfDCLK) {
+     SiS_SetRegOR(SiS_P3c4,0x01,0x08);
+  }
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(modeflag & LineCompareOff) {
+        SiS_SetRegANDOR(SiS_P3c4,0x0F,0xB7,0x08);
+     } else {
+        SiS_SetRegAND(SiS_P3c4,0x0F,0xB7);
+     }
+     /* 630 BIOS does something for mode 0x12 here */
+  } else {
+     if(modeflag & LineCompareOff) {
+        SiS_SetRegANDOR(SiS_P3c4,0x0F,0xB7,0x08);
+     } else {
+        SiS_SetRegAND(SiS_P3c4,0x0F,0xB7);
+     }
+  }
+
+  if(SiS_ModeType == ModeEGA) {
+     if(ModeNo > 0x13) {
+  	SiS_SetRegOR(SiS_P3c4,0x0F,0x40);
+     }
+  }
+
+  /* TW: 315 BIOS sets SR17 here (0x18bf) */
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType == SIS_315PRO) {
+      data = SiS_Get310DRAMType(ROMAddr,HwDeviceExtension);
+      data = SiS_SR15[2][data];
+      if(SiS_ModeType == ModeText) {
+          data &= 0xc7;
+      } else {
+          data2 = SiS_GetOffset(ROMAddr,ModeNo,ModeIdIndex,
+                                RefreshRateTableIndex,HwDeviceExtension);
+	  data2 >>= 1;
+	  if(infoflag & InterlaceMode) data2 >>= 1;
+	  data3 = SiS_GetColorDepth(ROMAddr,ModeNo,ModeIdIndex);
+	  data3 >>= 1;
+	  if(data3 == 0) data3++;
+	  data2 /= data3;
+	  if(data2 >= 0x50) {
+	      data &= 0x0f;
+	      data |= 0x50;
+	  }
+      }
+      SiS_SetReg1(SiS_P3c4,0x17,data);
+  }
+#endif
 
-	SiS_SetRegANDOR (SiS_P3c4, 0x01, 0xDF, 0x20);
+  data = 0x60;
+  if(SiS_ModeType != ModeText) {
+      data = data ^ 0x60;
+      if(SiS_ModeType != ModeEGA) {
+        data = data ^ 0xA0;
+      }
+  }
+  SiS_SetRegANDOR(SiS_P3c4,0x21,0x1F,data);
+
+  SiS_SetVCLKState(ROMAddr,HwDeviceExtension,ModeNo,RefreshRateTableIndex,ModeIdIndex);
+
+#ifdef SIS315H
+  /* TW: New */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+    if (SiS_GetReg1(SiS_P3d4,0x31) & 0x40) {
+        SiS_SetReg1(SiS_P3d4,0x52,0x2c);
+    } else {
+        SiS_SetReg1(SiS_P3d4,0x52,0x6c);
+    }
+  }
+#endif
 }
 
-/* ========================================== */
-/*  SR CRTC GR */
+/* TW: Checked against 315, 650/LVDS, 650/301LV, 630/301B and 630/LVDS BIOS */
 void
-SiS_SetReg1 (USHORT port, USHORT index, USHORT data)
-{
-	OutPortByte (port, index);
-	OutPortByte (port + 1, data);
-
-	/*
-	   _asm
-	   {
-	   mov      dx, port                      
-	   mov      ax, index                     
-	   mov      bx, data                      
-	   out      dx, al
-	   mov      ax, bx
-	   inc      dx
-	   out      dx, al
-	   }
-	 */
-
+SiS_SetVCLKState(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                 USHORT ModeNo,USHORT RefreshRateTableIndex,
+                 USHORT ModeIdIndex)
+{
+  USHORT data, data2=0;
+  USHORT VCLK, index=0;
+
+  if (ModeNo <= 0x13) VCLK = 0;
+  else {
+     index = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
+	               RefreshRateTableIndex,HwDeviceExtension);
+     VCLK = SiS_VCLKData[index].CLOCK;
+  }
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {		/* 300 series */
+
+    data2 = 0x00;
+    if(VCLK > 150) data2 |= 0x80;
+    SiS_SetRegANDOR(SiS_P3c4,0x07,0x7B,data2); 	/* DAC speed */
+
+    data2 = 0x00;
+    if(VCLK >= 150) data2 |= 0x08;       	/* VCLK > 150 */
+    SiS_SetRegANDOR(SiS_P3c4,0x32,0xF7,data2);
+
+  } else { 						/* 310/325 series */
+
+    data = SiS_GetReg1(SiS_P3c4,0x32);
+    data &= 0xf3;
+    if(VCLK >= 166) data |= 0x0c;         	/* TW: Was 200; is 166 in 650 and 315 BIOSes */
+    SiS_SetReg1(SiS_P3c4,0x32,data);
+
+    if(VCLK >= 166) {				/* TW: Was 200, is 166 in 650 and 315 BIOSes */
+       SiS_SetRegAND(SiS_P3c4,0x1f,0xe7);
+    }
+#if 0 /* Not done in 315 and 650/301LV/LVDS BIOSes: */
+    data = SiS_GetReg1(SiS_P3c4,0x1F);	  	/* DAC pedestal */
+    data &= 0xE7;
+    if(VCLK<200) data |= 0x10;
+    SiS_SetReg1(SiS_P3c4,0x1F,data);	  	/* DAC pedestal */
+#endif
+  }
+
+  data2 = 0x03;
+  if((VCLK >= 135) && (VCLK < 160)) data2 = 0x02;
+  if((VCLK >= 160) && (VCLK < 260)) data2 = 0x01;
+  if(VCLK >= 260) data2 = 0x00;
+  /* disable 24bit palette RAM gamma correction  */
+  if(HwDeviceExtension->jChipType == SIS_540) {
+    	if((VCLK == 203) || (VCLK < 234)) data2 = 0x02;
+  }
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+      SiS_SetRegANDOR(SiS_P3c4,0x07,0xFC,data2);  	/* DAC speed */
+  } else {
+      /* TW: This is done in 650/LVDS/301LV BIOSes; Not in 315 BIOS */
+      if(ModeNo > 13) data2 &= 0xfc;
+      SiS_SetRegANDOR(SiS_P3c4,0x07,0xF8,data2);  	/* DAC speed */
+  }
 }
 
-/* ========================================== */
-/*  AR(3C0) */
 void
-SiS_SetReg2 (USHORT port, USHORT index, USHORT data)
+SiS_LoadDAC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
+   USHORT data,data2;
+   USHORT time,i,j,k;
+   USHORT m,n,o;
+   USHORT si,di,bx,dl;
+   USHORT al,ah,dh;
+   USHORT *table=NULL;
+#if 0
+   USHORT tempah,tempch,tempcl,tempdh,tempal,tempbx;
+#endif
 
-	InPortByte (port + 0x3da - 0x3c0);
-	OutPortByte (SiS_P3c0, index);
-	OutPortByte (SiS_P3c0, data);
-	OutPortByte (SiS_P3c0, 0x20);
-
-	/*
-	   _asm
-	   {
-	   mov      dx, port                      
-	   mov      cx, index                     
-	   mov      bx, data                      
+   if (ModeNo<=0x13)
+        data = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+   else
+        data = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
 
-	   add      dx, 3dah-3c0h
-	   in       al, dx
+#if 0
+   if(!(ds:489 & 0x08)) {
+#endif
 
-	   mov      ax, cx
-	   mov      dx, 3c0h
-	   out      dx, al
-	   mov      ax, bx
-	   out      dx, al
+	data &= DACInfoFlag;
+	time = 64;
+	if(data == 0x00) table = SiS_MDA_DAC;
+	if(data == 0x08) table = SiS_CGA_DAC;
+	if(data == 0x10) table = SiS_EGA_DAC;
+	if(data == 0x18) {
+	   time = 256;
+	   table = SiS_VGA_DAC;
+	}
+	if(time == 256) j = 16;
+	else j = time;
+
+	SiS_SetReg3(SiS_P3c6,0xFF);
+	SiS_SetReg3(SiS_P3c8,0x00);
+
+	for(i=0; i<j; i++) {
+	   data = table[i];
+	   for(k=0; k<3; k++) {
+		data2 = 0;
+		if(data & 0x01) data2 = 0x2A;
+		if(data & 0x02) data2 += 0x15;
+		SiS_SetReg3(SiS_P3c9,data2);
+		data >>= 2;
+	   }
+	}
 
-	   mov      ax, 20h
-	   out      dx, al
+	if(time == 256) {
+	   for(i=16; i<32; i++) {
+		data = table[i];
+		for(k=0; k<3; k++) SiS_SetReg3(SiS_P3c9,data);
 	   }
-	 */
+	   si = 32;
+	   for(m=0; m<9; m++) {
+	      di = si;
+	      bx = si+0x04;
+	      dl = 0;
+	      for(n=0; n<3; n++) {
+		 for(o=0; o<5; o++) {
+		    dh = table[si];
+		    ah = table[di];
+		    al = table[bx];
+		    si++;
+		    SiS_WriteDAC(dl,ah,al,dh);
+		 }         /* for 5 */
+		 si = si - 2;
+		 for(o=0; o<3; o++) {
+		    dh = table[bx];
+		    ah = table[di];
+		    al = table[si];
+		    si--;
+		    SiS_WriteDAC(dl,ah,al,dh);
+		 }         /* for 3 */
+		 dl++;
+	      }            /* for 3 */
+	      si = si + 5;
+	   }               /* for 9 */
+	}
+#if 0
+    }  /* ds:489 & 0x08 */
+#endif
 
+#if 0
+    if((!(ds:489 & 0x08)) && (ds:489 & 0x06)) {
+           tempbx = 0;
+	   for(i=0; i< 256; i++) {
+               SiS_SetReg3(SiS_P3c8-1,tempbx);    	/* 7f87 */
+               tempah = SiS_GetReg3(SiS_P3c8+1);  	/* 7f83 */
+	       tempch = SiS_GetReg3(SiS_P3c8+1);
+	       tempcl = SiS_GetReg3(SiS_P3c8+1);
+	       tempdh = tempah;
+	       tempal = 0x4d * tempdh;          	/* 7fb8 */
+	       tempbx += tempal;
+	       tempal = 0x97 * tempch;
+	       tempbx += tempal;
+	       tempal = 0x1c * tempcl;
+	       tempbx += tempal;
+	       if((tempbx & 0x00ff) > 0x80) tempbx += 0x100;
+	       tempdh = (tempbx & 0x00ff) >> 8;
+	       tempch = tempdh;
+	       tempcl = tempdh;
+	       SiS_SetReg3(SiS_P3c8,(tempbx & 0xff));  	/* 7f7c */
+	       SiS_SetReg3(SiS_P3c8+1,tempdh);          /* 7f92 */
+	       SiS_SetReg3(SiS_P3c8+1,tempch);
+	       SiS_SetReg3(SiS_P3c8+1,tempcl);
+           }
+    }
+#endif
 }
 
-/* ========================================== */
 void
-SiS_SetReg3 (USHORT port, USHORT data)
+SiS_WriteDAC(USHORT dl, USHORT ah, USHORT al, USHORT dh)
 {
+  USHORT temp;
+  USHORT bh,bl;
+
+  bh=ah;
+  bl=al;
+  if(dl!=0) {
+    temp=bh;
+    bh=dh;
+    dh=temp;
+    if(dl==1) {
+       temp=bl;
+       bl=dh;
+       dh=temp;
+    } else {
+       temp=bl;
+       bl=bh;
+       bh=temp;
+    }
+  }
+  SiS_SetReg3(SiS_P3c9,(USHORT)dh);
+  SiS_SetReg3(SiS_P3c9,(USHORT)bh);
+  SiS_SetReg3(SiS_P3c9,(USHORT)bl);
+}
 
-	OutPortByte (port, data);
+ULONG
+GetDRAMSize(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  ULONG   AdapterMemorySize=0;
+#ifdef SIS315H
+  USHORT  counter;
+#endif
+  
+#ifdef SIS315H
+  if ((HwDeviceExtension->jChipType == SIS_315H) ||
+      (HwDeviceExtension->jChipType == SIS_315PRO)) {
+    	counter = SiS_GetReg1(SiS_P3c4,0x14) & 0xF0;
+    	counter >>= 4;
+    	AdapterMemorySize= 1 << counter;
+    	AdapterMemorySize *= 1024*1024;
+  } else if((HwDeviceExtension->jChipType == SIS_550) ||
+            (HwDeviceExtension->jChipType == SIS_640) ||
+            (HwDeviceExtension->jChipType == SIS_740) ||
+            (HwDeviceExtension->jChipType == SIS_650)) {
+      		counter = SiS_GetReg1(SiS_P3c4,0x14) & 0x3F;
+      		counter++;
+      		AdapterMemorySize = counter * 4;
+      		AdapterMemorySize *= 1024*1024;
+  }
+#endif
 
-	/*
-	   _asm
-	   {
-	   mov      dx, port                      
-	   mov      ax, data                      
-	   out      dx, al
+#ifdef SIS300
+  if ((HwDeviceExtension->jChipType==SIS_300) ||
+      (HwDeviceExtension->jChipType==SIS_540) ||
+      (HwDeviceExtension->jChipType==SIS_630) ||
+      (HwDeviceExtension->jChipType==SIS_730)) {
+      	AdapterMemorySize = SiS_GetReg1(SiS_P3c4,0x14);
+      	AdapterMemorySize = AdapterMemorySize&0x3F;
+      	AdapterMemorySize++;
+      	AdapterMemorySize *= 1024*1024;
+  }
+#endif
 
-	   }
-	 */
+  return AdapterMemorySize;
+}
 
+void
+SiS_ClearBuffer(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo)
+{
+  PVOID   VideoMemoryAddress = (PVOID)HwDeviceExtension->pjVideoMemoryAddress;
+  ULONG   AdapterMemorySize  = (ULONG)HwDeviceExtension->ulVideoMemorySize;
+  PUSHORT pBuffer;
+  int i;
+
+  if (SiS_ModeType>=ModeEGA) {
+    if (ModeNo>0x13) {
+      AdapterMemorySize = GetDRAMSize(HwDeviceExtension);
+      SiS_SetMemory(VideoMemoryAddress,AdapterMemorySize,0);
+    } else {
+      pBuffer = VideoMemoryAddress;
+      for(i=0; i<0x4000; i++)
+         pBuffer[i] = 0x0000;
+    }
+  } else {
+    pBuffer = VideoMemoryAddress;
+    if (SiS_ModeType < ModeCGA) {
+      for(i=0; i<0x4000; i++)
+         pBuffer[i] = 0x0720;
+    } else {
+      SiS_SetMemory(VideoMemoryAddress,0x8000,0);
+    }
+  }
 }
 
-/* ========================================== */
 void
-SiS_SetReg4 (USHORT port, ULONG data)
+SiS_DisplayOn(void)
 {
+   SiS_SetRegANDOR(SiS_P3c4,0x01,0xDF,0x00);
+}
 
-	OutPortLong (port, data);
+void
+SiS_DisplayOff(void)
+{
+   SiS_SetRegANDOR(SiS_P3c4,0x01,0xDF,0x20);
+}
 
-	/*
-	   _asm
-	   {
-	   mov      dx, port                      ;; port
-	   mov      eax, data                      ;; data
-	   out      dx, eax
 
-	   }
-	 */
+/* ========================================== */
+/*  SR CRTC GR */
+void
+SiS_SetReg1(USHORT port, USHORT index, USHORT data)
+{
+   OutPortByte(port,index);
+   OutPortByte(port+1,data);
 }
 
-/* ========================================= */
-UCHAR SiS_GetReg1 (USHORT port, USHORT index)
+/* ========================================== */
+/*  AR(3C0) */
+void
+SiS_SetReg2(USHORT port, USHORT index, USHORT data)
 {
-	UCHAR data;
-
-	OutPortByte (port, index);
-	data = InPortByte (port + 1);
+   InPortByte(port+0x3da-0x3c0);
+   OutPortByte(SiS_P3c0,index);
+   OutPortByte(SiS_P3c0,data);
+   OutPortByte(SiS_P3c0,0x20);
+}
 
-	/*
-	   _asm
-	   {
-	   mov      dx, port                      ;; port
-	   mov      ax, index                     ;; index
+void
+SiS_SetReg3(USHORT port, USHORT data)
+{
+   OutPortByte(port,data);
+}
 
-	   out      dx, al
-	   mov      ax, bx
-	   inc      dx
-	   xor      eax, eax
-	   in       al, dx
-	   mov      data, al
-	   }
-	 */
-	return (data);
+void
+SiS_SetReg4(USHORT port, ULONG data)
+{
+   OutPortLong(port,data);
 }
 
-/* ========================================== */
-UCHAR SiS_GetReg2 (USHORT port)
+UCHAR SiS_GetReg1(USHORT port, USHORT index)
 {
-	UCHAR data;
+   UCHAR   data;
 
-	data = InPortByte (port);
+   OutPortByte(port,index);
+   data = InPortByte(port+1);
 
-	/*
-	   _asm
-	   {
-	   mov      dx, port                      ;; port
-	   xor      eax, eax
-	   in       al, dx
-	   mov      data, al
-	   }
-	 */
-	return (data);
+   return(data);
 }
 
-/* ========================================== */
-ULONG SiS_GetReg3 (USHORT port)
+UCHAR
+SiS_GetReg2(USHORT port)
 {
-	ULONG data;
+   UCHAR   data;
 
-	data = InPortLong (port);
+   data= InPortByte(port);
 
-	/*
-	   _asm
-	   {
-	   mov      dx, port                      ;; port
-	   xor      eax, eax
-	   in       eax, dx
-	   mov      data, eax
-	   }
-	 */
-	return (data);
+   return(data);
 }
 
-/* ========================================== */
-void
-SiS_ClearDAC (ULONG port)
+ULONG
+SiS_GetReg3(USHORT port)
 {
-	int i;
+   ULONG   data;
 
-	OutPortByte (port, 0);
-	port++;
-	for (i = 0; i < 256 * 3; i++) {
-		OutPortByte (port, 0);
-	}
+   data = InPortLong(port);
 
+   return(data);
 }
 
-/*========================================== */
+void
+SiS_ClearDAC(ULONG port)
+{
+   int i;
+
+   OutPortByte(port, 0);
+   port++;
+   for (i=0; i<256*3; i++) {
+      OutPortByte(port, 0);
+   }
 
+}
+/* ========================================== */
+#if 0  /* TW: Not done in any BIOS */
 void
-SiS_SetInterlace (ULONG ROMAddr, USHORT ModeNo, USHORT RefreshRateTableIndex)
+SiS_SetInterlace(UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex)
 {
-	ULONG Temp;
-	USHORT data, Temp2;
+  ULONG Temp;
+  USHORT data,Temp2;
+
+  if (ModeNo<=0x13) return;
 
-	Temp = (ULONG) SiS_GetReg1 (SiS_P3d4, 0x01);
-	Temp++;
-	Temp = Temp * 8;
+  Temp = (ULONG)SiS_GetReg1(SiS_P3d4,0x01);
+  Temp++;
+  Temp <<= 3;
 
-	if (Temp == 1024)
-		data = 0x0035;
-	else if (Temp == 1280)
-		data = 0x0048;
-	else
-		data = 0x0000;
+  if(Temp == 1024) data = 0x0035;
+  else if(Temp == 1280) data = 0x0048;
+  else data = 0x0000;
 
-	Temp2 = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
-	Temp2 &= InterlaceMode;
-	if (Temp2 == 0)
-		data = 0x0000;
+  Temp2 = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+  Temp2 &= InterlaceMode;
+  if(Temp2 == 0) data=0x0000;
 
-	SiS_SetReg1 (SiS_P3d4, 0x19, data);
+  SiS_SetReg1(SiS_P3d4,0x19,data);
 
-	Temp = (ULONG) SiS_GetReg1 (SiS_P3d4, 0x1A);
-	Temp2 = (USHORT) (Temp & 0xFC);
-	SiS_SetReg1 (SiS_P3d4, 0x1A, (USHORT) Temp);
+  Temp = (ULONG)SiS_GetReg1(SiS_P3d4,0x1A);
+  Temp = (USHORT)(Temp & 0xFC);
+  SiS_SetReg1(SiS_P3d4,0x1A,(USHORT)Temp);
 
-	Temp = (ULONG) SiS_GetReg1 (SiS_P3c4, 0x0f);
-	Temp2 = (USHORT) Temp & 0xBF;
-	if (ModeNo == 0x37)
-		Temp2 = Temp2 | 0x40;
-	SiS_SetReg1 (SiS_P3d4, 0x1A, (USHORT) Temp2);
+  Temp = (ULONG)SiS_GetReg1(SiS_P3c4,0x0f);
+  Temp2 = (USHORT)Temp & 0xBF;
+  if(ModeNo==0x37) Temp2 |= 0x40;
+  SiS_SetReg1(SiS_P3d4,0x1A,(USHORT)Temp2);
 }
+#endif
 
+/* TW: Checked against 650/LVDS (1.10.07), 650/301LV and 315 BIOS */
+#ifdef SIS315H
 void
-SiS_SetCRT1FIFO (ULONG ROMAddr, USHORT ModeNo,
-		 PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetCRT1FIFO_310(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-
-	USHORT data;
-
-	data = SiS_GetReg1 (SiS_P3c4, 0x3D);
-	data &= 0xfe;
-	SiS_SetReg1 (SiS_P3c4, 0x3D, data);	/* diable auto-threshold */
-	if (ModeNo > 0x13) {
-		SiS_SetReg1 (SiS_P3c4, 0x08, 0x34);
-		data = SiS_GetReg1 (SiS_P3c4, 0x09);
-		data &= 0xF0;
-		SiS_SetReg1 (SiS_P3c4, 0x09, data);
-
-		data = SiS_GetReg1 (SiS_P3c4, 0x3D);
-		data |= 0x01;
-		SiS_SetReg1 (SiS_P3c4, 0x3D, data);
-	} else {
-		SiS_SetReg1 (SiS_P3c4, 0x08, 0xAE);
-		data = SiS_GetReg1 (SiS_P3c4, 0x09);
-		data &= 0xF0;
-		SiS_SetReg1 (SiS_P3c4, 0x09, data);
-	}
-
+  USHORT modeflag;
+
+  SiS_SetRegAND(SiS_P3c4,0x3D,0xFE);  /* disable auto-threshold */
+
+  if(ModeNo > 0x13) {
+    modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    if( (!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
+       SiS_SetReg1(SiS_P3c4,0x08,0x34);
+       SiS_SetRegAND(SiS_P3c4,0x09,0xF0);
+       SiS_SetRegOR(SiS_P3c4,0x3D,0x01);
+    } else {
+       SiS_SetReg1(SiS_P3c4,0x08,0xAE);
+       SiS_SetRegAND(SiS_P3c4,0x09,0xF0);
+    }
+  } else {
+    SiS_SetReg1(SiS_P3c4,0x08,0xAE);
+    SiS_SetRegAND(SiS_P3c4,0x09,0xF0);
+  }
 }
+#endif
 
+#if 0  /* TW: Unused */
 USHORT
-SiS_CalcDelay (ULONG ROMAddr, USHORT key)
-{
-	USHORT data, data2, temp0, temp1;
-	UCHAR ThLowA[] = { 61, 3, 52, 5, 68, 7, 100, 11,
-		43, 3, 42, 5, 54, 7, 78, 11,
-		34, 3, 37, 5, 47, 7, 67, 11
-	};
-	UCHAR ThLowB[] = { 81, 4, 72, 6, 88, 8, 120, 12,
-		55, 4, 54, 6, 66, 8, 90, 12,
-		42, 4, 45, 6, 55, 8, 75, 12
-	};
-	UCHAR ThTiming[] = { 1, 2, 2, 3, 0, 1, 1, 2 };
-
-	data = SiS_GetReg1 (SiS_P3c4, 0x16);
-	data = data >> 6;
-	data2 = SiS_GetReg1 (SiS_P3c4, 0x14);
-	data2 = (data2 >> 4) & 0x0C;
-	data = data | data2;
-	data = data < 1;
-	if (key == 0) {
-		temp0 = (USHORT) ThLowA[data];
-		temp1 = (USHORT) ThLowA[data + 1];
-	} else {
-		temp0 = (USHORT) ThLowB[data];
-		temp1 = (USHORT) ThLowB[data + 1];
-	}
-
-	data2 = 0;
-	data = SiS_GetReg1 (SiS_P3c4, 0x18);
-	if (data & 0x02)
-		data2 = data2 | 0x01;
-	if (data & 0x20)
-		data2 = data2 | 0x02;
-	if (data & 0x40)
-		data2 = data2 | 0x04;
-
-	data = temp1 * ThTiming[data2] + temp0;
-	return (data);
+SiS_CalcDelay(UCHAR *ROMAddr,USHORT key)
+{
+  USHORT data,data2,temp0,temp1;
+  UCHAR   ThLowA[]=   {61,3,52,5,68,7,100,11,
+                       43,3,42,5,54,7, 78,11,
+                       34,3,37,5,47,7, 67,11};
+  UCHAR   ThLowB[]=   {81,4,72,6,88,8,120,12,
+                       55,4,54,6,66,8, 90,12,
+                       42,4,45,6,55,8, 75,12};
+  UCHAR   ThTiming[]= {1,2,2,3,0,1,1,2};
+
+  data=SiS_GetReg1(SiS_P3c4,0x16);
+  data=data>>6;
+  data2=SiS_GetReg1(SiS_P3c4,0x14);
+  data2=(data2>>4)&0x0C;
+  data=data|data2;
+  data=data<1;
+  if(key==0) {
+    temp0=(USHORT)ThLowA[data];
+    temp1=(USHORT)ThLowA[data+1];
+  } else {
+    temp0=(USHORT)ThLowB[data];
+    temp1=(USHORT)ThLowB[data+1];
+  }
+
+  data2=0;
+  data=SiS_GetReg1(SiS_P3c4,0x18);
+  if(data&0x02) data2=data2|0x01;
+  if(data&0x20) data2=data2|0x02;
+  if(data&0x40) data2=data2|0x04;
+
+  data=temp1*ThTiming[data2]+temp0;
+  return(data);
 }
+#endif
 
+#ifdef SIS300
 void
-SiS_SetCRT1FIFO2 (ULONG ROMAddr, USHORT ModeNo,
-		  PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		  USHORT RefreshRateTableIndex)
-{
-	USHORT i, index, data, VCLK, data2, MCLK, colorth = 0;
-	USHORT ah, bl, B;
-	ULONG eax;
-	USHORT ThresholdLow = 0;
-	UCHAR FQBQData[] = { 0x01, 0x21, 0x41, 0x61, 0x81,
-		0x31, 0x51, 0x71, 0x91, 0xb1,
-		0x00, 0x20, 0x40, 0x60, 0x80,
-		0x30, 0x50, 0x70, 0x90, 0xb0, 0xFF
-	};
-
-	if (ModeNo >= 0x13) {
-		index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
-		if (HwDeviceExtension->jChipType < SIS_315H) {	/* for300 serial */
-			index = index & 0x3F;
-		}
-		VCLK = SiS_VCLKData[index].CLOCK;	/* Get VCLK  */
-		index = SiS_GetReg1 (SiS_P3c4, 0x1A);
-		index = index & 07;
-		MCLK = SiS_MCLKData[index].CLOCK;	/* Get MCLK  */
-		data2 = SiS_ModeType - 0x02;
-		switch (data2) {
-		case 0:
-			colorth = 1;
-			break;
-		case 1:
-			colorth = 2;
-			break;
-		case 2:
-			colorth = 4;
-			break;
-		case 3:
-			colorth = 4;
-			break;
-		case 4:
-			colorth = 6;
-			break;
-		case 5:
-			colorth = 8;
-			break;
-		}
-
-		i = 0;
-		do {
-			B =
-			    (SiS_CalcDelay2 (ROMAddr, FQBQData[i]) * VCLK *
-			     colorth);
-			bl = B / (16 * MCLK);
-			if (B == bl * 16 * MCLK) {
-				bl = bl + 1;
-			} else {
-				bl = bl + 1;
-			}
-
-			if (bl > 0x13) {
-				if (FQBQData[i + 1] == 0xFF) {
-					ThresholdLow = 0x13;
-					break;
-				}
-				i++;
-			} else {
-				ThresholdLow = bl;
-				break;
-			}
-		} while (FQBQData[i] != 0xFF);
-	} else {
-		ThresholdLow = 0x02;
-	}
+SiS_SetCRT1FIFO_300(UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                    USHORT RefreshRateTableIndex)
+{
+  USHORT  i,index,data,VCLK,MCLK,colorth=0;
+  ULONG   B,eax,bl,data2;
+  USHORT  ThresholdLow=0;
+  UCHAR   FQBQData[]= { 0x01,0x21,0x41,0x61,0x81,
+                        0x31,0x51,0x71,0x91,0xb1,
+                        0x00,0x20,0x40,0x60,0x80,
+                        0x30,0x50,0x70,0x90,0xb0,0xFF};
+
+  i=0;
+  if(ModeNo >= 0x13) {
+    index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+    index &= 0x3F;
+    VCLK = SiS_VCLKData[index].CLOCK;             /* Get VCLK  */
+
+    index = SiS_GetReg1(SiS_P3c4,0x1A);
+    index &= 0x07;
+    MCLK = SiS_MCLKData_0[index].CLOCK;           /* Get MCLK  */
+
+    data2 = SiS_ModeType - ModeEGA;
+    switch (data2) {
+        case 0 : colorth = 1; break;
+        case 1 : colorth = 1; break;
+        case 2 : colorth = 2; break;
+        case 3 : colorth = 2; break;
+        case 4 : colorth = 3; break;
+        case 5 : colorth = 4; break;
+    }
+
+    do{
+       B = SiS_CalcDelay2(ROMAddr,FQBQData[i]) * VCLK * colorth;
+       bl = B / (MCLK * 16);
+
+       if (B==bl*16*MCLK) {
+         bl = bl + 1;
+       } else {
+         bl = bl + 2;
+       }
+
+       if(bl > 0x13) {
+          if(FQBQData[i+1] == 0xFF) {
+             ThresholdLow = 0x13;
+             break;
+          }
+          i++;
+       } else {
+          ThresholdLow = bl;
+          break;
+       }
+    } while(FQBQData[i] != 0xFF);
+  }
+  else {
+    ThresholdLow = 0x02;
+  }
+
+  /* Write foreground and background queue */
+  data2 = FQBQData[i];
+  data2 = (data2 & 0xf0)>>4;
+  data2 <<= 24;
+
+#ifndef LINUX_XF86
+  SiS_SetReg4(0xcf8,0x80000050);
+  eax = SiS_GetReg3(0xcfc);
+  eax &= 0xf0ffffff;
+  eax |= data2;
+  SiS_SetReg4(0xcfc,eax);
+#else
+  /* We use pci functions X offers. We use pcitag 0, because
+   * we want to read/write to the host bridge (which is always
+   * 00:00.0 on 630, 730 and 540), not the VGA device.
+   */
+  eax = pciReadLong(0x00000000, 0x50);
+  eax &= 0xf0ffffff;
+  eax |= data2;
+  pciWriteLong(0x00000000, 0x50, eax);
+#endif
 
-	data2 = FQBQData[i];
-	data2 = (data2 & 0xf0) >> 4;
-	data2 = data2 << 24;
+  /* TODO: write GUI grant timer (PCI config 0xA3) */
 
-	SiS_SetReg4 (0xcf8, 0x80000050);
-	eax = SiS_GetReg3 (0xcfc);
-	eax = eax & 0x0f0ffffff;
-	eax = eax | data2;
-	SiS_SetReg4 (0xcfc, eax);
+  /* Write CRT/CPU threshold low, CRT/Engine threshold high */
+  data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
+  SiS_SetReg1(SiS_P3c4,0x08,data);
 
-	ah = ThresholdLow;
-	ah = ah << 4;
-	ah = ah | 0x0f;
-	SiS_SetReg1 (SiS_P3c4, 0x08, ah);
+  data = (ThresholdLow & 0x10) << 1;
+  SiS_SetRegANDOR(SiS_P3c4,0x0F,0xDF,data);
 
-	data = ThresholdLow;
-	data = data & 0x10;
-	data = data << 1;
-	SiS_SetRegANDOR (SiS_P3c4, 0x0F, 0xDF, data);
-	SiS_SetReg1 (SiS_P3c4, 0x3B, 0x09);
+  /* What is this? */
+  SiS_SetReg1(SiS_P3c4,0x3B,0x09);
 
-	data = ThresholdLow + 3;
-	if (data > 0x0f)
-		data = 0x0f;
-	SiS_SetRegANDOR (SiS_P3c4, 0x09, 0x80, data);
+  /* Write CRT/CPU threshold high */
+  data = ThresholdLow + 3;
+  if(data > 0x0f) data = 0x0f;
+  SiS_SetRegANDOR(SiS_P3c4,0x09,0x80,data);
 }
 
 USHORT
-SiS_CalcDelay2 (ULONG ROMAddr, UCHAR key)
-{
-	USHORT data, index;
-	UCHAR LatencyFactor[] = { 97, 88, 86, 79, 77, 00,	/*; 64  bit    BQ=2   */
-		00, 87, 85, 78, 76, 54,	/*; 64  bit    BQ=1   */
-		97, 88, 86, 79, 77, 00,	/*; 128 bit    BQ=2   */
-		00, 79, 77, 70, 68, 48,	/*; 128 bit    BQ=1   */
-		80, 72, 69, 63, 61, 00,	/*; 64  bit    BQ=2   */
-		00, 70, 68, 61, 59, 37,	/*; 64  bit    BQ=1   */
-		86, 77, 75, 68, 66, 00,	/*; 128 bit    BQ=2   */
-		00, 68, 66, 59, 57, 37
-	};			/*; 128 bit    BQ=1   */
-
-	index = (key & 0xE0) >> 5;
-	if (key & 0x10)
-		index = index + 6;
-	if (!(key & 0x01))
-		index = index + 24;
-	data = SiS_GetReg1 (SiS_P3c4, 0x14);
-	if (data & 0x0080)
-		index = index + 12;
-
-	data = LatencyFactor[index];
-	return (data);
-}
-
-void
-SiS_CRT2AutoThreshold (USHORT BaseAddr)
+SiS_CalcDelay2(UCHAR *ROMAddr,UCHAR key)
 {
-	USHORT temp1;
-	USHORT Part1Port;
-	Part1Port = BaseAddr + SIS_CRT2_PORT_04;
-	temp1 = SiS_GetReg1 (SiS_Part1Port, 0x1);
-	temp1 |= 0x40;
-	SiS_SetReg1 (SiS_Part1Port, 0x1, temp1);
+  USHORT data,index;
+  UCHAR  LatencyFactor[] ={ 97, 88, 86, 79, 77, 00,       /*; 64  bit    BQ=2   */
+                            00, 87, 85, 78, 76, 54,       /*; 64  bit    BQ=1   */
+                            97, 88, 86, 79, 77, 00,       /*; 128 bit    BQ=2   */
+                            00, 79, 77, 70, 68, 48,       /*; 128 bit    BQ=1   */
+                            80, 72, 69, 63, 61, 00,       /*; 64  bit    BQ=2   */
+                            00, 70, 68, 61, 59, 37,       /*; 64  bit    BQ=1   */
+                            86, 77, 75, 68, 66, 00,       /*; 128 bit    BQ=2   */
+                            00, 68, 66, 59, 57, 37};      /*; 128 bit    BQ=1   */
+
+  index = (key & 0xE0) >> 5;
+  if(key & 0x10) index +=6;
+  if(!(key & 0x01)) index += 24;
+  data = SiS_GetReg1(SiS_P3c4,0x14);
+  if(data & 0x0080) index += 12;
+
+  data = LatencyFactor[index];
+  return(data);
 }
+#endif
+
+/* =============== Autodetection ================ */
 
-/* =============  ynlai ============== */
+#ifndef LINUX_XF86
+
+/* (ynlai) */
 void
-SiS_DetectMonitor (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_DetectMonitor(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
-	UCHAR DAC_TEST_PARMS[] = { 0x0F, 0x0F, 0x0F };
-	UCHAR DAC_CLR_PARMS[] = { 0x00, 0x00, 0x00 };
-	USHORT SR1F;
-
-	SR1F = SiS_GetReg1 (SiS_P3c4, 0x1F);
-	SiS_SetRegANDOR (SiS_P3c4, 0x1F, 0xFF, 0x04);
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (SiS_BridgeIsOn (BaseAddr)) {
-			SiS_SetReg1 (SiS_P3d4, 0x30, 0x41);
-		}
-	}
-	SiSSetMode (HwDeviceExtension, 0x03);	/* InitMode */
-	SiS_SetReg3 (SiS_P3c6, 0xff);
-	SiS_ClearDAC (SiS_P3c8);
-	SiS_LongWait ();
-	SiS_LongWait ();
-	SiS_SetRegANDOR (SiS_P3d4, 0x32, 0xDF, 0x00);
-	if (SiS_TestMonitorType
-	    (DAC_TEST_PARMS[0], DAC_TEST_PARMS[1], DAC_TEST_PARMS[2])) {
-		SiS_SetRegANDOR (SiS_P3d4, 0x32, 0xDF, 0x20);
-	}
-	if (SiS_TestMonitorType
-	    (DAC_TEST_PARMS[0], DAC_TEST_PARMS[1], DAC_TEST_PARMS[2])) {
-		SiS_SetRegANDOR (SiS_P3d4, 0x32, 0xDF, 0x20);
-	}
-	SiS_TestMonitorType (DAC_CLR_PARMS[0], DAC_CLR_PARMS[1],
-			     DAC_CLR_PARMS[2]);
-	SiS_SetReg1 (SiS_P3c4, 0x1F, SR1F);
+  UCHAR  DAC_TEST_PARMS[]={0x0F,0x0F,0x0F};
+  UCHAR  DAC_CLR_PARMS[]={0x00,0x00,0x00};
+  USHORT SR1F;
+
+  SR1F=SiS_GetReg1(SiS_P3c4,0x1F);		/* DAC pedestal */
+  SiS_SetRegANDOR(SiS_P3c4,0x1F,0xFF,0x04);
+  if(SiS_IF_DEF_LVDS==0) {
+    if(SiS_BridgeIsOn(BaseAddr)==0) {    /* TW: Inserted "==0" */
+      SiS_SetReg1(SiS_P3d4,0x30,0x41);
+    }
+  }
+  /*SiSSetMode(HwDeviceExtension,0x03);  */ /* ynlai InitMode */
+
+  SiSSetMode(HwDeviceExtension,0x2E);   /* alan */
+  SiS_SetReg3(SiS_P3c6,0xff);
+  SiS_ClearDAC(SiS_P3c8);
+  SiS_LongWait();
+  SiS_LongWait();
+  SiS_SetRegANDOR(SiS_P3d4,0x32,0xDF,0x00);
+  if(SiS_TestMonitorType(DAC_TEST_PARMS[0],DAC_TEST_PARMS[1],DAC_TEST_PARMS[2])) {
+    SiS_SetRegANDOR(SiS_P3d4,0x32,0xDF,0x20);
+  }
+  if(SiS_TestMonitorType(DAC_TEST_PARMS[0],DAC_TEST_PARMS[1],DAC_TEST_PARMS[2])) {
+    SiS_SetRegANDOR(SiS_P3d4,0x32,0xDF,0x20);
+  }
+  SiS_TestMonitorType(DAC_CLR_PARMS[0],DAC_CLR_PARMS[1],DAC_CLR_PARMS[2]);
+  SiS_SetReg1(SiS_P3c4,0x1F,SR1F);
 }
 
 USHORT
-SiS_TestMonitorType (UCHAR R_DAC, UCHAR G_DAC, UCHAR B_DAC)
-{
-	USHORT temp, tempbx;
-
-	tempbx = R_DAC * 0x4d + G_DAC * 0x97 + B_DAC * 0x1c;
-	if (tempbx > 0x80)
-		tempbx = tempbx + 0x100;
-	tempbx = (tempbx & 0xFF00) >> 8;
-	R_DAC = (UCHAR) tempbx;
-	G_DAC = (UCHAR) tempbx;
-	B_DAC = (UCHAR) tempbx;
-
-	SiS_SetReg3 (SiS_P3c8, 0x00);
-	SiS_SetReg3 (SiS_P3c9, R_DAC);
-	SiS_SetReg3 (SiS_P3c9, G_DAC);
-	SiS_SetReg3 (SiS_P3c9, B_DAC);
-	SiS_LongWait ();
-	temp = SiS_GetReg2 (SiS_P3c2);
-	if (temp & 0x10)
-		return (1);
-	else
-		return (0);
+SiS_TestMonitorType(UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC)
+{
+   USHORT temp,tempbx;
+
+   tempbx=R_DAC*0x4d+G_DAC*0x97+B_DAC*0x1c;
+   if(tempbx>0x80) tempbx=tempbx+0x100;
+   tempbx = (tempbx&0xFF00)>>8;
+   R_DAC = (UCHAR) tempbx;
+   G_DAC = (UCHAR) tempbx;
+   B_DAC = (UCHAR) tempbx;
+
+   SiS_SetReg3(SiS_P3c8,0x00);
+   SiS_SetReg3(SiS_P3c9,R_DAC);
+   SiS_SetReg3(SiS_P3c9,G_DAC);
+   SiS_SetReg3(SiS_P3c9,B_DAC);
+   SiS_LongWait();
+   temp=SiS_GetReg2(SiS_P3c2);
+   if(temp&0x10) return(1);
+   else return(0);
 }
 
 /* ---- test ----- */
 void
-SiS_GetSenseStatus (PSIS_HW_DEVICE_INFO HwDeviceExtension, ULONG ROMAddr)
-{
-	USHORT tempax = 0, tempbx, tempcx, temp;
-	USHORT P2reg0 = 0, SenseModeNo = 0, OutputSelect = *pSiS_OutputSelect;
-	USHORT ModeIdIndex, i;
-	USHORT BaseAddr = (USHORT) HwDeviceExtension->ulIOAddress;
-
-	if (SiS_IF_DEF_LVDS == 1) {
-		SiS_GetPanelID ();
-		temp = LCDSense;
-		temp = temp | SiS_SenseCHTV ();
-		tempbx = ~(LCDSense | AVIDEOSense | SVIDEOSense);
-		SiS_SetRegANDOR (SiS_P3d4, 0x32, tempbx, temp);
-	} else {		/* for 301 */
-		if (SiS_IF_DEF_HiVision == 1) {	/* for HiVision */
-			tempax = SiS_GetReg1 (SiS_P3c4, 0x38);
-			temp = tempax & 0x01;
-			tempax = SiS_GetReg1 (SiS_P3c4, 0x3A);
-			temp = temp | (tempax & 0x02);
-			SiS_SetRegANDOR (SiS_P3d4, 0x32, 0xA0, temp);
-		} else {
-			if (SiS_BridgeIsOn (BaseAddr)) {
-				P2reg0 = SiS_GetReg1 (SiS_Part2Port, 0x00);
-				if (!SiS_BridgeIsEnable
-				    (BaseAddr, HwDeviceExtension)) {
-					SenseModeNo = 0x2e;
-					temp =
-					    SiS_SearchModeID (ROMAddr,
-							      SenseModeNo,
-							      &ModeIdIndex);
-					SiS_SetFlag = 0x00;
-					SiS_ModeType = ModeVGA;
-					SiS_VBInfo =
-					    SetCRT2ToRAMDAC | LoadDACFlag |
-					    SetInSlaveMode;
-					SiS_SetCRT2Group301 (BaseAddr, ROMAddr,
-							     SenseModeNo,
-							     HwDeviceExtension);
-					for (i = 0; i < 20; i++) {
-						SiS_LongWait ();
-					}
-				}
-				SiS_SetReg1 (SiS_Part2Port, 0x00, 0x1c);
-				tempax = 0;
-				tempbx = *pSiS_RGBSenseData;
-				/*301b */
-				if (!(SiS_Is301B (BaseAddr))) {
-					tempbx = *pSiS_RGBSenseData2;
-				}
-				/*end 301b */
-				tempcx = 0x0E08;
-				if (SiS_Sense (SiS_Part4Port, tempbx, tempcx)) {
-					if (SiS_Sense
-					    (SiS_Part4Port, tempbx, tempcx)) {
-						tempax = tempax | Monitor2Sense;
-					}
-				}
-
-				tempbx = *pSiS_YCSenseData;
-				/*301b */
-				if (!(SiS_Is301B (BaseAddr))) {
-					tempbx = *pSiS_YCSenseData2;
-				}
-				/*301b */
-				tempcx = 0x0604;
-				if (SiS_Sense (SiS_Part4Port, tempbx, tempcx)) {
-					if (SiS_Sense
-					    (SiS_Part4Port, tempbx, tempcx)) {
-						tempax = tempax | SVIDEOSense;
-					}
-				}
-
-				if (OutputSelect & BoardTVType) {
-					tempbx = *pSiS_VideoSenseData;
-					/*301b */
-					if (!(SiS_Is301B (BaseAddr))) {
-						tempbx = *pSiS_VideoSenseData2;
-					}
-					/*end 301b */
-					tempcx = 0x0804;
-					if (SiS_Sense
-					    (SiS_Part4Port, tempbx, tempcx)) {
-						if (SiS_Sense
-						    (SiS_Part4Port, tempbx,
-						     tempcx)) {
-							tempax =
-							    tempax |
-							    AVIDEOSense;
-						}
-					}
-				} else {
-					if (!(tempax & SVIDEOSense)) {
-						tempbx = *pSiS_VideoSenseData;
-						/*301b */
-						if (!(SiS_Is301B (BaseAddr))) {
-							tempbx =
-							    *pSiS_VideoSenseData2;
-						}
-						/*end 301b */
-						tempcx = 0x0804;
-						if (SiS_Sense
-						    (SiS_Part4Port, tempbx,
-						     tempcx)) {
-							if (SiS_Sense
-							    (SiS_Part4Port,
-							     tempbx, tempcx)) {
-								tempax =
-								    tempax |
-								    AVIDEOSense;
-							}
-						}
-					}
-				}
-			}
-
-			if (SiS_SenseLCD (HwDeviceExtension)) {
-				tempax = tempax | LCDSense;
-			}
-
-			tempbx = 0;
-			tempcx = 0;
-			SiS_Sense (SiS_Part4Port, tempbx, tempcx);
-
-			SiS_SetRegANDOR (SiS_P3d4, 0x32, ~0xDF, tempax);
-			SiS_SetReg1 (SiS_Part2Port, 0x00, P2reg0);
-			if (!(P2reg0 & 0x20)) {
-				SiS_VBInfo = DisableCRT2Display;
-				SiS_SetCRT2Group301 (BaseAddr, ROMAddr,
-						     SenseModeNo,
-						     HwDeviceExtension);
-			}
-		}
-	}
+SiS_GetSenseStatus(PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr)
+{
+  USHORT tempax=0,tempbx,tempcx,temp;
+  USHORT P2reg0=0,SenseModeNo=0,OutputSelect=*pSiS_OutputSelect;
+  USHORT ModeIdIndex,i;
+  USHORT BaseAddr = (USHORT)HwDeviceExtension->ulIOAddress;
+
+  if(SiS_IF_DEF_LVDS==1){
+    SiS_GetPanelID();
+    temp=LCDSense;
+    temp=temp|SiS_SenseCHTV();
+    tempbx=~(LCDSense|AVIDEOSense|SVIDEOSense);
+    SiS_SetRegANDOR(SiS_P3d4,0x32,tempbx,temp);
+  } else {       /* for 301 */
+    if(SiS_IF_DEF_HiVision==1) {  /* for HiVision */
+      tempax=SiS_GetReg1(SiS_P3c4,0x38);
+      temp=tempax&0x01;
+      tempax=SiS_GetReg1(SiS_P3c4,0x3A);
+      temp=temp|(tempax&0x02);
+      SiS_SetRegANDOR(SiS_P3d4,0x32,0xA0,temp);
+    } else {
+      if(SiS_BridgeIsOn(BaseAddr)==0) {    /* TW: Inserted "==0" */
+        P2reg0 = SiS_GetReg1(SiS_Part2Port,0x00);
+        if(!SiS_BridgeIsEnable(BaseAddr,HwDeviceExtension)) {
+          SenseModeNo=0x2e;
+          temp = SiS_SearchModeID(ROMAddr,&SenseModeNo,&ModeIdIndex);
+          SiS_SetFlag = 0x00;
+          SiS_ModeType = ModeVGA;
+          SiS_VBInfo = SetCRT2ToRAMDAC |LoadDACFlag |SetInSlaveMode;
+          SiS_SetCRT2Group301(BaseAddr,ROMAddr,SenseModeNo,HwDeviceExtension);
+          for(i=0;i<20;i++) {
+            SiS_LongWait();
+          }
+        }
+        SiS_SetReg1(SiS_Part2Port,0x00,0x1c);
+        tempax=0;
+        tempbx=*pSiS_RGBSenseData;
+	if(SiS_Is301B(BaseAddr)){
+                tempbx=*pSiS_RGBSenseData2;
+        }
+        tempcx=0x0E08;
+        if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+          if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+            tempax=tempax|Monitor2Sense;
+          }
+        }
+        tempbx=*pSiS_YCSenseData;
+        if(SiS_Is301B(BaseAddr)){
+               tempbx=*pSiS_YCSenseData2;
+        }
+        tempcx=0x0604;
+        if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+          if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+            tempax=tempax|SVIDEOSense;
+          }
+        }
+
+        if(OutputSelect&BoardTVType){
+          tempbx=*pSiS_VideoSenseData;
+        if(SiS_Is301B(BaseAddr)){
+             tempbx=*pSiS_VideoSenseData2;
+        }
+          tempcx=0x0804;
+          if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+            if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+              tempax=tempax|AVIDEOSense;
+            }
+          }
+        } else {
+          if(!(tempax&SVIDEOSense)){
+            tempbx=*pSiS_VideoSenseData;
+            if(SiS_Is301B(BaseAddr)){
+              tempbx=*pSiS_VideoSenseData2;
+            }
+            tempcx=0x0804;
+            if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+              if(SiS_Sense(SiS_Part4Port,tempbx,tempcx)){
+                tempax=tempax|AVIDEOSense;
+              }
+            }
+          }
+        }
+      }
+
+      if(SiS_SenseLCD(HwDeviceExtension)){
+        tempax=tempax|LCDSense;
+      }
+
+      tempbx=0;
+      tempcx=0;
+      SiS_Sense(SiS_Part4Port,tempbx,tempcx);
+  
+      if((SiS_VBType & VB_SIS301LV)||(SiS_VBType & VB_SIS302LV)){
+         tempax &= 0x00ef;   /* 301lv to disable CRT2*/
+      }
+      SiS_SetRegANDOR(SiS_P3d4,0x32,~0xDF,tempax);
+      SiS_SetReg1(SiS_Part2Port,0x00,P2reg0);
+      if(!(P2reg0&0x20)) {
+        SiS_VBInfo = DisableCRT2Display;
+        SiS_SetCRT2Group301(BaseAddr,ROMAddr,SenseModeNo,HwDeviceExtension);
+      }
+    }
+  }
 }
 
 BOOLEAN
-SiS_Sense (USHORT Part4Port, USHORT tempbx, USHORT tempcx)
+SiS_Sense(USHORT Part4Port,USHORT tempbx,USHORT tempcx)
 {
-	USHORT temp, i, tempch;
-
-	temp = tempbx & 0xFF;
-	SiS_SetReg1 (SiS_Part4Port, 0x11, temp);
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp | (tempcx & 0x00FF);
-	SiS_SetRegANDOR (SiS_Part4Port, 0x10, ~0x1F, temp);
-
-	for (i = 0; i < 10; i++)
-		SiS_LongWait ();
-
-	tempch = (tempcx & 0x7F00) >> 8;	/*   ynlai [05/22/2001]  */
-	temp = SiS_GetReg1 (SiS_Part4Port, 0x03);
-	temp = temp ^ (0x0E);
-	temp = temp & tempch;	/*   ynlai [05/22/2001]  */
-	if (temp > 0)
-		return 1;
-	else
-		return 0;
+  USHORT temp,i,tempch;
+
+  temp=tempbx&0xFF;
+  SiS_SetReg1(SiS_Part4Port,0x11,temp);
+  temp=(tempbx&0xFF00)>>8;
+  temp=temp|(tempcx&0x00FF);
+  SiS_SetRegANDOR(SiS_Part4Port,0x10,~0x1F,temp);
+
+  for(i=0;i<10;i++) SiS_LongWait();
+
+  tempch=(tempcx&0x7F00)>>8;      /*   ynlai [05/22/2001]  */
+  temp=SiS_GetReg1(SiS_Part4Port,0x03);
+  temp=temp^(0x0E);
+  temp=temp&tempch;               /*   ynlai [05/22/2001]  */
+  if(temp>0) return 1;
+  else return 0;
 }
 
 USHORT
-SiS_SenseLCD (PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SenseLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-/*  USHORT SoftSetting; */
-	USHORT temp;
+  USHORT temp;
 
-	temp = SiS_GetPanelID ();
-	if (!temp)
-		temp = SiS_GetLCDDDCInfo (HwDeviceExtension);
-	return (temp);
+  temp=SiS_GetPanelID();
+  if(!temp)  temp=SiS_GetLCDDDCInfo(HwDeviceExtension);
+  return(temp);
 }
 
 BOOLEAN
-SiS_GetLCDDDCInfo (PSIS_HW_DEVICE_INFO HwDeviceExtension)
-{
-	USHORT temp;
-	//add lcd sense
-	if (HwDeviceExtension->ulCRT2LCDType == LCD_UNKNOWN)
-		return 0;
-	else {
-		temp = (USHORT) HwDeviceExtension->ulCRT2LCDType;
-		SiS_SetReg1 (SiS_P3d4, 0x36, temp);
-		return 1;
-	}
+SiS_GetLCDDDCInfo(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT temp;
+  /*add lcd sense*/
+  if(HwDeviceExtension->ulCRT2LCDType==LCD_UNKNOWN)
+    	return 0;
+  else{
+     	temp=(USHORT)HwDeviceExtension->ulCRT2LCDType;
+     	SiS_SetReg1(SiS_P3d4,0x36,temp);
+  	return 1;
+  }
 }
 
 BOOLEAN
-SiS_GetPanelID (void)
-{
-	USHORT PanelTypeTable[16] =
-	    { SyncNN | PanelRGB18Bit | Panel800x600 | _PanelType00,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType01,
-		SyncPP | PanelRGB18Bit | Panel800x600 | _PanelType02,
-		SyncNN | PanelRGB18Bit | Panel640x480 | _PanelType03,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType04,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType05,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType06,
-		SyncNN | PanelRGB24Bit | Panel1024x768 | _PanelType07,
-		SyncNN | PanelRGB18Bit | Panel800x600 | _PanelType08,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType09,
-		SyncNN | PanelRGB18Bit | Panel800x600 | _PanelType0A,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0B,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0C,
-		SyncNN | PanelRGB24Bit | Panel1024x768 | _PanelType0D,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0E,
-		SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0F
-	};
-	USHORT tempax, tempbx, temp;
-/*  USHORT return_flag; */
-
-	tempax = SiS_GetReg1 (SiS_P3c4, 0x18);
-	tempbx = tempax & 0x0F;
-	if (!(tempax & 0x10)) {
-		if (SiS_IF_DEF_LVDS == 1) {
-			tempbx = 0;
-			temp = SiS_GetReg1 (SiS_P3c4, 0x38);
-			if (temp & 0x40)
-				tempbx = tempbx | 0x08;
-			if (temp & 0x20)
-				tempbx = tempbx | 0x02;
-			if (temp & 0x01)
-				tempbx = tempbx | 0x01;
-			temp = SiS_GetReg1 (SiS_P3c4, 0x39);
-			if (temp & 0x80)
-				tempbx = tempbx | 0x04;
-		} else {
-			return 0;
-		}
-	}
-
-	tempbx = tempbx << 1;
-	tempbx = PanelTypeTable[tempbx];
-	tempbx = tempbx | LCDSync;
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_P3d4, 0x36, temp);
-	temp = (tempbx & 0xFF00) >> 8;
-	SiS_SetRegANDOR (SiS_P3d4, 0x37, ~(LCDSyncBit | LCDRGB18Bit), temp);
-	return 1;
+SiS_GetPanelID(void)
+{
+  USHORT PanelTypeTable[16]={ SyncNN | PanelRGB18Bit | Panel800x600  | _PanelType00,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType01,
+                              SyncPP | PanelRGB18Bit | Panel800x600  | _PanelType02,
+                              SyncNN | PanelRGB18Bit | Panel640x480  | _PanelType03,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType04,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType05,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType06,
+                              SyncNN | PanelRGB24Bit | Panel1024x768 | _PanelType07,
+                              SyncNN | PanelRGB18Bit | Panel800x600  | _PanelType08,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType09,
+                              SyncNN | PanelRGB18Bit | Panel800x600  | _PanelType0A,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0B,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0C,
+                              SyncNN | PanelRGB24Bit | Panel1024x768 | _PanelType0D,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0E,
+                              SyncNN | PanelRGB18Bit | Panel1024x768 | _PanelType0F
+                              };
+  USHORT tempax,tempbx,temp;
+
+  tempax = SiS_GetReg1(SiS_P3c4,0x18);
+  tempbx = tempax & 0x0F;
+  if(!(tempax & 0x10)){
+    if(SiS_IF_DEF_LVDS==1){
+      tempbx = 0;
+      temp = SiS_GetReg1(SiS_P3c4,0x38);
+      if(temp & 0x40) tempbx |= 0x08;
+      if(temp & 0x20) tempbx |= 0x02;
+      if(temp & 0x01) tempbx |= 0x01;
+      temp=SiS_GetReg1(SiS_P3c4,0x39);
+      if(temp & 0x80) tempbx |= 0x04;
+    } else {
+      return 0;
+    }
+  }
+
+  tempbx <<= 1;
+  tempbx = PanelTypeTable[tempbx];
+  tempbx |= LCDSync;
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_P3d4,0x36,temp);
+  temp = (tempbx & 0xFF00) >> 8;
+  SiS_SetRegANDOR(SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
+  return 1;
 }
 
 USHORT
-SiS_SenseCHTV (void)
-{
-	USHORT temp, push0e, status;
-
-	status = 0;
-	push0e = SiS_GetCH7005 (0x0e);
-	push0e = (push0e << 8) | 0x0e;
-	SiS_SetCH7005 (0x0b0e);
-	SiS_SetCH7005 (0x0110);
-	SiS_SetCH7005 (0x0010);
-	temp = SiS_GetCH7005 (0x10);
-	if (temp & 0x08)
-		status = status | SVIDEOSense;
-	if (temp & 0x02)
-		status = status | AVIDEOSense;
-	SiS_SetCH7005 (push0e);
-	return (status);
-}
-
-/*  ==========================================  */
+SiS_SenseCHTV(void)
+{
+  USHORT temp,push0e,status;
+
+  status=0;
+  push0e = SiS_GetCH700x(0x0e);
+  push0e = (push0e << 8) | 0x0e;
+  SiS_SetCH700x(0x0b0e);
+  SiS_SetCH700x(0x0110);
+  SiS_SetCH700x(0x0010);
+  temp = SiS_GetCH700x(0x10);
+  if(temp & 0x08) status |= SVIDEOSense;
+  if(temp & 0x02) status |= AVIDEOSense;
+  SiS_SetCH700x(push0e);
+  return(status);
+}
+#endif /* LINUX_XF86 */
+
+/*  ================ for TC only =================  */
+
 #ifdef TC
 
 int
-INT1AReturnCode (union REGS regs)
+INT1AReturnCode(union REGS regs)
 {
-	if (regs.x.cflag) {
-		/*printf("Error to find pci device!\n"); */
-		return 1;
-	}
+  if (regs.x.cflag)
+  {
+    /*printf("Error to find pci device!\n"); */
+    return 1;
+  }
+
+  switch(regs.h.ah)
+  {
+    case 0: return 0;
+            break;
+    case 0x81: printf("Function not support\n");
+               break;
+    case 0x83: printf("bad vendor id\n");
+               break;
+    case 0x86: printf("device not found\n");
+               break;
+    case 0x87: printf("bad register number\n");
+               break;
+    case 0x88: printf("set failed\n");
+               break;
+    case 0x89: printf("buffer too small");
+               break;
+  }
+  return 1;
+}
+
+unsigned
+FindPCIIOBase(unsigned index,unsigned deviceid)
+{
+  union REGS regs;
+
+  regs.h.ah = 0xb1;  /*PCI_FUNCTION_ID */
+  regs.h.al = 0x02;  /*FIND_PCI_DEVICE */
+  regs.x.cx = deviceid;
+  regs.x.dx = 0x1039;
+  regs.x.si = index;  /* find n-th device */
+
+  int86(0x1A, &regs, &regs);
+
+  if (INT1AReturnCode(regs)!=0)
+    return 0;
+
+  /* regs.h.bh *//* bus number */
+  /* regs.h.bl *//* device number */
+  regs.h.ah = 0xb1;  /*PCI_FUNCTION_ID */
+  regs.h.al = 0x09;  /*READ_CONFIG_WORD */
+  regs.x.cx = deviceid;
+  regs.x.dx = 0x1039;
+  regs.x.di = 0x18;  /* register number */
+  int86(0x1A, &regs, &regs);
+
+  if (INT1AReturnCode(regs)!=0)
+    return 0;
+  return regs.x.cx;
+}
+
+
+void
+main(int argc, char *argv[])
+{
+  SIS_HW_DEVICE_INFO  HwDeviceExtension;
+  USHORT temp;
+  USHORT ModeNo;
+
+  /*HwDeviceExtension.pjVirtualRomBase =(PUCHAR) MK_FP(0xC000,0); */
+  /*HwDeviceExtension.pjVideoMemoryAddress = (PUCHAR)MK_FP(0xA000,0);*/
+
+#ifdef SIS300  
+  HwDeviceExtension.ulIOAddress = (FindPCIIOBase(0,0x6300)&0xFF80) + 0x30;
+  HwDeviceExtension.jChipType = SIS_630;
+#endif
+
+#ifdef SIS315H  
+//  HwDeviceExtension.ulIOAddress = (FindPCIIOBase(0,0x5315)&0xFF80) + 0x30;
+//  HwDeviceExtension.jChipType = SIS_550;
+  HwDeviceExtension.ulIOAddress = (FindPCIIOBase(0,0x325)&0xFF80) + 0x30;
+  HwDeviceExtension.jChipType = SIS_315H;
+#endif
+
+  HwDeviceExtension.ujVBChipID = VB_CHIP_301;
+  strcpy(HwDeviceExtension.szVBIOSVer,"0.84");
+  HwDeviceExtension.bSkipDramSizing = FALSE;
+  HwDeviceExtension.ulVideoMemorySize = 0;
+  if(argc==2) {
+    ModeNo=atoi(argv[1]);
+  }
+  else {
+    ModeNo=0x2e;
+    /*ModeNo=0x37; */ /* 1024x768x 4bpp */
+    /*ModeNo=0x38; *//* 1024x768x 8bpp */
+    /*ModeNo=0x4A; *//* 1024x768x 16bpp */
+    /*ModeNo=0x47;*/ /* 800x600x 16bpp */
+  }
+ /* SiSInit(&HwDeviceExtension);*/
+  SiSSetMode(&HwDeviceExtension,ModeNo);
+}
+#endif /* TC END */
+
+/* ================ LINUX XFREE86 ====================== */
+
+#ifdef LINUX_XF86
+USHORT
+SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+   UShort i = (pScrn->bitsPerPixel+7)/8 - 1;
+   UShort ModeIndex = 0;
+   SISPtr pSiS = SISPTR(pScrn);
+
+   switch(mode->HDisplay)
+   {
+     case 320:
+          if(mode->VDisplay == 480) {
+                ModeIndex = ModeIndex_320x480[i];
+	  }
+          break;
+     case 512:
+          if(mode->VDisplay == 384) {
+             ModeIndex = ModeIndex_512x384[i];
+	  }
+          break;
+     case 640:
+          if(mode->VDisplay == 480) {
+             ModeIndex = ModeIndex_640x480[i];
+	  }
+          break;
+     case 720:
+          if(mode->VDisplay == 480) {
+                ModeIndex = ModeIndex_720x480[i];
+          } else if(mode->VDisplay == 576) {
+                ModeIndex = ModeIndex_720x576[i];
+          }
+          break;
+     case 800:
+	  if(mode->VDisplay == 600) {
+             ModeIndex = ModeIndex_800x600[i];
+	  } else if(pSiS->VGAEngine == SIS_315_VGA) {
+	     if(mode->VDisplay == 480) {
+	           ModeIndex = ModeIndex_800x480[i];
+             }
+	  }
+          break;
+     case 1024:
+          if(mode->VDisplay == 768) {
+	        ModeIndex = ModeIndex_1024x768[i];
+	  } else if(pSiS->VGAEngine == SIS_315_VGA) {
+	     if(mode->VDisplay == 576) {
+	        ModeIndex = ModeIndex_1024x576[i];
+             }
+	  } else if(pSiS->VGAEngine == SIS_300_VGA) {
+	     if(mode->VDisplay == 600) {
+	        ModeIndex = ModeIndex_1024x600[i];
+             }
+	  }
+          break;
+     case 1152:
+          if(pSiS->VGAEngine == SIS_300_VGA) {
+	     if(mode->VDisplay == 768) {
+	        ModeIndex = ModeIndex_1152x768[i];
+             }
+	  }
+	  break;
+     case 1280:
+          if(mode->VDisplay == 960) {
+             if(pSiS->VGAEngine == SIS_300_VGA) {
+	        ModeIndex = ModeIndex_300_1280x960[i];
+             } else {
+                ModeIndex = ModeIndex_310_1280x960[i];
+             }
+	  } else if (mode->VDisplay == 1024) {
+	     ModeIndex = ModeIndex_1280x1024[i];
+	  } else if(pSiS->VGAEngine == SIS_315_VGA) {
+	     if (mode->VDisplay == 768) {
+	        ModeIndex = ModeIndex_1280x768[i];
+	     } else if (mode->VDisplay == 720) {
+	        ModeIndex = ModeIndex_1280x720[i];
+             }
+	  }
+          break;
+     case 1400:
+          if(pSiS->VGAEngine == SIS_315_VGA) {
+	     if(mode->VDisplay == 1050) {
+	        ModeIndex = ModeIndex_1400x1050[i];
+             }
+	  }
+          break;
+     case 1600:
+          if(mode->VDisplay == 1200) {
+             ModeIndex = ModeIndex_1600x1200[i];
+	  }
+          break;
+     case 1920:
+          if(mode->VDisplay == 1440) {
+             ModeIndex = ModeIndex_1920x1440[i];
+	  }
+          break;
+     case 2048:
+          if(pSiS->VGAEngine == SIS_315_VGA) {
+	     if(mode->VDisplay == 1536) {
+	         ModeIndex = ModeIndex_2048x1536[i];
+             }
+	  }
+          break;
+   }
+
+   return(ModeIndex);
+}
+
+USHORT
+SiS_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
+{
+   UShort i = (pScrn->bitsPerPixel+7)/8 - 1;
+   UShort ModeIndex = 0;
+   SISPtr pSiS = SISPTR(pScrn);
+
+   if(VBFlags & CRT2_LCD) {
 
-	switch (regs.h.ah) {
-	case 0:
-		return 0;
+      if( (mode->HDisplay <= pSiS->LCDwidth) &&
+          (mode->VDisplay <= pSiS->LCDheight) ) {
+
+        if(VBFlags & VB_LVDS) {        		/* LCD on LVDS */
+
+          switch(mode->HDisplay)
+  	  {
+	  case 512:
+		if(mode->VDisplay == 384) {
+		   ModeIndex = ModeIndex_512x384[i];
+		}
 		break;
-	case 0x81:
-		printf ("Function not support\n");
+	  case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		}
 		break;
-	case 0x83:
-		printf ("bad vendor id\n");
+	  case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		}
 		break;
-	case 0x86:
-		printf ("device not found\n");
+	  case 1024:
+		if(mode->VDisplay == 768) {
+		   ModeIndex = ModeIndex_1024x768[i];
+		} else if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(mode->VDisplay == 600) {
+		      ModeIndex = ModeIndex_1024x600[i];
+		   }
+		}
 		break;
-	case 0x87:
-		printf ("bad register number\n");
+	  case 1152:
+		if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1152x768[i];
+		   }
+		}
 		break;
-	case 0x88:
-		printf ("set failed\n");
+	  case 1280:
+		if(mode->VDisplay == 1024) {
+		   ModeIndex = ModeIndex_1280x1024[i];
+		} else if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if(mode->VDisplay == 768) {
+		      ModeIndex = ModeIndex_1280x768[i];
+		   }
+		}
 		break;
-	case 0x89:
-		printf ("buffer too small");
+	  case 1400:
+	        if(mode->VDisplay == 1050) {
+		   if(pSiS->VGAEngine == SIS_315_VGA) {
+		      ModeIndex = ModeIndex_1400x1050[i];
+		   }
+		}
 		break;
-	}
-	return 1;
-}
+          }
 
-unsigned
-FindPCIIOBase (unsigned index, unsigned deviceid)
-{
-	union REGS regs;
+        } else {                       	 	/* LCD on 301(B) */
+
+          switch(mode->HDisplay)
+	  {
+	  case 512:
+		if(mode->VDisplay == 384) {
+		   ModeIndex = ModeIndex_512x384[i];
+		}
+		break;
+	  case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		}
+		break;
+	  case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		}
+		break;
+	  case 1024:
+		if(mode->VDisplay == 768) {
+		   ModeIndex = ModeIndex_1024x768[i];
+		} else if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(mode->VDisplay == 600) {
+			ModeIndex = ModeIndex_1024x600[i];
+		   }
+		}
+		break;
+	  case 1152:  /* ? */
+		if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1152x768[i];
+		   }
+		}
+		break;
+	  case 1280:
+		if(mode->VDisplay == 960) {
+		   if(pSiS->VGAEngine == SIS_300_VGA) {
+		      ModeIndex = ModeIndex_300_1280x960[i];
+		   } else {
+		      ModeIndex = ModeIndex_310_1280x960[i];
+		   }
+                } else if (mode->VDisplay == 1024) {
+	             ModeIndex = ModeIndex_1280x1024[i];
+	        }
+	  case 1600:
+		if(mode->VDisplay == 1200) {
+		   ModeIndex = ModeIndex_1600x1200[i];
+		}
+		break;
+	  }
 
-	regs.h.ah = 0xb1;	/*PCI_FUNCTION_ID */
-	regs.h.al = 0x02;	/*FIND_PCI_DEVICE */
-	regs.x.cx = deviceid;
-	regs.x.dx = 0x1039;
-	regs.x.si = index;	/* find n-th device */
+        }
 
-	int86 (0x1A, &regs, &regs);
+      }
 
-	if (INT1AReturnCode (regs) != 0)
-		return 0;
+   } else if(VBFlags & CRT2_TV) {
 
-/* regs.h.bh *//* bus number */
-/* regs.h.bl *//* device number */
-	regs.h.ah = 0xb1;	/*PCI_FUNCTION_ID */
-	regs.h.al = 0x09;	/*READ_CONFIG_WORD */
-	regs.x.cx = deviceid;
-	regs.x.dx = 0x1039;
-	regs.x.di = 0x18;	/* register number */
-	int86 (0x1A, &regs, &regs);
+      if(VBFlags & VB_CHRONTEL) {		/* TV on Chrontel */
 
-	if (INT1AReturnCode (regs) != 0)
-		return 0;
-	return regs.x.cx;
+        switch(mode->HDisplay)
+	{
+      	case 512:
+		if(mode->VDisplay == 384) {
+		   ModeIndex = ModeIndex_512x384[i];
+		}
+		break;
+	case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		}
+		break;
+	case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		}
+		break;
+	case 1024:
+		if(mode->VDisplay == 768) {
+		   if(pSiS->VGAEngine == SIS_315_VGA) {
+		      ModeIndex = ModeIndex_1024x768[i];
+		   }
+		}
+		break;
+        }
+
+      } else {				    /* TV on 301(B) */
+
+        switch(mode->HDisplay)
+	{
+      	case 512:
+		if(mode->VDisplay == 384) {
+		   ModeIndex = ModeIndex_512x384[i];
+		}
+		break;
+	case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		}
+		break;
+	case 720:
+                if(mode->VDisplay == 480) {
+                   ModeIndex = ModeIndex_720x480[i];
+                } else if(mode->VDisplay == 576) {
+                   ModeIndex = ModeIndex_720x576[i];
+                }
+                break;
+	case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		}
+		break;
+	case 1024:
+		if(mode->VDisplay == 768) {
+		   if(VBFlags & (VB_301B|VB_301LV|VB_302B|VB_302LV)) {
+		      ModeIndex = ModeIndex_1024x768[i];
+		   }
+		}
+		break;
+        }
+
+      }
+
+   } else if(VBFlags & CRT2_VGA) {		/* CRT2 is VGA2 */
+
+	switch(mode->HDisplay)
+	{
+	case 512:
+		if(mode->VDisplay == 384) {
+		    ModeIndex = ModeIndex_512x384[i];
+		}
+		break;
+	case 640:
+		if(mode->VDisplay == 480) {
+		   ModeIndex = ModeIndex_640x480[i];
+		}
+		break;
+	case 800:
+		if(mode->VDisplay == 600) {
+		   ModeIndex = ModeIndex_800x600[i];
+		} else if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if(mode->VDisplay == 480) {
+			ModeIndex = ModeIndex_800x480[i];
+		   }
+		}
+		break;
+	case 1024:
+		if(mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1024x768[i];
+		} else if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if(mode->VDisplay == 576) {
+			ModeIndex = ModeIndex_1024x576[i];
+		   }
+		}
+		break;
+	case 1152:
+		if(pSiS->VGAEngine == SIS_300_VGA) {
+		   if(mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1152x768[i];
+		   }
+		}
+		break;
+	case 1280:
+		if (mode->VDisplay == 1024) {
+		   ModeIndex = ModeIndex_1280x1024[i];
+		} else if(pSiS->VGAEngine == SIS_315_VGA) {
+		   if (mode->VDisplay == 768) {
+			ModeIndex = ModeIndex_1280x768[i];
+		   } else if (mode->VDisplay == 720) {
+			ModeIndex = ModeIndex_1280x720[i];
+		   }
+		}
+		break;
+	case 1400:
+		if(pSiS->VGAEngine == SIS_315_VGA) {
+		   ModeIndex = ModeIndex_1400x1050[i];
+		}
+		break;
+	}
+
+   } else {				/* CRT1 only, no CRT2 */
+
+       ModeIndex = SiS_CalcModeIndex(pScrn, mode);
+
+   }
+
+   return(ModeIndex);
 }
 
-void
-main (int argc, char *argv[])
-/* void main() */
+#define MODEID_OFF 0x449
+
+unsigned char
+SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id)
 {
-	SIS_HW_DEVICE_INFO HwDeviceExtension;
-	USHORT temp;
-	USHORT ModeNo;
+    unsigned char ret;
 
-	/*HwDeviceExtension.pjVirtualRomBase =(PUCHAR) MK_FP(0xC000,0); */
-	/*HwDeviceExtension.pjVideoMemoryAddress = (PUCHAR)MK_FP(0xA000,0); */
-#ifdef CONFIG_FB_SIS_300
-	HwDeviceExtension.ulIOAddress =
-	    (FindPCIIOBase (0, 0x6300) & 0xFF80) + 0x30;
-	HwDeviceExtension.jChipType = SIS_630;
-#endif
+    unsigned char* base = xf86MapVidMem(pScrn->scrnIndex,
+					VIDMEM_MMIO, 0, 0x2000);
+    ret = *(base + MODEID_OFF);
 
-#ifdef CONFIG_FB_SIS_315
-//  HwDeviceExtension.ulIOAddress = (FindPCIIOBase(0,0x5315)&0xFF80) + 0x30;
-//  HwDeviceExtension.jChipType = SIS_550;
-	HwDeviceExtension.ulIOAddress =
-	    (FindPCIIOBase (0, 0x325) & 0xFF80) + 0x30;
-	HwDeviceExtension.jChipType = SIS_315H;
-#endif
-	HwDeviceExtension.ujVBChipID = VB_CHIP_301;
-	strcpy (HwDeviceExtension.szVBIOSVer, "0.84");
-	HwDeviceExtension.bSkipDramSizing = FALSE;
-	HwDeviceExtension.ulVideoMemorySize = 0;
-	if (argc == 2) {
-		ModeNo = atoi (argv[1]);
-	} else {
-		ModeNo = 0x2e;
-		/*ModeNo=0x37;  1024x768x 4bpp */
-		/*ModeNo=0x38;  1024x768x 8bpp */
-		/*ModeNo=0x4A;  1024x768x 16bpp */
-		/*ModeNo=0x47;  800x600x 16bpp */
-	}
-	// SiSInit(&HwDeviceExtension);
-	SiSSetMode (&HwDeviceExtension, ModeNo);
+    /* id != 0xff means: set mode */
+    if (id != 0xff)
+	*(base + MODEID_OFF) = id;
+    xf86UnMapVidMem(pScrn->scrnIndex,base,0x2000);
 
+    return ret;
 }
+
 #endif
+
+
+
diff --git a/drivers/video/sis/init.h b/drivers/video/sis/init.h
index 724df4d5d87f..05a2123a6c96 100644
--- a/drivers/video/sis/init.h
+++ b/drivers/video/sis/init.h
@@ -6,222 +6,328 @@
 #include "vgatypes.h"
 #include "vstruct.h"
 
+#ifdef TC
+#include <stdio.h>
+#include <string.h>
+#include <conio.h>
+#include <dos.h>
+#include <stdlib.h>
+#endif
+
+#ifdef LINUX_XF86
+#include "xf86.h"
+#include "xf86Pci.h"
+#include "xf86PciInfo.h"
+#include "xf86_OSproc.h"
+#include "sis.h"
+#include "sis_regs.h"
+#endif
+
+#ifdef LINUX_KERNEL
 #include <linux/types.h>
 #include <asm/io.h>
 #include <linux/sisfb.h>
+#endif
 
+#ifdef WIN2000
+#include <stdio.h>
+#include <string.h>
+#include <miniport.h>
+#include "dderror.h"
+#include "devioctl.h"
+#include "miniport.h"
+#include "ntddvdeo.h"
+#include "video.h"
+#include "sisv.h"
+#include "tools.h"
+#endif
 
-USHORT SiS_DRAMType[17][5] = { 
-	{0x0C, 0x0A, 0x02, 0x40, 0x39},
-	{0x0D, 0x0A, 0x01, 0x40, 0x48},
-	{0x0C, 0x09, 0x02, 0x20, 0x35},
-	{0x0D, 0x09, 0x01, 0x20, 0x44},
-	{0x0C, 0x08, 0x02, 0x10, 0x31},
-	{0x0D, 0x08, 0x01, 0x10, 0x40},
-	{0x0C, 0x0A, 0x01, 0x20, 0x34},
-	{0x0C, 0x09, 0x01, 0x08, 0x32},
-	{0x0B, 0x08, 0x02, 0x08, 0x21},
-	{0x0C, 0x08, 0x01, 0x08, 0x30},
-	{0x0A, 0x08, 0x02, 0x04, 0x11},
-	{0x0B, 0x0A, 0x01, 0x10, 0x28},
-	{0x09, 0x08, 0x02, 0x02, 0x01},
-	{0x0B, 0x09, 0x01, 0x08, 0x24},
-	{0x0B, 0x08, 0x01, 0x04, 0x20},
-	{0x0A, 0x08, 0x01, 0x02, 0x10},
-	{0x09, 0x08, 0x01, 0x01, 0x00}
+USHORT SiS_DRAMType[17][5]={
+	{0x0C,0x0A,0x02,0x40,0x39},
+	{0x0D,0x0A,0x01,0x40,0x48},
+	{0x0C,0x09,0x02,0x20,0x35},
+	{0x0D,0x09,0x01,0x20,0x44},
+	{0x0C,0x08,0x02,0x10,0x31},
+	{0x0D,0x08,0x01,0x10,0x40},
+	{0x0C,0x0A,0x01,0x20,0x34},
+	{0x0C,0x09,0x01,0x08,0x32},
+	{0x0B,0x08,0x02,0x08,0x21},
+	{0x0C,0x08,0x01,0x08,0x30},
+	{0x0A,0x08,0x02,0x04,0x11},
+	{0x0B,0x0A,0x01,0x10,0x28},
+	{0x09,0x08,0x02,0x02,0x01},
+	{0x0B,0x09,0x01,0x08,0x24},
+	{0x0B,0x08,0x01,0x04,0x20},
+	{0x0A,0x08,0x01,0x02,0x10},
+	{0x09,0x08,0x01,0x01,0x00}
 };
 
-USHORT SiS_SDRDRAM_TYPE[13][5] = {
-	{2, 12, 9, 64, 0x35},
-	{1, 13, 9, 64, 0x44},
-	{2, 12, 8, 32, 0x31},
-	{2, 11, 9, 32, 0x25},
-	{1, 12, 9, 32, 0x34},
-	{1, 13, 8, 32, 0x40},
-	{2, 11, 8, 16, 0x21},
-	{1, 12, 8, 16, 0x30},
-	{1, 11, 9, 16, 0x24},
-	{1, 11, 8, 8, 0x20},
-	{2, 9, 8, 4, 0x01},
-	{1, 10, 8, 4, 0x10},
-	{1, 9, 8, 2, 0x00}
+USHORT SiS_SDRDRAM_TYPE[13][5] =
+{
+	{ 2,12, 9,64,0x35},
+	{ 1,13, 9,64,0x44},
+	{ 2,12, 8,32,0x31},
+	{ 2,11, 9,32,0x25},
+	{ 1,12, 9,32,0x34},
+	{ 1,13, 8,32,0x40},
+	{ 2,11, 8,16,0x21},
+	{ 1,12, 8,16,0x30},
+	{ 1,11, 9,16,0x24},
+	{ 1,11, 8, 8,0x20},
+	{ 2, 9, 8, 4,0x01},
+	{ 1,10, 8, 4,0x10},
+	{ 1, 9, 8, 2,0x00}
 };
 
-USHORT SiS_DDRDRAM_TYPE[4][5] = {
-	{2, 12, 9, 64, 0x35},
-	{2, 12, 8, 32, 0x31},
-	{2, 11, 8, 16, 0x21},
-	{2, 9, 8, 4, 0x01}
+USHORT SiS_DDRDRAM_TYPE[4][5] =
+{
+	{ 2,12, 9,64,0x35},
+	{ 2,12, 8,32,0x31},
+	{ 2,11, 8,16,0x21},
+	{ 2, 9, 8, 4,0x01}
 };
 
 UCHAR SiS_ChannelAB, SiS_DataBusWidth;
 
-USHORT SiS_MDA_DAC[] = { 
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
-	0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F
+USHORT SiS_MDA_DAC[] =
+{
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+        0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+        0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+        0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,
+        0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+        0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+        0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
+        0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F
 };
 
-USHORT SiS_CGA_DAC[] = { 
-	0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
-	0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
-	0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F,
-	0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F,
-	0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
-	0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
-	0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F,
-	0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F
+USHORT SiS_CGA_DAC[] =
+{
+        0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+        0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
+        0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+        0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F
 };
 
-USHORT SiS_EGA_DAC[] = { 
-	0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x05, 0x15,
-	0x20, 0x30, 0x24, 0x34, 0x21, 0x31, 0x25, 0x35,
-	0x08, 0x18, 0x0C, 0x1C, 0x09, 0x19, 0x0D, 0x1D,
-	0x28, 0x38, 0x2C, 0x3C, 0x29, 0x39, 0x2D, 0x3D,
-	0x02, 0x12, 0x06, 0x16, 0x03, 0x13, 0x07, 0x17,
-	0x22, 0x32, 0x26, 0x36, 0x23, 0x33, 0x27, 0x37,
-	0x0A, 0x1A, 0x0E, 0x1E, 0x0B, 0x1B, 0x0F, 0x1F,
-	0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F
+USHORT SiS_EGA_DAC[] =
+{
+        0x00,0x10,0x04,0x14,0x01,0x11,0x05,0x15,
+        0x20,0x30,0x24,0x34,0x21,0x31,0x25,0x35,
+        0x08,0x18,0x0C,0x1C,0x09,0x19,0x0D,0x1D,
+        0x28,0x38,0x2C,0x3C,0x29,0x39,0x2D,0x3D,
+        0x02,0x12,0x06,0x16,0x03,0x13,0x07,0x17,
+        0x22,0x32,0x26,0x36,0x23,0x33,0x27,0x37,
+        0x0A,0x1A,0x0E,0x1E,0x0B,0x1B,0x0F,0x1F,
+        0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F
 };
 
-USHORT SiS_VGA_DAC[] = { 
-	0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
-	0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F,
-	0x00, 0x05, 0x08, 0x0B, 0x0E, 0x11, 0x14, 0x18,
-	0x1C, 0x20, 0x24, 0x28, 0x2D, 0x32, 0x38, 0x3F,
-
-	0x00, 0x10, 0x1F, 0x2F, 0x3F, 0x1F, 0x27, 0x2F,
-	0x37, 0x3F, 0x2D, 0x31, 0x36, 0x3A, 0x3F, 0x00,
-	0x07, 0x0E, 0x15, 0x1C, 0x0E, 0x11, 0x15, 0x18,
-	0x1C, 0x14, 0x16, 0x18, 0x1A, 0x1C, 0x00, 0x04,
-	0x08, 0x0C, 0x10, 0x08, 0x0A, 0x0C, 0x0E, 0x10,
-	0x0B, 0x0C, 0x0D, 0x0F, 0x10
+USHORT SiS_VGA_DAC[] =
+{
+	0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
+	0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
+	0x00,0x05,0x08,0x0B,0x0E,0x11,0x14,0x18,
+	0x1C,0x20,0x24,0x28,0x2D,0x32,0x38,0x3F,
+	0x00,0x10,0x1F,0x2F,0x3F,0x1F,0x27,0x2F,
+	0x37,0x3F,0x2D,0x31,0x36,0x3A,0x3F,0x00,
+	0x07,0x0E,0x15,0x1C,0x0E,0x11,0x15,0x18,
+	0x1C,0x14,0x16,0x18,0x1A,0x1C,0x00,0x04,
+	0x08,0x0C,0x10,0x08,0x0A,0x0C,0x0E,0x10,
+	0x0B,0x0C,0x0D,0x0F,0x10
 };
 
-USHORT SiS_P3c4, SiS_P3d4, SiS_P3c0, SiS_P3ce, SiS_P3c2;
-USHORT SiS_P3ca, SiS_P3c6, SiS_P3c7, SiS_P3c8, SiS_P3c9, SiS_P3da;
-USHORT SiS_Part1Port, SiS_Part2Port;
-USHORT SiS_Part3Port, SiS_Part4Port, SiS_Part5Port;
-USHORT SiS_CRT1Mode;
-
-USHORT flag_clearbuffer;	/*0: no clear frame buffer 1:clear frame buffer  */
-int SiS_RAMType;		/*int      ModeIDOffset,StandTable,CRT1Table,ScreenOffset,REFIndex; */
-USHORT SiS_ModeType;
-USHORT SiS_IF_DEF_LVDS, SiS_IF_DEF_TRUMPION, SiS_IF_DEF_DSTN;	/*add for dstn */
-USHORT SiS_IF_DEF_CH7005, SiS_IF_DEF_HiVision;
-USHORT SiS_VBInfo, SiS_LCDResInfo, SiS_LCDTypeInfo, SiS_LCDInfo, SiS_VBType;	/*301b */
-USHORT SiS_SelectCRT2Rate;
-
-extern USHORT SiS_SetFlag;
-
-void SiS_SetMemoryClock (ULONG ROMAddr);
-void SiS_SetDRAMModeRegister (ULONG ROMAddr);
-void SiS_SetDRAMSize_310 (PSIS_HW_DEVICE_INFO);
-void SiS_SetDRAMSize_300 (PSIS_HW_DEVICE_INFO HwDeviceExtension);
-USHORT SiS_ChkBUSWidth_300 (ULONG FBAddress);
-UCHAR SiS_Get310DRAMType (ULONG ROMAddr);
-
-void SiS_Delay15us (ULONG);
-BOOLEAN SiS_SearchModeID (ULONG ROMAddr, USHORT ModeNo, USHORT * ModeIdIndex);
-BOOLEAN SiS_CheckMemorySize (ULONG ROMAddr,
-			     PSIS_HW_DEVICE_INFO HwDeviceExtension,
-			     USHORT ModeNo, USHORT ModeIdIndex);
-UCHAR SiS_GetModePtr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-void SiS_SetSeqRegs (ULONG, USHORT StandTableIndex);
-void SiS_SetMiscRegs (ULONG, USHORT StandTableIndex);
-void SiS_SetCRTCRegs (ULONG, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		      USHORT StandTableIndex);
-void SiS_SetATTRegs (ULONG, USHORT StandTableIndex);
-void SiS_SetGRCRegs (ULONG, USHORT StandTableIndex);
-void SiS_ClearExt1Regs (void);
-void SiS_SetSync (ULONG ROMAddr, USHORT RefreshRateTableIndex);
-void SiS_SetCRT1CRTC (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		      USHORT RefreshRateTableIndex);
-void SiS_SetCRT1VCLK (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		      PSIS_HW_DEVICE_INFO, USHORT RefreshRateTableIndex);
-void SiS_SetVCLKState (ULONG ROMAddr, PSIS_HW_DEVICE_INFO, USHORT ModeNo,
-		       USHORT RefreshRateTableIndex);
-void SiS_LoadDAC (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-void SiS_DisplayOn (void);
-void SiS_SetCRT1ModeRegs (ULONG ROMAddr, PSIS_HW_DEVICE_INFO, USHORT ModeNo,
-			  USHORT ModeIdIndex, USHORT RefreshRateTableIndex);
-void SiS_WriteDAC (USHORT, USHORT, USHORT, USHORT);
-void SiS_GetVBType (USHORT BaseAddr);	/*301b */
-USHORT SiS_ChkBUSWidth (ULONG);
-USHORT SiS_GetModeIDLength (ULONG, USHORT);
-USHORT SiS_GetRefindexLength (ULONG, USHORT);
-void SiS_SetInterlace (ULONG ROMAddr, USHORT ModeNo,
-		       USHORT RefreshRateTableIndex);
-USHORT SiS_CalcDelay2 (ULONG, UCHAR);
-USHORT SiS_CalcDelay (ULONG, USHORT);
-void SiS_Set_LVDS_TRUMPION (PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_SetCRT1Offset (ULONG, USHORT, USHORT, USHORT, PSIS_HW_DEVICE_INFO);
-void SiS_SetCRT1FIFO (ULONG, USHORT, PSIS_HW_DEVICE_INFO);
-void SiS_SetCRT1FIFO2 (ULONG, USHORT ModeNo, PSIS_HW_DEVICE_INFO,
-		       USHORT RefreshRateTableIndex);
-void SiS_CRT2AutoThreshold (USHORT BaseAddr);
-void SiS_ClearBuffer (PSIS_HW_DEVICE_INFO, USHORT ModeNo);
-void SiS_SetCRT1Group (ULONG ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		       USHORT ModeNo, USHORT ModeIdIndex);
-void SiS_DetectMonitor (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
-void SiS_GetSenseStatus (PSIS_HW_DEVICE_INFO HwDeviceExtension, ULONG ROMAddr);
-USHORT SiS_TestMonitorType (UCHAR R_DAC, UCHAR G_DAC, UCHAR B_DAC);
-USHORT SiS_SenseCHTV (VOID);
-BOOLEAN SiS_Sense (USHORT Part4Port, USHORT tempbx, USHORT tempcx);
-BOOLEAN SiS_GetPanelID (VOID);
-BOOLEAN SiS_GetLCDDDCInfo (PSIS_HW_DEVICE_INFO);
-USHORT SiS_SenseLCD (PSIS_HW_DEVICE_INFO);
-
-extern BOOLEAN SiS_SetCRT2Group301 (USHORT BaseAddr, ULONG ROMAddr,
-				    USHORT ModeNo,
-				    PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void SiS_PresetScratchregister (USHORT SiS_P3d4,
-				       PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void SiS_UnLockCRT2 (PSIS_HW_DEVICE_INFO HwDeviceExtension,
-			    USHORT BaseAddr);
-extern void SiS_LockCRT2 (PSIS_HW_DEVICE_INFO HwDeviceExtension,
-			  USHORT BaseAddr);
-extern BOOLEAN SiS_BridgeIsOn (USHORT BaseAddr);
-extern BOOLEAN SiS_BridgeIsEnable (USHORT BaseAddr, PSIS_HW_DEVICE_INFO);
-extern void SiS_SetTVSystem301 (VOID);
-extern BOOLEAN SiS_GetLCDDDCInfo301 (PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN SiS_GetSenseStatus301 (PSIS_HW_DEVICE_INFO HwDeviceExtension,
-				      USHORT BaseAddr, ULONG ROMAddr);
-extern USHORT SiS_GetVCLKLen (ULONG ROMAddr,
-			      PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN SiS_SetCRT2Group302 (USHORT BaseAddr, ULONG ROMAddr,
-				    USHORT ModeNo,
-				    PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void SiS_GetVBInfo301 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-			      USHORT ModeIdIndex,
-			      PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN SiS_GetLCDResInfo301 (ULONG ROMAddr, USHORT P3d4, USHORT ModeNo,
-				     USHORT ModeIdIndex);
-extern USHORT SiS_VBInfo, LCDResInfo, LCDTypeInfo, LCDInfo;
-extern USHORT SiS_GetRatePtrCRT2 (ULONG ROMAddr, USHORT ModeNo,
-				  USHORT ModeIdIndex);
-extern void SiS_LongWait (VOID);
-extern void SiS_SetRegANDOR (USHORT Port, USHORT Index, USHORT DataAND,
-			     USHORT DataOR);
-extern USHORT SiS_GetResInfo (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-extern void SiS_SetCH7005 (USHORT tempax);
-extern USHORT SiS_GetCH7005 (USHORT tempax);
-extern BOOLEAN SiS_GetLVDSCRT1Ptr (ULONG ROMAddr, USHORT ModeNo,
-				   USHORT ModeIdIndex,
-				   USHORT RefreshRateTableIndex,
-				   USHORT * ResInfo, USHORT * DisplayType);
-extern BOOLEAN SiS_GetLCDACRT1Ptr (ULONG ROMAddr, USHORT ModeNo,
-				   USHORT ModeIdIndex,
-				   USHORT RefreshRateTableIndex,
-				   USHORT * ResInfo, USHORT * DisplayType);
-extern USHORT SiS_GetVCLK2Ptr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			       USHORT RefreshRateTableIndex,
-			       PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern BOOLEAN SiS_Is301B (USHORT BaseAddr);	/*301b */
+USHORT   SiS_P3c4,SiS_P3d4,SiS_P3c0,SiS_P3ce,SiS_P3c2;
+USHORT   SiS_P3ca,SiS_P3c6,SiS_P3c7,SiS_P3c8,SiS_P3c9,SiS_P3da;
+USHORT   SiS_Part1Port,SiS_Part2Port;
+USHORT   SiS_Part3Port,SiS_Part4Port,SiS_Part5Port;
+USHORT   SiS_CRT1Mode;
+
+USHORT   flag_clearbuffer;
+int      SiS_RAMType;
+USHORT   SiS_ModeType;
+USHORT   SiS_IF_DEF_LVDS, SiS_IF_DEF_TRUMPION, SiS_IF_DEF_DSTN, SiS_IF_DEF_FSTN;
+USHORT   SiS_IF_DEF_CH70xx, SiS_IF_DEF_HiVision;
+USHORT	 SiS_Backup70xx=0xff;
+USHORT   SiS_VBInfo, SiS_LCDResInfo, SiS_LCDTypeInfo, SiS_LCDInfo, SiS_VBType;
+USHORT   SiS_VBExtInfo, SiS_HiVision;
+USHORT   SiS_SelectCRT2Rate;
+
+extern   USHORT   SiS_SetFlag;
+extern   USHORT   SiS_DDC_Port;
+extern   USHORT   Panel800x600,  Panel1024x768,  Panel1280x1024, Panel1600x1200;
+extern   USHORT   Panel1280x960, Panel1400x1050, Panel320x480,   Panel1152x768;
+extern   USHORT   Panel1152x864, Panel1280x768,  Panel1024x600,  Panel640x480;
+extern   USHORT   PanelMinLVDS,  PanelMin301,    PanelMax;
+extern   USHORT   SiS_ChrontelInit;
+
+void     SiS_SetReg1(USHORT, USHORT, USHORT);
+void     SiS_SetReg2(USHORT, USHORT, USHORT);
+void     SiS_SetReg3(USHORT, USHORT);
+void     SiS_SetReg4(USHORT, ULONG);
+UCHAR    SiS_GetReg1(USHORT, USHORT);
+UCHAR    SiS_GetReg2(USHORT);
+ULONG    SiS_GetReg3(USHORT);
+void     SiS_ClearDAC(ULONG);
+void     SiS_SetMemoryClock(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetDRAMModeRegister(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_SearchVBModeID(UCHAR *ROMAddr, USHORT *ModeNo);
+void     SiS_IsLowResolution(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+ULONG    GetDRAMSize(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+#ifdef SIS300
+void     InitTo300Pointer(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetDRAMSize_300(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_ChkBUSWidth_300(ULONG FBAddress);
+#endif
+
+#ifdef SIS315H
+void     InitTo310Pointer(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+UCHAR    SiS_Get310DRAMType(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_DDR_MRS(void);
+void     SiS_SDR_MRS(void);
+void     SiS_DisableRefresh(void);
+void     SiS_EnableRefresh(UCHAR *ROMAddr);
+void     SiS_SetDRAMSize_310(PSIS_HW_DEVICE_INFO);
+void     SiS_DisableChannelInterleaving(int index,USHORT SiS_DDRDRAM_TYPE[][5]);
+void     SiS_SetDRAMSizingType(int index,USHORT DRAMTYPE_TABLE[][5]);
+void     SiS_CheckBusWidth_310(UCHAR *ROMAddress,ULONG FBAddress,
+                               PSIS_HW_DEVICE_INFO HwDeviceExtension);
+int      SiS_SetRank(int index,UCHAR RankNo,UCHAR SiS_ChannelAB,USHORT DRAMTYPE_TABLE[][5]);
+int      SiS_SetDDRChannel(int index,UCHAR ChannelNo,UCHAR SiS_ChannelAB,
+                           USHORT DRAMTYPE_TABLE[][5]);
+int      SiS_CheckColumn(int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckBanks(int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckRank(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckDDRRank(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckRanks(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_CheckDDRRanks(int RankNo,int index,USHORT DRAMTYPE_TABLE[][5],ULONG FBAddress);
+int      SiS_SDRSizing(ULONG FBAddress);
+int      SiS_DDRSizing(ULONG FBAddress);
+int      Is315E(void);
+void     SiS_VerifyMclk(ULONG FBAddr);
+#endif
+
+void     SetEnableDstn(void);
+void     SiS_Delay15us(ULONG);
+BOOLEAN  SiS_SearchModeID(UCHAR *ROMAddr, USHORT *ModeNo,USHORT *ModeIdIndex);
+BOOLEAN  SiS_CheckMemorySize(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                             USHORT ModeNo,USHORT ModeIdIndex);
+UCHAR    SiS_GetModePtr(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_SetSeqRegs(UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_SetMiscRegs(UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_SetCRTCRegs(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                         USHORT StandTableIndex);
+void     SiS_SetATTRegs(UCHAR *ROMAddr,USHORT StandTableIndex,USHORT ModeNo,
+                        PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetGRCRegs(UCHAR *ROMAddr,USHORT StandTableIndex);
+void     SiS_ClearExt1Regs(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetSync(UCHAR *ROMAddr,USHORT RefreshRateTableIndex);
+void     SiS_SetCRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,
+			 PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_ResetCRT1VCLK(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT1VCLK(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO,
+                         USHORT RefreshRateTableIndex);
+void     SiS_SetVCLKState(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO, USHORT ModeNo,
+                          USHORT RefreshRateTableIndex, USHORT ModeIdIndex);
+void     SiS_LoadDAC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_DisplayOn(void);
+void 	 SiS_DisplayOff(void);
+void     SiS_SetCRT1ModeRegs(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO,USHORT ModeNo,
+                             USHORT ModeIdIndex,USHORT RefreshRateTableIndex);
+void     SiS_WriteDAC(USHORT, USHORT, USHORT, USHORT);
+void     SiS_GetVBType(USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
+USHORT   SiS_ChkBUSWidth(UCHAR *ROMAddr);
+USHORT   SiS_GetModeIDLength(UCHAR *ROMAddr, USHORT);
+USHORT   SiS_GetRefindexLength(UCHAR *ROMAddr, USHORT);
+void     SiS_SetInterlace(UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex);
+USHORT   SiS_CalcDelay2(UCHAR *ROMAddr, UCHAR);
+USHORT   SiS_CalcDelay(UCHAR *ROMAddr, USHORT);
+void     SiS_Set_LVDS_TRUMPION(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT1Offset(UCHAR *ROMAddr,USHORT,USHORT,USHORT,PSIS_HW_DEVICE_INFO);
+#ifdef SIS315H
+void     SiS_SetCRT1FIFO_310(UCHAR *ROMAddr,USHORT,USHORT,PSIS_HW_DEVICE_INFO);
+#endif
+#ifdef SIS300
+void     SiS_SetCRT1FIFO_300(UCHAR *ROMAddr,USHORT ModeNo,PSIS_HW_DEVICE_INFO,
+                             USHORT RefreshRateTableIndex);
+#endif
+void     SiS_ClearBuffer(PSIS_HW_DEVICE_INFO,USHORT ModeNo);
+void     SiS_SetCRT1Group(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                          USHORT ModeNo,USHORT ModeIdIndex,USHORT BaseAddr);
+void     SiS_DetectMonitor(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+void     SiS_GetSenseStatus(PSIS_HW_DEVICE_INFO HwDeviceExtension,UCHAR *ROMAddr);
+USHORT   SiS_TestMonitorType(UCHAR R_DAC,UCHAR G_DAC,UCHAR B_DAC);
+USHORT   SiS_SenseCHTV(VOID);
+BOOLEAN  SiS_Sense(USHORT Part4Port,USHORT tempbx,USHORT tempcx);
+BOOLEAN  SiS_GetPanelID(VOID);
+BOOLEAN  SiS_GetLCDDDCInfo(PSIS_HW_DEVICE_INFO);
+USHORT   SiS_SenseLCD(PSIS_HW_DEVICE_INFO);
+void     SiSRegInit(USHORT BaseAddr);
+void     SiSInitPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiSSetLVDSetc(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT ModeNo);
+void     SiSInitPCIetc(PSIS_HW_DEVICE_INFO HwDeviceExtension);
 
+#ifdef LINUX_XF86
+USHORT  	SiS_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode);
+USHORT  	SiS_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags);
+void    	SiS_SetPitch(ScrnInfoPtr pScrn, UShort BaseAddr);
+void    	SiS_SetPitchCRT1(ScrnInfoPtr pScrn, UShort BaseAddr);
+void    	SiS_SetPitchCRT2(ScrnInfoPtr pScrn, UShort BaseAddr);
+unsigned char 	SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id);
 #endif
+
+extern USHORT    SiS_GetOffset(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                       USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern USHORT    SiS_GetColorDepth(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+extern void      SiS_DisableBridge(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+extern BOOLEAN   SiS_SetCRT2Group301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                                     PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_PresetScratchregister(USHORT SiS_P3d4,
+                                           PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_UnLockCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+extern void      SiS_LockCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr);
+extern BOOLEAN   SiS_BridgeIsOn(USHORT BaseAddr);
+extern BOOLEAN   SiS_BridgeIsEnable(USHORT BaseAddr,PSIS_HW_DEVICE_INFO );
+extern void      SiS_SetTVSystem301(VOID);
+extern BOOLEAN   SiS_GetLCDDDCInfo301(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN   SiS_GetSenseStatus301(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                                       USHORT BaseAddr,UCHAR *ROMAddr);
+extern USHORT    SiS_GetVCLKLen(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN   SiS_SetCRT2Group302(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                                     PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_GetVBInfo301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                                  USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN   SiS_GetLCDResInfo301(UCHAR *ROMAddr,USHORT P3d4,USHORT ModeNo,
+                                      USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern void      SiS_SetHiVision(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+/* extern USHORT  SiS_VBInfo,LCDResInfo,LCDTypeInfo,LCDInfo; */  /* TW: redundant */
+extern USHORT    SiS_GetRatePtrCRT2(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
+extern void      SiS_LongWait(VOID);
+extern void      SiS_SetRegOR(USHORT Port,USHORT Index,USHORT DataOR);
+extern void      SiS_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND);
+extern void      SiS_SetRegANDOR(USHORT Port,USHORT Index,USHORT DataAND,USHORT DataOR);
+extern USHORT    SiS_GetResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+extern void      SiS_SetCH700x(USHORT tempax);
+extern USHORT    SiS_GetCH700x(USHORT tempax);
+extern void      SiS_SetCH701x(USHORT tempax);
+extern USHORT    SiS_GetCH701x(USHORT tempax);
+extern void      SiS_SetCH70xx(USHORT tempax);
+extern USHORT    SiS_GetCH70xx(USHORT tempax);
+extern BOOLEAN   SiS_GetLVDSCRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                                    USHORT RefreshRateTableIndex,
+		                    USHORT *ResInfo,USHORT *DisplayType);
+extern BOOLEAN   SiS_GetLCDACRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                                    USHORT RefreshRateTableIndex,
+		                    USHORT *ResInfo,USHORT *DisplayType);
+extern USHORT    SiS_GetVCLK2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                                 USHORT RefreshRateTableIndex,
+				 PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN   SiS_Is301B(USHORT BaseAddr);
+extern BOOLEAN   SiS_LowModeStuff(USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+#endif
+
diff --git a/drivers/video/sis/init301.c b/drivers/video/sis/init301.c
index c05c563a736c..be0c95defa5b 100644
--- a/drivers/video/sis/init301.c
+++ b/drivers/video/sis/init301.c
@@ -1,5416 +1,7708 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c,v 1.3 2000/12/02 01:16:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c,v 1.3 2002/22/04 01:16:16 dawes Exp $ */
+/*
+ * Mode switching code (CRT2 section) for SiS 300/540/630/730/315/550/650/740
+ * (Universal module for Linux kernel framebuffer, XFree86 4.x)
+ *
+ * Assembler-To-C translation
+ * Parts Copyright 2002 by Thomas Winischhofer <thomas@winischhofer.net>
+ *
+ * Based on BIOS
+ *     1.10.07, 1.10a for SiS650/LVDS+CH7019
+ *     1.07.1b for SiS650/301(B/LV)
+ *     2.04.50 (I) and 2.04.5c (II) for SiS630/301(B)
+ *     2.02.3b, 2.03.02, 2.04.2c and 2.04.5c for 630/LVDS/LVDS+CH7005
+ *     1.09b for 315/301(B)
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of the copyright holder not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  The copyright holder makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
 
 #include "init301.h"
-#ifdef CONFIG_FB_SIS_300
+
+#if 0
+#define TWPANEL
+#endif
+
+#if 0	/* TW: Emulate 650/LVDS BIOS 1.10a (1) or 1.10.07 (0) */
+#define TEST1400
+#endif
+
+#ifdef SIS300
 #include "oem300.h"
 #endif
-#ifdef CONFIG_FB_SIS_315
+
+#ifdef SIS315H
 #include "oem310.h"
 #endif
 
+#define SiS_I2CDELAY 1000
+#define SiS_I2CDELAYSHORT 333
+
 BOOLEAN
-SiS_SetCRT2Group301 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		     PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetCRT2Group301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                    PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT ModeIdIndex;
-	USHORT RefreshRateTableIndex;
-
-	SiS_SetFlag = SiS_SetFlag | ProgrammingCRT2;
-	SiS_SearchModeID (ROMAddr, ModeNo, &ModeIdIndex);
-	SiS_SelectCRT2Rate = 4;
-	RefreshRateTableIndex =
-	    SiS_GetRatePtrCRT2 (ROMAddr, ModeNo, ModeIdIndex);
-	SiS_SaveCRT2Info (ModeNo);
-	SiS_DisableBridge (HwDeviceExtension, BaseAddr);
-	SiS_UnLockCRT2 (HwDeviceExtension, BaseAddr);
-	SiS_SetCRT2ModeRegs (BaseAddr, ModeNo, HwDeviceExtension);
-	if (SiS_VBInfo & DisableCRT2Display) {
-		SiS_LockCRT2 (HwDeviceExtension, BaseAddr);
-		SiS_DisplayOn ();
-		return (FALSE);
-	}
-/* SetDefCRT2ExtRegs(BaseAddr);   */
-	SiS_GetCRT2Data (ROMAddr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (SiS_VBInfo & SetCRT2ToLCDA)) {
-		SiS_GetLVDSDesData (ROMAddr, ModeNo, ModeIdIndex,
-				    RefreshRateTableIndex);
-	}
-	/*end 301b */
-	if (SiS_IF_DEF_LVDS == 1) {
-		SiS_GetLVDSDesData (ROMAddr, ModeNo, ModeIdIndex,
-				    RefreshRateTableIndex);
-	}
+   USHORT ModeIdIndex;
+   USHORT RefreshRateTableIndex;
 
-	SiS_SetGroup1 (BaseAddr, ROMAddr, ModeNo, ModeIdIndex,
-		       HwDeviceExtension, RefreshRateTableIndex);
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (SiS_VBInfo & SetCRT2ToLCDA) && (SiS_IF_DEF_LVDS == 0)) {
-	} else if (SiS_IF_DEF_LVDS == 0 && (!(SiS_VBInfo & SetCRT2ToLCDA))) {
-		SiS_SetGroup2 (BaseAddr, ROMAddr, ModeNo, ModeIdIndex,
-			       RefreshRateTableIndex, HwDeviceExtension);
-		SiS_SetGroup3 (BaseAddr, ROMAddr, ModeNo, ModeIdIndex,
-			       HwDeviceExtension);
-		SiS_SetGroup4 (BaseAddr, ROMAddr, ModeNo, ModeIdIndex,
-			       RefreshRateTableIndex, HwDeviceExtension);
-		SiS_SetGroup5 (BaseAddr, ROMAddr, ModeNo, ModeIdIndex);
-	} else {
-		if (SiS_IF_DEF_CH7005 == 1) {
-			SiS_SetCHTVReg (ROMAddr, ModeNo, ModeIdIndex,
-					RefreshRateTableIndex);
-		}
-		SiS_ModCRT1CRTC (ROMAddr, ModeNo, ModeIdIndex,
-				 RefreshRateTableIndex);
-		SiS_SetCRT2ECLK (ROMAddr, ModeNo, ModeIdIndex,
-				 RefreshRateTableIndex, HwDeviceExtension);
-	}
+   SiS_SetFlag |= ProgrammingCRT2;
 
-#ifdef CONFIG_FB_SIS_300
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730) ||
-	    (HwDeviceExtension->jChipType == SIS_300))
-		SiS_OEM300Setting (HwDeviceExtension, BaseAddr, ROMAddr,
-				   ModeNo);
+   SiS_SearchModeID(ROMAddr,&ModeNo,&ModeIdIndex);
 
+   /* TW: Used for shifting CR33 */
+   SiS_SelectCRT2Rate = 4;
+
+   SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+
+   RefreshRateTableIndex = SiS_GetRatePtrCRT2(ROMAddr,ModeNo,ModeIdIndex);
+
+   SiS_SaveCRT2Info(ModeNo);
+
+   if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+      SiS_DisableBridge(HwDeviceExtension,BaseAddr);
+      SiS_SetCRT2ModeRegs(BaseAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+   }
+
+   if(SiS_VBInfo & DisableCRT2Display) {
+      SiS_LockCRT2(HwDeviceExtension, BaseAddr);
+      SiS_DisplayOn();
+      return(FALSE);
+   }
+
+   SiS_GetCRT2Data(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                   HwDeviceExtension);
+
+   /* LVDS, 650/301LV(LCDA) and 630/301B BIOS set up Panel Link */
+   if((SiS_IF_DEF_LVDS == 1) || (SiS_VBType & VB_SIS301BLV302BLV)) {
+   	SiS_GetLVDSDesData(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+	                   HwDeviceExtension);
+   }
+
+   if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+      SiS_SetGroup1(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+                    HwDeviceExtension,RefreshRateTableIndex);
+   }
+
+   if( (SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCDA) ) {
+
+     	if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV))
+	      	SiS_SetReg1(SiS_Part4Port,0x24,0x0e);
+
+   } else if((SiS_IF_DEF_LVDS == 0) && (!(SiS_VBInfo & SetCRT2ToLCDA))) {
+
+        if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+
+	   SiS_SetGroup2(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	              RefreshRateTableIndex,HwDeviceExtension);
+      	   SiS_SetGroup3(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	              HwDeviceExtension);
+      	   SiS_SetGroup4(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	              RefreshRateTableIndex,HwDeviceExtension);
+      	   SiS_SetGroup5(BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+
+	   /* TW: 630/301B BIOS does all this: */
+	   if(HwDeviceExtension->jChipType < SIS_315H) {
+	      if(SiS_VBType & VB_SIS301BLV302BLV) {
+	         if(SiS_VBInfo & SetCRT2ToLCD) {
+		    if(SiS_LCDResInfo != Panel640x480) {
+		       SiS_ModCRT1CRTC(ROMAddr,ModeNo,ModeIdIndex,
+		                       RefreshRateTableIndex,HwDeviceExtension);
+                    }
+		    SiS_SetCRT2ECLK(ROMAddr,ModeNo,ModeIdIndex,
+		                    RefreshRateTableIndex,HwDeviceExtension);
+		 }
+              }
+	   }
+
+        }
+
+   } else {
+
+        if(SiS_LCDResInfo != Panel640x480) {
+	        if (SiS_IF_DEF_TRUMPION == 0) {
+    	 	        SiS_ModCRT1CRTC(ROMAddr,ModeNo,ModeIdIndex,
+		                        RefreshRateTableIndex,HwDeviceExtension);
+	        }
+	}
+        if(SiS_IF_DEF_FSTN == 0) {
+     	 	SiS_SetCRT2ECLK(ROMAddr,ModeNo,ModeIdIndex,
+		          RefreshRateTableIndex,HwDeviceExtension);
+	}
+	if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+     	  if(SiS_IF_DEF_CH70xx != 0) {
+	     /* TW: Inserted from 650/LVDS BIOS */
+	     if (SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
+	        if(SiS_IF_DEF_CH70xx == 2) {
+		    SiS_SetCHTVForLCD(HwDeviceExtension,BaseAddr);
+		}
+	     }
+	     if(SiS_VBInfo & SetCRT2ToTV) {
+	        /* TW: Set Chrontel registers only if CRT2 is TV */
+       		SiS_SetCHTVReg(ROMAddr,ModeNo,ModeIdIndex,
+		               RefreshRateTableIndex);
+	     }
+     	  }
+	}
+
+   }
+
+#ifdef SIS300
+   if ( (HwDeviceExtension->jChipType==SIS_540)||
+        (HwDeviceExtension->jChipType==SIS_630)||
+        (HwDeviceExtension->jChipType==SIS_730)||
+        (HwDeviceExtension->jChipType==SIS_300) )
+    {
+	if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+       	   SiS_OEM300Setting(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
+	}
+    }
 #endif
 
-#ifdef CONFIG_FB_SIS_315
-	if ((HwDeviceExtension->jChipType == SIS_315H) ||	/* 05/02/01 ynlai for sis550 */
-	    (HwDeviceExtension->jChipType == SIS_315PRO) ||
-	    (HwDeviceExtension->jChipType == SIS_550) ||	/* 05/02/01 ynlai for 550 */
-	    (HwDeviceExtension->jChipType == SIS_640) ||	/* 08/20/01 chiawen for 640/740 */
-	    (HwDeviceExtension->jChipType == SIS_740)) {	/* 09/03/01 chiawen for 640/740 */
-		SiS_OEM310Setting (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo,
-				   ModeIdIndex);
-		SiS_CRT2AutoThreshold (BaseAddr);
-	}
+#ifdef SIS315H
+   if ( (HwDeviceExtension->jChipType==SIS_315H)||
+        (HwDeviceExtension->jChipType==SIS_315PRO)||
+        (HwDeviceExtension->jChipType==SIS_550) ||
+        (HwDeviceExtension->jChipType==SIS_640) ||
+        (HwDeviceExtension->jChipType==SIS_740) ||
+        (HwDeviceExtension->jChipType==SIS_650))
+   {
+        if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+	   SiS_OEMLCD(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+           SiS_OEM310Setting(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+           SiS_CRT2AutoThreshold(BaseAddr);
+        }
+   }
 #endif
 
-	SiS_EnableBridge (HwDeviceExtension, BaseAddr);
-	SiS_DisplayOn ();
-	SiS_LockCRT2 (HwDeviceExtension, BaseAddr);
-	return 1;
+   if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+      SiS_DisplayOn();
+      SiS_EnableBridge(HwDeviceExtension,BaseAddr);
+   }
+
+   if(SiS_IF_DEF_CH70xx == 1) {
+	if(SiS_VBInfo & SetCRT2ToTV) {
+	     /* TW: Disable LCD panel when using TV */
+	     SiS_SetRegOR(SiS_P3c4,0x11,0x0C);
+	} else {
+	     /* TW: Disable TV when using LCD */
+	     SiS_SetCH70xxANDOR(0x010E,0xF8);
+	}
+   }
+
+   SiS_DisplayOn();
+
+   if(SiS_LowModeStuff(ModeNo,HwDeviceExtension)) {
+      SiS_LockCRT2(HwDeviceExtension, BaseAddr);
+   }
+
+   return 1;
+}
+
+/* TW: Checked with 650/LVDS (1.10.07) and 630+301B/LVDS BIOS */
+BOOLEAN
+SiS_LowModeStuff(USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+    USHORT temp,temp1,temp2;
+
+    if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
+         return(1);
+    temp = SiS_GetReg1(SiS_P3d4,0x11);
+    SiS_SetRegOR(SiS_P3d4,0x11,0x80);
+    temp1 = SiS_GetReg1(SiS_P3d4,0x00);
+    SiS_SetReg1(SiS_P3d4,0x00,0x55);
+    temp2 = SiS_GetReg1(SiS_P3d4,0x00);
+    SiS_SetReg1(SiS_P3d4,0x00,temp1);
+    SiS_SetReg1(SiS_P3d4,0x11,temp);
+    if(HwDeviceExtension->jChipType >= SIS_315H) {
+       if(temp2 == 0x55) return(0);
+       else return(1);
+    } else {
+       if(temp2 != 0x55) return(1);
+       else {
+          SiS_SetRegOR(SiS_P3d4,0x35,0x01);
+          return(0);
+       }
+    }
 }
 
+/* TW: Set Part1 registers */
+/* TW: Checked with 650/LVDS (1.10.07), 650/301LV (II) and 630/301B (II) BIOS */
 void
-SiS_SetGroup1 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-	       USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-	       USHORT RefreshRateTableIndex)
+SiS_SetGroup1(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+              PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex)
 {
-	USHORT temp = 0, tempax = 0, tempbx = 0, tempcx = 0;
-	USHORT pushbx = 0, CRT1Index = 0;
-	USHORT modeflag, resinfo = 0;
+  USHORT  temp=0,tempax=0,tempbx=0,tempcx=0,tempbl=0;
+  USHORT  pushbx=0,CRT1Index=0;
+  USHORT  modeflag,resinfo=0;
 
-	if (ModeNo <= 0x13) {
-	} else {
-		CRT1Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
-		CRT1Index = CRT1Index & 0x3F;
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-	}
+  if(ModeNo<=0x13) {
+	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  } else {
+    	CRT1Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
+    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  }
 
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (SiS_VBInfo & SetCRT2ToLCDA)) {
-	} else {
-		SiS_SetCRT2Offset (SiS_Part1Port, ROMAddr, ModeNo, ModeIdIndex,
-				   RefreshRateTableIndex, HwDeviceExtension);
-		if (HwDeviceExtension->jChipType < SIS_315H)	/* 300 series */
-			SiS_SetCRT2FIFO (SiS_Part1Port, ROMAddr, ModeNo,
-					 HwDeviceExtension);
-		else		/* 310 series */
-			SiS_SetCRT2FIFO2 (SiS_Part1Port, ROMAddr, ModeNo,
-					  HwDeviceExtension);
-
-		SiS_SetCRT2Sync (BaseAddr, ROMAddr, ModeNo,
-				 RefreshRateTableIndex);
-	}
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-	}
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (SiS_VBInfo & SetCRT2ToLCDA)) {
-		SiS_SetGroup1_LCDA (BaseAddr, ROMAddr, ModeNo, ModeIdIndex,
-				    HwDeviceExtension, RefreshRateTableIndex);
-	}
-	/*end 301b */
-	else if (HwDeviceExtension->jChipType < SIS_315H) {	/* 300 series */
-		temp = (SiS_VGAHT - 1) & 0x0FF;	/* BTVGA2HT 0x08,0x09 */
-		SiS_SetReg1 (SiS_Part1Port, 0x08, temp);
-		temp = (((SiS_VGAHT - 1) & 0xFF00) >> 8) << 4;
-		SiS_SetRegANDOR (SiS_Part1Port, 0x09, ~0x0F0, temp);
-
-		temp = (SiS_VGAHDE + 12) & 0x0FF;	/* BTVGA2HDEE 0x0A,0x0C */
-		SiS_SetReg1 (SiS_Part1Port, 0x0A, temp);
-
-		pushbx = SiS_VGAHDE + 12;	/* bx  BTVGA@HRS 0x0B,0x0C */
-		tempcx = (SiS_VGAHT - SiS_VGAHDE) >> 2;	/* cx */
-		tempbx = pushbx + tempcx;
-		tempcx = tempcx << 1;
-		tempcx = tempcx + tempbx;
-
-		if (SiS_IF_DEF_LVDS == 0) {
-			if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-				tempbx = SiS_CRT1Table[CRT1Index].CR[4];
-				tempbx =
-				    tempbx |
-				    ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) <<
-				     2);
-				tempbx = (tempbx - 1) << 3;
-				tempcx = SiS_CRT1Table[CRT1Index].CR[5];
-				tempcx = tempcx & 0x1F;
-				temp = SiS_CRT1Table[CRT1Index].CR[15];
-				temp = (temp & 0x04) << (6 - 2);
-				tempcx = ((tempcx | temp) - 1) << 3;
-			}
-		}
-		/*add for hardware request */
-		if ((SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)) {
-			if (SiS_VBInfo & SetPALTV) {
-				tempbx = 1040;
-				tempcx = 1042;
-			} else {
-				tempbx = 1040;
-				tempcx = 1042;
-			}
-		}
-
-		temp = tempbx & 0x00FF;
-		SiS_SetReg1 (SiS_Part1Port, 0x0B, temp);
-
-	} else {		/* 310 series */
-
-		if (modeflag & HalfDCLK) {	/* for low resolution mode */
-			temp = (SiS_VGAHT / 2 - 1) & 0x0FF;	/* BTVGA2HT 0x08,0x09 */
-			SiS_SetReg1 (SiS_Part1Port, 0x08, temp);
-			temp = (((SiS_VGAHT / 2 - 1) & 0xFF00) >> 8) << 4;
-			SiS_SetRegANDOR (SiS_Part1Port, 0x09, ~0x0F0, temp);
-			temp = (SiS_VGAHDE / 2 + 16) & 0x0FF;	/* BTVGA2HDEE 0x0A,0x0C */
-			SiS_SetReg1 (SiS_Part1Port, 0x0A, temp);
-
-			pushbx = SiS_VGAHDE / 2 + 16;
-			tempcx = ((SiS_VGAHT - SiS_VGAHDE) / 2) >> 2;	/* cx */
-			tempbx = pushbx + tempcx;	/* bx  BTVGA@HRS 0x0B,0x0C */
-			tempcx = tempcx + tempbx;
-
-			if (SiS_IF_DEF_LVDS == 0) {
-				if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-					tempbx = SiS_CRT1Table[CRT1Index].CR[4];
-					tempbx =
-					    tempbx |
-					    ((SiS_CRT1Table
-					      [CRT1Index].CR[14] & 0xC0) << 2);
-					tempbx = (tempbx - 3) << 3;	/*(VGAHRS-3)*8 */
-					tempcx = SiS_CRT1Table[CRT1Index].CR[5];
-					tempcx = tempcx & 0x1F;
-					temp = SiS_CRT1Table[CRT1Index].CR[15];
-					temp = (temp & 0x04) << (5 - 2);	/*VGAHRE D[5] */
-					tempcx = ((tempcx | temp) - 3) << 3;	/* (VGAHRE-3)*8 */
-				}
-			}
-			tempbx += 4;
-			tempcx += 4;
-			if (tempcx > (SiS_VGAHT / 2))
-				tempcx = SiS_VGAHT / 2;
-			temp = tempbx & 0x00FF;
-			SiS_SetReg1 (SiS_Part1Port, 0x0B, temp);
+  /* TW: Removed 301B301LV.. check here; LCDA exists with LVDS as well */
+  if(SiS_VBInfo & SetCRT2ToLCDA) {
 
-		} else {
-			temp = (SiS_VGAHT - 1) & 0x0FF;	/* BTVGA2HT 0x08,0x09 */
-			SiS_SetReg1 (SiS_Part1Port, 0x08, temp);
-			temp = (((SiS_VGAHT - 1) & 0xFF00) >> 8) << 4;
-			SiS_SetRegANDOR (SiS_Part1Port, 0x09, ~0x0F0, temp);
-			temp = (SiS_VGAHDE + 16) & 0x0FF;	/* BTVGA2HDEE 0x0A,0x0C */
-			SiS_SetReg1 (SiS_Part1Port, 0x0A, temp);
-
-			pushbx = SiS_VGAHDE + 16;
-			tempcx = (SiS_VGAHT - SiS_VGAHDE) >> 2;	/* cx */
-			tempbx = pushbx + tempcx;	/* bx  BTVGA@HRS 0x0B,0x0C */
-			tempcx = tempcx + tempbx;
-
-			if (SiS_IF_DEF_LVDS == 0) {
-				if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-					tempbx = SiS_CRT1Table[CRT1Index].CR[4];
-					tempbx =
-					    tempbx |
-					    ((SiS_CRT1Table
-					      [CRT1Index].CR[14] & 0xC0) << 2);
-					tempbx = (tempbx - 3) << 3;	/*(VGAHRS-3)*8 */
-					tempcx = SiS_CRT1Table[CRT1Index].CR[5];
-					tempcx = tempcx & 0x1F;
-					temp = SiS_CRT1Table[CRT1Index].CR[15];
-					temp = (temp & 0x04) << (5 - 2);	/*VGAHRE D[5] */
-					tempcx = ((tempcx | temp) - 3) << 3;	/* (VGAHRE-3)*8 */
-					tempbx += 16;
-					tempcx += 16;
+	   /* TW: From 650/LVDS BIOS; 301(B+LV) version does not set Sync  */
+	   if (SiS_IF_DEF_LVDS == 1) {
+	       SiS_SetCRT2Sync(BaseAddr,ROMAddr,ModeNo,
+                               RefreshRateTableIndex,HwDeviceExtension);
+	   }
 
-				}
-			}
-			if (tempcx > SiS_VGAHT)
-				tempcx = SiS_VGAHT;
-			/*add for hardware request */
-			if ((SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)) {
-				if (SiS_VBInfo & SetPALTV) {
-					tempbx = 1040;
-					tempcx = 1042;
-				} else {
-					tempbx = 1040;
-					tempcx = 1042;
-				}
-			}
-			temp = tempbx & 0x00FF;
-			SiS_SetReg1 (SiS_Part1Port, 0x0B, temp);
-		}
+	   SiS_SetGroup1_LCDA(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+     	                   HwDeviceExtension,RefreshRateTableIndex);
 
-	}
+  } else {
 
-	tempax = (tempax & 0x00FF) | (tempbx & 0xFF00);
-	tempbx = pushbx;
-	tempbx = (tempbx & 0x00FF) | ((tempbx & 0xFF00) << 4);
-	tempax = tempax | (tempbx & 0xFF00);
-	temp = (tempax & 0xFF00) >> 8;
-	SiS_SetReg1 (SiS_Part1Port, 0x0C, temp);
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x0D, temp);
-	tempcx = (SiS_VGAVT - 1);
-	temp = tempcx & 0x00FF;
-	if (SiS_IF_DEF_CH7005 == 1) {
-		if (SiS_VBInfo & 0x0C) {
-			temp--;
-		}
-	}
-	SiS_SetReg1 (SiS_Part1Port, 0x0E, temp);
-	tempbx = SiS_VGAVDE - 1;
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x0F, temp);
-	temp = ((tempbx & 0xFF00) << 3) >> 8;
-	temp = temp | ((tempcx & 0xFF00) >> 8);
-	SiS_SetReg1 (SiS_Part1Port, 0x12, temp);
-
-	tempax = SiS_VGAVDE;
-	tempbx = SiS_VGAVDE;
-	tempcx = SiS_VGAVT;
-	tempbx = (SiS_VGAVT + SiS_VGAVDE) >> 1;	/*      BTVGA2VRS     0x10,0x11   */
-	tempcx = ((SiS_VGAVT - SiS_VGAVDE) >> 4) + tempbx + 1;	/*      BTVGA2VRE     0x11        */
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-			tempbx = SiS_CRT1Table[CRT1Index].CR[8];
-			temp = SiS_CRT1Table[CRT1Index].CR[7];
-			if (temp & 0x04)
-				tempbx = tempbx | 0x0100;
-			if (temp & 0x080)
-				tempbx = tempbx | 0x0200;
-			temp = SiS_CRT1Table[CRT1Index].CR[13];
-			if (temp & 0x08)
-				tempbx = tempbx | 0x0400;
-			temp = SiS_CRT1Table[CRT1Index].CR[9];
-			tempcx = (tempcx & 0xFF00) | (temp & 0x00FF);
-		}
-	}
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x10, temp);
-	temp = ((tempbx & 0xFF00) >> 8) << 4;
-	temp = ((tempcx & 0x000F) | (temp));
-	SiS_SetReg1 (SiS_Part1Port, 0x11, temp);
-	if (SiS_IF_DEF_LVDS == 0) {
-		temp = 0x20;
-		if (SiS_LCDResInfo == Panel1280x1024)
-			temp = 0x20;
-		if (SiS_LCDResInfo == Panel1280x960)
-			temp = 0x24;
-		if (SiS_VBInfo & SetCRT2ToTV)
-			temp = 0x08;
-		if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-			if (SiS_VBInfo & SetInSlaveMode)
-				temp = 0x2c;
-			else
-				temp = 0x20;
-		}
-	} else {
-		temp = 0x20;
-	}
-	if (HwDeviceExtension->jChipType < SIS_315H)	/* 300 series */
-		SiS_SetRegANDOR (SiS_Part1Port, 0x13, ~0x03C, temp);
-	else {			/* 310 series */
-
-		temp >>= 2;
-		temp = 0x11;	/*  ynlai 05/30/2001 for delay compenation  */
-		SiS_SetReg1 (SiS_Part1Port, 0x2D, temp);
-		/*SiS_SetRegANDOR(SiS_Part1Port,0x2D,~0x00F,temp); */
-		SiS_SetRegAND (SiS_Part1Port, 0x13, 0xEF);	/* BDirectLCD=0 for lcd ?? */
-		tempax = 0;
-
-		if (modeflag & DoubleScanMode)
-			tempax |= 0x80;
-		if (modeflag & HalfDCLK)
-			tempax |= 0x40;
-		SiS_SetRegANDOR (SiS_Part1Port, 0x2C, ~0x0C0, tempax);
+     if( (HwDeviceExtension->jChipType >= SIS_315H) &&
+         (SiS_IF_DEF_LVDS == 1) &&
+	 (SiS_VBInfo & SetInSlaveMode)) {
 
-	}
+        SiS_SetCRT2Sync(BaseAddr,ROMAddr,ModeNo,
+                        RefreshRateTableIndex,HwDeviceExtension);
 
-	if (SiS_IF_DEF_LVDS == 0) {	/*  301  */
-		SiS_SetGroup1_301 (BaseAddr, ROMAddr, ModeNo, ModeIdIndex,
-				   HwDeviceExtension, RefreshRateTableIndex);
-	} else {		/*  LVDS  */
-		SiS_SetGroup1_LVDS (BaseAddr, ROMAddr, ModeNo, ModeIdIndex,
-				    HwDeviceExtension, RefreshRateTableIndex);
-	}
-}
+     } else {
 
-void
-SiS_SetGroup1_301 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		   USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		   USHORT RefreshRateTableIndex)
-{
-	USHORT push1, push2;
-	USHORT tempax, tempbx, tempcx, temp;
-	USHORT resinfo, modeflag;
-	USHORT CRT1Index;
-
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-		resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-		CRT1Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
-		CRT1Index = CRT1Index & 0x3F;
-	}
+        SiS_SetCRT2Offset(SiS_Part1Port,ROMAddr,ModeNo,ModeIdIndex,
+      		       RefreshRateTableIndex,HwDeviceExtension);
 
-	if (!(SiS_VBInfo & SetInSlaveMode)) {
-		return;
-	}
-	tempax = 0xFFFF;
-	if (!(SiS_VBInfo & SetCRT2ToTV)) {
-		tempax = SiS_GetVGAHT2 ();
-	}
-	if (modeflag & Charx8Dot)
-		tempcx = 0x08;
-	else
-		tempcx = 0x09;
-	if (tempax >= SiS_VGAHT) {
-		tempax = SiS_VGAHT;
-	}
-	if (modeflag & HalfDCLK) {
-		tempax = tempax >> 1;
-	}
-	tempax = (tempax / tempcx) - 5;
-	tempbx = tempax;
-	temp = 0xFF;		/* set MAX HT */
-	SiS_SetReg1 (SiS_Part1Port, 0x03, temp);
-
-	tempax = SiS_VGAHDE;	/* 0x04 Horizontal Display End */
-	if (modeflag & HalfDCLK)
-		tempax = tempax >> 1;
-	tempax = (tempax / tempcx) - 1;
-	tempbx = tempbx | ((tempax & 0x00FF) << 8);
-	temp = tempax & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x04, temp);
-
-	temp = (tempbx & 0xFF00) >> 8;
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		temp = temp + 2;
-		if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-			if (resinfo == 7)
-				temp = temp - 2;
-		}
-	}
-	SiS_SetReg1 (SiS_Part1Port, 0x05, temp);	/* 0x05 Horizontal Display Start */
-	SiS_SetReg1 (SiS_Part1Port, 0x06, 0x03);	/* 0x06 Horizontal Blank end     */
-	/* 0x07 horizontal Retrace Start */
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-		temp = (tempbx & 0x00FF) - 1;
-		if (!(modeflag & HalfDCLK)) {
-			temp = temp - 6;
-			if (SiS_SetFlag & TVSimuMode) {
-				temp = temp - 4;
-				if (ModeNo > 0x13)
-					temp = temp - 10;
-			}
-		}
-	} else {
-		tempcx = tempbx & 0x00FF;
-		tempbx = (tempbx & 0xFF00) >> 8;
-		tempcx = (tempcx + tempbx) >> 1;
-		temp = (tempcx & 0x00FF) + 2;
-		if (SiS_VBInfo & SetCRT2ToTV) {
-			temp = temp - 1;
-			if (!(modeflag & HalfDCLK)) {
-				if ((modeflag & Charx8Dot)) {
-					temp = temp + 4;
-					if (SiS_VGAHDE >= 800) {
-						temp = temp - 6;
-					}
-				}
-			}
-		} else {
-			if (!(modeflag & HalfDCLK)) {
-				temp = temp - 4;
-				if (SiS_LCDResInfo != Panel1280x960) {
-					if (SiS_VGAHDE >= 800) {
-						temp = temp - 7;
-						if (SiS_ModeType == ModeEGA) {
-							if (SiS_VGAVDE == 1024) {
-								temp =
-								    temp + 15;
-								if
-								    (SiS_LCDResInfo
-								     !=
-								     Panel1280x1024)
-								{
-									temp =
-									    temp
-									    + 7;
-								}
-							}
-						}
-						if (SiS_VGAHDE >= 1280) {
-							if (SiS_LCDResInfo !=
-							    Panel1280x960) {
-								if (SiS_LCDInfo
-								    &
-								    LCDNonExpanding)
-								{
-									temp =
-									    temp
-									    +
-									    28;
-								}
-							}
-						}
-					}
-				}
-			}
-		}
+        if (HwDeviceExtension->jChipType < SIS_315H ) {
+#ifdef SIS300
+    	      SiS_SetCRT2FIFO_300(ROMAddr,ModeNo,HwDeviceExtension);
+#endif
+        } else {
+#ifdef SIS315H
+              SiS_SetCRT2FIFO_310(ROMAddr,ModeNo,HwDeviceExtension);
+#endif
 	}
 
-	SiS_SetReg1 (SiS_Part1Port, 0x07, temp);	/* 0x07 Horizontal Retrace Start */
-	SiS_SetReg1 (SiS_Part1Port, 0x08, 0);	/* 0x08 Horizontal Retrace End   */
+        SiS_SetCRT2Sync(BaseAddr,ROMAddr,ModeNo,
+                        RefreshRateTableIndex,HwDeviceExtension);
 
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		if (SiS_SetFlag & TVSimuMode) {
-			if ((ModeNo == 0x06) || (ModeNo == 0x10)
-			    || (ModeNo == 0x11) || (ModeNo == 0x13)
-			    || (ModeNo == 0x0F)) {
-				SiS_SetReg1 (SiS_Part1Port, 0x07, 0x5b);
-				SiS_SetReg1 (SiS_Part1Port, 0x08, 0x03);
-			}
-			if ((ModeNo == 0x00) || (ModeNo == 0x01)) {
-				if (SiS_VBInfo & SetNTSCTV) {
-					SiS_SetReg1 (SiS_Part1Port, 0x07, 0x2A);
-					SiS_SetReg1 (SiS_Part1Port, 0x08, 0x61);
-				} else {
-					SiS_SetReg1 (SiS_Part1Port, 0x07, 0x2A);
-					SiS_SetReg1 (SiS_Part1Port, 0x08, 0x41);
-					SiS_SetReg1 (SiS_Part1Port, 0x0C, 0xF0);
-				}
-			}
-			if ((ModeNo == 0x02) || (ModeNo == 0x03)
-			    || (ModeNo == 0x07)) {
-				if (SiS_VBInfo & SetNTSCTV) {
-					SiS_SetReg1 (SiS_Part1Port, 0x07, 0x54);
-					SiS_SetReg1 (SiS_Part1Port, 0x08, 0x00);
-				} else {
-					SiS_SetReg1 (SiS_Part1Port, 0x07, 0x55);
-					SiS_SetReg1 (SiS_Part1Port, 0x08, 0x00);
-					SiS_SetReg1 (SiS_Part1Port, 0x0C, 0xF0);
-				}
-			}
-			if ((ModeNo == 0x04) || (ModeNo == 0x05)
-			    || (ModeNo == 0x0D) || (ModeNo == 0x50)) {
-				if (SiS_VBInfo & SetNTSCTV) {
-					SiS_SetReg1 (SiS_Part1Port, 0x07, 0x30);
-					SiS_SetReg1 (SiS_Part1Port, 0x08, 0x03);
-				} else {
-					SiS_SetReg1 (SiS_Part1Port, 0x07, 0x2f);
-					SiS_SetReg1 (SiS_Part1Port, 0x08, 0x02);
-				}
-			}
-		}
-	}
+	/* 1. Horizontal setup */
 
-	SiS_SetReg1 (SiS_Part1Port, 0x18, 0x03);	/* 0x18 SR08                     */
-	SiS_SetRegANDOR (SiS_Part1Port, 0x19, 0xF0, 0x00);
-	SiS_SetReg1 (SiS_Part1Port, 0x09, 0xFF);	/* 0x09 Set Max VT               */
-
-	tempbx = SiS_VGAVT;
-	push1 = tempbx;
-	tempcx = 0x121;
-	tempbx = SiS_VGAVDE;	/* 0x0E Virtical Display End */
-	if (tempbx == 357)
-		tempbx = 350;
-	if (tempbx == 360)
-		tempbx = 350;
-	if (tempbx == 375)
-		tempbx = 350;
-	if (tempbx == 405)
-		tempbx = 400;
-	if (tempbx == 420)
-		tempbx = 400;
-	if (tempbx == 525)
-		tempbx = 480;
-	push2 = tempbx;
-	if (SiS_VBInfo & SetCRT2ToLCD) {
-		if (SiS_LCDResInfo == Panel1024x768) {
-			if (!(SiS_SetFlag & LCDVESATiming)) {
-				if (tempbx == 350)
-					tempbx = tempbx + 5;
-				if (tempbx == 480)
-					tempbx = tempbx + 5;
-			}
-		}
-	}
-	tempbx--;
-	temp = tempbx & 0x00FF;
-	tempbx--;
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x10, temp);	/* 0x10 vertical Blank Start */
-	tempbx = push2;
-	tempbx--;
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x0E, temp);
-	if (tempbx & 0x0100) {
-		tempcx = tempcx | 0x0002;
-	}
-	tempax = 0x000B;
-	if (modeflag & DoubleScanMode) {
-		tempax = tempax | 0x08000;
-	}
-	if (tempbx & 0x0200) {
-		tempcx = tempcx | 0x0040;
-	}
+        if (HwDeviceExtension->jChipType < SIS_315H ) {
 
-	temp = (tempax & 0xFF00) >> 8;
-	SiS_SetReg1 (SiS_Part1Port, 0x0B, temp);
-	if (tempbx & 0x0400) {
-		tempcx = tempcx | 0x0600;
-	}
-	SiS_SetReg1 (SiS_Part1Port, 0x11, 0x00);	/* 0x11 Vertival Blank End */
+                /* ------------- 300 series --------------*/
 
-	tempax = push1;
-	tempax = tempax - tempbx;	/* 0x0C Vertical Retrace Start */
-	tempax = tempax >> 2;
-	push1 = tempax;		/* push ax */
+    		temp = (SiS_VGAHT - 1) & 0x0FF;   			/* BTVGA2HT 0x08,0x09 */
+    		SiS_SetReg1(SiS_Part1Port,0x08,temp);                   /* TW: CRT2 Horizontal Total */
 
-	if (resinfo != 0x09) {
-		tempax = tempax << 1;
-		tempbx = tempax + tempbx;
-	}
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-		tempbx = tempbx - 10;
+    		temp = (((SiS_VGAHT - 1) & 0xFF00) >> 8) << 4;
+    		SiS_SetRegANDOR(SiS_Part1Port,0x09,0x0f,temp);          /* TW: CRT2 Horizontal Total Overflow [7:4] */
+
+    		temp = (SiS_VGAHDE + 12) & 0x0FF;                       /* BTVGA2HDEE 0x0A,0x0C */
+    		SiS_SetReg1(SiS_Part1Port,0x0A,temp);                   /* TW: CRT2 Horizontal Display Enable End */
+
+    		pushbx = SiS_VGAHDE + 12;                               /* bx  BTVGA@HRS 0x0B,0x0C */
+    		tempcx = (SiS_VGAHT - SiS_VGAHDE) >> 2;
+    		tempbx = pushbx + tempcx;
+    		tempcx <<= 1;
+    		tempcx += tempbx;
+
+    		if(SiS_IF_DEF_LVDS == 0) {
+      			if(SiS_VBInfo & SetCRT2ToRAMDAC){
+			        CRT1Index &= 0x3F;
+        			tempbx = SiS_CRT1Table[CRT1Index].CR[4];
+        			tempbx |= ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2);
+        			tempbx = (tempbx - 1) << 3;
+        			tempcx = SiS_CRT1Table[CRT1Index].CR[5];
+        			tempcx &= 0x1F;
+        			temp = SiS_CRT1Table[CRT1Index].CR[15];
+        			temp = (temp & 0x04) << (6-2);
+        			tempcx = ((tempcx | temp) - 1) << 3;
+      			}
+
+    			if((SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){
+        			if(!(SiS_VBInfo & SetPALTV)){
+      					tempbx = 1040;
+      					tempcx = 1042;
+      				}
+    			}
+	        }
+
+    		temp = tempbx & 0x00FF;
+    		SiS_SetReg1(SiS_Part1Port,0x0B,temp);                   /* TW: CRT2 Horizontal Retrace Start */
+
+ 	} else {
+
+     	   /* ---------------------- 310 series ------------------*/    /* (BIOS label Gr1_301) */
+
+     	   if (modeflag & HalfDCLK) {  /* for low resolution modes */
+
+         	temp = ((SiS_VGAHT / 2) - 1) & 0xFF;                    /* BTVGA2HT 0x08,0x09 */
+         	SiS_SetReg1(SiS_Part1Port,0x08,temp);                   /* TW: CRT2 Horizontal Total */
+
+		temp = ((((SiS_VGAHT / 2) - 1) & 0xFF00) >> 8) << 4;
+        	SiS_SetRegANDOR(SiS_Part1Port,0x09,0x0F,temp);        /* TW: CRT2 Horizontal Total Overflow [7:4] */
+
+         	temp = ((SiS_VGAHDE / 2) + 16) & 0xFF;                  /* BTVGA2HDEE 0x0A,0x0C */
+         	SiS_SetReg1(SiS_Part1Port,0x0A,temp);                   /* TW: CRT2 Horizontal Display Enable End */
+
+         	pushbx = (SiS_VGAHDE / 2) + 16;
+         	tempcx = ((SiS_VGAHT - SiS_VGAHDE) / 2) >> 2;           /* cx */
+		if(SiS_IF_DEF_LVDS == 1)
+		           tempcx >>= 1;    /* TW: From LVDS 1.10.07; not done on 301(LV) */
+         	tempbx = pushbx + tempcx;                               /* bx  BTVGA@HRS 0x0B,0x0C */
+         	tempcx += tempbx;
+
+         	if(SiS_IF_DEF_LVDS == 0) {
+                   if(SiS_VBInfo & SetCRT2ToRAMDAC){
+                	tempbx = SiS_CRT1Table[CRT1Index].CR[4];
+                	tempbx |= ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2);
+                	tempbx = (tempbx - 3) << 3;         		/*(VGAHRS-3)*8 */
+                	tempcx = SiS_CRT1Table[CRT1Index].CR[5];
+               		tempcx &= 0x1F;
+                	temp = SiS_CRT1Table[CRT1Index].CR[15];
+                	temp = (temp & 0x04) << (5-2);      		/* VGAHRE D[5]  */
+                	tempcx =((tempcx | temp) - 3) << 3;    		/* (VGAHRE-3)*8 */
+             	   }
+                   /* TW: The following is not done in 650/LVDS BIOS  */
+         	   tempbx += 4;
+         	   tempcx += 4;
+
+         	   if (tempcx > (SiS_VGAHT / 2))
+              		   tempcx = SiS_VGAHT / 2;
+         	}
+
+                temp = tempbx & 0x00FF;
+         	SiS_SetReg1(SiS_Part1Port,0x0B,temp);                  /* TW: CRT2 Horizontal Retrace Start */
+
+    	   } else {			/* for high resolution modes */
+
+         	temp = (SiS_VGAHT - 1) & 0xFF;                       	/* BTVGA2HT 0x08,0x09 */
+         	SiS_SetReg1(SiS_Part1Port,0x08,temp);                  /* TW: CRT2 Horizontal Total */
+
+         	temp = (((SiS_VGAHT - 1) & 0xFF00) >> 8 ) << 4;
+	 	SiS_SetRegANDOR(SiS_Part1Port,0x09,0x0F,temp);         /* TW: CRT2 Horizontal Total Overflow [7:4] */
+
+         	temp = (SiS_VGAHDE + 16) & 0xFF;                       /* BTVGA2HDEE 0x0A,0x0C */
+	 	SiS_SetReg1(SiS_Part1Port,0x0A,temp);                  /* TW: CRT2 Horizontal Display Enable End */
+
+         	pushbx = SiS_VGAHDE + 16;
+         	tempcx = (SiS_VGAHT - SiS_VGAHDE) >> 2;                /* cx */
+		if(SiS_IF_DEF_LVDS == 1)
+		           tempcx >>= 1;    /* TW: From LVDS 1.10.07; not done on 301(LV) */
+         	tempbx = pushbx + tempcx;                              /* bx  BTVGA@HRS 0x0B,0x0C */
+         	tempcx += tempbx;
+
+         	if(SiS_IF_DEF_LVDS==0) {
+             	   if(SiS_VBInfo & SetCRT2ToRAMDAC){
+                	tempbx = SiS_CRT1Table[CRT1Index].CR[4];
+                	tempbx |= ((SiS_CRT1Table[CRT1Index].CR[14] & 0xC0) << 2);
+                	tempbx = (tempbx - 3) << 3;         		/*(VGAHRS-3)*8 */
+                	tempcx = SiS_CRT1Table[CRT1Index].CR[5];
+               		tempcx &= 0x1F;
+                	temp = SiS_CRT1Table[CRT1Index].CR[15];
+                	temp = (temp & 0x04) << (5-2);      		/* VGAHRE D[5] */
+                	tempcx = ((tempcx | temp) - 3) << 3;    	/* (VGAHRE-3)*8 */
+                	tempbx += 16;
+                	tempcx += 16;
+             	   }
+		   /* TW: The entire following section is not done in 650/LVDS BIOS */
+         	   if (tempcx > SiS_VGAHT)
+        		tempcx = SiS_VGAHT;
+
+         	   if((SiS_VBInfo & SetCRT2ToTV) && (resinfo == 0x08)){
+             	      if(!(SiS_VBInfo & SetPALTV)){
+      		 	 tempbx = 1040;
+      		 	 tempcx = 1042;
+      	     	      }
+         	   }
+                }
+
+         	temp = tempbx & 0x00FF;
+	 	SiS_SetReg1(SiS_Part1Port,0x0B,temp);                 /* TW: CRT2 Horizontal Retrace Start */
+
+     	   } /* halfdclk */
+
+     	}  /* 310 series */
+
+  	/* TW: The following is done for all bridge/chip types/series */
+
+  	tempax = tempbx & 0xFF00;
+  	tempbx = pushbx;
+  	tempbx = (tempbx & 0x00FF) | ((tempbx & 0xFF00) << 4);
+  	tempax |= (tempbx & 0xFF00);
+  	temp = (tempax & 0xFF00) >> 8;
+  	SiS_SetReg1(SiS_Part1Port,0x0C,temp);                        /* TW: Overflow */
+
+  	temp = tempcx & 0x00FF;
+  	SiS_SetReg1(SiS_Part1Port,0x0D,temp);                        /* TW: CRT2 Horizontal Retrace End */
+
+  	/* 2. Vertical setup */
+
+  	tempcx = SiS_VGAVT - 1;
+  	temp = tempcx & 0x00FF;
+
+	/* TW: Matches 650/301LV, 650/LVDS, 630/LVDS(CLEVO), 630/LVDS(no-Ch7005) */
+        if(SiS_IF_DEF_LVDS == 1) {
+	     if(HwDeviceExtension->jChipType < SIS_315H) {
+	          if(SiS_IF_DEF_CH70xx != 0) {
+#ifndef TWPANEL
+		       if(SiS_VBInfo & (SetCRT2ToSVIDEO|SetCRT2ToAVIDEO)) {
+		           temp--;
+		       }
+#else
+		       temp--;
+#endif
+                  }
+	     } else {
+	          if(SiS_IF_DEF_CH70xx != 0) {
+ 		      temp--;
+                  }
+             }
+        }
+  	SiS_SetReg1(SiS_Part1Port,0x0E,temp);                        /* TW: CRT2 Vertical Total */
+
+  	tempbx = SiS_VGAVDE - 1;
+  	temp = tempbx & 0x00FF;
+  	SiS_SetReg1(SiS_Part1Port,0x0F,temp);                        /* TW: CRT2 Vertical Display Enable End */
+
+  	temp = ((tempbx & 0xFF00) << 3) >> 8;
+  	temp |= ((tempcx & 0xFF00) >> 8);
+  	SiS_SetReg1(SiS_Part1Port,0x12,temp);                        /* TW: Overflow (and HWCursor Test Mode) */
+
+	/* TW: For 650/LVDS */
+	if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 1)) {
+           tempbx++;
+   	   tempax = tempbx;
+	   tempcx++;
+	   tempcx = tempcx - tempax;
+	   tempcx >>= 2;
+	   tempbx = tempbx + tempcx;
+	   if(tempcx < 4) tempcx = 4;
+	   tempcx >>= 2;
+	   tempcx = tempcx + tempbx;
+	   tempcx++;
 	} else {
-		if (SiS_SetFlag & TVSimuMode) {
-			if (SiS_VBInfo & SetPALTV) {
-				tempbx = tempbx + 40;
-			}
-		}
-	}
-	tempax = push1;
-	tempax = tempax >> 2;
-	tempax++;
-	tempax = tempax + tempbx;
-	push1 = tempax;		/* push ax  */
-	if ((SiS_VBInfo & SetPALTV)) {
-		if (tempbx <= 513) {
-			if (tempax >= 513) {
-				tempbx = 513;
-			}
-		}
-	}
-	temp = (tempbx & 0x00FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x0C, temp);
-	tempbx--;
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x10, temp);
-	if (tempbx & 0x0100) {
-		tempcx = tempcx | 0x0008;
-	}
-	if (tempbx & 0x0200) {
-		SiS_SetRegANDOR (SiS_Part1Port, 0x0B, 0x0FF, 0x20);
-	}
-	tempbx++;
-	if (tempbx & 0x0100) {
-		tempcx = tempcx | 0x0004;
-	}
-	if (tempbx & 0x0200) {
-		tempcx = tempcx | 0x0080;
-	}
-	if (tempbx & 0x0400) {
-		tempcx = tempcx | 0x0C00;
+	   /* TW: For 630/LVDS/301B and 650/301LV: */
+  	   tempbx = (SiS_VGAVT + SiS_VGAVDE) >> 1;                      /*  BTVGA2VRS     0x10,0x11   */
+  	   tempcx = ((SiS_VGAVT - SiS_VGAVDE) >> 4) + tempbx + 1;       /*  BTVGA2VRE     0x11        */
+	}
+
+  	if(SiS_IF_DEF_LVDS == 0) {
+    	   if(SiS_VBInfo & SetCRT2ToRAMDAC){
+      		tempbx = SiS_CRT1Table[CRT1Index].CR[8];
+      		temp = SiS_CRT1Table[CRT1Index].CR[7];
+      		if(temp & 0x04) tempbx |= 0x0100;
+      		if(temp & 0x80) tempbx |= 0x0200;
+      		temp = SiS_CRT1Table[CRT1Index].CR[13];
+      		if(temp & 0x08) tempbx |= 0x0400;
+      		temp = SiS_CRT1Table[CRT1Index].CR[9];
+      		tempcx = (tempcx & 0xFF00) | (temp & 0x00FF);
+    	   }
+  	}
+  	temp = tempbx & 0x00FF;
+  	SiS_SetReg1(SiS_Part1Port,0x10,temp);                        /* TW: CRT2 Vertical Retrace Start */
+
+  	temp = ((tempbx & 0xFF00) >> 8) << 4;
+  	temp |= (tempcx & 0x000F);
+  	SiS_SetReg1(SiS_Part1Port,0x11,temp);                        /* TW: CRT2 Vert. Retrace End; Overflow; "Enable CRTC Check" */
+
+  	/* 3. Paneldelay */
+
+  	if (HwDeviceExtension->jChipType < SIS_315H ) {
+
+    	   /* ---------- 300 series -------------- */
+
+	   if(SiS_IF_DEF_LVDS == 0) {
+	        temp = 0x20;
+		if(SiS_LCDResInfo == Panel1280x960) temp = 0x24;     /* TW: Not in 630/301B BIOS */
+		if(SiS_VBInfo & SetCRT2ToTV) temp = 0x08;
+		if(SiS_VBInfo & SetCRT2ToHiVisionTV) {		     /* TW: Not in 630/301B BIOS */
+      		    if(SiS_VBInfo & SetInSlaveMode) temp = 0x2c;     /* TW: Not in 630/301B BIOS */
+      		    else temp = 0x20;                                /* TW: Not in 630/301B BIOS */
+    	        }
+		if((ROMAddr) && (SiS_VBType & VB_SIS301BLV302BLV)) {
+		    if(ROMAddr[0x220] & 0x80) {
+		        if(SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV)) temp = ROMAddr[0x221];
+			else if(SiS_VBInfo & SetCRT2ToHiVisionTV) temp = ROMAddr[0x222];
+		        else if(SiS_LCDResInfo == Panel1280x1024) temp = ROMAddr[0x223];
+			else temp = ROMAddr[0x224];
+			temp &= 0x3c;
+		    }
+		}
+		if(HwDeviceExtension->pdc) {
+			temp = HwDeviceExtension->pdc & 0x3c;
+		}
+	   } else {
+	        temp = 0x20;
+		if(SiS_LCDResInfo == Panel640x480) temp = 0x04;
+		if(ROMAddr) {
+		    if(ROMAddr[0x220] & 0x80) {
+		        temp = ROMAddr[0x220] & 0x3c;
+		    }
+		}
+		if(HwDeviceExtension->pdc) {
+			temp = HwDeviceExtension->pdc & 0x3c;
+		}
+	   }
+
+    	   SiS_SetRegANDOR(SiS_Part1Port,0x13,~0x03C,temp);         /* TW: Panel Link Delay Compensation; (Software Command Reset; Power Saving) */
+	   /* TW: This register will be adapted according to LCD
+	    *     panel type later in the OEM setup functions.
+	    *     (Various panel types require a different delay
+	    *     such as Clevo 2202; however, on most panels,
+	    *     0x20 does nicely.)
+	    */
+
+  	} else {
+
+      	   /* ----------- 310/325 series ---------------*/
+	   if(SiS_IF_DEF_LVDS == 0) {
+                temp = 0x10;                                        /* TW: Modified (650/301 BIOS) */
+                if(SiS_LCDResInfo == Panel1024x768)  temp = 0x2c;   /* TW: Modified (650/301 BIOS) */
+    	        if(SiS_LCDResInfo == Panel1280x1024) temp = 0x20;
+    	        if(SiS_LCDResInfo == Panel1280x960)  temp = 0x24;
+		if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+      		   if(SiS_VBInfo & SetInSlaveMode) temp = 0x2c;
+      		   else temp = 0x20;
+    	        }
+		tempbl = 0xF0;
+	   } else {
+	        temp = 0x00;
+		if(SiS_VBInfo & SetCRT2ToTV) temp = 0x0a;
+		tempbl = 0xF0;
+		if(!(SiS_VBInfo & SetCRT2ToTV)) tempbl = 0x0F;
+	   }
+
+           if(SiS_IF_DEF_LVDS == 0) {
+                 temp >>= 2;         				    /* TW: Only in 650/301LV BIOS */
+	   }
+
+	   SiS_SetRegANDOR(SiS_Part1Port,0x2D,tempbl,temp);	    /* TW: Panel Link Delay Compensation */
+           /* TW: This register will be adapted according to LCD
+	    *     panel type later in the OEM setup functions.
+	    *     (Various panel types require a different delay)
+	    */
+
+    	   tempax = 0;
+    	   if (modeflag & DoubleScanMode) tempax |= 0x80;
+    	   if (modeflag & HalfDCLK)       tempax |= 0x40;
+    	   SiS_SetRegANDOR(SiS_Part1Port,0x2C,0x3f,tempax);
+
+  	}
+
+     }  /* Slavemode */
+
+     if(SiS_IF_DEF_LVDS == 0) {
+
+        /* TW: 630/301B BIOS sets up Panel Link, too! (650/LV does not) */
+        if( (SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCD)
+	                       && (HwDeviceExtension->jChipType < SIS_315H)) {
+
+	    SiS_SetGroup1_LVDS(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                       HwDeviceExtension,RefreshRateTableIndex);
+
+        } else if(SiS_VBInfo & SetInSlaveMode) {                              /* Inserted (650/301 BIOS) */
+
+    	    SiS_SetGroup1_301(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                      HwDeviceExtension,RefreshRateTableIndex);
+        }
+
+     } else {
+
+        if(HwDeviceExtension->jChipType < SIS_315H) {
+	     SiS_SetGroup1_LVDS(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                        HwDeviceExtension,RefreshRateTableIndex);
+	} else {
+	    /* TW: For 650/LVDS */
+            if((!(SiS_VBInfo & SetCRT2ToTV)) || (SiS_VBInfo & SetInSlaveMode)) {
+    	         SiS_SetGroup1_LVDS(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,
+	                            HwDeviceExtension,RefreshRateTableIndex);
+            }
 	}
 
-	tempbx = push1;		/* pop ax */
-	temp = tempbx & 0x00FF;
-	temp = temp & 0x0F;
-	SiS_SetReg1 (SiS_Part1Port, 0x0D, temp);	/* 0x0D vertical Retrace End */
-	if (tempbx & 0x0010) {
-		tempcx = tempcx | 0x2000;
-	}
+     }
+   } /* LCDA */
+}
 
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x0A, temp);	/* 0x0A CR07 */
-	temp = (tempcx & 0x0FF00) >> 8;
-	SiS_SetReg1 (SiS_Part1Port, 0x17, temp);	/* 0x17 SR0A */
-	tempax = modeflag;
-	temp = (tempax & 0xFF00) >> 8;
-
-	temp = (temp >> 1) & 0x09;
-	SiS_SetReg1 (SiS_Part1Port, 0x16, temp);	/* 0x16 SR01 */
-	SiS_SetReg1 (SiS_Part1Port, 0x0F, 0);	/* 0x0F CR14 */
-	SiS_SetReg1 (SiS_Part1Port, 0x12, 0);	/* 0x12 CR17 */
-	if (SiS_LCDInfo & LCDRGB18Bit)
-		temp = 0x80;
-	else
-		temp = 0x00;
-	SiS_SetReg1 (SiS_Part1Port, 0x1A, temp);	/* 0x1A SR0E */
-	return;
+/* TW: Checked against 650/301LV and 630/301B (II) BIOS */
+void
+SiS_SetGroup1_301(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                  PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex)
+{
+  USHORT  push1,push2;
+  USHORT  tempax,tempbx,tempcx,temp;
+  USHORT  resinfo,modeflag;
+
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  }
+
+  /* TW: The following is only done if bridge is in slave mode: */
+
+  tempax = 0xFFFF;
+  if(!(SiS_VBInfo & SetCRT2ToTV))  tempax = SiS_GetVGAHT2();
+
+  /* TW: 630/301B does not check this flag, assumes it is set */
+  /*     650/LV BIOS does not check this either; so we set it... */
+  if(SiS_VBType & VB_SIS301BLV302BLV) {
+  	modeflag |= Charx8Dot;
+  }
+
+  if(modeflag & Charx8Dot) tempcx = 0x08;
+  else tempcx = 0x09;
+
+  if(tempax >= SiS_VGAHT) tempax = SiS_VGAHT;
+
+  if(modeflag & HalfDCLK) tempax >>= 1;
+
+  tempax = (tempax / tempcx) - 5;
+  tempbx = tempax & 0xFF;
+
+  temp = 0xFF;                                          /* set MAX HT */
+  SiS_SetReg1(SiS_Part1Port,0x03,temp);
+
+  tempax = SiS_VGAHDE;                                 	/* 0x04 Horizontal Display End */
+  if(modeflag & HalfDCLK) tempax >>= 1;
+  tempax = (tempax / tempcx) - 1;
+  tempbx |= ((tempax & 0x00FF) << 8);
+  temp = tempax & 0xFF;
+  SiS_SetReg1(SiS_Part1Port,0x04,temp);
+
+  temp = (tempbx & 0xFF00) >> 8;
+  if(SiS_VBInfo & SetCRT2ToTV){
+        if(!(SiS_VBType & VB_SIS301BLV302BLV)) {        /* TW: Inserted from 650/301, 630/301 BIOS */
+    	    temp += 2;
+        }                                               /* TW: Inserted from 650/301, 630/301 BIOS */
+#ifdef oldHV
+    	if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+            if(resinfo == 7) temp -= 2;
+    	}
+#endif
+  }
+  SiS_SetReg1(SiS_Part1Port,0x05,temp);                 /* 0x05 Horizontal Display Start */
+
+  SiS_SetReg1(SiS_Part1Port,0x06,0x03);                 /* 0x06 Horizontal Blank end     */
+
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+    temp = (tempbx & 0x00FF) - 1;
+    if(!(modeflag & HalfDCLK)) {
+      temp -= 6;
+      if(SiS_SetFlag & TVSimuMode) {
+        temp -= 2;					/* Modified according to 650/301 BIOS; was 4 */
+        if(ModeNo > 0x13) temp -= 10;
+      }
+    }
+  } else {
+#endif
+    tempcx = tempbx & 0x00FF;
+    tempbx = (tempbx & 0xFF00) >> 8;
+    tempcx = (tempcx + tempbx) >> 1;
+    temp = (tempcx & 0x00FF) + 2;
+    if(SiS_VBInfo & SetCRT2ToTV){
+       temp--;
+       if(!(modeflag & HalfDCLK)){
+          if((modeflag & Charx8Dot)){
+             temp += 4;
+             if(SiS_VGAHDE >= 800) temp -= 6;
+	     /* TW: Inserted from 650/301 BIOS, 630/301B/301 don't do this */
+             if(HwDeviceExtension->jChipType >= SIS_315H) {
+	         if(SiS_VGAHDE == 800) temp += 2;
+             }
+          }
+       }
+    } else {
+       if(!(modeflag & HalfDCLK)){
+         temp -= 4;
+         if(SiS_LCDResInfo != Panel1280x960) {
+           if(SiS_VGAHDE >= 800){
+             temp -= 7;
+             if(SiS_ModeType == ModeEGA){                         /* 650/301LV does not do this */
+               if(SiS_VGAVDE == 1024){                            /* 650/301LV does not do this */
+                 temp += 15;                                      /* 650/301LV does not do this */
+                 if(SiS_LCDResInfo != Panel1280x1024) temp += 7;  /* 650/301LV does not do this */
+               }
+             }
+             if(SiS_VGAHDE >= 1280){
+               if(SiS_LCDResInfo != Panel1280x960) {
+                 if(SiS_LCDInfo & LCDNonExpanding) temp += 28;
+               }
+             }
+           }
+         }
+       }
+    }
+#ifdef oldHV
+  }
+#endif
+  SiS_SetReg1(SiS_Part1Port,0x07,temp);               	/* 0x07 Horizontal Retrace Start */
+
+  SiS_SetReg1(SiS_Part1Port,0x08,0x00);                 /* 0x08 Horizontal Retrace End   */
+
+  if(SiS_VBInfo & SetCRT2ToTV) {
+        if(SiS_SetFlag & TVSimuMode) {
+            if((ModeNo == 0x06) || (ModeNo == 0x10) || (ModeNo == 0x11) ||
+	                           (ModeNo == 0x13) || (ModeNo == 0x0F)){
+             	SiS_SetReg1(SiS_Part1Port,0x07,0x5b);
+             	SiS_SetReg1(SiS_Part1Port,0x08,0x03);
+            }
+            if((ModeNo == 0x00) || (ModeNo == 0x01)) {
+             	if(SiS_VBInfo & SetNTSCTV) {
+             		SiS_SetReg1(SiS_Part1Port,0x07,0x2A);
+             		SiS_SetReg1(SiS_Part1Port,0x08,0x61);
+              	} else {
+             		SiS_SetReg1(SiS_Part1Port,0x07,0x2A);
+             		SiS_SetReg1(SiS_Part1Port,0x08,0x41);
+             		SiS_SetReg1(SiS_Part1Port,0x0C,0xF0);
+            	}
+           }
+           if((ModeNo == 0x02) || (ModeNo == 0x03) || (ModeNo == 0x07)){
+            	if(SiS_VBInfo & SetNTSCTV) {
+           		SiS_SetReg1(SiS_Part1Port,0x07,0x54);
+           		SiS_SetReg1(SiS_Part1Port,0x08,0x00);
+            	} else {
+           		SiS_SetReg1(SiS_Part1Port,0x07,0x55);
+           		SiS_SetReg1(SiS_Part1Port,0x08,0x00);
+           		SiS_SetReg1(SiS_Part1Port,0x0C,0xF0);
+           	}
+           }
+           if((ModeNo == 0x04) || (ModeNo == 0x05) || (ModeNo == 0x0D)
+	                                           || (ModeNo == 0x50)){
+            	if(SiS_VBInfo & SetNTSCTV) {
+            		SiS_SetReg1(SiS_Part1Port,0x07,0x30);
+            		SiS_SetReg1(SiS_Part1Port,0x08,0x03);
+            	} else {
+           		SiS_SetReg1(SiS_Part1Port,0x07,0x2f);
+           		SiS_SetReg1(SiS_Part1Port,0x08,0x02);
+                }
+           }
+       }
+  }
+
+  SiS_SetReg1(SiS_Part1Port,0x18,0x03);                	/* 0x18 SR08    */
+
+  SiS_SetRegANDOR(SiS_Part1Port,0x19,0xF0,0x00);
+
+  SiS_SetReg1(SiS_Part1Port,0x09,0xFF);                	/* 0x09 Set Max VT    */
+
+  tempbx = SiS_VGAVT;
+  push1 = tempbx;
+  tempcx = 0x121;
+  tempbx = SiS_VGAVDE;                               	/* 0x0E Vertical Display End */
+  if(tempbx == 357) tempbx = 350;
+  if(tempbx == 360) tempbx = 350;
+  if(tempbx == 375) tempbx = 350;
+  if(tempbx == 405) tempbx = 400;
+  if(tempbx == 420) tempbx = 400;
+  if(tempbx == 525) tempbx = 480;
+  push2 = tempbx;
+  if(SiS_VBInfo & SetCRT2ToLCD) {  /* TW: Entire if statement not in 630/301 BIOS */
+    	if(SiS_LCDResInfo == Panel1024x768) {
+      		if(!(SiS_SetFlag & LCDVESATiming)) {
+        		if(tempbx == 350) tempbx += 5;
+        		if(tempbx == 480) tempbx += 5;
+      		}
+    	}
+  }
+  tempbx--;
+  temp = tempbx & 0x00FF;
+  tempbx--;			/* Not in 630/301 BIOS */
+  temp = tempbx & 0x00FF;	/* Not in 630/301 BIOS */
+  SiS_SetReg1(SiS_Part1Port,0x10,temp);        		/* 0x10 vertical Blank Start */
+
+  tempbx = push2;
+  tempbx--;
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x0E,temp);
+
+  if(tempbx & 0x0100) {
+  	tempcx |= 0x0002;
+	if(SiS_VBType & VB_SIS301) tempcx |=0x000a;
+  }
+
+  tempax = 0x000B;
+  if(modeflag & DoubleScanMode) tempax |= 0x8000;
+
+  if(tempbx & 0x0200) {
+  	tempcx |= 0x0040;
+	if(SiS_VBType & VB_SIS301) tempax |= 0x2000;
+  }
+
+  if(SiS_VBType & VB_SIS301) {
+        if(SiS_VBInfo & SetPALTV) {
+	      if(SiS_VGAVDE == 480) {
+	             tempax = (tempax & 0x00ff) | 0x2000;
+		     if(modeflag & DoubleScanMode)  tempax |= 0x8000;
+	      }
+	}
+  }
+
+  temp = (tempax & 0xFF00) >> 8;
+  SiS_SetReg1(SiS_Part1Port,0x0B,temp);
+
+  if(tempbx & 0x0400) tempcx |= 0x0600;
+
+  SiS_SetReg1(SiS_Part1Port,0x11,0x00);                	/* 0x11 Vertical Blank End */
+
+  tempax = push1;
+  tempax -= tempbx;
+  tempax >>= 2;
+  push1 = tempax;
+
+  if((resinfo != 0x09) || (SiS_VBType & VB_SIS301)) {
+    	tempax <<= 1;
+    	tempbx += tempax;
+  }
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+    	tempbx -= 10;
+  } else {
+#endif
+    	if(SiS_SetFlag & TVSimuMode) {
+      	   if(SiS_VBInfo & SetPALTV) {
+	       if(!(SiS_HiVision & 0x03)) {
+                    tempbx += 40;
+		    if(HwDeviceExtension->jChipType >= SIS_315H) {
+		       if(SiS_VGAHDE == 800) tempbx += 10;
+		    }
+      	       }
+	   }
+    	}
+#ifdef oldHV
+  }
+#endif
+  tempax = push1;
+  tempax >>= 2;
+  tempax++;
+  tempax += tempbx;
+  push1 = tempax;
+  if((SiS_VBInfo & SetPALTV)) {
+    	if(tempbx <= 513)  {
+      		if(tempax >= 513) tempbx = 513;
+    	}
+  }
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x0C,temp);			/* 0x0C Vertical Retrace Start */
+
+  if(!(SiS_VBType & VB_SIS301)) {
+  	tempbx--;
+  	temp = tempbx & 0x00FF;
+  	SiS_SetReg1(SiS_Part1Port,0x10,temp);
+
+	if(tempbx & 0x0100) tempcx |= 0x0008;
+
+  	if(tempbx & 0x0200)
+    		SiS_SetRegOR(SiS_Part1Port,0x0B,0x20);
+
+  	tempbx++;
+  }
+  if(tempbx & 0x0100) tempcx |= 0x0004;
+  if(tempbx & 0x0200) tempcx |= 0x0080;
+  if(tempbx & 0x0400) {
+        if(SiS_VBType & VB_SIS301) tempcx |= 0x0800;
+  	else                       tempcx |= 0x0C00;
+  }
+
+  tempbx = push1;
+  temp = tempbx & 0x00FF;
+  temp &= 0x0F;
+  SiS_SetReg1(SiS_Part1Port,0x0D,temp);        		/* 0x0D vertical Retrace End */
+
+  if(tempbx & 0x0010) tempcx |= 0x2000;
+
+  temp = tempcx & 0x00FF;
+
+  if(SiS_VBType & VB_SIS301) {
+	if(SiS_VBInfo & SetPALTV) {
+	      if(SiS_VGAVDE == 480)  temp = 0xa3;
+	}
+  }
+  SiS_SetReg1(SiS_Part1Port,0x0A,temp);                    		/* 0x0A CR07 */
+
+  temp = (tempcx & 0xFF00) >> 8;
+  SiS_SetReg1(SiS_Part1Port,0x17,temp);                    		/* 0x17 SR0A */
+
+  tempax = modeflag;
+  temp = (tempax & 0xFF00) >> 8;
+  temp = (temp >> 1) & 0x09;
+  /* TW: Inserted from 650/301 BIOS; not in 630/301B+301 BIOS */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+       temp |= 0x01;
+  }
+  SiS_SetReg1(SiS_Part1Port,0x16,temp);                    		/* 0x16 SR01 */
+
+  SiS_SetReg1(SiS_Part1Port,0x0F,0x00);                        		/* 0x0F CR14 */
+
+  SiS_SetReg1(SiS_Part1Port,0x12,0x00);                        		/* 0x12 CR17 */
+
+  if(SiS_LCDInfo & LCDRGB18Bit) temp = 0x80;
+  else                          temp = 0x00;
+  SiS_SetReg1(SiS_Part1Port,0x1A,temp);                         	/* 0x1A SR0E */
+
+  return;
 }
 
+/* TW: Checked against 650/LVDS 1.10.07, 630/301B (I,II) and 630/LVDS BIOS */
 void
-SiS_SetGroup1_LVDS (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		    USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		    USHORT RefreshRateTableIndex)
+SiS_SetGroup1_LVDS(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+		   USHORT ModeIdIndex,
+                   PSIS_HW_DEVICE_INFO HwDeviceExtension,
+		   USHORT RefreshRateTableIndex)
 {
-	USHORT modeflag, resinfo;
-	USHORT push1, push2, tempax, tempbx, tempcx, temp, pushcx;
-	ULONG tempeax = 0, tempebx, tempecx, tempvcfact = 0;
+  USHORT modeflag,resinfo;
+  USHORT push1,push2,tempax,tempbx,tempcx,temp,pushcx;
+  ULONG tempeax=0,tempebx,tempecx,tempvcfact=0;
+
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  }
+
+#ifdef LINUX_XF86
+#ifdef TWDEBUG
+  xf86DrvMsg(0, X_INFO, "(init301: LCDHDES 0x%03x LCDVDES 0x%03x)\n", SiS_LCDHDES, SiS_LCDVDES);
+  xf86DrvMsg(0, X_INFO, "(init301: HDE     0x%03x VDE     0x%03x)\n", SiS_HDE, SiS_VDE);
+  xf86DrvMsg(0, X_INFO, "(init301: VGAHDE  0x%03x VGAVDE  0x%03x)\n", SiS_VGAHDE, SiS_VGAVDE);
+  xf86DrvMsg(0, X_INFO, "(init301: HT      0x%03x VT      0x%03x)\n", SiS_HT, SiS_VT);
+  xf86DrvMsg(0, X_INFO, "(init301: VGAHT   0x%03x VGAVT   0x%03x)\n", SiS_VGAHT, SiS_VGAVT);
+#endif
+#endif
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-		resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-	}
+  /* TW: Set up Panel Link */
 
-	tempax = SiS_LCDHDES;
-	tempbx = SiS_HDE;
-	tempcx = SiS_HT;
-	tempcx = tempcx - tempbx;	/* HT-HDE  */
-	if (SiS_LCDInfo & LCDNonExpanding) {
-		if (SiS_LCDResInfo == Panel800x600)
-			tempbx = 800;
-		if (SiS_LCDResInfo == Panel1024x768)
-			tempbx = 1024;
-	}
-	push1 = tempax;
-	tempax = tempax + tempbx;	/* lcdhdee  */
-	tempbx = SiS_HT;
-	if (tempax >= tempbx) {
-		tempax = tempax - tempbx;
-	}
-	push2 = tempax;
-	/* push ax   lcdhdee  */
-	tempcx = tempcx >> 2;	/* temp  */
-	tempcx = tempcx + tempax;	/* lcdhrs  */
-	if (tempcx >= tempbx) {
-		tempcx = tempcx - tempbx;
-	}
-	/* v ah,cl  */
-	tempax = tempcx;
-	tempax = tempax >> 3;	/* BPLHRS */
-	temp = tempax & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x14, temp);	/* Part1_14h  */
-	temp = (tempax & 0x00FF) + 10;
-	temp = temp & 0x01F;
-	temp = temp | (((tempcx & 0x00ff) & 0x07) << 5);
-	SiS_SetReg1 (SiS_Part1Port, 0x15, temp);	/* Part1_15h  */
-	tempbx = push2;		/* lcdhdee  */
-	tempcx = push1;		/* lcdhdes  */
-	temp = (tempcx & 0x00FF);
-	temp = temp & 0x07;	/* BPLHDESKEW  */
-	SiS_SetReg1 (SiS_Part1Port, 0x1A, temp);	/* Part1_1Ah  */
-	tempcx = tempcx >> 3;	/* BPLHDES */
-	temp = (tempcx & 0x00FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x16, temp);	/* Part1_16h  */
-	if (tempbx & 0x07)
-		tempbx = tempbx + 8;
-	tempbx = tempbx >> 3;	/* BPLHDEE  */
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x17, temp);	/* Part1_17h  */
-
-	tempcx = SiS_VGAVT;
-	tempbx = SiS_VGAVDE;
-	tempcx = tempcx - tempbx;	/* GAVT-VGAVDE  */
-	tempbx = SiS_LCDVDES;	/* VGAVDES  */
-	push1 = tempbx;		/* push bx temppush1 */
-	if (SiS_IF_DEF_TRUMPION == 0) {
-		if (SiS_IF_DEF_CH7005 == 1) {
-			if (SiS_VBInfo & SetCRT2ToTV) {
-				tempax = SiS_VGAVDE;
-			}
-		}
-		if (SiS_VBInfo & SetCRT2ToLCD) {
-			if (SiS_LCDResInfo == Panel800x600)
-				tempax = 600;
-			if (SiS_LCDResInfo == Panel1024x768)
-				tempax = 768;
-		}
-	} else
-		tempax = SiS_VGAVDE;
-	tempbx = tempbx + tempax;
-	tempax = SiS_VT;	/* VT  */
-	if (tempbx >= SiS_VT) {
-		tempbx = tempbx - tempax;
-	}
-	push2 = tempbx;		/* push bx  temppush2  */
-	tempcx = tempcx >> 1;
-	tempbx = tempbx + tempcx;
-	tempbx++;		/* BPLVRS  */
-	if (tempbx >= tempax) {
-		tempbx = tempbx - tempax;
-	}
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x18, temp);	/* Part1_18h  */
-	tempcx = tempcx >> 3;
-	tempcx = tempcx + tempbx;
-	tempcx++;		/* BPLVRE  */
-	temp = tempcx & 0x00FF;
-	temp = temp & 0x0F;
-	SiS_SetRegANDOR (SiS_Part1Port, 0x19, ~0x00F, temp);	/* Part1_19h  */
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp & 0x07;
-	temp = temp << 3;	/* BPLDESKEW =0 */
-	tempbx = SiS_VGAVDE;
-	if (tempbx != SiS_VDE) {
-		temp = temp | 0x40;
-	}
-	if (SiS_SetFlag & EnableLVDSDDA) {
-		temp = temp | 0x40;
-	}
-	if (SiS_LCDInfo & LCDRGB18Bit) {
-		temp = temp | 0x80;
-	}
-	SiS_SetRegANDOR (SiS_Part1Port, 0x1A, 0x07, temp);	/* Part1_1Ah */
-
-	tempecx = SiS_VGAVT;
-	tempebx = SiS_VDE;
-	tempeax = SiS_VGAVDE;
-	tempecx = tempecx - tempeax;	/* VGAVT-VGAVDE  */
-	tempeax = tempeax << 6;
-	temp = (USHORT) (tempeax % tempebx);
-	tempeax = tempeax / tempebx;
-	if (temp != 0) {
-		tempeax++;
-	}
-	tempebx = tempeax;	/* BPLVCFACT  */
-	if (SiS_SetFlag & EnableLVDSDDA) {
-		tempebx = tempebx & 0x003F;
-	}
-	temp = (USHORT) (tempebx & 0x00FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x1E, temp);	/* Part1_1Eh */
-
-	/*add for 301b different 301 */
-	if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-		tempecx = SiS_VGAVT;
-		tempebx = SiS_VDE;
-		tempeax = SiS_VGAVDE;
-		tempecx = tempecx - tempeax;	/* VGAVT-VGAVDE  */
-		tempeax = tempeax << 18;
-		temp = (USHORT) (tempeax % tempebx);
-		tempeax = tempeax / tempebx;
-		if (temp != 0) {
-			tempeax++;
-		}
-		tempebx = tempeax;	/* BPLVCFACT  */
-		tempvcfact = tempeax;	/*301b */
-		temp = (USHORT) (tempebx & 0x00FF);
-		SiS_SetReg1 (SiS_Part1Port, 0x37, temp);
-		temp = (USHORT) ((tempebx & 0x00FF00) >> 8);
-		SiS_SetReg1 (SiS_Part1Port, 0x36, temp);
-		temp = (USHORT) ((tempebx & 0x00030000) >> 16);
-		if (SiS_VDE == SiS_VGAVDE) {
-			temp = temp | 0x04;
-		}
+  /* 1. Horizontal setup */
 
-		SiS_SetReg1 (SiS_Part1Port, 0x35, temp);
-	}
-	/*end for 301b */
-
-	tempbx = push2;		/* p bx temppush2 BPLVDEE  */
-	tempcx = push1;		/* pop cx temppush1 NPLVDES */
-	push1 = (USHORT) (tempeax & 0xFFFF);
-	if (!(SiS_VBInfo & SetInSlaveMode)) {
-		if (SiS_LCDResInfo == Panel800x600) {
-			if (resinfo == 7)
-				tempcx++;
-		} else {
-			if (SiS_LCDResInfo == Panel1024x768) {
-				if (resinfo == 8)
-					tempcx++;
-			}
-		}
-	}
+  tempax = SiS_LCDHDES;
+   /* TW: Inserted (650/LVDS,630/301B/LVDS) BIOS) */
+  if((SiS_LCDResInfo == Panel640x480) && (!(SiS_VBInfo & SetInSlaveMode)))
+  	tempax -= 8;
 
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp & 0x07;
-	temp = temp << 3;
-	temp = temp | (((tempcx & 0xFF00) >> 8) & 0x07);
-	SiS_SetReg1 (SiS_Part1Port, 0x1D, temp);	/* Part1_1Dh */
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x1C, temp);	/* Part1_1Ch  */
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x1B, temp);	/* Part1_1Bh  */
-
-	tempecx = SiS_VGAHDE;
-	tempebx = SiS_HDE;
-	tempeax = tempecx;
-	tempeax = tempeax << 6;
-	tempeax = tempeax << 10;
-	tempeax = tempeax / tempebx;
-	if (tempebx == tempecx) {
-		tempeax = 65535;
-	}
-	tempecx = tempeax;
-	tempeax = SiS_VGAHDE;	/*change VGAHT->VGAHDE */
-	tempeax = tempeax << 6;
-	tempeax = tempeax << 10;
-	tempeax = tempeax / tempecx;
-	tempecx = tempecx << 16;
-	tempeax = tempeax - 1;
-	tempecx = tempecx | (tempeax & 0x00FFFF);
-	temp = (USHORT) (tempecx & 0x00FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x1F, temp);	/* Part1_1Fh  */
-
-	tempeax = SiS_VGAVDE;
-	tempeax = tempeax << 18;	/*301b */
-	tempeax = tempeax / tempvcfact;
-	tempbx = (USHORT) (tempeax & 0x0FFFF);
-	if (SiS_LCDResInfo == Panel1024x768)
-		tempbx--;
-	if (SiS_SetFlag & EnableLVDSDDA) {
-		tempbx = 1;
-	}
-	temp = ((tempbx & 0xFF00) >> 8) << 3;
-	temp = temp | (USHORT) (((tempecx & 0x0000FF00) >> 8) & 0x07);
-	SiS_SetReg1 (SiS_Part1Port, 0x20, temp);	/* Part1_20h */
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x21, temp);	/* Part1_21h */
-	tempecx = tempecx >> 16;	/* BPLHCFACT  */
-	if (modeflag & HalfDCLK) {
-		tempecx = tempecx >> 1;
-	}
-	temp = (USHORT) ((tempecx & 0x0000FF00) >> 8);
-	SiS_SetReg1 (SiS_Part1Port, 0x22, temp);	/* Part1_22h */
-	temp = (USHORT) (tempecx & 0x000000FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x23, temp);
-	/*add dstn new register */
-	if (SiS_IF_DEF_DSTN) {
-		SiS_SetReg1 (SiS_Part1Port, 0x1E, 0x01);
-		SiS_SetReg1 (SiS_Part1Port, 0x25, 0x00);
-		SiS_SetReg1 (SiS_Part1Port, 0x26, 0x00);
-		SiS_SetReg1 (SiS_Part1Port, 0x27, 0x00);
-		SiS_SetReg1 (SiS_Part1Port, 0x28, 0x87);
-		SiS_SetReg1 (SiS_Part1Port, 0x29, 0x5A);
-		SiS_SetReg1 (SiS_Part1Port, 0x2A, 0x4B);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x44, ~0x007, 0x03);
-		tempbx = SiS_HDE;	/*Blps=lcdhdee(lcdhdes+HDE) +64 */
-		tempbx = tempbx + 64;
-		temp = tempbx & 0x00FF;
-		SiS_SetReg1 (SiS_Part1Port, 0x38, temp);
-		temp = ((tempbx & 0xFF00) >> 8) << 3;
-		SiS_SetRegANDOR (SiS_Part1Port, 0x35, ~0x078, temp);
-		tempbx = tempbx + 32;	/*Blpe=lBlps+32 */
-		temp = tempbx & 0x00FF;
-		SiS_SetReg1 (SiS_Part1Port, 0x39, temp);
-		SiS_SetReg1 (SiS_Part1Port, 0x3A, 0x00);	/*Bflml=0 */
-		SiS_SetRegANDOR (SiS_Part1Port, 0x3C, ~0x007, 0x00);
-		tempbx = SiS_VDE;
-		tempbx = tempbx / 2;
-		temp = tempbx & 0x00FF;
-		SiS_SetReg1 (SiS_Part1Port, 0x3B, temp);
-		temp = ((tempbx & 0xFF00) >> 8) << 3;
-		SiS_SetRegANDOR (SiS_Part1Port, 0x3C, ~0x038, temp);
-		tempeax = SiS_HDE;	/* BDxFIFOSTOP= (HDE*4)/128 */
-		tempeax = tempeax * 4;
-		tempebx = 128;
-		temp = (USHORT) (tempeax % tempebx);
-		tempeax = tempeax / tempebx;
-		if (temp != 0) {
-			tempeax++;
-		}
-		temp = (USHORT) (tempeax & 0x0000003F);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x45, ~0x0FF, temp);
-		SiS_SetReg1 (SiS_Part1Port, 0x3F, 0x00);	/*BDxWadrst0 */
-		SiS_SetReg1 (SiS_Part1Port, 0x3E, 0x00);
-		SiS_SetReg1 (SiS_Part1Port, 0x3D, 0x10);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x3C, ~0x040, 0x00);
-		tempax = SiS_HDE;
-		tempax = tempax >> 4;	/*BDxWadroff = HDE*4/8/8  */
-		pushcx = tempax;
-		temp = tempax & 0x00FF;
-		SiS_SetReg1 (SiS_Part1Port, 0x43, temp);
-		temp = ((tempax & 0xFF00) >> 8) << 3;
-		SiS_SetRegANDOR (SiS_Part1Port, 0x44, ~0x0F8, temp);
-		tempax = SiS_VDE;	/*BDxWadrst1 = BDxWadrst0+BDxWadroff*VDE */
-		tempeax = (tempax * pushcx);
-		tempebx = 0x00100000 + tempeax;
-		temp = (USHORT) tempebx & 0x000000FF;
-		SiS_SetReg1 (SiS_Part1Port, 0x42, temp);
-		temp = (USHORT) ((tempebx & 0x0000FF00) >> 8);
-		SiS_SetReg1 (SiS_Part1Port, 0x41, temp);
-		temp = (USHORT) ((tempebx & 0x00FF0000) >> 16);
-		SiS_SetReg1 (SiS_Part1Port, 0x40, temp);
-		temp = (USHORT) ((tempebx & 0x01000000) >> 24);
-		temp = temp << 7;
-		SiS_SetRegANDOR (SiS_Part1Port, 0x3C, ~0x080, temp);
-		SiS_SetReg1 (SiS_Part1Port, 0x2F, 0x03);
-		SiS_SetReg1 (SiS_Part1Port, 0x03, 0x50);
-		SiS_SetReg1 (SiS_Part1Port, 0x04, 0x00);
-		SiS_SetReg1 (SiS_Part1Port, 0x2F, 0x01);
-		SiS_SetReg1 (SiS_Part1Port, 0x13, 0x00);
-		SiS_SetReg1 (SiS_P3c4, 0x05, 0x86);
-		SiS_SetReg1 (SiS_P3c4, 0x1e, 0x62);
-		SiS_SetReg1 (SiS_Part1Port, 0x19, 0x38);
-		SiS_SetReg1 (SiS_Part1Port, 0x1e, 0x7d);
-	}
-	/*end add dstn */
+  tempcx = SiS_HT;    				  /* Horiz. Total */
 
-	return;
-}
+  tempbx = SiS_HDE;                               /* Horiz. Display End */
 
-/*301b*/
-void
-SiS_SetGroup1_LCDA (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		    USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		    USHORT RefreshRateTableIndex)
-{
-	USHORT modeflag, resinfo;
-	USHORT push1, push2, tempax, tempbx, tempcx, temp;
-	ULONG tempeax = 0, tempebx, tempecx, tempvcfact;	/*301b */
-	SiS_SetRegOR (SiS_Part1Port, 0x2D, 0x20);
-
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-		resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-	}
+  if(SiS_LCDInfo & LCDNonExpanding) {
+    if(!SiS_IF_DEF_DSTN) {
+ 	if(SiS_LCDResInfo == Panel800x600)        tempbx = 800;
+    	else if(SiS_LCDResInfo == Panel1024x768)  tempbx = 1024;
+/*	else if(SiS_LCDResInfo == Panel1024x600)  tempbx = 1024;  - not done in BIOS */
+/*	else if(SiS_LCDResInfo == Panel1152x768)  tempbx = 1152;  - not done in BIOS */
+	else if(SiS_LCDResInfo == Panel1280x1024) tempbx = 1280;  /* TW */
+        else if(SiS_LCDResInfo != Panel640x480)   tempbx = 1400;  /* TW */
+    }
+  }
+  tempcx = (tempcx - tempbx) >> 2;		 /* HT-HDE / 4 */
 
-	tempax = SiS_LCDHDES;
-	tempbx = SiS_HDE;
-	tempcx = SiS_HT;
+  push1 = tempax;
 
-	if (SiS_LCDInfo & LCDNonExpanding) {
-		if (SiS_LCDResInfo == Panel1280x1024)
-			tempbx = 1280;
-		if (SiS_LCDResInfo == Panel1024x768)
-			tempbx = 1024;
-	}
-	tempcx = tempcx - tempbx;	/* HT-HDE  */
-	push1 = tempax;
-	tempax = tempax + tempbx;	/* lcdhdee  */
-	tempbx = SiS_HT;
-	if (tempax >= tempbx) {
-		tempax = tempax - tempbx;
-	}
-	push2 = tempax;
-	/* push ax   lcdhdee  */
-	tempcx = tempcx >> 2;	/* temp  */
-	tempcx = tempcx + tempax;	/* lcdhrs  */
-	if (tempcx >= tempbx) {
-		tempcx = tempcx - tempbx;
-	}
-	/* v ah,cl  */
-	tempax = tempcx;
-	tempax = tempax >> 3;	/* BPLHRS */
-	temp = tempax & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x14, temp);	/* Part1_14h  */
-	temp = (tempax & 0x00FF) + 10;
-	temp = temp & 0x01F;
-	temp = temp | (((tempcx & 0x00ff) & 0x07) << 5);
-	SiS_SetReg1 (SiS_Part1Port, 0x15, temp);	/* Part1_15h  */
-	tempbx = push2;		/* lcdhdee  */
-	tempcx = push1;		/* lcdhdes  */
-	temp = (tempcx & 0x00FF);
-	temp = temp & 0x07;	/* BPLHDESKEW  */
-	SiS_SetReg1 (SiS_Part1Port, 0x1A, temp);	/* Part1_1Ah  */
-	tempcx = tempcx >> 3;	/* BPLHDES */
-	temp = (tempcx & 0x00FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x16, temp);	/* Part1_16h  */
-	if (tempbx & 0x07)
-		tempbx = tempbx + 8;
-	tempbx = tempbx >> 3;	/* BPLHDEE  */
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x17, temp);	/* Part1_17h  */
-
-	tempcx = SiS_VGAVT;
-	tempbx = SiS_VGAVDE;
-	tempcx = tempcx - tempbx;	/* GAVT-VGAVDE  */
-	tempbx = SiS_LCDVDES;	/* VGAVDES  */
-	push1 = tempbx;		/* push bx temppush1 */
-	if (SiS_IF_DEF_TRUMPION == 0) {
-		if (SiS_IF_DEF_CH7005 == 1) {
-			if (SiS_VBInfo & SetCRT2ToTV) {
-				tempax = SiS_VGAVDE;
-			}
-		}
+  tempax += tempbx;
 
-		if (SiS_LCDResInfo == Panel1024x768)
-			tempax = 768;
-		if (SiS_LCDResInfo == Panel1280x1024)
-			tempax = 1024;
-
-	} else
-		tempax = SiS_VGAVDE;
-	tempbx = tempbx + tempax;
-	tempax = SiS_VT;	/* VT  */
-	if (tempbx >= SiS_VT) {
-		tempbx = tempbx - tempax;
-	}
-	push2 = tempbx;		/* push bx  temppush2  */
-	tempcx = tempcx >> 1;
-	tempbx = tempbx + tempcx;
-	tempbx++;		/* BPLVRS  */
-	if (tempbx >= tempax) {
-		tempbx = tempbx - tempax;
-	}
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x18, temp);	/* Part1_18h  */
-	tempcx = tempcx >> 3;
-	tempcx = tempcx + tempbx;
-	tempcx++;		/* BPLVRE  */
-	temp = tempcx & 0x00FF;
-	temp = temp & 0x0F;
-	SiS_SetRegANDOR (SiS_Part1Port, 0x19, ~0x00F, temp);	/* Part1_19h  */
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp & 0x07;
-	temp = temp << 3;	/* BPLDESKEW =0 */
-	tempbx = SiS_VGAVDE;
-	if (tempbx != SiS_VDE) {
-		temp = temp | 0x40;
-	}
-	if (SiS_SetFlag & EnableLVDSDDA) {
-		temp = temp | 0x40;
-	}
-	if (SiS_LCDInfo & LCDRGB18Bit) {
-		temp = temp | 0x80;
-	}
-	SiS_SetRegANDOR (SiS_Part1Port, 0x1A, 0x07, temp);	/* Part1_1Ah */
+  if(tempax >= SiS_HT) tempax -= SiS_HT;
 
-	tempbx = push2;		/* p bx temppush2 BPLVDEE  */
-	tempcx = push1;		/* pop cx temppush1 NPLVDES */
-	push1 = (USHORT) (tempeax & 0xFFFF);
+  push2 = tempax;
 
-	if (!(SiS_VBInfo & SetInSlaveMode)) {
-		if (SiS_LCDResInfo == Panel800x600) {
-			if (resinfo == 7)
-				tempcx++;
+  /* TW: Inserted this entire "if"-section from 650/LVDS, 630/301B and 630/LVDS BIOS */
+  if(SiS_VBInfo & SetCRT2ToLCD) {
+       if(!SiS_IF_DEF_DSTN){
+     	  if(SiS_LCDResInfo == Panel800x600)        tempcx = 0x0028;
+     	  else if(SiS_LCDResInfo == Panel1400x1050) tempcx = 0x0030;
+     	  else if( (SiS_LCDResInfo == Panel1024x768) ||
+	           (SiS_LCDResInfo == Panel1024x600) ||
+		   (SiS_LCDResInfo == Panel1152x768) ) {
+	  	if(HwDeviceExtension->jChipType < SIS_315H) {
+		     if(SiS_IF_DEF_LVDS == 1) {
+		           tempcx = 0x0017;
+#ifdef TWPANEL
+			   tempcx++;
+#endif
+		     } else {
+		           tempcx = 0x0017;  /* A901; other 301B BIOS 0x0018; */
+		     }
 		} else {
-			if (SiS_LCDResInfo == Panel1024x768) {
-				if (resinfo == 8)
-					tempcx++;
-			}
-		}
-	}
+		     tempcx = 0x0018;
+		}
+	  }
+     	  else if(SiS_LCDResInfo != Panel640x480)   tempcx = 0x0030;
+       }
+  }
+
+  tempcx += tempax;                              /* lcdhrs  */
+  if(tempcx >= SiS_HT) tempcx -= SiS_HT;
+
+  tempax = tempcx >> 3;                          /* BPLHRS */
+  temp = tempax & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x14,temp);		 /* Part1_14h; TW: Panel Link Horizontal Retrace Start  */
+
+  temp = (tempax & 0x00FF) + 10;
+
+  /* TW: Inserted this entire "if"-section from 650/LVDS BIOS */
+  if(SiS_VBInfo & SetCRT2ToLCD) {
+      if(!SiS_IF_DEF_DSTN){
+        if(SiS_LCDResInfo != Panel640x480) {
+	  temp += 6;
+          if(SiS_LCDResInfo != Panel800x600) {
+	    temp++;
+	    if(HwDeviceExtension->jChipType > SIS_315H) {
+	       if(SiS_LCDResInfo != Panel1024x768) {
+	          temp -= 3;
+#ifdef TEST1400
+		  temp = 0x0e;
+#endif
+	       }
+	    }
+	  }
+        }
+      }
+  }
+
+  temp &= 0x1F;
+  temp |= ((tempcx & 0x0007) << 5);
+  if(SiS_IF_DEF_FSTN) temp=0x20;
+  SiS_SetReg1(SiS_Part1Port,0x15,temp);    	 /* Part1_15h; TW: Panel Link Horizontal Retrace End/Skew */
+
+  tempbx = push2;
+  tempcx = push1;                                /* lcdhdes  */
+
+  temp = (tempcx & 0x0007);                      /* BPLHDESKEW  */
+  SiS_SetReg1(SiS_Part1Port,0x1A,temp);   	 /* Part1_1Ah; TW: Panel Link Vertical Retrace Start (2:0) */
+
+  tempcx >>= 3;                                  /* BPLHDES */
+  temp = (tempcx & 0x00FF);
+  if(ModeNo==0x5b) temp--;                       /* fix fstn mode=5b */
+  SiS_SetReg1(SiS_Part1Port,0x16,temp);    	 /* Part1_16h; TW: Panel Link Horizontal Display Enable Start  */
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {  /* TW: Not done in LVDS BIOS 1.10.07 */
+     if(tempbx & 0x07) tempbx += 8;              /* TW: Done in 630/301B and 630/LVDS BIOSes */
+  }
+  tempbx >>= 3;                                  /* BPLHDEE  */
+  temp = tempbx & 0x00FF;
+  if(ModeNo==0x5b) temp--;                    	 /* fix fstn mode=5b */
+  SiS_SetReg1(SiS_Part1Port,0x17,temp);   	 /* Part1_17h; TW: Panel Link Horizontal Display Enable End  */
+
+  /* 2. Vertical setup */
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+
+      /* TW: This entire section from 630/301B and 630/LVDS/LVDS+CH BIOS */
+      tempcx = SiS_VGAVT;
+      tempbx = SiS_VGAVDE;
+      if(SiS_LCDInfo & LCDNonExpanding) {
+         if(SiS_LCDResInfo != Panel640x480) {
+	    tempbx = 600;
+	    if(SiS_LCDResInfo != Panel800x600) {
+	       tempbx = 768;
+	       if( (SiS_LCDResInfo != Panel1024x768) && (SiS_LCDResInfo != Panel1152x768) ) {
+	 	    tempbx = 600;
+	       }
+	    }
+         }
+      }
+      tempcx -= tempbx;
+
+  } else {
+
+      tempcx = SiS_VGAVT - SiS_VGAVDE;                  /* VGAVT-VGAVDE  */
+
+  }
+
+  tempbx = SiS_LCDVDES;	   		 	 	/* VGAVDES  */
+  push1 = tempbx;
+
+  tempax = SiS_VGAVDE;
+
+  if((SiS_IF_DEF_TRUMPION == 0) && (!(SiS_LCDInfo & 0x0100))
+                                && (SiS_LCDResInfo != Panel640x480)) {
+    	if(SiS_VBInfo & SetCRT2ToLCD) {
+	    if(!SiS_IF_DEF_DSTN){
+      		if(SiS_LCDResInfo == Panel800x600)        tempax = 600;
+      		else if(SiS_LCDResInfo == Panel1024x768)  tempax = 768;
+		else if(SiS_LCDResInfo == Panel1024x600)  tempax = 600;   /* TW */
+      		else if(SiS_LCDResInfo == Panel1152x768)  tempax = 768;   /* TW */
+		else if(SiS_LCDResInfo == Panel1280x1024) tempax = 1024;  /* TW */
+		else if(SiS_LCDResInfo == Panel1400x1050) tempax = 1050;  /* TW */
+		else                                      tempax = 600;
+            }
+    	}
+  }
+
+  tempbx = tempbx + tempax;
+  if(tempbx >= SiS_VT) tempbx -= SiS_VT;
+
+  push2 = tempbx;                             	 /* push bx  temppush  */
+
+  tempcx >>= 1;
+
+  /* TW: Inserted this entire "if" section (650/LVDS; 630/301B; 630/LVDS) */
+  if((SiS_VBInfo & SetCRT2ToLCD) && (SiS_LCDResInfo != Panel640x480)){
+     if(!SiS_IF_DEF_DSTN){
+     	if(SiS_LCDResInfo == Panel800x600)        tempcx = 0x0001;
+     	else if( (SiS_LCDResInfo == Panel1024x768) ||
+	         (SiS_LCDResInfo == Panel1152x768) ) {
+		if(HwDeviceExtension->jChipType < SIS_315H) {
+		      if(SiS_IF_DEF_LVDS == 1) {
+			    tempcx = 0x0002;
+#ifdef TWPANEL
+			    tempcx++;
+#endif
+		      } else {
+		            tempcx = 0x0002;   /* TW: A901; other 301B BIOS sets 0x0003; */
+		      }
+		} else tempcx = 0x0003;
+        }
+     	else if(SiS_LCDResInfo == Panel1280x768)  tempcx = 0x0003;
+     	else if(SiS_LCDResInfo == Panel1280x1024) tempcx = 0x0001;
+     	else if(SiS_LCDResInfo == Panel1400x1050) tempcx = 0x0001;
+     	else 				          tempcx = 0x0057;
+     }
+  }
 
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp & 0x07;
-	temp = temp << 3;
-	temp = temp | (((tempcx & 0xFF00) >> 8) & 0x07);
-	SiS_SetReg1 (SiS_Part1Port, 0x1D, temp);	/* Part1_1Dh */
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x1C, temp);	/* Part1_1Ch  */
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x1B, temp);	/* Part1_1Bh  */
-
-	tempecx = SiS_VGAVT;
-	tempebx = SiS_VDE;
-	tempeax = SiS_VGAVDE;
-	tempecx = tempecx - tempeax;	/* VGAVT-VGAVDE  */
-	tempeax = tempeax << 18;
-	temp = (USHORT) (tempeax % tempebx);
-	tempeax = tempeax / tempebx;
-	if (temp != 0) {
-		tempeax++;
-	}
-	tempebx = tempeax;	/* BPLVCFACT  */
-	tempvcfact = tempeax;	/*301b */
-	temp = (USHORT) (tempebx & 0x00FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x37, temp);
-	temp = (USHORT) ((tempebx & 0x00FF00) >> 8);
-	SiS_SetReg1 (SiS_Part1Port, 0x36, temp);
-	temp = (USHORT) ((tempebx & 0x00030000) >> 16);
-	if (SiS_VDE == SiS_VGAVDE) {
-		temp = temp | 0x04;
-	}
+  tempbx += tempcx;			 	/* BPLVRS  */
 
-	SiS_SetReg1 (SiS_Part1Port, 0x35, temp);
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+#ifdef TWPANEL
+      if(SiS_IF_DEF_CH70xx == 0)
+#endif
+   	  tempbx++;
+  }
+
+#ifdef TEST1400  /* Not done on 650/LVDS 1.10.07, done in 650/LVDS 1.10a */
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+          tempbx++;
+  }
+#endif
+
+  if(tempbx >= SiS_VT) tempbx -= SiS_VT;
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x18,temp);       	 /* Part1_18h; TW: Panel Link Vertical Retrace Start  */
+
+  tempcx >>= 3;
+
+  /* TW: Inserted this entire "if" section (650/LVDS, 630/LVDS, 630/301B) */
+  if(SiS_VBInfo & SetCRT2ToLCD) {
+     if( (HwDeviceExtension->jChipType < SIS_315H) &&
+         (SiS_LCDResInfo == Panel640x480) )     tempcx = 0x0001;
+     else if(SiS_LCDResInfo == Panel1400x1050)  tempcx = 0x0002;
+     else if(SiS_LCDResInfo == Panel800x600)    tempcx = 0x0003;
+     else if(SiS_LCDResInfo != Panel640x480)  {
+     		if(HwDeviceExtension->jChipType < SIS_315H) {
+		        if(SiS_IF_DEF_LVDS == 1) {
+				tempcx = 0x0004;
+#ifdef TWPANEL
+				tempcx++;
+#endif
+		        } else {
+				tempcx = 0x0004;   /* A901; Other BIOS sets 0x0005; */
+			}
+		} else {
+			tempcx = 0x0005;
+		}
+     }
+  }
+
+  tempcx = tempcx + tempbx + 1;                  /* BPLVRE  */
+  temp = tempcx & 0x000F;
+  SiS_SetRegANDOR(SiS_Part1Port,0x19,0xf0,temp); /* Part1_19h; TW: Panel Link Vertical Retrace End (3:0); Misc.  */
+
+  temp = ((tempbx & 0x0700) >> 8) << 3;          /* BPLDESKEW =0 */
+  if(SiS_VGAVDE != SiS_VDE)	  temp |= 0x40;
+  if(SiS_SetFlag & EnableLVDSDDA) temp |= 0x40;
+  if(SiS_LCDInfo & LCDRGB18Bit)   {
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+         if(SiS_GetReg1(SiS_Part1Port,0x00) & 0x01) {	/* TW: Inserted from 650/LVDS 1.10.07 */
+            temp |= 0x80;
+         }
+      } else {
+	 if( (HwDeviceExtension->jChipType == SIS_630) ||
+	     (HwDeviceExtension->jChipType == SIS_730) ) {
+	    if(HwDeviceExtension->jChipRevision >= 0x30) {
+	       temp |= 0x80;
+	    }
+	 }
+      }
+  }         /* TW: in follwing line, 0x87 was 0x07 (modified according to 650/LVDS BIOS) */
+  SiS_SetRegANDOR(SiS_Part1Port,0x1A,0x87,temp);  /* Part1_1Ah; TW: Panel Link Control Signal (7:3); Vertical Retrace Start (2:0) */
+
+  if (HwDeviceExtension->jChipType < SIS_315H) {
+
+        /* 300 series */
+
+        tempeax = SiS_VGAVDE << 6;
+        temp = (USHORT)(tempeax % (ULONG)SiS_VDE);
+        tempeax = tempeax / (ULONG)SiS_VDE;
+        if(temp != 0) tempeax++;
+        tempebx = tempeax;                         /* BPLVCFACT  */
+
+  	if(SiS_SetFlag & EnableLVDSDDA) {
+	     tempebx = 0x003F;    
+	}
+
+  	temp = (USHORT)(tempebx & 0x00FF);
+  	SiS_SetReg1(SiS_Part1Port,0x1E,temp);      /* Part1_1Eh; TW: Panel Link Vertical Scaling Factor */
+
+  } else {
+
+        /* 310 series */
+
+	SiS_SetReg1(SiS_Part1Port,0x1E,0x23);      /* Inserted from 650/LVDS BIOS */
+
+	tempeax = SiS_VGAVDE << 18;
+    	temp = (USHORT)(tempeax % (ULONG)SiS_VDE);
+    	tempeax = tempeax / SiS_VDE;
+    	if(temp != 0) tempeax++;
+    	tempebx = tempeax;                         /* BPLVCFACT  */
+        tempvcfact = tempeax;
+    	temp = (USHORT)(tempebx & 0x00FF);
+    	SiS_SetReg1(SiS_Part1Port,0x37,temp);      /* Part1_37h; TW: Panel Link Vertical Scaling Factor */
+    	temp = (USHORT)((tempebx & 0x00FF00) >> 8);
+    	SiS_SetReg1(SiS_Part1Port,0x36,temp);      /* Part1_36h; TW: Panel Link Vertical Scaling Factor */
+    	temp = (USHORT)((tempebx & 0x00030000) >> 16);
+    	if(SiS_VDE == SiS_VGAVDE) temp |= 0x04;
+    	SiS_SetReg1(SiS_Part1Port,0x35,temp);      /* Part1_35h; TW: Panel Link Vertical Scaling Factor */
+
+  }
+
+  tempbx = push2;                                  /* p bx temppush1 BPLVDEE  */
+  tempcx = push1;
+
+  push1 = temp;					   /* TW: For 630/301B and 630/LVDS */
+
+  if(!(SiS_VBInfo & SetInSlaveMode)) {
+   	if(!SiS_IF_DEF_DSTN){
+    		if(SiS_LCDResInfo == Panel800x600) {
+      			if(resinfo == 7) tempcx++;
+		}
+		if(HwDeviceExtension->jChipType < SIS_315H) {   /* TW: Not done in 650/LVDS 1.10.07 */
+	    	    if(resinfo == 8) tempcx++;			/* TW: But in 630/301B and 630/LVDS */
+		}
+	}
+  }
+  /* TW: Inserted (650/LVDS, 630/LVDS, 630/301B) */
+  if(SiS_LCDResInfo == Panel640x480) {
+     tempcx = SiS_VGAVDE;
+     tempbx = SiS_VGAVDE - 1;
+  }
+
+  temp = ((tempbx & 0x0700) >> 8) << 3;
+  temp |= ((tempcx & 0x0700) >> 8);
+  SiS_SetReg1(SiS_Part1Port,0x1D,temp);     	/* Part1_1Dh; TW: Vertical Display Overflow; Control Signal */
+
+  temp = tempbx & 0x00FF;
+  if(SiS_IF_DEF_FSTN) temp++;
+  SiS_SetReg1(SiS_Part1Port,0x1C,temp);      	/* Part1_1Ch; TW: Panel Link Vertical Display Enable End  */
+
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x1B,temp);      	/* Part1_1Bh; TW: Panel Link Vertical Display Enable Start  */
+
+  /* 3. Additional horizontal setup (scaling, etc) */
+
+  tempecx = SiS_VGAHDE;
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     if(modeflag & HalfDCLK)			/* TW: Added this entire if statement */
+        tempecx >>= 1;
+  }
+  tempebx = SiS_HDE;
+  if(tempecx == tempebx) tempeax = 0xFFFF;
+  else {
+     tempeax = tempecx;
+     tempeax <<= 16;
+     temp = (USHORT)(tempeax % tempebx);
+     tempeax = tempeax / tempebx;
+     if(HwDeviceExtension->jChipType >= SIS_315H) {
+         if(temp) tempeax++;			/* TW: Not done in 630/301B or 630/LVDS, but for 650/LVDS */
+     }
+  }
+  tempecx = tempeax;
+
+  if (HwDeviceExtension->jChipType >= SIS_315H) {
+      tempeax = SiS_VGAHDE;
+      if(modeflag & HalfDCLK)			/* TW: Added this entire if statement */
+          tempeax >>= 1;
+      tempeax <<= 16;
+      tempeax = (tempeax / tempecx) - 1;
+  } else {
+      tempeax = ((SiS_VGAHT << 16) / tempecx) - 1;    
+  }
+  tempecx <<= 16;
+  tempecx |= (tempeax & 0xFFFF);
+  temp = (USHORT)(tempecx & 0x00FF);
+  SiS_SetReg1(SiS_Part1Port,0x1F,temp);  	 /* Part1_1Fh; TW: Panel Link DDA Operational Number in each horiz. line */
+
+  tempbx = SiS_VDE;                              /* TW: added following if statement */
+  if (HwDeviceExtension->jChipType >= SIS_315H) {
+      tempeax = (SiS_VGAVDE << 18) / tempvcfact;
+      tempbx = (USHORT)(tempeax & 0x0FFFF);
+  } else {
+      tempax = SiS_VGAVDE << 6;
+      tempbx = push1;
+      tempbx &= 0x3f;
+      if(tempbx == 0) tempbx = 64;
+      tempax = tempax / tempbx;
+      tempbx = tempax;
+  }
+  if(SiS_LCDResInfo == Panel1024x768) tempbx--;
+  if(SiS_SetFlag & EnableLVDSDDA)     tempbx = 1;
+
+  temp = ((tempbx & 0xFF00) >> 8) << 3;
+  temp |= (USHORT)((tempecx & 0x0700) >> 8);
+  SiS_SetReg1(SiS_Part1Port,0x20,temp);  	/* Part1_20h; TW: Overflow register */
+
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x21,temp);  	/* Part1_21h; TW: Panel Link Vertical Accumulator Register */
+
+  tempecx >>= 16;                               /* BPLHCFACT  */
+  if(HwDeviceExtension->jChipType < SIS_315H) { /* TW: Added this entire if statement from 630/301B+LVDS BIOSes */
+      if(modeflag & HalfDCLK) tempecx >>= 1;
+  }
+  temp = (USHORT)((tempecx & 0xFF00) >> 8);
+  SiS_SetReg1(SiS_Part1Port,0x22,temp);     	/* Part1_22h; TW: Panel Link Horizontal Scaling Factor High */
+
+  temp = (USHORT)(tempecx & 0x00FF);
+  SiS_SetReg1(SiS_Part1Port,0x23,temp);         /* Part1_22h; TW: Panel Link Horizontal Scaling Factor Low */
+
+  /* 630/301B and 630/LVDS do something for 640x480 panels here */
+
+  /* add dstn new register */
+  if(SiS_IF_DEF_DSTN){
+     	SiS_SetReg1(SiS_Part1Port,0x1E,0x01);
+     	SiS_SetReg1(SiS_Part1Port,0x25,0x00);
+     	SiS_SetReg1(SiS_Part1Port,0x26,0x00);
+     	SiS_SetReg1(SiS_Part1Port,0x27,0x00);
+     	SiS_SetReg1(SiS_Part1Port,0x28,0x87);
+     	SiS_SetReg1(SiS_Part1Port,0x29,0x5A);
+     	SiS_SetReg1(SiS_Part1Port,0x2A,0x4B);
+     	SiS_SetRegANDOR(SiS_Part1Port,0x44,~0x007,0x03);
+     	tempbx = SiS_HDE + 64;                       /*Blps = lcdhdee(lcdhdes+HDE) + 64*/
+     	temp = tempbx & 0x00FF;
+     	SiS_SetReg1(SiS_Part1Port,0x38,temp);
+     	temp=((tempbx & 0xFF00) >> 8) << 3;
+     	SiS_SetRegANDOR(SiS_Part1Port,0x35,~0x078,temp);
+     	tempbx += 32;		                     /*Blpe=lBlps+32*/
+     	temp = tempbx & 0x00FF;
+     	if(SiS_IF_DEF_FSTN)  temp=0;
+     	SiS_SetReg1(SiS_Part1Port,0x39,temp);
+     	SiS_SetReg1(SiS_Part1Port,0x3A,0x00);        /*Bflml=0*/
+     	SiS_SetRegANDOR(SiS_Part1Port,0x3C,~0x007,0x00);
+     	tempbx = SiS_VDE / 2;
+     	temp = tempbx & 0x00FF;
+     	SiS_SetReg1(SiS_Part1Port,0x3B,temp);
+     	temp = ((tempbx & 0xFF00) >> 8) << 3;
+     	SiS_SetRegANDOR(SiS_Part1Port,0x3C,~0x038,temp);
+     	tempeax = SiS_HDE << 2;                       /* BDxFIFOSTOP = (HDE*4)/128 */
+     	tempebx = 128;
+     	temp = (USHORT)(tempeax % tempebx);
+     	tempeax = tempeax / tempebx;
+     	if(temp != 0)  tempeax++;
+     	temp = (USHORT)(tempeax & 0x003F);
+     	SiS_SetRegANDOR(SiS_Part1Port,0x45,~0x0FF,temp);
+     	SiS_SetReg1(SiS_Part1Port,0x3F,0x00);         /* BDxWadrst0 */
+     	SiS_SetReg1(SiS_Part1Port,0x3E,0x00);
+     	SiS_SetReg1(SiS_Part1Port,0x3D,0x10);
+     	SiS_SetRegANDOR(SiS_Part1Port,0x3C,~0x040,0x00);
+     	tempax = SiS_HDE >> 4;                        /* BDxWadroff = HDE*4/8/8 */
+     	pushcx = tempax;
+     	temp = tempax & 0x00FF;
+     	SiS_SetReg1(SiS_Part1Port,0x43,temp);
+     	temp = ((tempax & 0xFF00) >> 8) << 3;
+     	SiS_SetRegANDOR(SiS_Part1Port,0x44,~0x0F8,temp);
+     	tempax = SiS_VDE;                             /*BDxWadrst1 = BDxWadrst0 + BDxWadroff * VDE */
+     	tempeax = (tempax * pushcx);
+     	tempebx = 0x00100000 + tempeax;
+     	temp = (USHORT)tempebx & 0x000000FF;
+     	SiS_SetReg1(SiS_Part1Port,0x42,temp);
+     	temp = (USHORT)((tempebx & 0x0000FF00)>>8);
+     	SiS_SetReg1(SiS_Part1Port,0x41,temp);
+     	temp = (USHORT)((tempebx & 0x00FF0000)>>16);
+     	SiS_SetReg1(SiS_Part1Port,0x40,temp);
+     	temp = (USHORT)(((tempebx & 0x01000000)>>24) << 7);
+     	SiS_SetRegANDOR(SiS_Part1Port,0x3C,~0x080,temp);
+     	SiS_SetReg1(SiS_Part1Port,0x2F,0x03);
+     	SiS_SetReg1(SiS_Part1Port,0x03,0x50);
+     	SiS_SetReg1(SiS_Part1Port,0x04,0x00);
+     	SiS_SetReg1(SiS_Part1Port,0x2F,0x01);
+     	SiS_SetReg1(SiS_Part1Port,0x13,0x00);
+     	SiS_SetReg1(SiS_P3c4,0x05,0x86);        /* Unlock */
+     	SiS_SetReg1(SiS_P3c4,0x1e,0x62);
+     	if(SiS_IF_DEF_FSTN){
+         	SiS_SetReg1(SiS_P3c4,0x2b,0x1b);
+         	SiS_SetReg1(SiS_P3c4,0x2c,0xe3);
+         	SiS_SetReg1(SiS_P3c4,0x1e,0x62);
+         	SiS_SetReg1(SiS_P3c4,0x2e,0x04);
+         	SiS_SetReg1(SiS_P3c4,0x2f,0x42);
+         	SiS_SetReg1(SiS_P3c4,0x32,0x01);
+         	SiS_SetReg1(SiS_Part1Port,0x2b,0x02);
+         	SiS_SetReg1(SiS_Part1Port,0x2c,0x00);
+         	SiS_SetReg1(SiS_Part1Port,0x2d,0x00);
+     	}
+     	SiS_SetRegANDOR(SiS_Part1Port,0x19,0x0f,0x30);
+     	SiS_SetReg1(SiS_Part1Port,0x1e,0x7d);
+     	SiS_SetReg1(SiS_Part1Port,0x2e,0xe0);
+  }
+
+  return;
 
-	tempecx = SiS_VGAHDE;
-	tempebx = SiS_HDE;
-	tempeax = tempecx;
-	tempeax = tempeax << 6;
-	tempeax = tempeax << 10;
-	tempeax = tempeax / tempebx;
-	if (tempebx == tempecx) {
-		tempeax = 65535;
-	}
-	tempecx = tempeax;
-	tempeax = SiS_VGAHDE;	/*301b to change HT->HDE */
-	tempeax = tempeax << 6;
-	tempeax = tempeax << 10;
-	tempeax = tempeax / tempecx;
-	tempecx = tempecx << 16;
-	tempeax = tempeax - 1;
-	tempecx = tempecx | (tempeax & 0x00FFFF);
-	temp = (USHORT) (tempecx & 0x00FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x1F, temp);	/* Part1_1Fh  */
-
-	tempeax = SiS_VGAVDE;
-	tempeax = tempeax << 18;	/*301b */
-	tempeax = tempeax / tempvcfact;
-	tempbx = (USHORT) (tempeax & 0x0FFFF);
-	if (SiS_LCDResInfo == Panel1024x768)
-		tempbx--;
-	if (SiS_SetFlag & EnableLVDSDDA) {
-		tempbx = 1;
-	}
-	temp = ((tempbx & 0xFF00) >> 8) << 3;
-	temp = temp | (USHORT) (((tempecx & 0x0000FF00) >> 8) & 0x07);
-	SiS_SetReg1 (SiS_Part1Port, 0x20, temp);	/* Part1_20h */
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part1Port, 0x21, temp);	/* Part1_21h */
-	tempecx = tempecx >> 16;	/* BPLHCFACT  */
-
-	temp = (USHORT) ((tempecx & 0x0000FF00) >> 8);
-	SiS_SetReg1 (SiS_Part1Port, 0x22, temp);	/* Part1_22h */
-	temp = (USHORT) (tempecx & 0x000000FF);
-	SiS_SetReg1 (SiS_Part1Port, 0x23, temp);
-	return;
 }
 
-/*end 301b*/
+#ifdef SIS315H
 void
-SiS_SetTPData ()
+SiS_CRT2AutoThreshold(USHORT BaseAddr)
 {
-	return;
+  SiS_SetRegOR(SiS_Part1Port,0x01,0x40);
 }
+#endif
+
 
+/* TW: For LVDS / 302b/lv - LCDA (this must only be called on 310/325 series!) */
+/* TW: Double-checked against 650/LVDS and 650/301 BIOS */
 void
-SiS_SetCRT2Offset (USHORT SiS_Part1Port, ULONG ROMAddr, USHORT ModeNo,
-		   USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
-		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetGroup1_LCDA(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex)
 {
-	USHORT offset;
-	UCHAR temp;
+  USHORT modeflag,resinfo;
+  USHORT push1,push2,tempax,tempbx,tempcx,temp;
+  ULONG tempeax=0,tempebx,tempecx,tempvcfact;
+
+  if(SiS_IF_DEF_LVDS == 1)					/* TW: From 650/LVDS BIOS */
+      SiS_SetRegANDOR(SiS_Part1Port,0x13,0xfb,0x04);      	/* TW: From 650/LVDS BIOS */
+
+  if(SiS_IF_DEF_LVDS == 1)					/* TW: From 650/LVDS 1.10.07 */
+     SiS_SetRegOR(SiS_Part1Port,0x2D,0x00);			/* TW: From 650/LVDS 1.10.07 */
+  else
+     SiS_SetRegOR(SiS_Part1Port,0x2D,0x20);
+
+  if(ModeNo<=0x13) {
+    modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  } else {
+    modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  }
+
+  tempax = SiS_LCDHDES;
+  tempbx = SiS_HDE;
+  tempcx = SiS_HT;
+  
+  if(SiS_LCDInfo & LCDNonExpanding) {
+    	if(SiS_LCDResInfo == Panel1280x1024)     tempbx = 1280;
+    	else if(SiS_LCDResInfo == Panel1024x768) tempbx = 1024;
+	else tempbx = 1400;                                     /* TW: From 650/LVDS BIOS; OK with 650/301 */
+  }
+  tempcx = tempcx - tempbx;                                    	/* HT-HDE  */
+  push1 = tempax;
+  tempax = tempax + tempbx;                                    	/* lcdhdee  */
+  tempbx = SiS_HT;
+  if(tempax >= tempbx)	tempax = tempax-tempbx;
+  push2=tempax;
+                                                           	/* push ax   lcdhdee  */
+  tempcx >>= 2;                                        	        /* temp  */
+  tempcx = tempcx + tempax;                                    	/* lcdhrs  */
+  if(tempcx >= tempbx) tempcx = tempcx - tempbx;
+                                                           	/* v ah,cl  */
+  tempax = tempcx;
+  tempax = tempax >> 3;                                        	/* BPLHRS */
+  temp = tempax & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x14,temp);                         /* Part1_14h  */
+
+  temp = (tempax & 0x00FF) + 10;
+  temp = temp & 0x01F;
+  temp = temp | (((tempcx & 0x00ff) & 0x07) << 5);
+  SiS_SetReg1(SiS_Part1Port,0x15,temp);                         /* Part1_15h  */
+
+  tempbx = push2;                                          	/* lcdhdee  */
+  tempcx = push1;                                          	/* lcdhdes  */
+  temp = (tempcx & 0x00FF);
+  temp = temp & 0x07;                                  		/* BPLHDESKEW  */
+  SiS_SetReg1(SiS_Part1Port,0x1A,temp);                         /* Part1_1Ah  */
+
+  tempcx = tempcx >> 3;                                        	/* BPLHDES */
+  temp = (tempcx & 0x00FF);
+  SiS_SetReg1(SiS_Part1Port,0x16,temp);                         /* Part1_16h  */
+
+  if(tempbx & 0x07) tempbx += 8;
+  tempbx >>= 3;                                        		/* BPLHDEE  */
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x17,temp);                        	/* Part1_17h  */
+
+  tempcx = SiS_VGAVT;
+  tempbx = SiS_VGAVDE;
+  tempcx = tempcx-tempbx;                                    	/* GAVT-VGAVDE  */
+  tempbx = SiS_LCDVDES;                                        	/* VGAVDES  */
+  push1 = tempbx;                                      		/* push bx temppush1 */
+  if(SiS_IF_DEF_TRUMPION == 0){
+    if(SiS_LCDResInfo == Panel1024x768)   tempax = 768;
+    if(SiS_LCDResInfo == Panel1280x1024)  tempax = 1024;
+    if(SiS_LCDResInfo == Panel1400x1050)  tempax = 1050;        /* TW: Inserted from 650/LVDS BIOS */
+    else                                  tempax = 960;         /* TW: Inserted from 650/301 BIOS */
+#if 0                                                           /* TW: Removed (650/LVDS BIOS) */
+    if(SiS_IF_DEF_CH70xx == 1) {
+      if(SiS_VBInfo & SetCRT2ToTV) {
+        tempax = SiS_VGAVDE;
+      }
+    }
+#endif
+  } else tempax = SiS_VGAVDE;  /* Trumpion */
+  tempbx = tempbx + tempax;
+  tempax = SiS_VT;                                             	/* VT  */
+  if(tempbx >= SiS_VT)  tempbx = tempbx - tempax;
+
+  push2 = tempbx;                                      		/* push bx  temppush2  */
+  tempcx >>= 1;
+  tempbx = tempbx + tempcx;
+  tempbx++;                                                	/* BPLVRS  */
+  if(tempbx >= tempax)   tempbx = tempbx - tempax;
+  temp = tempbx&0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x18,temp);                         /* Part1_18h  */
+
+  tempcx >>= 3;
+  tempcx = tempcx + tempbx;
+  tempcx++;                                                	/* BPLVRE  */
+  temp = tempcx & 0x00FF;
+  temp &= 0x0F;
+  if(SiS_IF_DEF_LVDS == 1) {
+     SiS_SetRegANDOR(SiS_Part1Port,0x19,0xf0,temp);             /* TW: Inserted from 650/LVDS BIOS */
+  } else {
+     temp |= 0x30;                                              /* TW: Inserted from 650/301 BIOS */
+     SiS_SetRegANDOR(SiS_Part1Port,0x19,0xC0,temp);             /* Part1_19h  (Was ~0x0f) */
+  }
+
+  temp = (tempbx & 0xFF00) >> 8;
+  temp &= 0x07;
+  temp <<= 3;  		                               		/* BPLDESKEW =0 */
+  tempbx = SiS_VGAVDE;
+  if(tempbx != SiS_VDE)              temp |= 0x40;
+  if(SiS_SetFlag & EnableLVDSDDA)    temp |= 0x40;
+  if(SiS_IF_DEF_LVDS == 1) {
+      if(SiS_LCDInfo & LCDRGB18Bit)  temp |= 0x80;              /* TW: 650/301 BIOS does not check this! */
+      SiS_SetRegANDOR(SiS_Part1Port,0x1A,0x87,temp);            /* Part1_1Ah */
+  } else {
+      SiS_SetRegANDOR(SiS_Part1Port,0x1A,0x07,temp);            /* Part1_1Ah */
+  }
+
+  tempbx = push2;                                      		/* p bx temppush2 BPLVDEE  */
+  tempcx = push1;                                      		/* pop cx temppush1 NPLVDES */
+  push1 = (USHORT)(tempeax & 0xFFFF);
+
+  if(!(SiS_VBInfo & SetInSlaveMode)) {
+    if(SiS_LCDResInfo == Panel800x600) {
+      if(resinfo == 7) tempcx++;
+    }
+    if(SiS_IF_DEF_LVDS == 0) {	                                /* TW: Inserted from 650/LVDS BIOS */
+        if(resinfo == 8) tempcx++;				/* TW: Modified according to 650/301 BIOSes */
+    }
+    if(SiS_LCDResInfo == Panel640x480) {                        /* TW: Inserted from 650/301+LVDS BIOSes */
+        tempbx = SiS_VGAVDE;                                    /* TW: Inserted from 650/301+LVDS BIOS */
+	tempcx = tempbx;					/* TW: Inserted from 650/301+LVDS BIOS */
+        tempbx--;						/* TW: Inserted from 650/301+LVDS BIOS */
+    }
+  }
+
+  temp = (tempbx & 0xFF00) >> 8;
+  temp &= 0x07;
+  temp <<= 3;
+  temp = temp | (((tempcx & 0xFF00) >> 8) & 0x07);
+  SiS_SetReg1(SiS_Part1Port,0x1D,temp);                          /* Part1_1Dh */
+
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x1C,temp);                          /* Part1_1Ch  */
+
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x1B,temp);                          /* Part1_1Bh  */ 
+
+  tempecx = SiS_VGAVT;
+  tempebx = SiS_VDE;
+  tempeax = SiS_VGAVDE;
+  tempecx = tempecx-tempeax;                                 	/* VGAVT-VGAVDE  */
+  tempeax <<= 18;
+  temp = (USHORT)(tempeax % tempebx);
+  tempeax = tempeax / tempebx;
+  if(temp != 0)  tempeax++;
+  tempebx = tempeax;                                        	/* BPLVCFACT  */
+  tempvcfact = tempeax;
+  temp=(USHORT)(tempebx & 0x00FF);
+  SiS_SetReg1(SiS_Part1Port,0x37,temp);
+
+  temp=(USHORT)((tempebx & 0x00FF00) >> 8);
+  SiS_SetReg1(SiS_Part1Port,0x36,temp);
+
+  temp = (USHORT)((tempebx & 0x00030000) >> 16);
+  if(SiS_VDE==SiS_VGAVDE) temp |= 0x04;
+  SiS_SetReg1(SiS_Part1Port,0x35,temp);
+  
+  tempecx = SiS_VGAHDE;
+  tempebx = SiS_HDE;
+  tempeax = tempecx;
+  tempeax <<= 16;
+  tempeax = tempeax / tempebx;
+  if(tempebx == tempecx)  tempeax = 0xFFFF;
+  tempecx = tempeax;
+  tempeax = SiS_VGAHDE;
+  tempeax <<= 16;
+  tempeax = tempeax / tempecx;
+  tempecx <<= 16;
+  tempeax--;
+  tempecx = tempecx | (tempeax & 0xFFFF);
+  temp=(USHORT)(tempecx & 0x00FF);
+  SiS_SetReg1(SiS_Part1Port,0x1F,temp);                          /* Part1_1Fh  */
+
+  tempeax = SiS_VGAVDE;
+  tempeax <<= 18;
+  tempeax = tempeax / tempvcfact;
+  tempbx = (USHORT)(tempeax & 0x0FFFF);
+
+  if(SiS_LCDResInfo == Panel1024x768) tempbx--;
+
+  if(SiS_SetFlag & EnableLVDSDDA)  tempbx = 1;
+
+  temp = ((tempbx & 0xFF00) >> 8) << 3;
+  temp = temp | (USHORT)(((tempecx & 0x0000FF00) >> 8) & 0x07);
+  SiS_SetReg1(SiS_Part1Port,0x20,temp);                         /* Part1_20h */
+
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part1Port,0x21,temp);                         /* Part1_21h */
+
+  tempecx >>= 16;   	                                  	/* BPLHCFACT  */
+  if(!(modeflag & HalfDCLK)) tempecx >>= 1;			/* TW: Inserted from BIOS */
+  temp=(USHORT)((tempecx & 0x0000FF00) >> 8);
+  SiS_SetReg1(SiS_Part1Port,0x22,temp);                         /* Part1_22h */
+
+  temp=(USHORT)(tempecx & 0x000000FF);
+  SiS_SetReg1(SiS_Part1Port,0x23,temp);
+
+  /* TW: Only for 650/LVDS and 301LV/302LV */
+  if((SiS_IF_DEF_LVDS == 1) || (SiS_VBInfo & (VB_SIS301LV|VB_SIS302LV))){
+  	SiS_SetReg1(SiS_Part1Port,0x1e,0x20);
+  }
+
+  return;
+}
 
-	if (SiS_VBInfo & SetInSlaveMode) {
-		return;
-	}
-	offset =
-	    SiS_GetOffset (ROMAddr, ModeNo, ModeIdIndex, RefreshRateTableIndex,
-			   HwDeviceExtension);
-	temp = (UCHAR) (offset & 0xFF);
-	SiS_SetReg1 (SiS_Part1Port, 0x07, temp);
-	temp = (UCHAR) ((offset & 0xFF00) >> 8);
-	SiS_SetReg1 (SiS_Part1Port, 0x09, temp);
-	temp = (UCHAR) (((offset >> 3) & 0xFF) + 1);
-	SiS_SetReg1 (SiS_Part1Port, 0x03, temp);
+/* TW: Double-checked against 650/LVDS (1.10.07) and 650/301 BIOS */
+void SiS_SetCRT2Offset(USHORT SiS_Part1Port,UCHAR *ROMAddr,USHORT ModeNo,
+                       USHORT ModeIdIndex ,USHORT RefreshRateTableIndex,
+		       PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT offset;
+  UCHAR temp;
+
+  if(SiS_VBInfo & SetInSlaveMode) return;
+
+  offset = SiS_GetOffset(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                         HwDeviceExtension);
+  temp = (UCHAR)(offset & 0xFF);
+  SiS_SetReg1(SiS_Part1Port,0x07,temp);
+  temp = (UCHAR)((offset & 0xFF00) >> 8);
+  SiS_SetReg1(SiS_Part1Port,0x09,temp);
+  temp = (UCHAR)(((offset >> 3) & 0xFF) + 1);
+  SiS_SetReg1(SiS_Part1Port,0x03,temp);
 }
 
+/* TW: Checked with 650/LVDS and 650/301 BIOS */
 USHORT
-SiS_GetOffset (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-	       USHORT RefreshRateTableIndex,
-	       PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetOffset(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+              USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT temp, colordepth;
-	USHORT modeinfo, index, infoflag;
-	USHORT ColorDepth[] = { 0x01, 0x02, 0x04 };
+  USHORT temp,colordepth;
+  USHORT modeinfo,index,infoflag;
+  USHORT mode960low, mode960high;
+#if 0
+  USHORT ColorDepth[] = { 0x01, 0x02, 0x04 };
+#endif
 
-	modeinfo = SiS_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
-	infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
-	if (HwDeviceExtension->jChipType < SIS_315H) {	/* 300 series */
-		index = (modeinfo >> 4) & 0xFF;
-	} else {		/* 310 series */
+  modeinfo = SiS_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
+  infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+  if (HwDeviceExtension->jChipType < SIS_315H ) {
+    	index = (modeinfo >> 4) & 0xFF;
+	/* TW: Modes 1280x960 changed number, so this is redundant */
+	mode960low = 0x7c;
+	mode960high = 0x7e;
+  } else {
+    	index = (modeinfo >> 8) & 0xFF;       /* TW: In 650 BIOS (LVDS AND 301), 1280x960 modes are 7b-7d! */
+	mode960low = 0x7c;                    /* TW: This is a bug in both BIOS versions ! */
+	mode960high = 0x7e;		      /* TW: Corrected here in LVDS BIOS 1.10.07, but not in tables! */
+  }
+
+#if 0
+  /* TW: Not doing this strange stuff makes 1280x960 at least work on CRT1 */
+  if((ModeNo >= mode960low) && (ModeNo <= mode960high)) {
+    	temp = ModeNo - mode960low;
+    	colordepth = ColorDepth[temp];
+    	temp = 0x6b;  /* TW: Why the heck? */
+  } else {
+#endif
+        temp = SiS_ScreenOffset[index];
+        colordepth = SiS_GetColorDepth(ROMAddr,ModeNo,ModeIdIndex);
+#if 0
+  }
+#endif
 
-		index = (modeinfo >> 8) & 0xFF;
-	}
-	temp = SiS_ScreenOffset[index];
-	if (infoflag & InterlaceMode) {
-		temp = temp << 1;
-	}
-	colordepth = SiS_GetColorDepth (ROMAddr, ModeNo, ModeIdIndex);
-
-	if ((ModeNo >= 0x7C) && (ModeNo <= 0x7E)) {
-		temp = ModeNo - 0x7C;
-		colordepth = ColorDepth[temp];
-		temp = 0x6B;
-		if (infoflag & InterlaceMode) {
-			temp = temp << 1;
-		}
-		return (temp * colordepth);
-	} else
-		return (temp * colordepth);
-}
+  if(infoflag & InterlaceMode) temp <<= 1;
 
-USHORT
-SiS_GetColorDepth (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
-{
-	USHORT ColorDepth[6] = { 1, 2, 4, 4, 6, 8 };
-	SHORT index;
-	USHORT modeflag;
+  temp *= colordepth;
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-	}
-	index = (modeflag & ModeInfoFlag) - ModeEGA;
-	if (index < 0)
-		index = 0;
-	return (ColorDepth[index]);
+  /* TW: Added this entire "if"-section from 650/LVDS BIOS */
+  if((ModeNo >= 0x26) && (ModeNo <= 0x28)) {
+        colordepth >>= 1;
+	temp += colordepth;
+  }
+
+  return(temp);
 }
 
-void
-SiS_SetCRT2Sync (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		 USHORT RefreshRateTableIndex)
+/* Checked with 650/LVDS BIOS */
+USHORT
+SiS_GetColorDepth(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT tempah = 0, infoflag, flag;
-
-	flag = 0;
-	infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
-	if (SiS_IF_DEF_LVDS == 1) {
-		if (SiS_VBInfo & SetCRT2ToLCD) {
-			tempah = SiS_LCDInfo;
-			if (tempah & LCDSync) {
-				flag = 1;
-			}
-		}
-	}
-	if (flag != 1)
-		tempah = infoflag >> 8;
-	tempah = tempah & 0xC0;
-	tempah = tempah | 0x20;
-	if (!(SiS_LCDInfo & LCDRGB18Bit))
-		tempah = tempah | 0x10;
-	if (SiS_IF_DEF_CH7005 == 1)
-		tempah = tempah | 0xC0;
-
-	SiS_SetRegANDOR (SiS_Part1Port, 0x19, 0x3F, tempah);
+  USHORT ColorDepth[6] = { 1, 2, 4, 4, 6, 8};
+  SHORT  index;
+  USHORT modeflag;
+
+  if(ModeNo <= 0x13)
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  else
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+
+  index = (modeflag & ModeInfoFlag) - ModeEGA;
+  if(index < 0) index = 0;
+  return(ColorDepth[index]);
 }
 
+/* TW: Checked against 650/LVDS (1.10.07), 650/301 and 630/301B BIOS */
 void
-SiS_SetCRT2FIFO (USHORT SiS_Part1Port, ULONG ROMAddr, USHORT ModeNo,
-		 PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetCRT2Sync(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT temp, index;
-	USHORT modeidindex, refreshratetableindex;
-	USHORT VCLK, MCLK, colorth = 0, data, data2;
-	ULONG eax;
-	UCHAR LatencyFactor[] = { 97, 88, 86, 79, 77, 00,	/*; 64  bit    BQ=2   */
-		00, 87, 85, 78, 76, 54,	/*; 64  bit    BQ=1   */
-		97, 88, 86, 79, 77, 00,	/*; 128 bit    BQ=2   */
-		00, 79, 77, 70, 68, 48,	/*; 128 bit    BQ=1   */
-		80, 72, 69, 63, 61, 00,	/*; 64  bit    BQ=2   */
-		00, 70, 68, 61, 59, 37,	/*; 64  bit    BQ=1   */
-		86, 77, 75, 68, 66, 00,	/*; 128 bit    BQ=2   */
-		00, 68, 66, 59, 57, 37
-	};			/*; 128 bit    BQ=1   */
-
-	SiS_SearchModeID (ROMAddr, ModeNo, &modeidindex);
-	SiS_SetFlag = SiS_SetFlag & (~ProgrammingCRT2);
-	SiS_SelectCRT2Rate = 0;
-	refreshratetableindex = SiS_GetRatePtrCRT2 (ROMAddr, ModeNo, modeidindex);	/* 11.GetRatePtr */
-	if (ModeNo >= 0x13) {
-		index = SiS_RefIndex[refreshratetableindex].Ext_CRTVCLK;
-		index = index & 0x3F;
-		VCLK = SiS_VCLKData[index].CLOCK;	/* Get VCLK  */
-		index = SiS_GetReg1 (SiS_P3c4, 0x1A);
-		index = index & 07;
-		MCLK = SiS_MCLKData[index].CLOCK;	/* Get MCLK  */
-		data2 = SiS_ModeType - 0x02;
-		switch (data2) {
-		case 0:
-			colorth = 1;
-			break;
-		case 1:
-			colorth = 1;
-			break;
-		case 2:
-			colorth = 2;
-			break;
-		case 3:
-			colorth = 2;
-			break;
-		case 4:
-			colorth = 3;
-			break;
-		case 5:
-			colorth = 4;
-			break;
-		}
-		data2 = (data2 * VCLK) / MCLK;	/*  bx */
-
-		temp = SiS_GetReg1 (SiS_P3c4, 0x14);
-		temp = ((temp & 0x00FF) >> 6) << 1;
-		if (temp == 0)
-			temp = 1;
-		temp = temp << 2;
-
-		data2 = temp - data2;
-		if (data2 % (28 * 16)) {
-			data2 = data2 / (28 * 16);
-			data2++;
-		} else {
-			data2 = data2 / (28 * 16);
-		}
+  USHORT tempah=0,tempbl,infoflag,flag;
+
+  flag = 0;
+  tempbl = 0xC0;   /* TW: Severe BIOS bug in all BIOSes except 650/LVDS 1.10.07 */
+
+  infoflag = SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
+
+  if(SiS_IF_DEF_LVDS == 1) {				     /* LVDS */
+    if(SiS_VBInfo & SetCRT2ToLCD) {
+      tempah = SiS_LCDInfo;
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+              tempbl = tempah & 0xc0;
+      }
+      if(SiS_LCDInfo & LCDSync) {
+        flag = 1;
+      }
+    }
+  } else if ( (HwDeviceExtension->jChipType < SIS_315H) &&   /* 630/301B */
+              (SiS_VBType & VB_SIS301BLV302BLV) ) {
+     if(SiS_VBInfo & SetCRT2ToLCD) {
+        tempah = SiS_LCDInfo;
+	if(SiS_LCDInfo & LCDSync) {
+           flag = 1;
+        }
+     }
+  } else if (HwDeviceExtension->jChipType < SIS_315H) {      /* 630/301 */
+     if(SiS_VBInfo & SetCRT2ToLCD) {
+         tempah = SiS_LCDInfo;
+	 if(SiS_LCDInfo & LCDNonExpandingShift) {
+	    flag = 1;
+	 }
+     }
+  }
 
-		index = 0;
-		temp = SiS_GetReg1 (SiS_P3c4, 0x14);
-		if (temp & 0x0080)
-			index = index + 12;
-		SiS_SetReg4 (0xcf8, 0x800000A0);
-		eax = SiS_GetReg3 (0xcfc);
-		temp = (USHORT) (eax >> 24);
-		if (!(temp & 0x01))
-			index = index + 24;
-
-		SiS_SetReg4 (0xcf8, 0x80000050);
-		eax = SiS_GetReg3 (0xcfc);
-		temp = (USHORT) (eax >> 24);
-		if (temp & 0x01)
-			index = index + 6;
-		temp = (temp & 0x0F) >> 1;
-		index = index + temp;
-		data = LatencyFactor[index];
-		data = data + 15;
-		temp = SiS_GetReg1 (SiS_P3c4, 0x14);
-		if (!(temp & 0x80))
-			data = data + 5;
-		data = data + data2;
-
-		SiS_SetFlag = SiS_SetFlag | ProgrammingCRT2;
-		data = data * VCLK * colorth;
-		if (data % (MCLK << 4)) {
-			data = data / (MCLK << 4);
-			data++;
-		} else {
-			data = data / (MCLK << 4);
-		}
-		temp = 0x16;
-/*  Revision ID  */
-		temp = 0x13;
-/*  Revision ID  */
-		SiS_SetRegANDOR (SiS_Part1Port, 0x01, ~0x01F, temp);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x02, ~0x01F, temp);
-	}
+  if(flag != 1) tempah = infoflag >> 8;
+
+  tempah &= 0xC0;
+  tempah |= 0x20;
+
+  if(!(SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
+
+  if (SiS_LCDResInfo == Panel640x480) {
+	/* TW: BIOS does something here (301, 301LV and LVDS) @@@ */
+  }
+
+  if(!(SiS_VBType & VB_SIS301)) {
+  	tempah &= 0x3f;
+  	tempah |= tempbl;
+  }
+
+  SiS_SetRegANDOR(SiS_Part1Port,0x19,0x3F,tempah);
 }
 
+/* TW: Set FIFO on 300 series */
+/* TW: Checked against 630/301B BIOS; does not set PCI registers */
 void
-SiS_SetCRT2FIFO2 (USHORT SiS_Part1Port, ULONG ROMAddr, USHORT ModeNo,
-		  PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetCRT2FIFO_300(UCHAR *ROMAddr,USHORT ModeNo,
+                    PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-#ifdef CONFIG_FB_SIS_315
-	UCHAR CombCode[] = { 1, 1, 1, 4, 3, 1, 3, 4, 4, 1, 4, 4, 5, 1, 5, 4 };
-	UCHAR CRT2ThLow[] =
-	    { 39, 63, 55, 79, 78, 102, 90, 114, 55, 87, 84, 116, 103, 135, 119,
-		    151 };
+  USHORT temp,index;
+  USHORT modeidindex,refreshratetableindex;
+  USHORT VCLK,MCLK,colorth=0,data2;
+  ULONG  data,eax;
+  UCHAR  LatencyFactor[] = {
+  	97, 88, 86, 79, 77, 00,       /*; 64  bit    BQ=2   */
+        00, 87, 85, 78, 76, 54,       /*; 64  bit    BQ=1   */
+        97, 88, 86, 79, 77, 00,       /*; 128 bit    BQ=2   */
+        00, 79, 77, 70, 68, 48,       /*; 128 bit    BQ=1   */
+        80, 72, 69, 63, 61, 00,       /*; 64  bit    BQ=2   */
+        00, 70, 68, 61, 59, 37,       /*; 64  bit    BQ=1   */
+        86, 77, 75, 68, 66, 00,       /*; 128 bit    BQ=2   */
+        00, 68, 66, 59, 57, 37};      /*; 128 bit    BQ=1   */
+
+  SiS_SearchModeID(ROMAddr,&ModeNo,&modeidindex);
+  SiS_SetFlag &= (~ProgrammingCRT2);
+  SiS_SelectCRT2Rate = 0;
+  refreshratetableindex = SiS_GetRatePtrCRT2(ROMAddr,ModeNo,modeidindex);
+
+  if(ModeNo >= 0x13) {
+    index = SiS_RefIndex[refreshratetableindex].Ext_CRTVCLK;
+    index &= 0x3F;
+    VCLK = SiS_VCLKData[index].CLOCK;
+    index = SiS_GetReg1(SiS_P3c4,0x1A);
+    index &= 0x07;
+    MCLK = SiS_MCLKData_0[index].CLOCK;
+    data2 = SiS_ModeType - 0x02;
+    switch (data2) {
+      case 0 : 	colorth = 1; break;
+      case 1 : 	colorth = 1; break;
+      case 2 : 	colorth = 2; break;
+      case 3 : 	colorth = 2; break;
+      case 4 : 	colorth = 3; break;
+      case 5 : 	colorth = 4; break;
+    }
+    /* data2=(data2*VCLK)/MCLK;   */  /*  bx */
+    data2 = (colorth * VCLK) / MCLK;  /* TW */
+
+    temp = SiS_GetReg1(SiS_P3c4,0x14);
+    temp = ((temp&0x00FF)>>6)<<1;
+    if(temp == 0) temp=1;
+    temp <<= 2;
+
+    data2 = temp - data2;
+
+/*  if(data2%(28*16)) {		 TW: WRONG
+      	data2=data2/(28*16);
+      	data2++;
+    } else {
+      	data2=data2/(28*16);
+    } */
+    if((28*16) % data2) {		/* TW */
+      	data2 = (28 * 16) / data2;
+      	data2++;
+    } else {
+      	data2 = (28 * 16) / data2;
+    }
+
+    index = 0;
+    temp = SiS_GetReg1(SiS_P3c4,0x14);
+    if(temp & 0x0080) index += 12;
+
+#ifndef LINUX_XF86
+    SiS_SetReg4(0xcf8,0x800000A0);
+    eax=SiS_GetReg3(0xcfc);
+#else
+  /* TW: We use pci functions X offers. We use tag 0, because
+   * we want to read/write to the host bridge (which is always
+   * 00:00.0 on 630, 730 and 540), not the VGA device.
+   */
+    eax = pciReadLong(0x00000000, 0xA0);
 #endif
-	USHORT temp, temp1, temp2, temp3;
-	USHORT index;
-	USHORT CRT1ModeNo, CRT2ModeNo;
-	USHORT ModeIdIndex;
-	USHORT RefreshRateTableIndex;
-
-	SiS_SetReg1 (SiS_Part1Port, 0x1, 0x3B);
-/* CRT1ModeNo=(UCHAR)SiS_GetReg1(SiS_P3d4,0x34); *//* get CRT1 ModeNo */
-	CRT1ModeNo = SiS_CRT1Mode;
-	/* CRT1ModeNo =ModeNo; */
-	SiS_SearchModeID (ROMAddr, CRT1ModeNo, &ModeIdIndex);	/* Get ModeID Table */
-	SiS_SetFlag = SiS_SetFlag & (~ProgrammingCRT2);
-
-	RefreshRateTableIndex = SiS_GetRatePtrCRT2 (ROMAddr, CRT1ModeNo, ModeIdIndex);	/* Set REFIndex-> for crt1 refreshrate */
-	index =
-	    SiS_GetVCLK2Ptr (ROMAddr, CRT1ModeNo, ModeIdIndex,
-			     RefreshRateTableIndex, HwDeviceExtension);
-	temp1 = SiS_VCLKData[index].CLOCK;	/* Get VCLK  */
-
-	temp2 = SiS_GetColorDepth (ROMAddr, CRT1ModeNo, ModeIdIndex);
-#ifdef CONFIG_FB_SIS_315
-	index = SiS_Get310DRAMType (ROMAddr);
-#endif
-	temp3 = SiS_MCLKData[index].CLOCK;	/* Get MCLK  */
-
-	temp = SiS_GetReg1 (SiS_P3c4, 0x14);
-	if (temp & 0x02)
-		temp = 16;
-	else
-		temp = 8;
-
-	temp = temp - temp1 * temp2 / temp3;	/* 16-DRamBus - DCLK*BytePerPixel/MCLK */
-
-	if ((52 * 16 % temp) == 0)
-		temp = 52 * 16 / temp + 40;
-	else
-		temp = 52 * 16 / temp + 40 + 1;
-
-	/* get DRAM latency */
-	temp1 = (SiS_GetReg1 (SiS_P3c4, 0x17) >> 3) & 0x7;	/* SR17[5:3] DRAM Queue depth */
-	temp2 = (SiS_GetReg1 (SiS_P3c4, 0x17) >> 6) & 0x3;	/* SR17[7:6] DRAM Grant length */
-
-#ifdef CONFIG_FB_SIS_315
-	if (SiS_Get310DRAMType (ROMAddr) < 2) {
-		for (temp3 = 0; temp3 < 16; temp3 += 2) {
-			if ((CombCode[temp3] == temp1)
-			    && (CombCode[temp3 + 1] == temp2)) {
-				temp3 = CRT2ThLow[temp3 >> 1];
-			}
-		}
-	} else {
-		for (temp3 = 0; temp3 < 16; temp3 += 2) {
-			if ((CombCode[temp3] == temp1)
-			    && (CombCode[temp3 + 1] == temp2)) {
-				temp3 = CRT2ThLow[8 + (temp3 >> 1)];
-			}
-		}
-	}
+    temp=(USHORT)(eax>>24);
+    if(!(temp&0x01)) index += 24;
+
+#ifndef LINUX_XF86
+    SiS_SetReg4(0xcf8,0x80000050);
+    eax=SiS_GetReg3(0xcfc);
+#else
+    eax = pciReadLong(0x00000000, 0x50);
 #endif
+    temp=(USHORT)(eax >> 24);
+    if(temp & 0x01) index += 6;
+
+    temp = (temp & 0x0F) >> 1;
+    index += temp;
+    data = LatencyFactor[index];
+    data += 15;
+    temp = SiS_GetReg1(SiS_P3c4,0x14);
+    if(!(temp & 0x80)) data += 5;
+
+    data += data2;
+
+    SiS_SetFlag |= ProgrammingCRT2;
+
+    data = data * VCLK * colorth;
+    if(data % (MCLK << 4)) {
+      	data = data / (MCLK << 4);
+      	data++;
+    } else {
+      	data = data / (MCLK << 4);
+    }
+
+    /* TW: Inserted this entire section */
+    temp = SiS_GetReg1(SiS_Part1Port,0x01);
+    if( ( (HwDeviceExtension->jChipType == SIS_630) ||
+         (HwDeviceExtension->jChipType == SIS_730) ) &&
+       (HwDeviceExtension->jChipRevision >= 0x30) ) /* 630s or 730(s?) */
+    {
+	temp = (temp & (~0x1F)) | 0x1b;
+    } else {
+	temp = (temp & (~0x1F)) | 0x16;
+    }
+    SiS_SetRegANDOR(SiS_Part1Port,0x01,0xe0,temp);
+
+    if(data <= 6) data = 6;
+    if(data > 0x14) data = 0x14;
+    if( (HwDeviceExtension->jChipType == SIS_630) &&
+        (HwDeviceExtension->jChipRevision >= 0x30) ) /* 630s, NOT 730 */
+    {
+   	if(data > 0x13) data = 0x13;
+    }
+    SiS_SetRegANDOR(SiS_Part1Port,0x02,~0x01F,data);
+   /* TW end */
+  }
+}
+
+/* TW: Set FIFO on 310 series */
+#ifdef SIS315H
+void
+SiS_SetCRT2FIFO_310(UCHAR *ROMAddr,USHORT ModeNo,
+                    PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+
+  UCHAR CombCode[]  = { 1, 1, 1, 4, 3, 1, 3, 4,
+                        4, 1, 4, 4, 5, 1, 5, 4};
+  UCHAR CRT2ThLow[] = { 39, 63, 55, 79, 78,102, 90,114,
+                        55, 87, 84,116,103,135,119,151};
+  USHORT temp3,tempax,tempbx,tempcx;
+  USHORT tempcl, tempch;
+  USHORT index;
+  USHORT CRT1ModeNo,CRT2ModeNo;
+  USHORT ModeIdIndex;
+  USHORT RefreshRateTableIndex;
+  USHORT SelectRate_backup;
+
+  SiS_SetReg1(SiS_Part1Port,0x01,0x3B);
+
+  CRT1ModeNo = SiS_CRT1Mode;                             /* get CRT1 ModeNo */
+  SiS_SearchModeID(ROMAddr,&CRT1ModeNo,&ModeIdIndex);
+
+  SiS_SetFlag &= (~ProgrammingCRT2);
+  SelectRate_backup = SiS_SelectCRT2Rate;
+  SiS_SelectCRT2Rate = 0;
 
-	temp += temp3;		/* CRT1 Request Period */
+  /* Set REFIndex for crt1 refreshrate */
+  RefreshRateTableIndex = SiS_GetRatePtrCRT2(ROMAddr,CRT1ModeNo,
+                                             ModeIdIndex);
 
-	CRT2ModeNo = ModeNo;	/* get CRT2 ModeNo */
-	SiS_SearchModeID (ROMAddr, CRT2ModeNo, &ModeIdIndex);	/* Get ModeID Table */
-	SiS_SetFlag = SiS_SetFlag | ProgrammingCRT2;
-	RefreshRateTableIndex = SiS_GetRatePtrCRT2 (ROMAddr, CRT1ModeNo, ModeIdIndex);	/* Set REFIndex-> for crt1 refreshrate */
-	index =
-	    SiS_GetVCLK2Ptr (ROMAddr, CRT2ModeNo, ModeIdIndex,
-			     RefreshRateTableIndex, HwDeviceExtension);
-	temp1 = SiS_VCLKData[index].CLOCK;	/* Get VCLK  */
+  index = SiS_GetVCLK2Ptr(ROMAddr,CRT1ModeNo,ModeIdIndex,
+                          RefreshRateTableIndex,HwDeviceExtension);
+  tempax = SiS_VCLKData[index].CLOCK;                         /* Get DCLK (VCLK?) */
 
-	temp2 = SiS_GetColorDepth (ROMAddr, CRT2ModeNo, ModeIdIndex);
-#ifdef CONFIG_FB_SIS_315
-	index = SiS_Get310DRAMType (ROMAddr);
+  tempbx = SiS_GetColorDepth(ROMAddr,CRT1ModeNo,ModeIdIndex); /* Get colordepth */
+  tempbx >>= 1;
+  if(!tempbx) tempbx++;
+
+  tempax *= tempbx;
+
+  tempbx = SiS_GetMCLK(ROMAddr, HwDeviceExtension);		     /* Get MCLK */
+
+  tempax /= tempbx;
+
+  tempbx = tempax;
+
+#if 0 /* TW: BIOS code is skrewed */
+  if(SiS_GetReg1(SiS_P3c4,0x14) & 0x02) {
+   	tempax = 16;
+  } else {
+    	tempax = 8;
+  }
 #endif
-	temp3 = SiS_MCLKData[index].CLOCK;	/* Get MCLK  */
+  tempax = 16;
+
+  tempax -= tempbx;
+
+  tempbx = tempax;    /* tempbx = 16-DRamBus - DCLK*BytePerPixel/MCLK */
+
+  tempax = ((52 * 16) / tempbx);
+
+  if ((52*16 % tempbx) != 0) {
+    	tempax++;
+  }
+  tempcx = tempax;
+  tempcx += 40;
+
+  /* get DRAM latency */
+  tempcl = (SiS_GetReg1(SiS_P3c4,0x17) >> 3) & 0x7;     /* SR17[5:3] DRAM Queue depth */
+  tempch = (SiS_GetReg1(SiS_P3c4,0x17) >> 6) & 0x3;     /* SR17[7:6] DRAM Grant length */
 
-	if ((temp * temp1 * temp2) % (16 * temp3) == 0)
-		temp = temp * temp1 * temp2 / (16 * temp3);	/* CRT1 Request period * TCLK*BytePerPixel/(MCLK*16) */
-	else
-		temp = temp * temp1 * temp2 / (16 * temp3) + 1;	/* CRT1 Request period * TCLK*BytePerPixel/(MCLK*16) */
+  for (temp3 = 0; temp3 < 16; temp3 += 2) {
+    if ((CombCode[temp3] == tempcl) && (CombCode[temp3+1] == tempch)) {
+      temp3 = CRT2ThLow[temp3 >> 1];
+    }
+  }
 
-	if (temp > 0x37)
-		temp = 0x37;
+  tempcx +=  temp3;                                      /* CRT1 Request Period */
 
-	SiS_SetRegANDOR (SiS_Part1Port, 0x02, ~0x3F, temp);
+  CRT2ModeNo = ModeNo;                                   /* get CRT2 ModeNo */
+  SiS_SearchModeID(ROMAddr,&CRT2ModeNo,&ModeIdIndex);    /* Get ModeID Table */
 
+  SiS_SetFlag |= ProgrammingCRT2;
+  SiS_SelectCRT2Rate = SelectRate_backup;
+
+  RefreshRateTableIndex=SiS_GetRatePtrCRT2(ROMAddr,CRT1ModeNo,
+                                           ModeIdIndex);
+
+  index = SiS_GetVCLK2Ptr(ROMAddr,CRT2ModeNo,ModeIdIndex,
+                          RefreshRateTableIndex,HwDeviceExtension);
+  tempax = SiS_VCLKData[index].CLOCK;                          /* Get VCLK  */
+
+  tempbx = SiS_GetColorDepth(ROMAddr,CRT2ModeNo,ModeIdIndex);  /* Get colordepth */
+  tempbx >>= 1;
+  if(!tempbx) tempbx++;
+
+  tempax *= tempbx;
+
+  tempax *= tempcx;
+
+  tempbx = SiS_GetMCLK(ROMAddr, HwDeviceExtension);		       /* Get MCLK */
+  tempbx <<= 4;
+
+  tempcx = tempax;
+  tempax /= tempbx;
+  if(tempcx % tempbx) tempax++;		/* CRT1 Request period * TCLK * BytePerPixel / (MCLK*16) */
+
+  if (tempax > 0x37)  tempax = 0x37;
+
+  /* TW: 650/LVDS (1.10.07, 1.10.00), 650/301LV overrule calculated value; 315 does not */
+  if(HwDeviceExtension->jChipType == SIS_650) {
+  	tempax = 0x04;
+  }
+
+  SiS_SetRegANDOR(SiS_Part1Port,0x02,~0x3F,tempax);
 }
 
+USHORT
+SiS_GetMCLK(UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT index;
+
+  index = SiS_Get310DRAMType(ROMAddr,HwDeviceExtension);
+  if(index >= 4) {
+    index -= 4;
+    return(SiS_MCLKData_1[index].CLOCK);
+  } else {
+    return(SiS_MCLKData_0[index].CLOCK);
+  }
+}
+#endif
+
+/* TW: Checked against 650/LVDS 1.10.07 BIOS */
 void
-SiS_GetLVDSDesData (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		    USHORT RefreshRateTableIndex)
+SiS_GetLVDSDesData(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   USHORT RefreshRateTableIndex,
+		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
+  USHORT modeflag;
+  USHORT PanelIndex,ResIndex;
+  SiS_LVDSDesStruct  *PanelDesPtr=NULL;
 
-	USHORT modeflag;
-	USHORT PanelIndex, ResIndex;
-	SiS_LVDSDesStruct *PanelDesPtr = NULL;
-	if ((SiS_IF_DEF_LVDS == 0)
-	    && ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {	/*301b *//*for test */
-		SiS_GetLVDSDesPtrA (ROMAddr, ModeNo, ModeIdIndex,
-				    RefreshRateTableIndex, &PanelIndex,
-				    &ResIndex);
-		switch (PanelIndex) {
-		case 0:
-			PanelDesPtr = LVDS1024x768Des_1;
-			break;
-		case 1:
-			PanelDesPtr = LVDS1280x1024Des_1;
-			break;
-		case 2:
-			PanelDesPtr = LVDS1280x960Des_1;
-			break;
-		case 3:
-			PanelDesPtr = LVDS1024x768Des_2;
-			break;
-		case 4:
-			PanelDesPtr = LVDS1280x1024Des_2;
-			break;
-		case 5:
-			PanelDesPtr = LVDS1280x960Des_2;
-			break;
-		}
-	} else {
-		SiS_GetLVDSDesPtr (ROMAddr, ModeNo, ModeIdIndex,
-				   RefreshRateTableIndex, &PanelIndex,
-				   &ResIndex);
-		switch (PanelIndex) {
-		case 0:
-			PanelDesPtr = SiS_PanelType00_1;
-			break;
-		case 1:
-			PanelDesPtr = SiS_PanelType01_1;
-			break;
-		case 2:
-			PanelDesPtr = SiS_PanelType02_1;
-			break;
-		case 3:
-			PanelDesPtr = SiS_PanelType03_1;
-			break;
-		case 4:
-			PanelDesPtr = SiS_PanelType04_1;
-			break;
-		case 5:
-			PanelDesPtr = SiS_PanelType05_1;
-			break;
-		case 6:
-			PanelDesPtr = SiS_PanelType06_1;
-			break;
-		case 7:
-			PanelDesPtr = SiS_PanelType07_1;
-			break;
-		case 8:
-			PanelDesPtr = SiS_PanelType08_1;
-			break;
-		case 9:
-			PanelDesPtr = SiS_PanelType09_1;
-			break;
-		case 10:
-			PanelDesPtr = SiS_PanelType0a_1;
-			break;
-		case 11:
-			PanelDesPtr = SiS_PanelType0b_1;
-			break;
-		case 12:
-			PanelDesPtr = SiS_PanelType0c_1;
-			break;
-		case 13:
-			PanelDesPtr = SiS_PanelType0d_1;
-			break;
-		case 14:
-			PanelDesPtr = SiS_PanelType0e_1;
-			break;
-		case 15:
-			PanelDesPtr = SiS_PanelType0f_1;
-			break;
-		case 16:
-			PanelDesPtr = SiS_PanelType00_2;
-			break;
-		case 17:
-			PanelDesPtr = SiS_PanelType01_2;
-			break;
-		case 18:
-			PanelDesPtr = SiS_PanelType02_2;
-			break;
-		case 19:
-			PanelDesPtr = SiS_PanelType03_2;
-			break;
-		case 20:
-			PanelDesPtr = SiS_PanelType04_2;
-			break;
-		case 21:
-			PanelDesPtr = SiS_PanelType05_2;
-			break;
-		case 22:
-			PanelDesPtr = SiS_PanelType06_2;
-			break;
-		case 23:
-			PanelDesPtr = SiS_PanelType07_2;
-			break;
-		case 24:
-			PanelDesPtr = SiS_PanelType08_2;
-			break;
-		case 25:
-			PanelDesPtr = SiS_PanelType09_2;
-			break;
-		case 26:
-			PanelDesPtr = SiS_PanelType0a_2;
-			break;
-		case 27:
-			PanelDesPtr = SiS_PanelType0b_2;
-			break;
-		case 28:
-			PanelDesPtr = SiS_PanelType0c_2;
-			break;
-		case 29:
-			PanelDesPtr = SiS_PanelType0d_2;
-			break;
-		case 30:
-			PanelDesPtr = SiS_PanelType0e_2;
-			break;
-		case 31:
-			PanelDesPtr = SiS_PanelType0f_2;
-			break;
-		case 32:
-			PanelDesPtr = SiS_CHTVUNTSCDesData;
-			break;
-		case 33:
-			PanelDesPtr = SiS_CHTVONTSCDesData;
-			break;
-		case 34:
-			PanelDesPtr = SiS_CHTVUPALDesData;
-			break;
-		case 35:
-			PanelDesPtr = SiS_CHTVOPALDesData;
-			break;
-		}
-	}
-	SiS_LCDHDES = (PanelDesPtr + ResIndex)->LCDHDES;
-	SiS_LCDVDES = (PanelDesPtr + ResIndex)->LCDVDES;
-	if (SiS_LCDInfo & LCDNonExpanding) {
-		if (SiS_LCDResInfo >= Panel1024x768) {
-			if (ModeNo <= 0x13) {
-				modeflag =
-				    SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-				if (!(modeflag & HalfDCLK)) {
-					SiS_LCDHDES = 320;
-				}
-			}
-		}
-	}
-	return;
+  if((SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCDA) ) {
+
+     SiS_GetLVDSDesPtrA(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                        &PanelIndex,&ResIndex);
+     switch (PanelIndex)
+     {
+     	case  0: PanelDesPtr = LVDS1024x768Des_1;   break;  /* --- expanding --- */
+     	case  1: PanelDesPtr = LVDS1280x1024Des_1;  break;
+     	case  2: PanelDesPtr = LVDS1280x960Des_1;   break;
+     	case  3: PanelDesPtr = LVDS1024x768Des_2;   break;  /* --- non expanding --- */
+     	case  4: PanelDesPtr = LVDS1280x1024Des_2;  break;
+     	case  5: PanelDesPtr = LVDS1280x960Des_2;   break;
+     }
+
+  } else {
+
+     SiS_GetLVDSDesPtr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                       &PanelIndex,&ResIndex,HwDeviceExtension);
 
+     switch (PanelIndex)
+     {
+     	case  0: PanelDesPtr = SiS_PanelType00_1;   break; /* --- expanding --- | Gericom 1st supersonic (310) */
+     	case  1: PanelDesPtr = SiS_PanelType01_1;   break;
+     	case  2: PanelDesPtr = SiS_PanelType02_1;   break;
+     	case  3: PanelDesPtr = SiS_PanelType03_1;   break;
+     	case  4: PanelDesPtr = SiS_PanelType04_1;   break;
+     	case  5: PanelDesPtr = SiS_PanelType05_1;   break;
+     	case  6: PanelDesPtr = SiS_PanelType06_1;   break;
+     	case  7: PanelDesPtr = SiS_PanelType07_1;   break;
+     	case  8: PanelDesPtr = SiS_PanelType08_1;   break;
+     	case  9: PanelDesPtr = SiS_PanelType09_1;   break;
+     	case 10: PanelDesPtr = SiS_PanelType0a_1;   break;
+     	case 11: PanelDesPtr = SiS_PanelType0b_1;   break;
+     	case 12: PanelDesPtr = SiS_PanelType0c_1;   break;	/* TW: Clevo 2202 (300)  */
+     	case 13: PanelDesPtr = SiS_PanelType0d_1;   break;
+     	case 14: PanelDesPtr = SiS_PanelType0e_1;   break;	/* TW: Uniwill N271S2 (300) */
+     	case 15: PanelDesPtr = SiS_PanelType0f_1;   break;
+     	case 16: PanelDesPtr = SiS_PanelType00_2;   break;  /* --- non-expanding --- */
+     	case 17: PanelDesPtr = SiS_PanelType01_2;   break;
+     	case 18: PanelDesPtr = SiS_PanelType02_2;   break;
+     	case 19: PanelDesPtr = SiS_PanelType03_2;   break;
+     	case 20: PanelDesPtr = SiS_PanelType04_2;   break;
+     	case 21: PanelDesPtr = SiS_PanelType05_2;   break;
+     	case 22: PanelDesPtr = SiS_PanelType06_2;   break;
+     	case 23: PanelDesPtr = SiS_PanelType07_2;   break;
+     	case 24: PanelDesPtr = SiS_PanelType08_2;   break;
+     	case 25: PanelDesPtr = SiS_PanelType09_2;   break;
+     	case 26: PanelDesPtr = SiS_PanelType0a_2;   break;
+     	case 27: PanelDesPtr = SiS_PanelType0b_2;   break;
+     	case 28: PanelDesPtr = SiS_PanelType0c_2;   break;     /* TW: Gericom 2200C (300) */
+     	case 29: PanelDesPtr = SiS_PanelType0d_2;   break;
+     	case 30: PanelDesPtr = SiS_PanelType0e_2;   break;
+     	case 31: PanelDesPtr = SiS_PanelType0f_2;   break;
+     	case 32: PanelDesPtr = SiS_CHTVUNTSCDesData;   break;
+     	case 33: PanelDesPtr = SiS_CHTVONTSCDesData;   break;
+     	case 34: PanelDesPtr = SiS_CHTVUPALDesData;    break;
+     	case 35: PanelDesPtr = SiS_CHTVOPALDesData;    break;
+     }
+  }
+  SiS_LCDHDES = (PanelDesPtr+ResIndex)->LCDHDES;
+  SiS_LCDVDES = (PanelDesPtr+ResIndex)->LCDVDES;
+
+  if(SiS_LCDInfo & LCDNonExpanding){
+    if(!(SiS_SetFlag & CRT2IsVGA)) {
+      if((HwDeviceExtension->jChipType < SIS_315H) || (SiS_LCDResInfo != Panel1280x1024)) {  /* TW: New from 650/LVDS 1.10.07 */
+        if(SiS_LCDResInfo >= Panel1024x768){
+          if(ModeNo <= 0x13){
+	    modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+	    if(HwDeviceExtension->jChipType < SIS_315H) {
+	         if(!(modeflag & HalfDCLK)) {
+                     SiS_LCDHDES = 320;
+		 }
+	    } else {
+	         /* TW: New from 650/LVDS 1.10.07 */
+	         if(SiS_LCDResInfo == Panel1024x768)
+	             SiS_LCDHDES = 480;
+                 if(SiS_LCDResInfo == Panel1400x1050)
+	             SiS_LCDHDES = 804;
+                 if(!(modeflag & HalfDCLK)) {
+                     SiS_LCDHDES = 320;
+	             if(SiS_LCDResInfo == Panel1400x1050)
+	                SiS_LCDHDES = 632;
+                 }
+            }
+          }
+        }
+      }
+    }
+  }
+  return;
 }
 
+/* TW: Checked against 630/LVDS (2.04.5c) and 650/LVDS (1.10.07) BIOS */
 void
-SiS_GetLVDSDesPtr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		   USHORT RefreshRateTableIndex, USHORT * PanelIndex,
-		   USHORT * ResIndex)
+SiS_GetLVDSDesPtr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                  USHORT RefreshRateTableIndex,USHORT *PanelIndex,
+		  USHORT *ResIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempbx, tempal;
-
-	tempbx = 0;
-	if (SiS_IF_DEF_CH7005 == 1) {
-		if (!(SiS_VBInfo & SetCRT2ToLCD)) {
-			tempbx = 32;
-			if (SiS_VBInfo & SetPALTV)
-				tempbx = tempbx + 2;
-			if (SiS_VBInfo & SetCHTVOverScan)
-				tempbx = tempbx + 1;
-		}
-	}
-	if (SiS_VBInfo & SetCRT2ToLCD) {
-		tempbx = SiS_LCDTypeInfo;
-		if (SiS_LCDInfo & LCDNonExpanding) {
-			tempbx = tempbx + 16;
-		}
-	}
-	if (ModeNo <= 0x13) {
-		tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-	} else {
-		tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-	}
-	tempal = tempal & 0x1F;
-	*PanelIndex = tempbx;
-	*ResIndex = tempal;
+  USHORT tempbx,tempal,modeflag;
+
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+	tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+	tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+  }
+
+  tempbx = 0;
+  if(SiS_IF_DEF_CH70xx != 0) {
+    if(!(SiS_VBInfo & SetCRT2ToLCD)) {
+      tempbx = 32;
+      if(SiS_VBInfo & SetPALTV) tempbx += 2;
+      if(SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+    }
+  }
+  if(SiS_VBInfo & SetCRT2ToLCD) {
+    tempbx = SiS_LCDTypeInfo;
+    if(SiS_LCDInfo & LCDNonExpanding) tempbx += 16;
+    /* TW: Inserted from 650/LVDS (1.10.07) BIOS */
+    if(SiS_LCDInfo & 0x0100) {
+       if(modeflag & HalfDCLK) tempbx += 16;
+    }
+  }
+  /* TW: Inserted from 630/LVDS and 650/LVDS (1.10.07) BIOS */
+  if(SiS_SetFlag & CRT2IsVGA) {
+    if(SiS_LCDResInfo != Panel640x480)  {
+       tempal = 0x07;
+       if(HwDeviceExtension->jChipType < SIS_315H) {
+          if(SiS_GetReg1(SiS_P3c4,0x13) & 0x80) tempal++;
+       }
+    }
+  }
+
+  *PanelIndex = tempbx;
+  *ResIndex = tempal & 0x1F;
 }
 
-/*301b*/
 void
-SiS_GetLVDSDesPtrA (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		    USHORT RefreshRateTableIndex, USHORT * PanelIndex,
-		    USHORT * ResIndex)
+SiS_GetLVDSDesPtrA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   USHORT RefreshRateTableIndex,USHORT *PanelIndex,
+		   USHORT *ResIndex)
 {
-	USHORT tempbx, tempal;
+  USHORT tempbx=0,tempal;
 
-	tempbx = 0;
-	tempbx = SiS_LCDResInfo;
-	tempbx = tempbx - Panel1024x768;
-	if (SiS_LCDInfo & LCDNonExpanding) {
-		tempbx = tempbx + 3;
-	}
+  tempbx = SiS_LCDResInfo - PanelMin301;  /* TW: *not* PanelMinLVDS! */
+  if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 3;
 
-	if (ModeNo <= 0x13) {
-		tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-	} else {
-		tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-	}
-	tempal = tempal & 0x1F;
-	*PanelIndex = tempbx;
-	*ResIndex = tempal;
-}
+  if(ModeNo<=0x13)
+    	tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  else
+    	tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
 
-/*end 301b*/
+  *PanelIndex = tempbx;
+  *ResIndex = tempal & 0x1F;
+}
 
+/* TW: Checked against 650/LVDS (1.10.07), 650/301LV, 630/301 and 630/301B (II) BIOS */
 void
-SiS_SetCRT2ModeRegs (USHORT BaseAddr, USHORT ModeNo,
-		     PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetCRT2ModeRegs(USHORT BaseAddr,USHORT ModeNo, USHORT ModeIdIndex,
+                    PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT i, j;
-	USHORT tempcl, tempah;
-/*301b*/
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (SiS_VBInfo & SetCRT2ToLCDA)) {
-		SiS_SetRegANDOR (SiS_Part1Port, 0x00, ~0x050, 0x40);
-		SiS_SetRegAND (SiS_Part1Port, 0x2E, 0xF7);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x13, 0xFB, 0x04);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x2c, 0xCF, 0x30);
-		SiS_SetRegANDOR (SiS_Part4Port, 0x21, 0x3F, 0xC0);
-		SiS_SetRegANDOR (SiS_Part4Port, 0x23, 0x7F, 0x00);
-	}
-	/*end 301b */
-	else {
-		for (i = 0, j = 4; i < 3; i++, j++)
-			SiS_SetReg1 (SiS_Part1Port, j, 0);
-
-		tempcl = SiS_ModeType;
-		if (HwDeviceExtension->jChipType < SIS_315H) {	/* 300 series */
-			if (ModeNo > 0x13) {
-				tempcl = tempcl - ModeVGA;
-				if ((tempcl > 0) || (tempcl == 0)) {
-					tempah = ((0x010 >> tempcl) | 0x080);
-				}
-			} else {
-				tempah = 0x080;
-			}
-			if (SiS_VBInfo & SetInSlaveMode) {
-				tempah = (tempah ^ 0x0A0);
-			}
-		} else {	/* 310 series */
-
-			if (ModeNo > 0x13) {
-				tempcl = tempcl - ModeVGA;
-				if ((tempcl > 0) || (tempcl == 0)) {
-					tempah = (0x008 >> tempcl);
-					if (tempah == 0)
-						tempah = 1;
-					tempah |= 0x040;
-				}
-			} else {
-				tempah = 0x040;
-			}
+  USHORT i,j,modeflag;
+  USHORT tempcl,tempah,tempbl,temp;
+
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  }
+  
+  /* TW: BIOS does not do this (neither 301 nor LVDS) */
+  /*     (But it's harmless; see SetCRT2Offset) */
+  SiS_SetReg1(SiS_Part1Port,0x03,0x00);   /* fix write part1 index 0  BTDRAM bit Bug */
+
+  /* TW: Removed 301B302B301LV302LV check here to match 650/LVDS BIOS */
+  if(SiS_VBInfo & SetCRT2ToLCDA) {
+
+	/* TW:   1. for LVDS/302B/302LV **LCDA** */
+
+      SiS_SetRegANDOR(SiS_Part1Port,0x00,0xAF,0x40); /* FUNCTION CONTROL */
+      SiS_SetRegAND(SiS_Part1Port,0x2E,0xF7);
+#if 0  /* TW: Not done in 650/301, 650/LVDS or 650/301LV BIOS*/
+      SiS_SetRegANDOR(SiS_Part1Port,0x13,0xFB,0x04);
+      SiS_SetRegANDOR(SiS_Part1Port,0x2c,0xCF,0x30);
+      SiS_SetRegANDOR(SiS_Part4Port,0x21,0x3F,0xC0);
+      SiS_SetRegANDOR(SiS_Part4Port,0x23,0x7F,0x00);
+#endif
 
-			if (SiS_VBInfo & SetInSlaveMode) {
-				tempah = (tempah ^ 0x050);
-			}
+  } else {
 
-		}
+    for(i=0,j=4;i<3;i++,j++) SiS_SetReg1(SiS_Part1Port,j,0);
 
-		if (SiS_VBInfo & CRT2DisplayFlag) {
-			tempah = 0;
-		}
-		SiS_SetReg1 (SiS_Part1Port, 0x00, tempah);
+    tempcl = SiS_ModeType;
 
-		if (SiS_IF_DEF_LVDS == 0) {	/* ifdef 301 */
-			tempah = 0x01;
-			if (!(SiS_VBInfo & SetInSlaveMode)) {
-				tempah = (tempah | 0x02);
-			}
-			if (!(SiS_VBInfo & SetCRT2ToRAMDAC)) {
-				tempah = (tempah ^ 0x05);
-				if (!(SiS_VBInfo & SetCRT2ToLCD)) {
-					tempah = (tempah ^ 0x01);
-				}
-			}
+    if(HwDeviceExtension->jChipType < SIS_315H) {
 
-			tempcl = tempah;	/* 05/03/01 ynlai for TV display bug */
+      /* ---- 300 series ---- */
 
-			if (HwDeviceExtension->jChipType < SIS_315H) {	/* 300 series */
-				tempah = (tempah << 5) & 0xFF;
-				if (SiS_VBInfo & CRT2DisplayFlag) {
-					tempah = 0;
-				}
-				SiS_SetReg1 (SiS_Part1Port, 0x01, tempah);
+      /* TW: Inserted entire if-section from 630/301B BIOS */
+      if(SiS_VBType & VB_SIS301BLV302BLV) {
+	  temp = SiS_GetReg1(SiS_P3c4,0x32);
+	  temp &= 0xef;
+	  temp |= 0x02;
+	  if(SiS_VBInfo & SetCRT2ToTV) {
+	     temp |= 0x10;
+	     temp &= 0xfd;
+	  }
+	  SiS_SetReg1(SiS_P3c4,0x32,temp);
+      }
 
-				tempah = tempah >> 5;
-			} else {	/* 310 series */
+      if(ModeNo > 0x13){
+        tempcl -= ModeVGA;
+        if((tempcl > 0) || (tempcl == 0)) {  /* TW: tempcl is USHORT -> always true! */
+           tempah = ((0x010 >> tempcl) | 0x080);
+        }
+      } else  tempah = 0x080;
 
-				if (SiS_VBInfo & CRT2DisplayFlag) {
-					tempah = 0;
-				}
-				tempah =
-				    (SiS_GetReg1 (SiS_Part1Port, 0x2E) & 0xF8) |
-				    tempah;
-				SiS_SetReg1 (SiS_Part1Port, 0x2E, tempah);
-				tempah = tempcl;
-			}
+      if(SiS_VBInfo & SetInSlaveMode)  tempah = (tempah ^ 0x0A0);
 
-			if ((SiS_ModeType == ModeVGA)
-			    && (!(SiS_VBInfo & SetInSlaveMode))) {
-				tempah = tempah | 0x010;
-			}
+    } else {
 
-			if (SiS_LCDResInfo == Panel1024x768)
-				tempah = tempah | 0x080;
+    /* ---- 310 series ---- */
 
-			if ((SiS_LCDResInfo == Panel1280x1024)
-			    || (SiS_LCDResInfo == Panel1280x960)) {
-				tempah = tempah | 0x080;
-			}
-			if (SiS_VBInfo & SetCRT2ToTV) {
-				if (SiS_VBInfo & SetInSlaveMode) {
-					if (
-					    ((SiS_VBType & VB_SIS301B)
-					     || (SiS_VBType & VB_SIS302B))) {	/*301b */
-						if (SiS_SetFlag & TVSimuMode)
-							tempah = tempah | 0x020;
-					} else
-						tempah = tempah | 0x020;
-				}
-			}
-			SiS_SetRegANDOR (SiS_Part4Port, 0x0D, ~0x0BF, tempah);
-			tempah = 0;
-			if (SiS_VBInfo & SetCRT2ToTV) {
-				if (SiS_VBInfo & SetInSlaveMode) {
-					if (
-					    ((SiS_VBType & VB_SIS301B)
-					     || (SiS_VBType & VB_SIS302B))) {	/*301b */
-						{
-							SiS_SetFlag =
-							    SiS_SetFlag |
-							    RPLLDIV2XO;
-							tempah = tempah | 0x40;
-						}
-					} else {
-						if (!(SiS_SetFlag & TVSimuMode)) {
-							if (!
-							    (SiS_VBInfo &
-							     SetCRT2ToHiVisionTV))
-							{
-								SiS_SetFlag =
-								    SiS_SetFlag
-								    |
-								    RPLLDIV2XO;
-								tempah =
-								    tempah |
-								    0x40;
-							}
-						}
-					}
-				} else {
-					SiS_SetFlag = SiS_SetFlag | RPLLDIV2XO;
-					tempah = tempah | 0x40;
-				}
-			}
-			if (SiS_LCDResInfo == Panel1280x1024)
-				tempah = tempah | 0x80;
-			if (SiS_LCDResInfo == Panel1280x960)
-				tempah = tempah | 0x80;
-			SiS_SetReg1 (SiS_Part4Port, 0x0C, tempah);
-		} else {
-			/*LVDS*/ tempah = 0;
-			if (!(SiS_VBInfo & SetInSlaveMode)) {
-				tempah = tempah | 0x02;
-			}
-			SiS_SetRegANDOR (SiS_Part1Port, 0x2e, 0xF0, tempah);
-		}
+      /* TW: Inserted from 650/301/301LV BIOS */
+      if(SiS_VBType & VB_SIS301BLV302BLV) {
+        if(SiS_VBInfo & CRT2DisplayFlag) {
+	   SiS_SetRegOR(SiS_Part1Port,0x2e,0x08);
+        }
+      }
+
+      if(ModeNo > 0x13) {
+        tempcl -= ModeVGA;
+        if((tempcl > 0) || (tempcl == 0)) {  /* TW: tempcl is USHORT -> always true! */
+           tempah = (0x008 >> tempcl);
+           if (tempah == 0) tempah = 1;
+           tempah |= 0x040;
+        }
+      } else  tempah = 0x040;
+
+      if(SiS_VBInfo & SetInSlaveMode)  tempah = (tempah ^ 0x050);
+
+    }
+
+    if(SiS_VBInfo & CRT2DisplayFlag)  tempah = 0;
+
+    SiS_SetReg1(SiS_Part1Port,0x00,tempah);  	/* FUNCTION CONTROL */
+
+    if(SiS_IF_DEF_LVDS == 0) {
+
+	/* TW:   2. for 301 (301B, 302B 301LV, 302LV non-LCDA) */
+
+    	tempah = 0x01;
+    	if(!(SiS_VBInfo & SetInSlaveMode)) {
+      		tempah |= 0x02;
+    	}
+    	if(!(SiS_VBInfo & SetCRT2ToRAMDAC)) {
+      		tempah = (tempah ^ 0x05);
+      		if(!(SiS_VBInfo & SetCRT2ToLCD)) {
+        		tempah = (tempah ^ 0x01);
+      		}
+    	}
+
+    	tempcl = tempah;
+
+    	if(HwDeviceExtension->jChipType < SIS_315H) {
+
+		/* --- 300 series --- */
+      		tempah = (tempah << 5) & 0xFF;
+      		if(SiS_VBInfo & CRT2DisplayFlag)  tempah=0;
+      		SiS_SetReg1(SiS_Part1Port,0x01,tempah);
+
+      		tempah = tempcl;
+
+    	} else {
+
+		/* --- 310 series --- */
+      		if(SiS_VBInfo & CRT2DisplayFlag)  tempah = 0;
+      		tempah = (SiS_GetReg1(SiS_Part1Port,0x2E) & 0xF8) | tempah;
+      		SiS_SetReg1(SiS_Part1Port,0x2E,tempah);
+
+      		tempah = tempcl;
+    	}
+
+    	if((SiS_ModeType == ModeVGA) && (!(SiS_VBInfo & SetInSlaveMode))) {
+      		tempah |= 0x010;
 	}
-/*301b*/
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (!(SiS_VBInfo & SetCRT2ToLCDA))) {
-		if (SiS_IsDualEdge (BaseAddr))
-			SiS_SetRegANDOR (SiS_Part1Port, 0x13, 0xFB, 0x00);
-		else
-			SiS_SetRegANDOR (SiS_Part1Port, 0x13, 0xFF, 0x00);
-		if (SiS_IsDualEdge (BaseAddr))
-			SiS_SetRegANDOR (SiS_Part1Port, 0x2c, 0xCF, 0x00);
-		else
-			SiS_SetRegANDOR (SiS_Part1Port, 0x2c, 0xFF, 0x00);
-		if (SiS_IsDualEdge (BaseAddr))
-			SiS_SetRegANDOR (SiS_Part4Port, 0x21, 0x3F, 0x00);
-		else
-			SiS_SetRegANDOR (SiS_Part4Port, 0x21, 0xFF, 0x00);
-
-		if (SiS_IsDualEdge (BaseAddr))
-			SiS_SetRegANDOR (SiS_Part4Port, 0x23, 0xFF, 0x80);
-		else
-			SiS_SetRegANDOR (SiS_Part4Port, 0x23, 0xFF, 0x00);
+
+	/* TW: Inserted from 630/301 BIOS */
+	if(SiS_VBType & VB_SIS301) {
+		if(SiS_LCDResInfo == Panel1280x1024) {
+			tempah |= 0x80;
+		}
+	} else {
+		tempah |= 0x80;
+	}
+
+    	if(SiS_VBInfo & (SetCRT2ToTV - SetCRT2ToHiVisionTV)){   /* TW: Added -HiVision like in BIOS (650+630) */
+      		if(SiS_VBInfo & SetInSlaveMode) {
+          		tempah |= 0x20;
+      		}
+    	}
+    	SiS_SetRegANDOR(SiS_Part4Port,0x0D,0x40,tempah);
+
+    	tempah=0;
+    	if(SiS_VBInfo & SetCRT2ToTV) {
+      		if(SiS_VBInfo & SetInSlaveMode) {
+       			if(SiS_VBType & VB_SIS301BLV302BLV) {
+            			SiS_SetFlag |= RPLLDIV2XO;
+            			tempah |= 0x40;
+       			} else {
+        			if(!(SiS_SetFlag & TVSimuMode)) {
+          				if(!(SiS_VBInfo & SetCRT2ToHiVisionTV)) {
+            					SiS_SetFlag |= RPLLDIV2XO;
+            					tempah |= 0x40;
+          				}
+        			}
+      			}
+     		} else {
+        		SiS_SetFlag |= RPLLDIV2XO;
+        		tempah |= 0x40;
+      		}
+    	}
+
+	if(SiS_LCDResInfo == Panel1280x1024 || SiS_LCDResInfo == Panel1280x960) {
+		tempah |= 0x80;
+	}
+
+    	SiS_SetReg1(SiS_Part4Port,0x0C,tempah);
+
+    } else {
+
+    	/* TW: 3. for LVDS */
+
+	/* TW: Inserted if-statement - Part1Port 0x2e not assigned on 300 series */
+	if(HwDeviceExtension->jChipType >= SIS_315H) {
+
+	   /* TW: Inserted this entire section (BIOS 650/LVDS); added ModeType check
+	    *     (LVDS can only be slave in 8bpp modes)
+	    */
+	   tempah = 0x80;
+	   if( (modeflag & CRT2Mode) && (SiS_ModeType > ModeVGA) ) {
+	       if (SiS_VBInfo & DriverMode) {
+	           tempah |= 0x02;
+	       }
+	   }
+
+	   if(!(SiS_VBInfo & SetInSlaveMode)) {
+               tempah |= 0x02;
+    	   }
+
+	   if(SiS_VBInfo & SetCRT2ToTV) {
+	       tempah = tempah ^ 0x01;
+	   }
+
+	   if(SiS_VBInfo & DisableCRT2Display) {
+	       tempah = 1;
+	   }
+
+    	   SiS_SetRegANDOR(SiS_Part1Port,0x2e,0xF0,tempah);
+
+	} else {
+
+	   /* TW: Inserted entire section from 630/LVDS BIOS (added ModeType check) */
+	   tempah = 0;
+	   if( (!(SiS_VBInfo & SetInSlaveMode)) && (SiS_ModeType > ModeVGA) ) {
+               	  tempah |= 0x02;
+    	   }
+	   tempah <<= 5;
+	   if(SiS_VBInfo & DisableCRT2Display)
+	       tempah = 0;
+
+	   SiS_SetReg1(SiS_Part1Port,0x01,tempah);
+
 	}
 
-/*end 301b*/
+    }
+
+  }
+
+  /* TW: Inserted the entire following section */
+
+  if(SiS_IF_DEF_LVDS == 0) {
+
+      if(HwDeviceExtension->jChipType >= SIS_315H) {             /* TW: From 650/301 BIOS */
+
+#if 0    /* TW: This is not done in 650/301LV BIOS */
+         tempah = 0x04;
+         tempbl = 0xfb;
+         if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
+            tempah = 0x00;
+	    if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))
+	       tempbl = 0xff;
+         }
+         SiS_SetRegANDOR(SiS_Part1Port,0x13,tempbl,tempah);
+
+         SiS_SetRegANDOR(SiS_Part1Port,0x2c,0xCF,0x30);
+#endif
+         /* This is done instead: */
+         tempah = 0x30;
+	 if(SiS_VBInfo & DisableCRT2Display) tempah = 0;
+	 SiS_SetRegANDOR(SiS_Part1Port,0x2c,0xcf,tempah);
+
+#if 0    /* TW: This is not done in 650/301LV BIOS */
+	 SiS_SetRegANDOR(SiS_Part4Port,0x21,0x3f,0xc0);
+#endif
+	 /* This is done instead: */
+	 tempah = 0xc0;
+	 if(SiS_VBInfo & DisableCRT2Display) tempah = 0;
+	 SiS_SetRegANDOR(SiS_Part4Port,0x21,0x3f,tempah);
+
+#if 0    /* TW: This is not done in 650/301LV BIOS */
+	 tempah = 0x00;
+         tempbl = 0x7f;
+         if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
+            tempbl = 0xff;
+	    if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr)))
+	       tempah = 0x80;
+         }
+         SiS_SetRegANDOR(SiS_Part4Port,0x23,tempbl,tempah);
+#endif
+	 /* This is done instead: */
+	 tempah = 0x80;
+	 if(SiS_VBInfo & DisableCRT2Display) tempah = 0;
+	 SiS_SetRegANDOR(SiS_Part4Port,0x23,0x7F,tempah);
+
+      } else if(SiS_VBType & VB_SIS301BLV302BLV) {		/* TW: From 630/301B BIOS */
+
+         SiS_SetRegAND(SiS_Part4Port,0x21,0x3f);
+
+         if(SiS_VBInfo & (SetCRT2ToLCD | DisableCRT2Display))
+	    SiS_SetRegAND(SiS_Part4Port,0x23,0x7F);
+	 else
+	    SiS_SetRegOR(SiS_Part4Port,0x23,0x80);
+
+      }
+
+  } else {  							/* TW: From 650/LVDS BIOS */
+
+      if(HwDeviceExtension->jChipType >= SIS_315H) {
+         tempah = 0x04;
+	 tempbl = 0xfb;
+         if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
+            tempah = 0x00;
+	    if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))
+	       tempbl = 0xff;
+         }
+	 SiS_SetRegANDOR(SiS_Part1Port,0x13,tempbl,tempah);
+
+	 if(SiS_VBInfo & DisableCRT2Display)
+	    SiS_SetRegANDOR(SiS_Part1Port,0x13,0xfb,0x00);
+
+	 SiS_SetRegANDOR(SiS_Part1Port,0x2c,0xcf,0x30);
+      }
+
+  }
+
 }
+
 void
-SiS_GetCRT2Data (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		 USHORT RefreshRateTableIndex)
+SiS_GetCRT2Data(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                USHORT RefreshRateTableIndex,
+		PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	if (SiS_IF_DEF_LVDS == 0) {	/*301  */
-		if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-			if (SiS_VBInfo & SetCRT2ToLCDA)
-				SiS_GetCRT2DataLVDS (ROMAddr, ModeNo,
-						     ModeIdIndex,
-						     RefreshRateTableIndex);
-			else
-				SiS_GetCRT2Data301 (ROMAddr, ModeNo,
-						    ModeIdIndex,
-						    RefreshRateTableIndex);
-		} else
-			SiS_GetCRT2Data301 (ROMAddr, ModeNo, ModeIdIndex,
-					    RefreshRateTableIndex);
-		return;
-	} else {		/*LVDS */
-		SiS_GetCRT2DataLVDS (ROMAddr, ModeNo, ModeIdIndex,
-				     RefreshRateTableIndex);
-		return;
-	}
+  if(SiS_IF_DEF_LVDS == 0) {
+     if(SiS_VBType & VB_SIS301BLV302BLV) {
+        if(SiS_VBInfo & SetCRT2ToLCDA) {
+          SiS_GetCRT2DataLVDS(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+        } else {
+	  if((HwDeviceExtension->jChipType < SIS_315H) && (SiS_VBInfo & SetCRT2ToLCD)){
+              SiS_GetCRT2Data301(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+	      /* TW: Need LVDS Data for LCD on 630/301B! */
+	      SiS_GetCRT2DataLVDS(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+	  } else {
+	      SiS_GetCRT2Data301(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+          }
+        }
+     } else
+     	SiS_GetCRT2Data301(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+  } else {
+     SiS_GetCRT2DataLVDS(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
+  }
 }
 
+/* Checked with 650/LVDS 1.10.07 BIOS */
 void
-SiS_GetCRT2DataLVDS (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		     USHORT RefreshRateTableIndex)
+SiS_GetCRT2DataLVDS(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                    USHORT RefreshRateTableIndex,
+		    PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempax, tempbx;
-	USHORT CRT2Index, ResIndex;
-	SiS_LVDSDataStruct *LVDSData = NULL;
-
-	SiS_GetCRT2ResInfo (ROMAddr, ModeNo, ModeIdIndex);
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (SiS_VBInfo & SetCRT2ToLCDA)) {
-		SiS_GetCRT2PtrA (ROMAddr, ModeNo, ModeIdIndex,
-				 RefreshRateTableIndex, &CRT2Index, &ResIndex);
-		switch (CRT2Index) {
-		case 0:
-			LVDSData = SiS_LVDS1024x768Data_1;
-			break;
-		case 1:
-			LVDSData = SiS_LVDS1280x1024Data_1;
-			break;
-		case 2:
-			LVDSData = SiS_LVDS1280x1024Data_1;
-			break;
-			/*  case  2:  LVDSData=SiS_LVDS1280x960Data_1;  break; */
-		case 3:
-			LVDSData = SiS_LVDS1024x768Data_2;
-			break;
-		case 4:
-			LVDSData = SiS_LVDS1280x1024Data_2;
-			break;
-		case 5:
-			LVDSData = SiS_LVDS1280x1024Data_2;
-			break;
-			/*  case  5:  LVDSData=SiS_LVDS1280x960Data_2;  break; */
-		}
-	}
-
-	else {
-		SiS_GetCRT2Ptr (ROMAddr, ModeNo, ModeIdIndex,
-				RefreshRateTableIndex, &CRT2Index, &ResIndex);
-		switch (CRT2Index) {
-		case 0:
-			LVDSData = SiS_LVDS800x600Data_1;
-			break;
-		case 1:
-			LVDSData = SiS_LVDS1024x768Data_1;
-			break;
-		case 2:
-			LVDSData = SiS_LVDS1280x1024Data_1;
-			break;
-		case 3:
-			LVDSData = SiS_LVDS800x600Data_2;
-			break;
-		case 4:
-			LVDSData = SiS_LVDS1024x768Data_2;
-			break;
-		case 5:
-			LVDSData = SiS_LVDS1280x1024Data_2;
-			break;
-		case 6:
-			LVDSData = SiS_LVDS640x480Data_1;
-			break;
-		case 7:
-			LVDSData = SiS_CHTVUNTSCData;
-			break;
-		case 8:
-			LVDSData = SiS_CHTVONTSCData;
-			break;
-		case 9:
-			LVDSData = SiS_CHTVUPALData;
-			break;
-		case 10:
-			LVDSData = SiS_CHTVOPALData;
-			break;
-		}
-	}
-	SiS_VGAHT = (LVDSData + ResIndex)->VGAHT;
-	SiS_VGAVT = (LVDSData + ResIndex)->VGAVT;
-	SiS_HT = (LVDSData + ResIndex)->LCDHT;
-	SiS_VT = (LVDSData + ResIndex)->LCDVT;
-/*301b*/
-	if ((SiS_IF_DEF_LVDS == 0)
-	    && ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {	/*for test */
-		if (!(SiS_LCDInfo & LCDNonExpanding)) {
-			if (SiS_LCDResInfo == Panel1024x768) {
-				tempax = 1024;
-				tempbx = 768;
-			} else {
-				tempax = 1280;
-				tempbx = 1024;
-			}
-			SiS_HDE = tempax;
-			SiS_VDE = tempbx;
-		}
-	} else {
-		if (SiS_IF_DEF_TRUMPION == 0) {
-			if (SiS_VBInfo & SetCRT2ToLCD) {
-				if (!(SiS_LCDInfo & LCDNonExpanding)) {
-					if (SiS_LCDResInfo == Panel800x600) {
-						tempax = 800;
-						tempbx = 600;
-					} else if (SiS_LCDResInfo ==
-						   Panel1024x768) {
-						tempax = 1024;
-						tempbx = 768;
-					} else {
-						tempax = 1280;
-						tempbx = 1024;
-					}
-					SiS_HDE = tempax;
-					SiS_VDE = tempbx;
-				}
-			}
-		}
-	}
-	return;
+   USHORT CRT2Index, ResIndex;
+   SiS_LVDSDataStruct *LVDSData = NULL;
+
+   SiS_GetCRT2ResInfo(ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+   if((SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCDA)) {
+
+      SiS_GetCRT2PtrA(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                      &CRT2Index,&ResIndex);
+
+      switch (CRT2Index) {
+      	case  0:  LVDSData = SiS_LVDS1024x768Data_1;    break;
+      	case  1:  LVDSData = SiS_LVDS1280x1024Data_1;   break;
+        case  2:  LVDSData = SiS_LVDS1280x960Data_1;    break;
+      	case  3:  LVDSData = SiS_LVDS1024x768Data_2;    break;
+      	case  4:  LVDSData = SiS_LVDS1280x1024Data_2;   break;
+      	case  5:  LVDSData = SiS_LVDS1280x960Data_2;    break;
+      }
+
+   } else {
+
+      /* TW: SiS630/301B needs LVDS Data! */
+      if( (HwDeviceExtension->jChipType < SIS_315H) &&
+          (SiS_VBType & VB_SIS301BLV302BLV) &&
+	  (SiS_VBInfo & SetCRT2ToLCD) )
+              SiS_IF_DEF_LVDS = 1;
+
+      SiS_GetCRT2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                     &CRT2Index,&ResIndex,HwDeviceExtension);
+
+      /* TW: SiS630/301B needs LVDS Data! */
+      if( (HwDeviceExtension->jChipType < SIS_315H) &&
+          (SiS_VBType & VB_SIS301BLV302BLV) &&
+	  (SiS_VBInfo & SetCRT2ToLCD) )
+              SiS_IF_DEF_LVDS = 0;
+
+      switch (CRT2Index) {
+      	case  0:  LVDSData = SiS_LVDS800x600Data_1;    break;
+      	case  1:  LVDSData = SiS_LVDS1024x768Data_1;   break;
+      	case  2:  LVDSData = SiS_LVDS1280x1024Data_1;  break;
+      	case  3:  LVDSData = SiS_LVDS800x600Data_2;    break;
+      	case  4:  LVDSData = SiS_LVDS1024x768Data_2;   break;
+      	case  5:  LVDSData = SiS_LVDS1280x1024Data_2;  break;
+	case  6:  LVDSData = SiS_LVDS640x480Data_1;    break;
+        case  7:  LVDSData = SiS_LVDSXXXxXXXData_1;    break;  /* TW: New */
+	case  8:  LVDSData = SiS_LVDS1400x1050Data_1;  break;  /* TW: New */
+	case  9:  LVDSData = SiS_LVDS1400x1050Data_2;  break;  /* TW: New */
+      	case 10:  LVDSData = SiS_CHTVUNTSCData;        break;
+      	case 11:  LVDSData = SiS_CHTVONTSCData;        break;
+      	case 12:  LVDSData = SiS_CHTVUPALData;         break;
+      	case 13:  LVDSData = SiS_CHTVOPALData;         break;
+      	case 14:  LVDSData = SiS_LVDS320x480Data_1;    break;
+	case 15:  LVDSData = SiS_LVDS1024x600Data_1;   break;  /* TW: New */
+	case 16:  LVDSData = SiS_LVDS1152x768Data_1;   break;  /* TW: New */
+	case 17:  LVDSData = SiS_LVDS1024x600Data_2;   break;  /* TW: New */
+	case 18:  LVDSData = SiS_LVDS1152x768Data_2;   break;  /* TW: New */
+     }
+   }
+
+   SiS_VGAHT = (LVDSData+ResIndex)->VGAHT;
+   SiS_VGAVT = (LVDSData+ResIndex)->VGAVT;
+   SiS_HT = (LVDSData+ResIndex)->LCDHT;
+   SiS_VT = (LVDSData+ResIndex)->LCDVT;
+
+  if( (SiS_IF_DEF_LVDS == 0) && (SiS_VBType & VB_SIS301BLV302BLV)) {
+
+    if(!(SiS_LCDInfo & LCDNonExpanding)){
+         if(SiS_LCDResInfo == Panel1024x768){
+           SiS_HDE = 1024;
+           SiS_VDE = 768;
+         } else if(SiS_LCDResInfo == Panel1280x1024){
+           SiS_HDE = 1280;
+           SiS_VDE = 1024;
+         } else {
+	   SiS_HDE = 1280;
+	   SiS_VDE = 960;
+	 }
+    }
+
+  } else {
+
+    if(SiS_IF_DEF_TRUMPION == 0) {
+      if((SiS_VBInfo & SetCRT2ToLCD) && (!(SiS_LCDInfo & 0x0100))) {
+        if(SiS_LCDResInfo != Panel640x480) {
+          if((!(SiS_LCDInfo & LCDNonExpanding)) || (SiS_SetFlag & CRT2IsVGA)) {
+            if(SiS_LCDResInfo == Panel800x600) {
+              SiS_HDE = 800;
+              SiS_VDE = 600;
+            } else if(SiS_LCDResInfo == Panel1024x768) {
+              SiS_HDE = 1024;
+              SiS_VDE = 768;
+            } else if(SiS_LCDResInfo == Panel1280x1024) {
+              SiS_HDE = 1280;
+              SiS_VDE = 1024;
+            } else if(SiS_LCDResInfo == Panel1024x600){
+	      SiS_HDE = 1024;
+              SiS_VDE = 600;
+	    } else if(SiS_LCDResInfo == Panel1400x1050){
+	      SiS_HDE = 1400;
+              SiS_VDE = 1050;
+	    } else {
+	      SiS_HDE = 1152;
+	      SiS_VDE = 768;
+	    }
+            if(SiS_IF_DEF_FSTN) {
+              SiS_HDE = 320;
+              SiS_VDE = 480;
+            }
+          }
+        }
+      }
+    }
+  }
 }
 
+/* TW: Checked against 630/301B BIOS; does not check VDE values for LCD */
 void
-SiS_GetCRT2Data301 (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		    USHORT RefreshRateTableIndex)
+SiS_GetCRT2Data301(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                        USHORT RefreshRateTableIndex,
+			PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempax, tempbx, modeflag;
-	USHORT resinfo;
-	USHORT CRT2Index, ResIndex;
-	SiS_LCDDataStruct *LCDPtr = NULL;
-	SiS_TVDataStruct *TVPtr = NULL;
-
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-		resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-	}
-	SiS_NewFlickerMode = 0;
-	SiS_RVBHRS = 50;
-	SiS_RY1COE = 0;
-	SiS_RY2COE = 0;
-	SiS_RY3COE = 0;
-	SiS_RY4COE = 0;
-
-	SiS_GetCRT2ResInfo (ROMAddr, ModeNo, ModeIdIndex);
-	if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-		SiS_GetRAMDAC2DATA (ROMAddr, ModeNo, ModeIdIndex,
-				    RefreshRateTableIndex);
-		return;
-	}
-
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		SiS_GetCRT2Ptr (ROMAddr, ModeNo, ModeIdIndex,
-				RefreshRateTableIndex, &CRT2Index, &ResIndex);
-		switch (CRT2Index) {
-		case 2:
-			TVPtr = SiS_ExtHiTVData;
-			break;
-		case 3:
-			TVPtr = SiS_ExtPALData;
-			break;
-		case 4:
-			TVPtr = SiS_ExtNTSCData;
-			break;
-		case 7:
-			TVPtr = SiS_St1HiTVData;
-			break;
-		case 8:
-			TVPtr = SiS_StPALData;
-			break;
-		case 9:
-			TVPtr = SiS_StNTSCData;
-			break;
-		case 12:
-			TVPtr = SiS_St2HiTVData;
-			break;
-		}
-
-		SiS_RVBHCMAX = (TVPtr + ResIndex)->RVBHCMAX;
-		SiS_RVBHCFACT = (TVPtr + ResIndex)->RVBHCFACT;
-		SiS_VGAHT = (TVPtr + ResIndex)->VGAHT;
-		SiS_VGAVT = (TVPtr + ResIndex)->VGAVT;
-		SiS_HDE = (TVPtr + ResIndex)->TVHDE;
-		SiS_VDE = (TVPtr + ResIndex)->TVVDE;
-		SiS_RVBHRS = (TVPtr + ResIndex)->RVBHRS;
-		SiS_NewFlickerMode = (TVPtr + ResIndex)->FlickerMode;
-		if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-			if (resinfo == 0x08)
-				SiS_NewFlickerMode = 0x40;
-			if (resinfo == 0x09)
-				SiS_NewFlickerMode = 0x40;
-			if (resinfo == 0x10)
-				SiS_NewFlickerMode = 0x40;
-		}
-		if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-			if (SiS_VGAVDE == 350)
-				SiS_SetFlag = SiS_SetFlag | TVSimuMode;
-			tempax = ExtHiTVHT;
-			tempbx = ExtHiTVVT;
-			if (SiS_VBInfo & SetInSlaveMode) {
-				if (SiS_SetFlag & TVSimuMode) {
-					tempax = StHiTVHT;
-					tempbx = StHiTVVT;
-					if (!(modeflag & Charx8Dot)) {
-						tempax = StHiTextTVHT;
-						tempbx = StHiTextTVVT;
-					}
-				}
-			}
-		}
-		if (!(SiS_VBInfo & SetCRT2ToHiVisionTV)) {
-			SiS_RY1COE = (TVPtr + ResIndex)->RY1COE;
-			SiS_RY2COE = (TVPtr + ResIndex)->RY2COE;
-			if (modeflag & HalfDCLK) {
-				SiS_RY1COE = 0x00;
-				SiS_RY2COE = 0xf4;
-			}
-			SiS_RY3COE = (TVPtr + ResIndex)->RY3COE;
-			SiS_RY4COE = (TVPtr + ResIndex)->RY4COE;
-			if (modeflag & HalfDCLK) {
-				SiS_RY3COE = 0x10;
-				SiS_RY4COE = 0x38;
-			}
-			if (!(SiS_VBInfo & SetPALTV)) {
-				tempax = NTSCHT;
-				tempbx = NTSCVT;
-			} else {
-				tempax = PALHT;
-				tempbx = PALVT;
-			}
-		}
-		SiS_HT = tempax;
-		SiS_VT = tempbx;
-		return;
-	}
-
-	if (SiS_VBInfo & SetCRT2ToLCD) {
-		SiS_GetCRT2Ptr (ROMAddr, ModeNo, ModeIdIndex,
-				RefreshRateTableIndex, &CRT2Index, &ResIndex);
-		switch (CRT2Index) {
-		case 0:
-			LCDPtr = SiS_ExtLCD1024x768Data;
-			break;
-		case 1:
-			LCDPtr = SiS_ExtLCD1280x1024Data;
-			break;
-		case 5:
-			LCDPtr = SiS_StLCD1024x768Data;
-			break;
-		case 6:
-			LCDPtr = SiS_StLCD1280x1024Data;
-			break;
-		case 10:
-			LCDPtr = SiS_St2LCD1024x768Data;
-			break;
-		case 11:
-			LCDPtr = SiS_St2LCD1280x1024Data;
-			break;
-		case 13:
-			LCDPtr = SiS_NoScaleData;
-			break;
-		case 14:
-			LCDPtr = SiS_LCD1280x960Data;
-			break;
-		}
-
-		SiS_RVBHCMAX = (LCDPtr + ResIndex)->RVBHCMAX;
-		SiS_RVBHCFACT = (LCDPtr + ResIndex)->RVBHCFACT;
-		SiS_VGAHT = (LCDPtr + ResIndex)->VGAHT;
-		SiS_VGAVT = (LCDPtr + ResIndex)->VGAVT;
-		SiS_HT = (LCDPtr + ResIndex)->LCDHT;
-		SiS_VT = (LCDPtr + ResIndex)->LCDVT;
-		tempax = 1024;
-		if (SiS_SetFlag & LCDVESATiming) {
-			if (SiS_VGAVDE == 350)
-				tempbx = 560;
-			else if (SiS_VGAVDE == 400)
-				tempbx = 640;
-			else
-				tempbx = 768;
-		} else {
-			if (SiS_VGAVDE == 357)
-				tempbx = 527;
-			else if (SiS_VGAVDE == 420)
-				tempbx = 620;
-			else if (SiS_VGAVDE == 525)
-				tempbx = 775;
-			else if (SiS_VGAVDE == 600)
-				tempbx = 775;
-			else if (SiS_VGAVDE == 350)
-				tempbx = 560;
-			else if (SiS_VGAVDE == 400)
-				tempbx = 640;
-			else
-				tempbx = 768;
-		}
-		if (SiS_LCDResInfo == Panel1280x1024) {
-			tempax = 1280;
-			if (SiS_VGAVDE == 360)
-				tempbx = 768;
-			else if (SiS_VGAVDE == 375)
-				tempbx = 800;
-			else if (SiS_VGAVDE == 405)
-				tempbx = 864;
-			else
-				tempbx = 1024;
-		}
-		if (SiS_LCDResInfo == Panel1280x960) {
-			tempax = 1280;
-			if (SiS_VGAVDE == 350)
-				tempbx = 700;
-			else if (SiS_VGAVDE == 400)
-				tempbx = 800;
-			else if (SiS_VGAVDE == 1024)
-				tempbx = 960;
-			else
-				tempbx = 960;
-		}
-		if (SiS_LCDInfo & LCDNonExpanding) {
-			tempax = SiS_VGAHDE;
-			tempbx = SiS_VGAVDE;
-		}
-		SiS_HDE = tempax;
-		SiS_VDE = tempbx;
-		return;
-	}
+  USHORT tempax,tempbx,modeflag;
+  USHORT resinfo;
+  USHORT CRT2Index,ResIndex;
+  SiS_LCDDataStruct *LCDPtr=NULL;
+  SiS_TVDataStruct  *TVPtr=NULL;
+
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  }
+  SiS_NewFlickerMode = 0;
+  SiS_RVBHRS = 50;
+  SiS_RY1COE = 0;
+  SiS_RY2COE = 0;
+  SiS_RY3COE = 0;
+  SiS_RY4COE = 0;
+
+  SiS_GetCRT2ResInfo(ROMAddr,ModeNo,ModeIdIndex,HwDeviceExtension);
+
+  /* TW: For VGA2 ("RAMDAC2") */
+
+  if(SiS_VBInfo & SetCRT2ToRAMDAC){
+     SiS_GetRAMDAC2DATA(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                        HwDeviceExtension);
+     return;
+  }
+
+  /* TW: For TV */
+
+  if(SiS_VBInfo & SetCRT2ToTV) {
+
+    SiS_GetCRT2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                   &CRT2Index,&ResIndex,HwDeviceExtension);
+
+    switch (CRT2Index) {
+      case  2:  TVPtr = SiS_ExtHiTVData;   break;
+      case  3:  TVPtr = SiS_ExtPALData;    break;
+      case  4:  TVPtr = SiS_ExtNTSCData;   break;
+      case  7:  TVPtr = SiS_St1HiTVData;   break;
+      case  8:  TVPtr = SiS_StPALData;     break;
+      case  9:  TVPtr = SiS_StNTSCData;    break;
+      case 12:  TVPtr = SiS_St2HiTVData;   break;
+      default:  TVPtr = SiS_StPALData;     break;  /* TW: Just to avoid a crash */
+    }
+
+    SiS_RVBHCMAX  = (TVPtr+ResIndex)->RVBHCMAX;
+    SiS_RVBHCFACT = (TVPtr+ResIndex)->RVBHCFACT;
+    SiS_VGAHT     = (TVPtr+ResIndex)->VGAHT;
+    SiS_VGAVT     = (TVPtr+ResIndex)->VGAVT;
+    SiS_HDE       = (TVPtr+ResIndex)->TVHDE;
+    SiS_VDE       = (TVPtr+ResIndex)->TVVDE;
+    SiS_RVBHRS    = (TVPtr+ResIndex)->RVBHRS;
+    SiS_NewFlickerMode = (TVPtr+ResIndex)->FlickerMode;
+
+    if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+
+      	if(resinfo == 0x08) SiS_NewFlickerMode = 0x40;
+      	if(resinfo == 0x09) SiS_NewFlickerMode = 0x40;
+	if(resinfo == 0x12) SiS_NewFlickerMode = 0x40;   /* TW: Was resinfo == 0x10 */
+
+        if(SiS_VGAVDE == 350) SiS_SetFlag |= TVSimuMode;
+
+        SiS_HT = ExtHiTVHT;
+        SiS_VT = ExtHiTVVT;
+        if(SiS_VBInfo & SetInSlaveMode) {
+          if(SiS_SetFlag & TVSimuMode) {
+            SiS_HT = StHiTVHT;
+            SiS_VT = StHiTVVT;
+            if(!(modeflag & Charx8Dot)){
+              SiS_HT = StHiTextTVHT;
+              SiS_VT = StHiTextTVVT;
+            }
+          }
+        }
+
+    } else {
+
+      SiS_RY1COE = (TVPtr+ResIndex)->RY1COE;
+      SiS_RY2COE = (TVPtr+ResIndex)->RY2COE;
+      SiS_RY3COE = (TVPtr+ResIndex)->RY3COE;
+      SiS_RY4COE = (TVPtr+ResIndex)->RY4COE;
+
+      if(modeflag & HalfDCLK) {
+         SiS_RY1COE = 0x00;
+         SiS_RY2COE = 0xf4;
+         SiS_RY3COE = 0x10;
+         SiS_RY4COE = 0x38;
+      }
+
+      if(!(SiS_VBInfo & SetPALTV)){
+        SiS_HT = NTSCHT;
+	if((ModeNo == 0x4a) || (ModeNo == 0x38)) SiS_HT = NTSC2HT;
+        SiS_VT = NTSCVT;
+      } else {
+        SiS_HT = PALHT;
+        SiS_VT = PALVT;
+      }
+
+    }
+
+    return;
+  }
+
+  /* TW: For LCD */
+  /* TW: Checked against 650/301LV; CRT2Index different (but does not matter) */
+
+  if(SiS_VBInfo & SetCRT2ToLCD) {
+
+    SiS_GetCRT2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                   &CRT2Index,&ResIndex,HwDeviceExtension);
+
+    switch (CRT2Index) {
+      case  0: LCDPtr = SiS_ExtLCD1024x768Data;        break; /* VESA Timing */
+      case  1: LCDPtr = SiS_ExtLCD1280x1024Data;       break; /* VESA Timing */
+      case  5: LCDPtr = SiS_StLCD1024x768Data;         break; /* Obviously unused */
+      case  6: LCDPtr = SiS_StLCD1280x1024Data;        break; /* Obviously unused */
+      case 10: LCDPtr = SiS_St2LCD1024x768Data;        break; /* Non-VESA Timing */
+      case 11: LCDPtr = SiS_St2LCD1280x1024Data;       break; /* Non-VESA Timing */
+      case 13: LCDPtr = SiS_NoScaleData1024x768;       break; /* Non-expanding */
+      case 14: LCDPtr = SiS_NoScaleData1280x1024;      break; /* Non-expanding */
+      case 15: LCDPtr = SiS_LCD1280x960Data;           break; /* 1280x960 */
+      default: LCDPtr = SiS_ExtLCD1024x768Data;	       break; /* Just to avoid a crash */
+    }
+
+    SiS_RVBHCMAX  = (LCDPtr+ResIndex)->RVBHCMAX;
+    SiS_RVBHCFACT = (LCDPtr+ResIndex)->RVBHCFACT;
+    SiS_VGAHT     = (LCDPtr+ResIndex)->VGAHT;
+    SiS_VGAVT     = (LCDPtr+ResIndex)->VGAVT;
+    SiS_HT        = (LCDPtr+ResIndex)->LCDHT;
+    SiS_VT        = (LCDPtr+ResIndex)->LCDVT;
+
+    tempax = 1024;
+    if(SiS_SetFlag & LCDVESATiming) {
+      if     (SiS_VGAVDE == 350) tempbx = 560;
+      else if(SiS_VGAVDE == 400) tempbx = 640;
+      else                       tempbx = 768;
+    } else {
+      if     (SiS_VGAVDE == 357) tempbx = 527;
+      else if(SiS_VGAVDE == 420) tempbx = 620;
+      else if(SiS_VGAVDE == 525) tempbx = 775;
+      else if(SiS_VGAVDE == 600) tempbx = 775;
+      else if(SiS_VGAVDE == 350) tempbx = 560;
+      else if(SiS_VGAVDE == 400) tempbx = 640;
+      else                       tempbx = 768;
+    }
+    if(SiS_LCDResInfo == Panel1280x1024){
+      tempax = 1280;
+      if     (SiS_VGAVDE == 360) tempbx = 768;
+      else if(SiS_VGAVDE == 375) tempbx = 800;
+      else if(SiS_VGAVDE == 405) tempbx = 864;
+      else                       tempbx = 1024;
+    }
+    if(SiS_LCDResInfo == Panel1280x960){
+      tempax = 1280;
+      if     (SiS_VGAVDE == 350)  tempbx = 700;
+      else if(SiS_VGAVDE == 400)  tempbx = 800;
+      else if(SiS_VGAVDE == 1024) tempbx = 960;
+      else                        tempbx = 960;
+    }
+    if(SiS_LCDInfo & LCDNonExpanding) {
+       tempax = SiS_VGAHDE;
+       tempbx = SiS_VGAVDE;
+    }
+    SiS_HDE = tempax;
+    SiS_VDE = tempbx;
+    return;
+  }
 }
 
 USHORT
-SiS_GetResInfo (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+SiS_GetResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT resindex;
+  USHORT resindex;
 
-	if (ModeNo <= 0x13) {
-		resindex = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;	/* si+St_ResInfo */
-	} else {
-		resindex = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;	/* si+Ext_ResInfo */
-	}
-	return (resindex);
+  if(ModeNo<=0x13)
+    	resindex=SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+  else
+    	resindex=SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+
+  return(resindex);
 }
 
+/* TW: Checked against 650/301LV, 650/LVDS, 630/LVDS, 630/301 and 630/301B BIOS */
 void
-SiS_GetCRT2ResInfo (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+SiS_GetCRT2ResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT xres, yres, modeflag, resindex;
-
-	resindex = SiS_GetResInfo (ROMAddr, ModeNo, ModeIdIndex);
-	if (ModeNo <= 0x13) {
-		xres = SiS_StResInfo[resindex].HTotal;
-		yres = SiS_StResInfo[resindex].VTotal;
+  USHORT xres,yres,modeflag=0,resindex;
+
+  resindex = SiS_GetResInfo(ROMAddr,ModeNo,ModeIdIndex);
+
+  if(ModeNo <= 0x13) {
+    	xres = SiS_StResInfo[resindex].HTotal;
+    	yres = SiS_StResInfo[resindex].VTotal;
+  } else {
+	xres = SiS_ModeResInfo[resindex].HTotal;
+    	yres = SiS_ModeResInfo[resindex].VTotal;
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  }
+
+  /* TW: Inserted entire if-section from 650/LVDS BIOS 1.10.07: */
+  if((HwDeviceExtension->jChipType >= SIS_315H) && (SiS_IF_DEF_LVDS == 1)) {
+      if((ModeNo != 0x03) && (SiS_SetFlag & CRT2IsVGA)) {
+          if(yres == 350) yres = 400;
+      }
+      if(SiS_GetReg1(SiS_P3d4,0x3a) & 0x01) {
+ 	  if(SiS_GetReg1(SiS_P3d4,0x34) == 0x12)
+	      yres = 400;
+      }
+  }
+
+  if(ModeNo > 0x13) {
+      if(SiS_IF_DEF_FSTN == 1){
+            xres *= 2;
+            yres *= 2;
+      } else {
+  	    if(modeflag & HalfDCLK)       xres *= 2;
+  	    if(modeflag & DoubleScanMode) yres *= 2;
+      }
+  }
+
+  if(SiS_IF_DEF_LVDS == 0) {
+        /* TW: Inserted from 650/301LV BIOS */
+        if(SiS_VBInfo & SetCRT2ToLCDA) {
+                if(xres == 720) xres = 640;
 	} else {
-		xres = SiS_ModeResInfo[resindex].HTotal;	/* xres->ax */
-		yres = SiS_ModeResInfo[resindex].VTotal;	/* yres->bx */
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+St_ModeFlag */
-		if (modeflag & HalfDCLK) {
-			xres = xres * 2;
-		}
-		if (modeflag & DoubleScanMode) {
-			yres = yres * 2;
-		}
-	}
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (SiS_LCDResInfo == Panel1280x1024) {
-			if (yres == 400)
-				yres = 405;
-			if (yres == 350)
-				yres = 360;
-			if (SiS_SetFlag & LCDVESATiming) {
-				if (yres == 360)
-					yres = 375;
-			}
-		}
-		if (SiS_LCDResInfo == Panel1024x768) {
-			if (!(SiS_SetFlag & LCDVESATiming)) {
-				if (!(SiS_LCDInfo & LCDNonExpanding)) {
-					if (yres == 350)
-						yres = 357;
-					if (yres == 400)
-						yres = 420;
-/*          if(!OldBios)             */
-					if (yres == 480)
-						yres = 525;
-				}
-			}
-		}
-	} else {
-		if (xres == 720)
-			xres = 640;
-	}
-	SiS_VGAHDE = xres;
-	SiS_HDE = xres;
-	SiS_VGAVDE = yres;
-	SiS_VDE = yres;
+	   if(xres == 720) xres = 640;
+    	   if(SiS_LCDResInfo == Panel1280x1024) {
+      		if(yres == 400) yres = 405;
+      		if(yres == 350) yres = 360;
+      		if(SiS_SetFlag & LCDVESATiming) {
+        		if(yres == 360) yres = 375;
+      		}
+   	   }
+    	   if(SiS_LCDResInfo == Panel1024x768){
+      		if(!(SiS_SetFlag & LCDVESATiming)) {
+        		if(!(SiS_LCDInfo & LCDNonExpanding)) {
+          			if(yres == 350) yres = 357;
+          			if(yres == 400) yres = 420;
+            			if(yres == 480) yres = 525;
+        		}
+      		}
+    	   }
+	   /* TW: Inserted for 630/301B */
+	   if(HwDeviceExtension->jChipType < SIS_315H) {
+	      if(SiS_VBType & VB_SIS301BLV302BLV) {
+                  if(xres == 720) xres = 640;
+	      }
+	   }
+	}
+  } else {
+    	if(xres == 720) xres = 640;
+	/* TW: Inserted from 650/LVDS and 630/LVDS BIOS */
+	if(SiS_SetFlag & CRT2IsVGA) {
+	      yres = 400;
+	      if(HwDeviceExtension->jChipType >= SIS_315H) {
+	          if(SiS_GetReg1(SiS_P3c4,0x17) & 0x80) yres = 480;
+	      } else {
+	          if(SiS_GetReg1(SiS_P3c4,0x13) & 0x80) yres = 480;
+	      }
+	}
+  }
+  SiS_VGAHDE = SiS_HDE = xres;
+  SiS_VGAVDE = SiS_VDE = yres;
 }
 
+/* TW: Checked against 650/301 and 650/LVDS (1.10.07) BIOS; modified for new panel resolutions */
+/* TW: Done differently in 630/301B BIOS; but same effect; checked against 630/301 */
 void
-SiS_GetCRT2Ptr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		USHORT RefreshRateTableIndex, USHORT * CRT2Index,
-		USHORT * ResIndex)
+SiS_GetCRT2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+	       USHORT RefreshRateTableIndex,USHORT *CRT2Index,USHORT *ResIndex,
+	       PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempbx, tempal;
-	USHORT Flag;
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (SiS_VBInfo & SetCRT2ToLCD) {	/* LCD */
-			tempbx = SiS_LCDResInfo;
-			tempbx = tempbx - Panel1024x768;
-			if (!(SiS_SetFlag & LCDVESATiming)) {
-				tempbx += 5;
-/*      GetRevisionID();  */
-				tempbx += 5;
-			}
-		} else {
-			if (SiS_VBInfo & SetCRT2ToHiVisionTV) {	/* TV */
-				if (SiS_VGAVDE > 480)
-					SiS_SetFlag =
-					    SiS_SetFlag & (!TVSimuMode);
-				tempbx = 2;
-				if (SiS_VBInfo & SetInSlaveMode) {
-					if (!(SiS_SetFlag & TVSimuMode))
-						tempbx = 10;
-				}
-			} else {
-				if (SiS_VBInfo & SetPALTV) {
-					tempbx = 3;
-				} else {
-					tempbx = 4;
-				}
-				if (SiS_SetFlag & TVSimuMode) {
-					tempbx = tempbx + 5;
-				}
-			}
-		}
-		if (ModeNo <= 0x13) {
-			tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  USHORT tempbx=0,tempal=0;
+  USHORT Flag,resinfo=0;
+
+  if(SiS_IF_DEF_LVDS == 0) {
+    	if(SiS_VBInfo & SetCRT2ToLCD){                            /* LCD */
+	        if(SiS_LCDResInfo == Panel1280x960)  tempbx = 14;
+		else if(SiS_LCDInfo & LCDNonExpanding) {
+			tempbx = 13;
+			if(SiS_LCDResInfo == Panel1280x1024) tempbx++;
 		} else {
-			tempal =
-			    SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-		}
-		tempal = tempal & 0x3F;
-		/*301b */
-		if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-		    && (SiS_VBInfo & SetCRT2ToTV)) {
-			/*look */
-			if (tempal == 0x06)
-				tempal = 0x07;
-
-		}
-		/*end 301b */
-		if ((0x31 <= ModeNo) && (ModeNo <= 0x35))
-			tempal = 6;
-		if (SiS_LCDInfo & LCDNonExpanding)
-			tempbx = 0x0D;
-		if (SiS_LCDResInfo == Panel1280x960)
-			tempbx = 0x0E;
-		*CRT2Index = tempbx;
-		*ResIndex = tempal;
-	} else {		/* LVDS */
-		Flag = 1;
-		tempbx = 0;
-		if (SiS_IF_DEF_CH7005 == 1) {
-			if (!(SiS_VBInfo & SetCRT2ToLCD)) {
-				Flag = 0;
-				tempbx = 7;
-				if (SiS_VBInfo & SetPALTV)
-					tempbx = tempbx + 2;
-				if (SiS_VBInfo & SetCHTVOverScan)
-					tempbx = tempbx + 1;
-			}
-		}
-		if (Flag == 1) {
-			tempbx = SiS_LCDResInfo - Panel800x600;
-			if (SiS_LCDInfo & LCDNonExpanding) {
-				tempbx = tempbx + 3;
-			}
-		}
-		if (ModeNo <= 0x13) {
-			tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+      		   tempbx = SiS_LCDResInfo - Panel1024x768;
+      		   if(!(SiS_SetFlag & LCDVESATiming)) {
+        		tempbx += 5;
+                        /* GetRevisionID();  */
+			/* TW: BIOS only adds 5 once */
+        		tempbx += 5;
+       		   }
+	        }
+     	} else {						/* TV */
+       		if(SiS_VBInfo & SetCRT2ToHiVisionTV){
+         		if(SiS_VGAVDE > 480) SiS_SetFlag &= (~TVSimuMode); /* TW: Was "(!TVSimuMode)" - WRONG */
+         		tempbx = 2;
+         		if(SiS_VBInfo & SetInSlaveMode) {
+            			if(!(SiS_SetFlag & TVSimuMode)) tempbx = 12;  /* TW: Was 10! - WRONG */
+         		}
+       		} else {
+         		if(SiS_VBInfo & SetPALTV) tempbx = 3;
+         		else tempbx = 4;
+         		if(SiS_SetFlag & TVSimuMode) tempbx += 5;
+       		}
+     	}
+
+     	if(ModeNo <= 0x13)
+       		tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+     	else
+       		tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+
+     	tempal &= 0x3F;
+
+      	if((SiS_VBType & VB_SIS301BLV302BLV)
+                     && (SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV))) {  /* TW: Added -Hivision (BIOS) */
+      		if(tempal == 0x06) tempal = 0x07;
+        }
+
+        if(SiS_VBInfo & SetCRT2ToTV) {
+            if((ModeNo == 0x31) || (ModeNo == 0x32)) tempal = 6;
+	}
+
+     	*CRT2Index = tempbx;
+     	*ResIndex = tempal;
+
+  } else {   /* LVDS */
+
+    	Flag = 1;
+    	tempbx = 0;
+    	if(SiS_IF_DEF_CH70xx != 0) {
+      		if(!(SiS_VBInfo & SetCRT2ToLCD)) {
+        		Flag = 0;
+        		tempbx = 10;
+        		if(SiS_VBInfo & SetPALTV)        tempbx += 2;
+        		if(SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+      		}
+    	}
+
+    	if(Flag == 1) {
+      		tempbx = SiS_LCDResInfo - PanelMinLVDS;
+		if(SiS_LCDResInfo <= Panel1280x1024) {
+   	      	    if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 3;
 		} else {
-			tempal =
-			    SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-		}
-		tempal = tempal & 0x1F;
-		*CRT2Index = tempbx;
-		*ResIndex = tempal;
+		    if(SiS_LCDResInfo == Panel1400x1050) {
+			tempbx = 8;
+			if(SiS_LCDInfo & LCDNonExpanding)  tempbx++;
+		    }
+        	    if(SiS_LCDInfo & 0x0100) {
+			tempbx = 7;
+        	    }
+
+     		    if(SiS_LCDResInfo == Panel640x480)  tempbx = 6;
+
+		    /* TW: Inserted from 630/LVDS 2.04.5c BIOS */
+		    if(SiS_LCDResInfo == Panel1024x600) {
+			tempbx = 15;
+  		        if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 2;
+		    }
+		    if(SiS_LCDResInfo == Panel1152x768) {
+		        tempbx = 16;
+			if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 2;
+		    }
+		 }
+	}
+
+    	if(ModeNo <= 0x13)
+      		tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+    	else {
+      		tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
 	}
-}
 
-void
-SiS_GetCRT2PtrA (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		 USHORT RefreshRateTableIndex, USHORT * CRT2Index,
-		 USHORT * ResIndex)
-{
-	USHORT tempbx, tempal;
+	if(SiS_IF_DEF_FSTN){
+       	 	if(SiS_LCDResInfo == Panel320x480){
+         		tempbx = 14;
+         		tempal = 6;
+        	}
+    	}
+
+	/* TW: Inserted from 650/LVDS BIOS */
+	if(SiS_SetFlag & CRT2IsVGA) {
+	        if(SiS_LCDResInfo != Panel640x480) tempal = 7;
+		if(HwDeviceExtension->jChipType < SIS_315H) {
+		    /* TW: Inserted from 630/LVDS (2.04.5c) and 630/301B (II) BIOS */
+		    if(SiS_GetReg1(SiS_P3c4,0x13) & 0x80) tempal++;
+		}
 
-	tempbx = SiS_LCDResInfo - Panel1024x768;
-	if (SiS_LCDInfo & LCDNonExpanding) {
-		tempbx = tempbx + 3;
 	}
-	if (ModeNo <= 0x13) {
-		tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-	} else {
-		tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+
+	/* TW: Inserted from 630/301B BIOS */
+	if(SiS_VBType & VB_SIS301BLV302BLV) {
+	    if(ModeNo > 0x13) {
+	        if((resinfo == 0x0c) || (resinfo == 0x0d))
+		    tempal = 6;
+	    }
 	}
-	tempal = tempal & 0x1F;
-	*CRT2Index = tempbx;
-	*ResIndex = tempal;
-}
 
-/*end 301b*/
+    	*CRT2Index = tempbx;
+    	*ResIndex = tempal & 0x1F;
+  }
+}
 
-USHORT
-SiS_GetRatePtrCRT2 (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+void
+SiS_GetCRT2PtrA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		USHORT RefreshRateTableIndex,USHORT *CRT2Index,
+		USHORT *ResIndex)
 {
-	SHORT LCDRefreshIndex[] = { 0x00, 0x00, 0x03, 0x01 };
-	SHORT LCDARefreshIndex[] = { 0x00, 0x00, 0x03, 0x01, 0x01, 0x01, 0x01 };
-	USHORT RefreshRateTableIndex, i;
-	USHORT modeflag, index, temp;
+  USHORT tempbx,tempal;
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-	}
+  tempbx = SiS_LCDResInfo - Panel1024x768;
 
-	if (SiS_IF_DEF_CH7005 == 1) {
-		if (SiS_VBInfo & SetCRT2ToTV) {
-			if (modeflag & HalfDCLK)
-				return (0);
-		}
-	}
-	if (ModeNo < 0x14)
-		return (0xFFFF);
-	index = SiS_GetReg1 (SiS_P3d4, 0x33);
-	index = index >> SiS_SelectCRT2Rate;
-	index = index & 0x0F;
-	if (SiS_LCDInfo & LCDNonExpanding)
-		index = 0;
-	if (index > 0)
-		index--;
-
-	if (SiS_SetFlag & ProgrammingCRT2) {
-		if (SiS_IF_DEF_CH7005 == 1) {
-			if (SiS_VBInfo & SetCRT2ToTV) {
-				index = 0;
-			}
-		}
-		if (SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
-			if (SiS_IF_DEF_LVDS == 0) {
-				if ((SiS_VBType & VB_SIS301B)
-				    || (SiS_VBType & VB_SIS302B)) temp =
-					    LCDARefreshIndex[SiS_LCDResInfo];	/*301b */
-				else
-					temp = LCDRefreshIndex[SiS_LCDResInfo];
-				if (index > temp) {
-					index = temp;
-				}
-			} else {
-				index = 0;
-			}
-		}
-	}
+  if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 3;
 
-	RefreshRateTableIndex = SiS_EModeIDTable[ModeIdIndex].REFindex;
-	ModeNo = SiS_RefIndex[RefreshRateTableIndex].ModeID;
-	i = 0;
-	do {
-		if (SiS_RefIndex[RefreshRateTableIndex + i].ModeID != ModeNo)
-			break;
-		temp = SiS_RefIndex[RefreshRateTableIndex + i].Ext_InfoFlag;
-		temp = temp & ModeInfoFlag;
-		if (temp < SiS_ModeType)
-			break;
-
-		i++;
-		index--;
-	} while (index != 0xFFFF);
-
-	if (!(SiS_VBInfo & SetCRT2ToRAMDAC)) {
-		if (SiS_VBInfo & SetInSlaveMode) {
-			temp =
-			    SiS_RefIndex[RefreshRateTableIndex + i -
-					 1].Ext_InfoFlag;
-			if (temp & InterlaceMode) {
-				i++;
-			}
-		}
-	}
+  if(ModeNo <= 0x13)
+      	tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  else
+      	tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
 
-	i--;
-	if ((SiS_SetFlag & ProgrammingCRT2)) {
-		temp =
-		    SiS_AjustCRT2Rate (ROMAddr, ModeNo, ModeIdIndex,
-				       RefreshRateTableIndex, &i);
-	}
-	return (RefreshRateTableIndex + i);	/*return(0x01|(temp1<<1));   */
+  *CRT2Index = tempbx;
+  *ResIndex = tempal & 0x1F;
 }
 
-BOOLEAN
-SiS_AjustCRT2Rate (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		   USHORT RefreshRateTableIndex, USHORT * i)
+/* TW: New from 650/301LV BIOS */
+void
+SiS_GetCRT2Part2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		    USHORT RefreshRateTableIndex,USHORT *CRT2Index,
+		    USHORT *ResIndex)
 {
-	USHORT tempax, tempbx, resinfo;
-	USHORT modeflag, infoflag;
+  USHORT tempbx,tempal;
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ModeFlag */
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-	}
+  if(ModeNo <= 0x13)
+      	tempal = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  else
+      	tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
 
-	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-	tempbx = SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID;
-	tempax = 0;
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-			tempax = tempax | SupportRAMDAC2;
-		}
-		if (SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {	/*301b */
-			tempax = tempax | SupportLCD;
-			if (SiS_LCDResInfo != Panel1280x1024) {
-				if (SiS_LCDResInfo != Panel1280x960) {
-					if (SiS_LCDInfo & LCDNonExpanding) {
-						if (resinfo >= 9) {
-							tempax = 0;
-							return (0);
-						}
-					}
-				}
-			}
-		}
-		if (SiS_VBInfo & SetCRT2ToHiVisionTV) {	/* for HiTV */
-			tempax = tempax | SupportHiVisionTV;
-			if (SiS_VBInfo & SetInSlaveMode) {
-				if (resinfo == 4)
-					return (0);
-				if (resinfo == 3) {
-					if (SiS_SetFlag & TVSimuMode)
-						return (0);
-				}
-				if (resinfo > 7)
-					return (0);
-			}
-		} else {
-			if (SiS_VBInfo &
-			    (SetCRT2ToAVIDEO | SetCRT2ToSVIDEO |
-			     SetCRT2ToSCART)) {
-				tempax = tempax | SupportTV;
-				/*301b */
-				if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {	/*301b */
+  tempbx = SiS_LCDResInfo - Panel1024x768;
 
-					tempax = tempax | SupportTV1024;
+  if(SiS_LCDInfo & LCDNonExpanding)  tempbx += 2;
+  else if(SiS_SetFlag & LCDVESATiming) tempbx += 4;
 
-				}
-				/*end 301b */
-
-				if (!(SiS_VBInfo & SetPALTV)) {
-					if (modeflag & NoSupportSimuTV) {
-						if (SiS_VBInfo & SetInSlaveMode) {
-							if (!
-							    (SiS_VBInfo &
-							     SetNotSimuMode)) {
-								return 0;
-							}
-						}
-					}
-				}
-			}
-		}
-	} else {		/* for LVDS */
-		if (SiS_IF_DEF_CH7005 == 1) {
-			if (SiS_VBInfo & SetCRT2ToTV) {
-				tempax = tempax | SupportCHTV;
-			}
-		}
-		if (SiS_VBInfo & SetCRT2ToLCD) {
-			tempax = tempax | SupportLCD;
-			if (resinfo > 0x08)
-				return (0);	/*1024x768  */
-			if (SiS_LCDResInfo < Panel1024x768) {
-				if (resinfo > 0x07)
-					return (0);	/*800x600  */
-				if (resinfo == 0x04)
-					return (0);	/*512x384  */
-			}
-		}
-	}
+  *CRT2Index = tempbx;
+  *ResIndex = tempal & 0x3F;
+}
 
-	for (; SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID == tempbx;
-	     (*i)--) {
-		infoflag =
-		    SiS_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag;
-		if (infoflag & tempax) {
-			return (1);
-		}
-		if ((*i) == 0)
-			break;
-	}
+/* TW: Checked against 650/LVDS (1.10.07) and 630/301B BIOS */
+USHORT
+SiS_GetRatePtrCRT2(UCHAR *ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+{
+  SHORT  LCDRefreshIndex[] = { 0x00, 0x00, 0x03, 0x01,
+                               0x01, 0x01, 0x01, 0x01 };
+  USHORT RefreshRateTableIndex,i,backup_i;
+  USHORT modeflag,index,temp;
+
+  if (ModeNo <= 0x13)
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  else
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+
+  if(SiS_IF_DEF_CH70xx != 0) {
+    	if(SiS_VBInfo & SetCRT2ToTV) {
+      		if(modeflag & HalfDCLK) return(0);
+    	}
+  }
+
+  if(ModeNo < 0x14) return(0xFFFF);
+
+ /* TW: CR33 holds refresh rate index for CRT1 [3:0] and CRT2 [7:4].
+  *     On LVDS machines, CRT2 index is always 0 and will be
+  *     set to 0 by the following code; this causes the function
+  *     to take the first non-interlaced mode in SiS_Ext2Struct
+  */
+
+  index = SiS_GetReg1(SiS_P3d4,0x33);
+  index >>= SiS_SelectCRT2Rate;
+  index &= 0x0F;
+
+  if(index > 0) index--;
+
+  /* TW: Added SetFlag and VBInfo checks; we don't care about index if we
+   *     are setting CRT1 rate!
+   */
+  if( (SiS_SetFlag & ProgrammingCRT2) &&
+      (SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) )
+  	 index = 0;
+
+  if(SiS_SetFlag & ProgrammingCRT2) {
+    	if(SiS_IF_DEF_CH70xx != 0) {
+      		if(SiS_VBInfo & SetCRT2ToTV) {
+        		index = 0;
+      		}
+    	}
+    	if(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
+      		if(SiS_IF_DEF_LVDS == 0) {
+		        /* TW: This is not done in 630/301B BIOS */
+           		temp = LCDRefreshIndex[SiS_LCDResInfo];
+        		if(index > temp) index = temp;
+      		} else {
+        		index=0;
+      		}
+    	}
+  }
+
+  RefreshRateTableIndex = SiS_EModeIDTable[ModeIdIndex].REFindex;
+  ModeNo = SiS_RefIndex[RefreshRateTableIndex].ModeID;
+
+  /* TW: Inserted from 650/LVDS 1.10.07 */
+  if(SiS_IF_DEF_LVDS == 1) {
+    if(!(SiS_VBInfo & DriverMode)) {
+      if( (SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x105) ||
+          (SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x107) ) {
+            if(SiS_LCDResInfo <= Panel800x600)
+	       RefreshRateTableIndex++;
+      }
+    }
+  }
+
+  i = 0;
+  do {
+    	if (SiS_RefIndex[RefreshRateTableIndex+i].ModeID != ModeNo) break;
+    	temp = SiS_RefIndex[RefreshRateTableIndex+i].Ext_InfoFlag;
+    	temp &= ModeInfoFlag;
+    	if(temp < SiS_ModeType) break;
+    	i++;
+    	index--;
+  } while(index != 0xFFFF);
+
+  if(!(SiS_VBInfo & SetCRT2ToRAMDAC)) {
+    	if(SiS_VBInfo & SetInSlaveMode) {
+      		temp = SiS_RefIndex[RefreshRateTableIndex + i - 1].Ext_InfoFlag;
+      			if(temp & InterlaceMode) {
+        			i++;
+      			}
+    	}
+  }
+  i--;
+
+  if((SiS_SetFlag & ProgrammingCRT2) && (!(SiS_VBInfo & DisableCRT2Display))) {
+    	backup_i = i;
+    	if (!(SiS_AdjustCRT2Rate(ROMAddr,ModeNo,ModeIdIndex,
+	                             RefreshRateTableIndex,&i))) {
+		/* TW: This is for avoiding random data to be used; i is
+		 *     in an undefined state if no matching CRT2 mode is
+		 *     found.
+		 */
+		i = backup_i;
+	}
+  }
+
+  return(RefreshRateTableIndex + i);
+}
 
-	for ((*i) = 0;; (*i)++) {
-		infoflag =
-		    SiS_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag;
-		if (SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID != tempbx) {
-			return (0);
-		}
-		if (infoflag & tempax) {
-			return (1);
-		}
-	}
-	return (1);
+/* Checked against 650/LVDS (1.10.07) BIOS */
+BOOLEAN
+SiS_AdjustCRT2Rate(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   USHORT RefreshRateTableIndex,USHORT *i)
+{
+  USHORT tempax,tempbx,resinfo;
+  USHORT modeflag,infoflag;
+
+  if (ModeNo <= 0x13)
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  else
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+
+  resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  tempbx = SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID;
+
+  tempax = 0;
+  if(SiS_IF_DEF_LVDS == 0) {
+  	/* TW: For 301, 301B, 302B, 301LV, 302LV */
+    	if(SiS_VBInfo & SetCRT2ToRAMDAC) {
+      		tempax |= SupportRAMDAC2;
+    	}
+    	if(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
+      		tempax |= SupportLCD;
+      		if(SiS_LCDResInfo != Panel1280x1024) {
+        		if(SiS_LCDResInfo != Panel1280x960) {
+           			if(SiS_LCDInfo & LCDNonExpanding) {
+             				if(resinfo >= 9) {
+               					tempax = 0;
+               					return(0);
+             				}
+           			}
+        		}
+      		}
+    	}
+    	if(SiS_VBInfo & SetCRT2ToHiVisionTV) {    /* for HiTV */
+      		tempax |= SupportHiVisionTV;
+      		if(SiS_VBInfo & SetInSlaveMode){
+        		if(resinfo == 4) return(0);
+        		if(resinfo == 3) {
+          			if(SiS_SetFlag & TVSimuMode) return(0);
+        		}
+        		if(resinfo > 7) return(0);
+      		}
+    	} else {
+      		if(SiS_VBInfo & (SetCRT2ToAVIDEO|SetCRT2ToSVIDEO|SetCRT2ToSCART)) {
+        		tempax |= SupportTV;
+         		if(SiS_VBType & VB_SIS301BLV302BLV) {
+             			tempax |= SupportTV1024;
+         		}
+        		if(!(SiS_VBInfo & SetPALTV)) {
+          			if(modeflag & NoSupportSimuTV) {
+            				if(SiS_VBInfo & SetInSlaveMode) {
+              					if(!(SiS_VBInfo & SetNotSimuMode)) {
+                					return 0;
+              					}
+            				}
+          			}
+        		}
+      		}
+    	}
+  } else {
+  	/* TW: for LVDS  */
+    	if(SiS_IF_DEF_CH70xx != 0) {
+      		if(SiS_VBInfo & SetCRT2ToTV) {
+        		tempax |= SupportCHTV;
+      		}
+    	}
+    	if(SiS_VBInfo & SetCRT2ToLCD) {
+      		tempax |= SupportLCD;
+		if(SiS_LCDResInfo == Panel1280x768) {
+		     /* TW: Bios code makes no sense */
+		} else if(SiS_LCDResInfo == Panel1400x1050) {
+		     if((resinfo != 0x15) && (resinfo > 0x09)) return(0);
+		} else if(SiS_LCDResInfo == Panel1280x1024) {
+                     if(resinfo > 0x09) return(0);
+                } else if(SiS_LCDResInfo == Panel1024x768) {
+		     if(resinfo > 0x08) return(0);
+		} else if(SiS_LCDResInfo == Panel800x600){
+		     if(resinfo > 0x07) return(0);
+		     if(resinfo == 0x04) return(0);
+		}
+    	}
+  }
+  /* TW: Look backwards in table for matching CRT2 mode */
+  for(; SiS_RefIndex[RefreshRateTableIndex+(*i)].ModeID == tempbx; (*i)--) {
+     	infoflag = SiS_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag;
+     	if(infoflag & tempax) {
+       		return(1);
+     	}
+     	if ((*i) == 0) break;
+  }
+  /* TW: Look through the whole mode-section of the table from the beginning
+   *     for a matching CRT2 mode if no mode was found yet.
+   */
+  for((*i) = 0; ; (*i)++) {
+     	infoflag = SiS_RefIndex[RefreshRateTableIndex + (*i)].Ext_InfoFlag;
+     	if(SiS_RefIndex[RefreshRateTableIndex + (*i)].ModeID != tempbx) {
+       		return(0);
+     	}
+     	if(infoflag & tempax) {
+       		return(1);
+     	}
+  }
+  return(1);
 }
 
+/* Checked against 650/LVDS (1.10.07) and 650/301LV BIOS */
 void
-SiS_SaveCRT2Info (USHORT ModeNo)
+SiS_SaveCRT2Info(USHORT ModeNo)
 {
-	USHORT temp1, temp2;
+  USHORT temp1,temp2;
 
-	SiS_SetReg1 (SiS_P3d4, 0x34, ModeNo);	/* reserve CR34 for CRT1 Mode No */
-	temp1 = (SiS_VBInfo & SetInSlaveMode) >> 8;
-	temp2 = ~(SetInSlaveMode >> 8);
-	SiS_SetRegANDOR (SiS_P3d4, 0x31, temp2, temp1);
+  /* TW: We store CRT1 ModeNo in CR34 */
+  SiS_SetReg1(SiS_P3d4,0x34,ModeNo);
+  temp1 = (SiS_VBInfo & SetInSlaveMode) >> 8;
+  temp2 = ~(SetInSlaveMode >> 8);
+  SiS_SetRegANDOR(SiS_P3d4,0x31,temp2,temp1);
 }
 
+/* TW: Checked against 650+301, 650/LVDS (1.10.07) and 650/301LV BIOS */
 void
-SiS_GetVBInfo301 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		  USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetVBInfo301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                 USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempax, tempbx, temp;
-	USHORT modeflag;
-	UCHAR OutputSelect = *pSiS_OutputSelect;
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  USHORT tempax,tempbx,temp;
+  USHORT modeflag, resinfo=0;
+  UCHAR  OutputSelect = *pSiS_OutputSelect;
+
+  if (ModeNo<=0x13)
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  else {
+   	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  }
+
+  SiS_SetFlag = 0;
+
+  SiS_ModeType = modeflag & ModeInfoFlag;
+
+  tempbx = 0;
+  if(SiS_BridgeIsOn(BaseAddr,HwDeviceExtension) == 0) {              /* TW: "== 0" inserted from 630/301B BIOS */
+    	temp = SiS_GetReg1(SiS_P3d4,0x30);
+    	if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {               /* TW: Not in (301B) BIOS */
+       		temp &= 0xbf;   /* 301lvds disable CRT2RAMDAC */
+    	}
+    	if(SiS_IF_DEF_FSTN) {   /* fstn must set CR30=0x21 */
+       		temp = 0x21;
+       		SiS_SetReg1(SiS_P3d4,0x30,temp);
+    	}
+    	tempbx |= temp;
+    	temp = SiS_GetReg1(SiS_P3d4,0x31);
+	tempax = temp << 8;
+        tempax &= (LoadDACFlag | DriverMode | SetDispDevSwitch |        /* TW: Inserted from 650/LVDS+301LV BIOS */
+		         SetNotSimuMode | SetPALTV);                    /* TW: Inserted from 650/LVDS+301LV BIOS */
+    	tempbx |= tempax;
+    	temp = SetCHTVOverScan | SetInSlaveMode | DisableCRT2Display;
+   	temp = 0xFFFF ^ temp;
+    	tempbx &= temp;
+#ifdef SIS315H
+	if(HwDeviceExtension->jChipType >= SIS_315H) {       /* TW: Inserted this "if" */
+	   temp = SiS_GetReg1(SiS_P3d4,0x38);
+    	   if(SiS_VBType & (VB_SIS302B | VB_SIS302LV)) {
+       		if((temp & (EnableDualEdge | SetToLCDA))
+		          == (EnableDualEdge | SetToLCDA))   /* TW: BIOS only tests these bits, added "& ..." */
+          		tempbx |= SetCRT2ToLCDA;
+    	   }
+	   /* TW: Inserted from 650/LVDS BIOS: */
+	   if(SiS_IF_DEF_LVDS == 1) {
+	        if(temp & SetToLCDA)
+		        tempbx |= SetCRT2ToLCDA;
+	        if(temp & 0x08)
+		        tempbx |= SetCRT2ToHiVisionTV;
+	   }
 	}
-	SiS_SetFlag = 0;
-
-	SiS_ModeType = modeflag & ModeInfoFlag;
-	tempbx = 0;
-	if (SiS_BridgeIsOn (BaseAddr)) {
-		temp = SiS_GetReg1 (SiS_P3d4, 0x30);
-		tempbx = tempbx | temp;
-		temp = SiS_GetReg1 (SiS_P3d4, 0x31);
-		tempax = temp << 8;
-		tempbx = tempbx | tempax;
-		temp = SetCHTVOverScan | SetInSlaveMode | DisableCRT2Display;	/* ynlai */
-		temp = 0xFFFF ^ temp;
-		tempbx = tempbx & temp;
-#ifdef CONFIG_FB_SIS_315
-		/*301b */
-		if ((SiS_VBType & VB_SIS302B)) {
-			temp = SiS_GetReg1 (SiS_P3d4, 0x38);
-			if (temp == 0x03)
-				tempbx = tempbx | (SetCRT2ToLCDA);
-		}
-		/*end301b */
 #endif
-		if (SiS_IF_DEF_LVDS == 0) {
-			if (SiS_IF_DEF_HiVision)
-				temp = 0x80FC;
-			else
-				temp = 0x807C;
-		} else {
-			if (SiS_IF_DEF_CH7005 == 1) {
-				temp = SetCRT2ToTV | SetCRT2ToLCD;
-			} else {
-				temp = SetCRT2ToLCD;
-			}
-		}
-		if (!(tempbx & temp)) {
-			tempax = tempax | DisableCRT2Display;
-			tempbx = 0;
-		}
-
-		if (SiS_IF_DEF_LVDS == 0) {
-			if (tempbx & SetCRT2ToLCDA) {	/*301b */
-				tempbx =
-				    tempbx & (0xFF00 | SwitchToCRT2 |
-					      SetSimuScanMode);
-			} else if (tempbx & SetCRT2ToRAMDAC) {
-				tempbx =
-				    tempbx & (0xFF00 | SetCRT2ToRAMDAC |
-					      SwitchToCRT2 | SetSimuScanMode);
-			} else if ((tempbx & SetCRT2ToLCD) && (!(SiS_VBType & VB_NoLCD))) {	/*301dlvds */
-				tempbx =
-				    tempbx & (0xFF00 | SetCRT2ToLCD |
-					      SwitchToCRT2 | SetSimuScanMode);
-			} else if (tempbx & SetCRT2ToSCART) {
-				tempbx =
-				    tempbx & (0xFF00 | SetCRT2ToSCART |
-					      SwitchToCRT2 | SetSimuScanMode);
-				tempbx = tempbx | SetPALTV;
-			} else if (tempbx & SetCRT2ToHiVisionTV) {
-				tempbx =
-				    tempbx & (0xFF00 | SetCRT2ToHiVisionTV |
-					      SwitchToCRT2 | SetSimuScanMode);
-				/* ynlai begin */
-				tempbx = tempbx | SetPALTV;
-				/* ynlai end */
-			}
+    	if(SiS_IF_DEF_LVDS == 0) {
+	        temp = SetCRT2ToLCDA   | SetCRT2ToSCART      | SetCRT2ToLCD |
+		       SetCRT2ToRAMDAC | SetCRT2ToSVIDEO     | SetCRT2ToAVIDEO; /* = 0x807C; */
+      		if(SiS_IF_DEF_HiVision == 1)
+                     temp |= SetCRT2ToHiVisionTV; /* = 0x80FC; */
+    	} else {
+	        /* TW: Inserted entire 315-section */
+                if(HwDeviceExtension->jChipType >= SIS_315H) {
+                    if(SiS_IF_DEF_CH70xx != 0)
+        		temp = SetCRT2ToLCDA   | SetCRT2ToSCART |
+			       SetCRT2ToLCD    | SetCRT2ToHiVisionTV |
+			       SetCRT2ToAVIDEO | SetCRT2ToSVIDEO;  /* 0x80bc */
+      		    else
+        		temp = SetCRT2ToLCDA | SetCRT2ToLCD;
 		} else {
-			if (SiS_IF_DEF_CH7005 == 1) {
-				if (tempbx & SetCRT2ToTV)
-					tempbx =
-					    tempbx & (0xFF00 | SetCRT2ToTV |
-						      SwitchToCRT2 |
-						      SetSimuScanMode);
-			}
-			if (tempbx & SetCRT2ToLCD)
-				tempbx =
-				    tempbx & (0xFF00 | SetCRT2ToLCD |
-					      SwitchToCRT2 | SetSimuScanMode);
-		}
-		if (tempax & DisableCRT2Display) {
-			if (!(tempbx & (SwitchToCRT2 | SetSimuScanMode))) {
-				tempbx = SetSimuScanMode | DisableCRT2Display;
-			}
-		}
-		if (!(tempbx & DriverMode)) {
-			tempbx = tempbx | SetSimuScanMode;
-		}
-		if (!(tempbx & SetSimuScanMode)) {
-			if (tempbx & SwitchToCRT2) {
-				if (!(modeflag & CRT2Mode)) {
-					tempbx = tempbx | SetSimuScanMode;
-				}
-			} else {
-				if (!
-				    (SiS_BridgeIsEnable
-				     (BaseAddr, HwDeviceExtension))) {
-					if (!(tempbx & DriverMode)) {
-						if (SiS_BridgeInSlave ()) {
-							tempbx =
-							    tempbx |
-							    SetInSlaveMode;
-						}
-					}
-				}
-			}
-		}
-		if (!(tempbx & DisableCRT2Display)) {
-			if (tempbx & DriverMode) {
-				if (tempbx & SetSimuScanMode) {
-					if (!(modeflag & CRT2Mode)) {
-						tempbx =
-						    tempbx | SetInSlaveMode;
-						if (SiS_IF_DEF_LVDS == 0) {
-							if (tempbx &
-							    SetCRT2ToTV) {
-								if (!
-								    (tempbx &
-								     SetNotSimuMode))
-								   SiS_SetFlag =
-									    SiS_SetFlag
-									    |
-									    TVSimuMode;
-							}
-						}
-					}
-				}
-			} else {
-				tempbx = tempbx | SetInSlaveMode;
-				if (SiS_IF_DEF_LVDS == 0) {
-					if (tempbx & SetCRT2ToTV) {
-						if (!(tempbx & SetNotSimuMode))
-							SiS_SetFlag =
-							    SiS_SetFlag |
-							    TVSimuMode;
-					}
-				}
+      		    if(SiS_IF_DEF_CH70xx != 0)
+        		temp = SetCRT2ToTV | SetCRT2ToLCD;
+      		    else
+        		temp = SetCRT2ToLCD;
+		}
+    	}
+
+    	if(!(tempbx & temp)) {
+      		tempax = DisableCRT2Display;
+      		tempbx = 0;
+    	}
+
+   	if(SiS_IF_DEF_LVDS==0) {
+      		if(tempbx & SetCRT2ToLCDA) {
+        		tempbx &= (0xFF00|SwitchToCRT2|SetSimuScanMode);
+      		} else if(tempbx & SetCRT2ToRAMDAC) {
+        		tempbx &= (0xFF00|SetCRT2ToRAMDAC|SwitchToCRT2|SetSimuScanMode);
+      		} else if((tempbx & SetCRT2ToLCD) && (!(SiS_VBType & VB_NoLCD)) ){
+        		tempbx &= (0xFF00|SetCRT2ToLCD|SwitchToCRT2|SetSimuScanMode);
+      		} else if(tempbx & SetCRT2ToSCART){
+        		tempbx &= (0xFF00|SetCRT2ToSCART|SwitchToCRT2|SetSimuScanMode);
+        		tempbx |= SetPALTV;
+      		} else if(tempbx & SetCRT2ToHiVisionTV){
+        		tempbx &= (0xFF00|SetCRT2ToHiVisionTV|SwitchToCRT2|SetSimuScanMode);
+        		tempbx |= SetPALTV;
+      		}
+   	} else { /* LVDS */
+	        /* TW: Inserted entire 315/325 section */
+	        if(HwDeviceExtension->jChipType >= SIS_315H) {
+		    if(tempbx & SetCRT2ToLCDA)
+		        tempbx &= (0xFF00|SwitchToCRT2|SetSimuScanMode);
+		}
+      		if(SiS_IF_DEF_CH70xx != 0) {
+        	    if(tempbx & SetCRT2ToTV)
+          		 tempbx &= (0xFF00|SetCRT2ToTV|SwitchToCRT2|SetSimuScanMode);
+      		}
+      		if(tempbx & SetCRT2ToLCD) {
+        		tempbx &= (0xFF00|SetCRT2ToLCD|SwitchToCRT2|SetSimuScanMode);
+		}
+	        if(HwDeviceExtension->jChipType >= SIS_315H) {
+		    if(tempbx & SetCRT2ToLCDA)
+		        tempbx |= SetCRT2ToLCD;
+		}
+	}
+    	if(tempax & DisableCRT2Display) {
+      		if(!(tempbx & (SwitchToCRT2 | SetSimuScanMode))) {
+        		tempbx = SetSimuScanMode | DisableCRT2Display;
+      		}
+    	}
+    	if(!(tempbx & DriverMode)){
+      		tempbx |= SetSimuScanMode;
+    	}
+
+	/* TW: LVDS (LCD/TV) and 630+301B (LCD) can only be slave in 8bpp modes */
+	if( (SiS_IF_DEF_LVDS == 1) && (SiS_ModeType <= ModeVGA) ) {
+		modeflag &= (~CRT2Mode);
+	}
+	if( (HwDeviceExtension->jChipType < SIS_315H) && (SiS_VBType & VB_SIS301BLV302BLV)) {
+	        if(SiS_ModeType <= ModeVGA) {
+			if(tempbx & SetCRT2ToLCD) {
+		    		modeflag &= (~CRT2Mode);
 			}
-		}
-		if (SiS_IF_DEF_CH7005 == 1) {
-			temp = SiS_GetReg1 (SiS_P3d4, 0x35);
-			if (temp & TVOverScan)
-				tempbx = tempbx | SetCHTVOverScan;
-		}
-	}
-#ifdef CONFIG_FB_SIS_300
-	/*add PALMN */
-	if (SiS_IF_DEF_LVDS == 0) {
-		if ((HwDeviceExtension->jChipType == SIS_630) ||
-		    (HwDeviceExtension->jChipType == SIS_730)) {
-			if (!(OutputSelect & EnablePALMN))
-				SiS_SetRegAND (SiS_P3d4, 0x35, 0x3F);
-			if (tempbx & SetCRT2ToTV) {
-				if (tempbx & SetPALTV) {
-					temp = SiS_GetReg1 (SiS_P3d4, 0x35);
-					temp = temp & 0xC0;
-					if (temp == 0x40)
-						tempbx = tempbx & (~SetPALTV);
+	        }
+	}
+	/* TW end */
+
+    	if(!(tempbx & SetSimuScanMode)){
+      		if(tempbx & SwitchToCRT2) {
+        		if(!(modeflag & CRT2Mode)) {
+			     if( (HwDeviceExtension->jChipType >= SIS_315H) &&
+			         (SiS_VBType & VB_SIS301BLV302BLV) ) {
+			        if(resinfo != 0x0a)
+                                   tempbx |= SetSimuScanMode;
+			     } else {
+            			tempbx |= SetSimuScanMode;
+	                     }
+
+        		}
+      		} else {
+        		if(!(SiS_BridgeIsEnable(BaseAddr,HwDeviceExtension))) {
+          			if(!(tempbx & DriverMode)) {
+            				if(SiS_BridgeInSlave()) {
+						tempbx |= SetSimuScanMode; /* TW: from BIOS 650/301/301LV/LVDS */
+            				}
+          			}
+        		}
+      		}
+    	}
+
+    	if(!(tempbx & DisableCRT2Display)) {
+     		 if(tempbx & DriverMode) {
+        		if(tempbx & SetSimuScanMode) {
+          			if(!(modeflag & CRT2Mode)) {
+				        if( (HwDeviceExtension->jChipType >= SIS_315H) &&
+					    (SiS_VBType & VB_SIS301BLV302BLV) ) {
+					        if(resinfo != 0x0a) {  /* TW: Inserted from 650/301 BIOS */
+						    tempbx |= SetInSlaveMode;
+            					    if(SiS_IF_DEF_LVDS == 0) {
+              						if(tempbx & SetCRT2ToTV) {
+                						if(!(tempbx & SetNotSimuMode))
+									SiS_SetFlag |= TVSimuMode;
+              						}
+            					    }
+					        }                      /* TW: Inserted from 650/301 BIOS */
+					} else {
+            					tempbx |= SetInSlaveMode;
+            					if(SiS_IF_DEF_LVDS == 0) {
+              						if(tempbx & SetCRT2ToTV) {
+                						if(!(tempbx & SetNotSimuMode))
+									SiS_SetFlag |= TVSimuMode;
+              						}
+            					}
+         				}
 				}
-			}
-		}
-	}
-	/*end add */
+        		}
+      		} else {
+        		tempbx |= SetInSlaveMode;
+        		if(SiS_IF_DEF_LVDS == 0) {
+          			if(tempbx & SetCRT2ToTV) {
+            				if(!(tempbx & SetNotSimuMode))
+						SiS_SetFlag |= TVSimuMode;
+          			}
+        		}
+      		}
+    	}
+    	if(SiS_IF_DEF_CH70xx == 1) {
+      		temp = SiS_GetReg1(SiS_P3d4,0x35);
+      		if(temp & TVOverScan) tempbx |= SetCHTVOverScan;
+    	}
+	if(SiS_IF_DEF_CH70xx == 2) {
+      		temp = SiS_GetReg1(SiS_P3d4,0x79);
+      		if(temp & 0x80) tempbx |= SetCHTVOverScan;
+    	}
+  }
+
+  if(SiS_IF_DEF_LVDS==0) {
+#ifdef SIS300
+     	if((HwDeviceExtension->jChipType==SIS_630)||
+           (HwDeviceExtension->jChipType==SIS_730)) {
+           	if(!(OutputSelect & EnablePALMN))
+             		SiS_SetRegAND(SiS_P3d4,0x35,0x3F);
+           	if(tempbx & SetCRT2ToTV) {
+              		if(tempbx & SetPALTV) {
+                  		temp=SiS_GetReg1(SiS_P3d4,0x35);
+                  		temp &= 0xC0;
+                  		if(temp == 0x40)
+                    			tempbx &= (~SetPALTV);
+             		}
+          	}
+      	}
 #endif
-#ifdef CONFIG_FB_SIS_315
-	/*add PALMN */
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (!(OutputSelect & EnablePALMN))
-			SiS_SetRegAND (SiS_P3d4, 0x38, 0x3F);
-		if (tempbx & SetCRT2ToTV) {
-			if (tempbx & SetPALTV) {
-				temp = SiS_GetReg1 (SiS_P3d4, 0x38);
-				temp = temp & 0xC0;
-				if (temp == 0x40)
-					tempbx = tempbx & (~SetPALTV);
-			}
-		}
-	}
-	/*end add */
+#ifdef SIS315H
+     	if(HwDeviceExtension->jChipType >= SIS_315H) {
+		if(!(OutputSelect & EnablePALMN))
+        		SiS_SetRegAND(SiS_P3d4,0x38,0x3F);
+   		if(tempbx & SetCRT2ToTV) {
+    			if(tempbx & SetPALTV) {
+               			temp = SiS_GetReg1(SiS_P3d4,0x38);
+               			/* temp &= 0xC0;  */ /* TW: BIOS only tests 0x40, not 0x80 */
+               			if(temp & 0x40)
+               				tempbx &= (~SetPALTV);
+              		}
+        	}
+  	}
+#endif
+  }
+
+  SiS_VBInfo=tempbx;
+
+  /* TW: DevSwitch not supported here */
+
+#ifdef TWDEBUG
+#ifdef LINUX_KERNEL
+  printk(KERN_INFO "sisfb: (VBInfo = %x, SetFlag = %x)\n", SiS_VBInfo, SiS_SetFlag);
+#endif
+#ifdef LINUX_XF86
+  xf86DrvMsg(0, X_INFO, "(init301: VBInfo = %x, SetFlag = %x)\n", SiS_VBInfo, SiS_SetFlag);
 #endif
-	SiS_VBInfo = tempbx;
+#endif
+
+#if 0
+  /* From 650/301LV BIOS: */
+  if(ModeNo == 0x13) bp+4 = 0x03
+  else bp+4 = ModeNo;
+#endif
+
+  /* TW: 630/301B and 650/301 (not 301LV!) BIOS do more here, but this seems for DOS mode */
+
 }
 
 void
-SiS_GetRAMDAC2DATA (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		    USHORT RefreshRateTableIndex)
+SiS_GetRAMDAC2DATA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                   USHORT RefreshRateTableIndex,
+		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempax, tempbx, temp;
-	USHORT temp1, temp2, modeflag = 0, tempcx;
-
-	USHORT StandTableIndex, CRT1Index;
-	USHORT ResInfo, DisplayType;
-	SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr = NULL;
-
-	SiS_RVBHCMAX = 1;
-	SiS_RVBHCFACT = 1;
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
-		StandTableIndex = SiS_GetModePtr (ROMAddr, ModeNo, ModeIdIndex);
-		tempax = SiS_StandTable[StandTableIndex].CRTC[0];
-		tempbx = SiS_StandTable[StandTableIndex].CRTC[6];
-		temp1 = SiS_StandTable[StandTableIndex].CRTC[7];
-	} else {
-		if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-		    && (SiS_VBInfo & SetCRT2ToLCDA)) {
-			/*add crt1ptr */
-			temp =
-			    SiS_GetLVDSCRT1Ptr (ROMAddr, ModeNo, ModeIdIndex,
-						RefreshRateTableIndex, &ResInfo,
-						&DisplayType);
-			if (temp == 0) {
-				return;
-			}
-			switch (DisplayType) {
-			case 0:
-				LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;
-				break;
-			case 1:
-				LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;
-				break;
-			case 2:
-				LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;
-				break;
-			case 3:
-				LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;
-				break;
-			case 4:
-				LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;
-				break;
-			case 5:
-				LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;
-				break;
-			case 6:
-				LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;
-				break;
-			case 7:
-				LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;
-				break;
-			case 8:
-				LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;
-				break;
-			case 9:
-				LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;
-				break;
-			case 10:
-				LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;
-				break;
-			case 11:
-				LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;
-				break;
-			case 12:
-				LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;
-				break;
-			case 13:
-				LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;
-				break;
-			case 14:
-				LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;
-				break;
-			case 15:
-				LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;
-				break;
-			}
-			temp1 = (LVDSCRT1Ptr + ResInfo)->CR[0];
-			temp2 = (LVDSCRT1Ptr + ResInfo)->CR[14];
-			tempax = (temp1 & 0xFF) | ((temp2 & 0x03) << 8);
-			tempbx = (LVDSCRT1Ptr + ResInfo)->CR[6];
-			tempcx = (LVDSCRT1Ptr + ResInfo)->CR[13] << 8;
-			tempcx = tempcx & 0x0100;
-			tempcx = tempcx << 2;
-			tempbx = tempbx | tempcx;
-			temp1 = (LVDSCRT1Ptr + ResInfo)->CR[7];
-		} /*add 301b */
-		else {
-			modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-			CRT1Index =
-			    SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
-			CRT1Index = CRT1Index & 0x3F;
-			temp1 = (USHORT) SiS_CRT1Table[CRT1Index].CR[0];
-			temp2 = (USHORT) SiS_CRT1Table[CRT1Index].CR[14];
-			tempax = (temp1 & 0xFF) | ((temp2 & 0x03) << 8);
-			tempbx = (USHORT) SiS_CRT1Table[CRT1Index].CR[6];
-			tempcx = (USHORT) SiS_CRT1Table[CRT1Index].CR[13] << 8;
-			tempcx = tempcx & 0x0100;
-			tempcx = tempcx << 2;
-			tempbx = tempbx | tempcx;
-			temp1 = (USHORT) SiS_CRT1Table[CRT1Index].CR[7];
-		}
-	}
-	if (temp1 & 0x01)
-		tempbx = tempbx | 0x0100;
-	if (temp1 & 0x20)
-		tempbx = tempbx | 0x0200;
-	tempax = tempax + 5;
-	if (modeflag & Charx8Dot)
-		tempax = tempax * 8;
-	else
-		tempax = tempax * 9;
-
-	SiS_VGAHT = tempax;
-	SiS_HT = tempax;
-	tempbx++;
-	SiS_VGAVT = tempbx;
-	SiS_VT = tempbx;
+  USHORT tempax,tempbx,temp;
+  USHORT temp1,temp2,modeflag=0,tempcx;
+  USHORT StandTableIndex,CRT1Index;
+  USHORT ResInfo,DisplayType;
+  SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL;
+
+  SiS_RVBHCMAX=1;
+  SiS_RVBHCFACT=1;
+
+  if(ModeNo <= 0x13){
+
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	StandTableIndex = SiS_GetModePtr(ROMAddr,ModeNo,ModeIdIndex);
+    	tempax = SiS_StandTable[StandTableIndex].CRTC[0];
+    	tempbx = SiS_StandTable[StandTableIndex].CRTC[6];
+    	temp1 = SiS_StandTable[StandTableIndex].CRTC[7];
+
+  } else {
+
+     if( (SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo&SetCRT2ToLCDA) ) {
+
+    	temp=SiS_GetLVDSCRT1Ptr(ROMAddr,ModeNo,ModeIdIndex,
+			RefreshRateTableIndex,&ResInfo,&DisplayType);
+
+    	if(temp==0)  return;
+
+    	switch(DisplayType) {
+    		case 0 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;		break;
+    		case 1 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;          break;
+    		case 2 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;         break;
+    		case 3 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;         break;
+    		case 4 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;        break;
+    		case 5 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;       break;
+    		case 6 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;           break;
+    		case 7 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;          break;
+    		case 8 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;         break;
+    		case 9 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;         break;
+    		case 10: LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;        break;
+    		case 11: LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;       break;
+		case 12: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1;           break;
+		case 13: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1_H;         break;
+		case 14: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1;         break;
+		case 15: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1_H;       break;
+		case 16: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2;         break;
+		case 17: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2_H;       break;
+    		case 18: LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;               break;
+    		case 19: LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;               break;
+    		case 20: LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;                break;
+    		case 21: LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;                break;
+    		case 22: LVDSCRT1Ptr = SiS_LVDSCRT1320x480_1;           break;
+
+    	}
+    	temp1=(LVDSCRT1Ptr+ResInfo)->CR[0];
+    	temp2=(LVDSCRT1Ptr+ResInfo)->CR[14];
+    	tempax=(temp1&0xFF)|((temp2&0x03)<<8);
+    	tempbx=(LVDSCRT1Ptr+ResInfo)->CR[6];
+    	tempcx=(LVDSCRT1Ptr+ResInfo)->CR[13]<<8;
+    	tempcx = tempcx&0x0100;
+    	tempcx = tempcx << 2;
+    	tempbx = tempbx | tempcx;
+    	temp1=(LVDSCRT1Ptr+ResInfo)->CR[7];
+
+    } else {
+
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	CRT1Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
+	if(HwDeviceExtension->jChipType < SIS_315H) {
+    	   CRT1Index &= 0x3F;
+	}
+    	temp1 = (USHORT)SiS_CRT1Table[CRT1Index].CR[0];
+    	temp2 = (USHORT)SiS_CRT1Table[CRT1Index].CR[14];
+    	tempax=(temp1&0xFF)|((temp2&0x03)<<8);
+    	tempbx = (USHORT)SiS_CRT1Table[CRT1Index].CR[6];
+    	tempcx = (USHORT)SiS_CRT1Table[CRT1Index].CR[13]<<8;
+    	tempcx = tempcx&0x0100;
+    	tempcx = tempcx << 2;
+    	tempbx = tempbx | tempcx;
+    	temp1 = (USHORT)SiS_CRT1Table[CRT1Index].CR[7];
+
+    }
+
+  }
+
+  if(temp1&0x01) tempbx |= 0x0100;
+  if(temp1&0x20) tempbx |= 0x0200;
+  tempax += 5;
+  if(modeflag & Charx8Dot) tempax *= 8;
+  else tempax *= 9;
+
+  SiS_VGAHT = SiS_HT = tempax;
+  tempbx++;
+  SiS_VGAVT = SiS_VT = tempbx;
 }
 
 void
-SiS_UnLockCRT2 (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_UnLockCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
-	if (HwDeviceExtension->jChipType >= SIS_315H) {
-		SiS_SetRegANDOR (SiS_Part1Port, 0x2f, 0xFF, 0x01);
-	} else {
-		SiS_SetRegANDOR (SiS_Part1Port, 0x24, 0xFF, 0x01);
-	}
+  if(HwDeviceExtension->jChipType >= SIS_315H)
+    	SiS_SetRegOR(SiS_Part1Port,0x2f,0x01);
+  else
+    	SiS_SetRegOR(SiS_Part1Port,0x24,0x01);
 }
 
 void
-SiS_LockCRT2 (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_LockCRT2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
-	if (HwDeviceExtension->jChipType >= SIS_315H) {
-		SiS_SetRegANDOR (SiS_Part1Port, 0x2F, 0xFE, 0x00);
-	} else {
-		SiS_SetRegANDOR (SiS_Part1Port, 0x24, 0xFE, 0x00);
-	}
+  if(HwDeviceExtension->jChipType >= SIS_315H)
+    	SiS_SetRegAND(SiS_Part1Port,0x2F,0xFE);
+  else
+     	SiS_SetRegAND(SiS_Part1Port,0x24,0xFE);
 }
 
 void
-SiS_EnableCRT2 ()
+SiS_EnableCRT2()
 {
-	SiS_SetRegANDOR (SiS_P3c4, 0x1E, 0xFF, 0x20);
+  SiS_SetRegOR(SiS_P3c4,0x1E,0x20);
 }
 
+/* Checked against 650/LVDS(1.10.07)/301 and 630/301B BIOS */
 void
-SiS_DisableBridge (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_DisableBridge(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
+  USHORT tempah,temp;
+  UCHAR *ROMAddr = HwDeviceExtension->pjVirtualRomBase;
+
+  if (SiS_IF_DEF_LVDS == 0) {
+
+      if(SiS_VBType & VB_SIS301BLV302BLV) {   /* ===== TW: For 30xB/LV ===== */
+
+        if(HwDeviceExtension->jChipType < SIS_315H) {
+
+	   /* 300 series */
+
+	   if(!(SiS_CR36BIOSWord23b(HwDeviceExtension))) {
+	      SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x08);
+	      SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 3);
+	   }
+	   if(SiS_Is301B(BaseAddr)) {
+	      SiS_SetRegAND(SiS_Part4Port,0x1f,0x3f);
+	      SiS_ShortDelay(1);
+	   }
+	   SiS_SetRegAND(SiS_Part2Port,0x00,0xDF);
+	   SiS_DisplayOff();
+	   SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
+	   SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
+	   SiS_UnLockCRT2(HwDeviceExtension,BaseAddr);
+	   SiS_SetRegOR(SiS_Part1Port,0x01,0x80);
+	   SiS_SetRegOR(SiS_Part1Port,0x02,0x40);
+/*	   SiS_DoSomeThingPCI();    */  /* TW: Is this really required ? */
+	   if( (!(SiS_CRT2IsLCD(BaseAddr))) || (!(SiS_CR36BIOSWord23d(HwDeviceExtension))) ) {
+	      SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
+              SiS_SetRegANDOR(SiS_P3c4,0x11,0xFB,0x04);
+	   }
+
+        } else {
+
+	   /* 310 series */
+
+#if 0
+           if(SiS_Is301B(BaseAddr)) {
+#endif
+             /* TW: Inserted from 650/301LV BIOS */
+	     if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+	     	   SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFE,0x00);
+		   SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 3);
+	     } else if (SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+		   SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFE,0x00);
+		   SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 3);
+             }
+	     /* TW end */
+           /* TW: 301B dependent code starts here in 650/301LV BIOS */
+	   if(SiS_Is301B(BaseAddr)) {
+	     tempah = 0x3f;
+#if 0        /* TW: This is not done in 650/301LV BIOS, instead 0x3f is used in any case */
+             if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr)) {
+	        tempah = 0x7f;
+	        if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
+		   tempah = 0xbf;
+                }
+	     }
+#endif
+             SiS_SetRegAND(SiS_Part4Port,0x1F,tempah);
+           } /* 301B dependent code ends here in 650/301V BIOS */
+#if 0        /* TW: This is not done in 650/301LV BIOS */
+	     if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+                SiS_SetRegAND(SiS_Part1Port,0x1E,0xDF);
+	        SiS_DisplayOff();
+	        SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
+	        return;
+	     } else {
+	        if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+                    SiS_SetRegAND(SiS_Part2Port,0x00,0xDF);
+		    SiS_DisplayOff();
+	        }
+	     }
+           } else {
+#endif
+                 SiS_SetRegAND(SiS_Part2Port,0x00,0xDF);
+		 SiS_DisplayOff();
+#if 0
+	   }
+#endif
+
+           SiS_SetRegOR(SiS_Part1Port,0x00,0x80);
+
+           SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
+
+	   temp = SiS_GetReg1(SiS_Part1Port,0x00);
+           SiS_SetRegOR(SiS_Part1Port,0x00,0x10);
+	   SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
+	   SiS_SetReg1(SiS_Part1Port,0x00,temp);
+
+	   /* TW: Inserted from 650/301LV BIOS */
+	   if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+	       if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
+	           if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+		          SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
+			  SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
+			  SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
+                   } else if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+                          SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
+			  SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
+			  SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
+		   }
+	       }
+	    } else if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+	       if (!(SiS_CRT2IsLCD(BaseAddr))) {
+	            SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
+		    SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
+		    SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
+               } else if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
+	           if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+		          SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
+			  SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
+			  SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
+                   } else if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+                          SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
+			  SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFD,0x00);
+			  SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 4);
+		   }
+	       }
+	   }
+	   /* TW: 650/301LV end */
 
-	USHORT temp1, tempah, temp;
-	SiS_SetRegANDOR (SiS_P3c4, 0x11, 0xF7, 0x08);
-/*SetPanelDelay(1);  */
-	temp1 = 0x01;
-	if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {	/*301b */
-		if ((SiS_IsVAMode (BaseAddr)))
-			temp1 = 0x00;	/*no disable vb */
 	}
 
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (!temp1) {	/*301b */
-			SiS_SetRegANDOR (SiS_Part2Port, 0x00, 0x0DF, 0x00);	/* disable VB */
-			SiS_DisplayOff ();
-			if (HwDeviceExtension->jChipType >= SIS_315H) {	/* 310 series */
-				SiS_SetRegOR (SiS_Part1Port, 0x00, 0x80);	/* alan,BScreenOff */
-			}
-			SiS_SetRegANDOR (SiS_P3c4, 0x32, 0xDF, 0x00);
+      } else {     /* ============ TW: For 301 ================ */
 
-			temp = SiS_GetReg1 (SiS_Part1Port, 0);
-			SiS_SetRegOR (SiS_Part1Port, 0x00, 0x10);	/* alan,BScreenOff */
-/*
-     if(HwDeviceExtension->jChipType >= SIS_315H) 
-     {
-      SiS_SetRegAND(SiS_Part1Port,0x2E,0x7F);  
-     }
-     */
-			SiS_SetRegANDOR (SiS_P3c4, 0x1E, 0xDF, 0x00);
-			SiS_SetReg1 (SiS_Part1Port, 0, temp);
-		} else {
-			if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {	/*301b */
-				if (!(SiS_Is301B (BaseAddr))) {
-					SiS_SetRegAND (SiS_P3c4, 0x32, 0xDF);
-					if ((!(SiS_IsDualEdge (BaseAddr)))
-					    && (!(SiS_IsVAMode (BaseAddr))))
-						tempah = 0x7F;
-					else if ((!(SiS_IsDualEdge (BaseAddr)))
-						 && (SiS_IsVAMode (BaseAddr)))
-						tempah = 0xBF;
-					else
-						tempah = 0x3F;
-					SiS_SetRegAND (SiS_Part4Port, 0x1F,
-						       tempah);
-				}
-			}
+        if(HwDeviceExtension->jChipType < SIS_315H)
+             SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x08);
+
+        SiS_SetRegAND(SiS_Part2Port,0x00,0xDF);           /* disable VB */
+        SiS_DisplayOff();
+
+        if(HwDeviceExtension->jChipType >= SIS_315H)
+            SiS_SetRegOR(SiS_Part1Port,0x00,0x80);
+
+        SiS_SetRegAND(SiS_P3c4,0x32,0xDF);                /* disable lock mode */
+
+        temp = SiS_GetReg1(SiS_Part1Port,0x00);
+        SiS_SetRegOR(SiS_Part1Port,0x00,0x10);
+
+        SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);                /* disable CRT2 */
+        SiS_SetReg1(SiS_Part1Port,0x00,temp);
+
+	if(HwDeviceExtension->jChipType < SIS_315H)
+	     SiS_SetRegANDOR(SiS_P3c4,0x11,0xFB,0x04);
+
+      }
+
+  } else {     /* ============ TW: For LVDS =============*/
+
+    if(HwDeviceExtension->jChipType < SIS_315H) {
+
+	/* 300 series */
+
+	if(SiS_IF_DEF_CH70xx == 1) {
+	    if(SiS_Backup70xx == 0xff) {
+		SiS_Backup70xx = SiS_GetCH700x(0x0e);
+	    }
+	    SiS_SetCH700x(0x090E);
+	}
+
+	if(!(SiS_GetReg1(SiS_P3c4,0x11) & 0x08)) {
+
+	    if(!(SiS_GetReg1(SiS_P3c4,0x13) & 0x40)) {
+
+	        if(!(SiS_CR36BIOSWord23b(HwDeviceExtension))) {
+
+                     SiS_WaitVBRetrace(HwDeviceExtension);
+
+		     if(!(SiS_GetReg1(SiS_P3c4,0x06) & 0x1c)) {
+		         SiS_DisplayOff();
+	             }
+
+	             SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x08);
+	             SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 3);
+                }
+            }
+	}
+
+	SiS_DisplayOff();
+
+	SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
+
+	SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
+	SiS_UnLockCRT2(HwDeviceExtension,BaseAddr);
+	SiS_SetRegOR(SiS_Part1Port,0x01,0x80);
+	SiS_SetRegOR(SiS_Part1Port,0x02,0x40);
+
+	if( (!(SiS_CRT2IsLCD(BaseAddr))) ||
+	              (!(SiS_CR36BIOSWord23d(HwDeviceExtension))) ) {
+		SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 2);
+		SiS_SetRegANDOR(SiS_P3c4,0x11,0xFB,0x04);
+	}
+
+    } else {
+
+	/* 310 series */
+
+	if(SiS_IF_DEF_CH70xx == 2) {
+		if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+			SiS_Chrontel701xOff();
+			SiS_Chrontel701xOff2();
+		} else if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+			SiS_Chrontel701xOff();
+			SiS_Chrontel701xOff2();
 		}
-	} else {
-		if (SiS_IF_DEF_CH7005) {
-			SiS_SetCH7005 (0x090E);
+
+		if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+			SiS_SetCH701x(0x0149);
+		} else if(SiS_IsTVOrSomething(HwDeviceExtension, BaseAddr))  {
+			SiS_SetCH701x(0x0149);
 		}
-		SiS_DisplayOff ();
-		SiS_SetRegANDOR (SiS_P3c4, 0x32, 0xDF, 0x00);
-		SiS_SetRegANDOR (SiS_P3c4, 0x1E, 0xDF, 0x00);
-		SiS_UnLockCRT2 (HwDeviceExtension, BaseAddr);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x01, 0xFF, 0x80);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x02, 0xFF, 0x40);
 	}
-/*SetPanelDelay(0);  */
-	SiS_SetRegANDOR (SiS_P3c4, 0x11, 0xFB, 0x04);
+
+	if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+		SiS_DisplayOff();
+	} else if(!(SiS_IsTVOrSomething(HwDeviceExtension, BaseAddr))) {
+		SiS_DisplayOff();
+	}
+
+	if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegOR(SiS_Part1Port,0x00,0x80);
+	} else if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegOR(SiS_Part1Port,0x00,0x80);
+	}
+
+	SiS_SetRegAND(SiS_P3c4,0x32,0xDF);
+
+	if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
+	} else if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegAND(SiS_P3c4,0x1E,0xDF);
+	}
+
+	if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+		SiS_SetRegAND(SiS_Part1Port,0x1e,0xdf);
+	}
+
+	if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr)) {
+		SiS_SetRegAND(SiS_Part1Port,0x13,0xff);
+	} else {
+		SiS_SetRegAND(SiS_Part1Port,0x13,0xfb);
+	}
+
+	SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+
+	if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegAND(SiS_Part1Port,0x2e,0xf7);
+	} else if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
+		SiS_SetRegAND(SiS_Part1Port,0x2e,0xf7);
+	}
+
+#if 0  /* TW: BIOS code makes no sense */
+       if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+           if(!(SiS_IsDualEdge(HwDeviceExtension, BaseAddr))) {
+	        if(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)) {
+		  /* Nothing there! */
+		}
+           }
+       }
+#endif
+
+    }  /* 310 series */
+
+  }  /* LVDS */
+
 }
 
+/* TW: Checked against 650/LVDS(1.10.07)/301 and 630/301B BIOS */
 void
-SiS_EnableBridge (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+SiS_EnableBridge(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT  BaseAddr)
 {
-	USHORT temp, tempah;
-
-	SiS_SetRegANDOR (SiS_P3c4, 0x11, 0xFB, 0x00);
-/*SetPanelDelay(0);        */
-	if (SiS_IF_DEF_LVDS == 0) {
-		if ((!(SiS_IsVAMode (BaseAddr)))
-		    && ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-			SiS_SetRegANDOR (SiS_Part2Port, 0x00, 0x1F, 0x20);
-		} else {
-			temp = SiS_GetReg1 (SiS_P3c4, 0x32);
-			temp = temp & 0xDF;
-			if (SiS_BridgeInSlave ()) {
-				tempah = SiS_GetReg1 (SiS_P3d4, 0x30);
-				if (!(tempah & SetCRT2ToRAMDAC)) {
-					temp = temp | 0x20;
-				}
-			}
-			SiS_SetReg1 (SiS_P3c4, 0x32, temp);
-			SiS_SetRegANDOR (SiS_P3c4, 0x1E, 0xFF, 0x20);
-			if (HwDeviceExtension->jChipType >= SIS_315H) {	/* 310 series */
-				temp = SiS_GetReg1 (SiS_Part1Port, 0x2E);
-				if (!(temp & 0x80))
-					SiS_SetRegOR (SiS_Part1Port, 0x2E, 0x80);	/* by alan,BVBDOENABLE=1 */
+  USHORT temp=0,tempah,temp1;
+  UCHAR *ROMAddr = HwDeviceExtension->pjVirtualRomBase;
+
+  if(SiS_IF_DEF_LVDS == 0) {
+
+    if(SiS_VBType & VB_SIS301BLV302BLV) {   /* TW: ====== For 301B ====== */
+
+      if(HwDeviceExtension->jChipType < SIS_315H) {
+
+         /* 300 series */
+
+	 if(SiS_CRT2IsLCD(BaseAddr)) {
+	    SiS_SetRegAND(SiS_P3c4,0x11,0xFB);
+	    if(!(SiS_CR36BIOSWord23d(HwDeviceExtension))) {
+	       SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 0);
+	    }
+	    SiS_SetRegOR(SiS_P3c4,0x1E,0x20);   /* Enable CRT2 */
+/*	    DoSomeThingPCI_On() */
+            SiS_DisplayOn();
+	    SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+	    SiS_SetRegAND(SiS_Part1Port,0x02,0xBF);
+	    if(SiS_BridgeInSlave()) {
+      		SiS_SetRegAND(SiS_Part1Port,0x01,0x1F);
+      	    } else {
+      		SiS_SetRegANDOR(SiS_Part1Port,0x01,0x1F,0x40);
+            }
+	    if(!(SiS_GetReg1(SiS_P3c4,0x13) & 0x40)) {
+	        if(!(SiS_GetReg1(SiS_P3c4,0x16) & 0x10)) {
+		    if(!(SiS_CR36BIOSWord23b(HwDeviceExtension))) {
+		        SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
+                    }
+		    SiS_WaitVBRetrace(HwDeviceExtension);
+                    SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x00);
+                }
+	    }
+         } else {
+	   temp = SiS_GetReg1(SiS_P3c4,0x32) & 0xDF;             /* lock mode */
+           if(SiS_BridgeInSlave()) {
+              tempah = SiS_GetReg1(SiS_P3d4,0x30);
+              if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
+           }
+           SiS_SetReg1(SiS_P3c4,0x32,temp);
+	   SiS_SetRegOR(SiS_P3c4,0x1E,0x20);
+	   SiS_SetRegANDOR(SiS_Part2Port,0x00,0x1F,0x20);        /* enable VB processor */
+	   if(SiS_Is301B(BaseAddr)) {
+              SiS_SetRegOR(SiS_Part4Port,0x1F,0xC0);
+	      SiS_DisplayOn();
+	   } else {
+	      SiS_VBLongWait();
+	      SiS_DisplayOn();
+	      SiS_VBLongWait();
+	   }
+	 }
+
+      } else {
+
+         /* 310 series */
+
+	 /* TW: Inserted from 650/301LV BIOS */
+	 if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+	     SiS_SetRegANDOR(SiS_Part4Port,0x26,0xfd,0x02);
+	     SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 0);
+	 } else if(SiS_CRT2IsLCD(BaseAddr)) {
+	     SiS_SetRegANDOR(SiS_Part4Port,0x26,0xfd,0x02);
+	     SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 0);
+	 }
+	 /* TW: --- end --- */
+
+         if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
+            temp = SiS_GetReg1(SiS_P3c4,0x32) & 0xDF;
+	    if(SiS_BridgeInSlave()) {
+               tempah = SiS_GetReg1(SiS_P3d4,0x30);
+               if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
+            }
+            SiS_SetReg1(SiS_P3c4,0x32,temp);
+
+	    SiS_SetRegOR(SiS_P3c4,0x1E,0x20);                   /* enable CRT2 */
+
+/*          SiS_SetRegAND(SiS_Part1Port,0x2E,0x7F);   */ 	/* TW: Not done in 650/301LV BIOS */
+            temp=SiS_GetReg1(SiS_Part1Port,0x2E);
+            if (!(temp & 0x80))
+                   SiS_SetRegOR(SiS_Part1Port,0x2E,0x80);
+          }
+
+          SiS_SetRegANDOR(SiS_Part2Port,0x00,0x1F,0x20);        /* enable VB processor */
+
+          if(SiS_Is301B(BaseAddr)) {
+#if 0	     /* TW: This is not done in 630/301LV BIOS */
+	     if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+                SiS_SetRegOR(SiS_P3c4,0x1E,0x20);               /* enable CRT2 */
+	     }
+#endif
+             /* TW: This is done instead: */
+             SiS_SetRegOR(SiS_Part4Port,0x1F,0xc0);
+
+#if 0	     /* TW: This is not done in 630/301LV BIOS */
+	     temp=SiS_GetReg1(SiS_Part1Port,0x2E);
+             if (!(temp & 0x80))
+                SiS_SetRegOR(SiS_Part1Port,0x2E,0x80);
+
+	     tempah = 0xC0;
+	     if(SiS_IsDualEdge(HwDeviceExtension, BaseAddr)) {
+	         tempah = 0x80;
+	         if(!(SiS_IsVAMode(HwDeviceExtension, BaseAddr))) {
+	             tempah = 0x40;
+                 }
+	     }
+             SiS_SetRegOR(SiS_Part4Port,0x1F,tempah);
+#endif
+             if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)))   /* TW: "if" new from 650/301LV BIOS */
+	        SiS_SetRegAND(SiS_Part1Port,0x00,0x7F);
+
+          } else {
+
+             SiS_VBLongWait();
+             SiS_DisplayOn();
+	     if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)))  {  /* TW: "if" new from 650/301LV BIOS */
+	        SiS_SetRegAND(SiS_Part1Port,0x00,0x7F);
+                SiS_VBLongWait();
+	     }
+
+          }
+
+	  /* TW: Entire section from 650/301LV BIOS */
+	  if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
+	     if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+/*	        if (!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {  */ /* TW: BIOS code makes no sense */
+		   SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
+		   SiS_WaitVBRetrace(HwDeviceExtension);
+		   SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFE,0x01);
+/*              }   */
+             } else if(SiS_CRT2IsLCD(BaseAddr)) {
+/*	        if (!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {  */ /* TW: BIOS code makes no sense */
+		   SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
+		   SiS_WaitVBRetrace(HwDeviceExtension);
+		   SiS_SetRegANDOR(SiS_Part4Port,0x26,0xFE,0x01);
+/*              }   */
+	     }
+	  }
+	  /* TW: --- end --- */
+
+      }
+
+    } else {	/* ============  TW: For 301 ================ */
+
+       if(HwDeviceExtension->jChipType < SIS_315H)
+            SiS_SetRegANDOR(SiS_P3c4,0x11,0xFB,0x00);
+
+       temp = SiS_GetReg1(SiS_P3c4,0x32) & 0xDF;             /* lock mode */
+       if(SiS_BridgeInSlave()) {
+         tempah = SiS_GetReg1(SiS_P3d4,0x30);
+         if(!(tempah & SetCRT2ToRAMDAC))  temp |= 0x20;
+       }
+       SiS_SetReg1(SiS_P3c4,0x32,temp);
+
+       SiS_SetRegANDOR(SiS_P3c4,0x1E,0xFF,0x20);             /* enable CRT2 */
+
+       if(HwDeviceExtension->jChipType >= SIS_315H) {        /* 310 series */
+         temp=SiS_GetReg1(SiS_Part1Port,0x2E);
+         if (!(temp & 0x80))
+           SiS_SetRegOR(SiS_Part1Port,0x2E,0x80);            /* by alan,BVBDOENABLE=1 */
+       }
+
+       SiS_SetRegANDOR(SiS_Part2Port,0x00,0x1F,0x20);        /* enable VB processor */
+
+       SiS_VBLongWait();
+       SiS_DisplayOn();
+       SiS_VBLongWait();
+
+       if(HwDeviceExtension->jChipType < SIS_315H)
+            SiS_SetRegANDOR(SiS_P3c4,0x11,0xF7,0x00);
+
+    }
+
+  } else {   /* =================== TW: For LVDS ================== */
+
+    if(HwDeviceExtension->jChipType < SIS_315H) {
+
+      /* 300 series */
+
+      if(SiS_CRT2IsLCD(BaseAddr)) {
+         SiS_SetRegAND(SiS_P3c4,0x11,0xFB);
+	 if(!(SiS_CR36BIOSWord23d(HwDeviceExtension))) {
+	    SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 0);
+	 }
+      }
+
+      SiS_EnableCRT2();
+      SiS_DisplayOn();
+      SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
+      SiS_SetRegAND(SiS_Part1Port,0x02,0xBF);
+      if(SiS_BridgeInSlave()) {
+      	SiS_SetRegAND(SiS_Part1Port,0x01,0x1F);
+      } else {
+      	SiS_SetRegANDOR(SiS_Part1Port,0x01,0x1F,0x40);
+      }
+
+      if(SiS_IF_DEF_CH70xx == 1) {
+        if(!(SiS_CRT2IsLCD(BaseAddr))) {
+           if (SiS_Backup70xx != 0xff) {
+		SiS_SetCH700x(((SiS_Backup70xx<<8)|0x0E));
+		SiS_Backup70xx = 0xff;
+	   } else SiS_SetCH700x(0x0B0E);
+        }
+      }
+
+      if(SiS_CRT2IsLCD(BaseAddr)) {
+          if(!(SiS_GetReg1(SiS_P3c4,0x13) & 0x40)) {
+              if(!(SiS_GetReg1(SiS_P3c4,0x16) & 0x10)) {
+	          if(!(SiS_CR36BIOSWord23b(HwDeviceExtension))) {
+			SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
+        		SiS_SetPanelDelay(ROMAddr, HwDeviceExtension, 1);
+		  }
+		  SiS_WaitVBRetrace(HwDeviceExtension);
+                  SiS_SetRegAND(SiS_P3c4,0x11,0xF7);
+              }
+	  }
+      }
+
+    } else {
+
+       /* 310 series */
+
+#if 0  /* BIOS code makes no sense */
+       if(SiS_IsVAMode()) {
+          if(SiS_IsLCDOrLCDA()) {
+	  }
+       }
+#endif
 
-			}
-			SiS_SetRegANDOR (SiS_Part2Port, 0x00, 0x1F, 0x20);
+       SiS_EnableCRT2();
+       SiS_UnLockCRT2(HwDeviceExtension, BaseAddr);
 
-			if (HwDeviceExtension->jChipType >= SIS_315H) {	/* 310 series */
-				temp = SiS_GetReg1 (SiS_Part1Port, 0x2E);
-				if (!(temp & 0x80))
-					SiS_SetRegOR (SiS_Part1Port, 0x2E, 0x80);	/* by alan,BVBDOENABLE=1 */
-			}
+       SiS_SetRegAND(SiS_Part1Port,0x2e,0xf7);
 
-			SiS_SetRegANDOR (SiS_Part2Port, 0x00, 0x1F, 0x20);
-			SiS_VBLongWait ();
-			SiS_DisplayOn ();
-			SiS_VBLongWait ();
-		}
-		/*add301b */
-		if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-			if (!(SiS_Is301B (BaseAddr))) {
-				temp = SiS_GetReg1 (SiS_Part1Port, 0x2E);
-				if (!(temp & 0x80))
-					SiS_SetRegOR (SiS_Part1Port, 0x2E,
-						      0x80);
-				if ((!(SiS_IsDualEdge (BaseAddr)))
-				    && (!(SiS_IsVAMode (BaseAddr))))
-					tempah = 0x80;
-				else if ((!(SiS_IsDualEdge (BaseAddr)))
-					 && (SiS_IsVAMode (BaseAddr)))
-					tempah = 0x40;
-				else
-					tempah = 0xC0;
-				SiS_SetRegOR (SiS_Part4Port, 0x1F, tempah);
-			}
-		}
-		/*end 301b */
-	} else {
-		/*LVDS*/ SiS_EnableCRT2 ();
-		SiS_DisplayOn ();
-		SiS_UnLockCRT2 (HwDeviceExtension, BaseAddr);
-		SiS_SetRegANDOR (SiS_Part1Port, 0x02, 0xBF, 0x00);
-		if (SiS_BridgeInSlave ()) {
-			SiS_SetRegANDOR (SiS_Part1Port, 0x01, 0x1F, 0x00);
-		} else {
-			SiS_SetRegANDOR (SiS_Part1Port, 0x01, 0x1F, 0x40);
-		}
-		if (SiS_IF_DEF_CH7005) {
-			SiS_SetCH7005 (0x0B0E);
-		}
-	}
-/*SetPanelDelay(1);  */
-	SiS_SetRegANDOR (SiS_P3c4, 0x11, 0xF7, 0x00);
+       if(SiS_IF_DEF_CH70xx == 2) {
+          temp = SiS_GetCH701x(0x66);
+	  temp &= 0x20;
+	  SiS_Chrontel701xOff();
+       }
+
+       SiS_SetRegAND(SiS_Part1Port,0x2e,0x7f);
+
+       temp1 = SiS_GetReg1(SiS_Part1Port,0x2E);
+       if (!(temp1 & 0x80))
+           SiS_SetRegOR(SiS_Part1Port,0x2E,0x80);
+
+       if(SiS_IF_DEF_CH70xx == 2) {
+           if(temp) {
+	       SiS_Chrontel701xOn();
+	   }
+       }
+
+       if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+           SiS_SetRegOR(SiS_Part1Port,0x1E,0x20);
+       }
+
+       if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
+           SiS_SetRegAND(SiS_Part1Port,0x00,0x7f);
+       }
+
+       if(SiS_IF_DEF_CH70xx == 2) {
+
+       		if(SiS_IsTVOrSomething(HwDeviceExtension, BaseAddr)) {
+           		SiS_Chrontel701xOn2(HwDeviceExtension, BaseAddr);
+         	}
+
+         	if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+           		SiS_ChrontelDoSomething1(HwDeviceExtension, BaseAddr);
+         	} else if(SiS_IsLCDOrLCDA(HwDeviceExtension, BaseAddr)) {
+           		SiS_ChrontelDoSomething1(HwDeviceExtension, BaseAddr);
+        	}
+
+       }
+
+       if(SiS_IF_DEF_CH70xx == 2) {
+       	 	if(!(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr))) {
+ 	   		if(SiS_IsVAMode(HwDeviceExtension, BaseAddr)) {
+	            		SiS_Chrontel701xOn();
+	            		SiS_ChrontelDoSomething4(HwDeviceExtension, BaseAddr);
+           		} else if(SiS_IsLCDOrLCDA(HwDeviceExtension, BaseAddr))  {
+/*	      			if(!SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)) {  */ /* TW: makes no sense */
+            				SiS_Chrontel701xOn();
+            				SiS_ChrontelDoSomething4(HwDeviceExtension, BaseAddr);
+/*            			}   */
+	   		}
+       		}
+       }
+
+    } /* 310 series */
+
+  }  /* LVDS */
+
+}
+
+BOOLEAN
+SiS_CR36BIOSWord23b(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT temp,temp1;
+  UCHAR *ROMAddr;
+
+  if((ROMAddr = (UCHAR *)HwDeviceExtension->pjVirtualRomBase)) {
+     temp = SiS_GetReg1(SiS_P3d4,0x36) & 0xff;
+     temp >>= 4;
+     temp = 1 << temp;
+     temp1 = (ROMAddr[0x23c] << 8) | ROMAddr[0x23b];
+     if(temp1 & temp) return(1);
+     else return(0);
+  } else {
+     return(0);
+  }
+}
+
+BOOLEAN
+SiS_CR36BIOSWord23d(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT temp,temp1;
+  UCHAR *ROMAddr;
+
+  if((ROMAddr = (UCHAR *)HwDeviceExtension->pjVirtualRomBase)) {
+     temp = SiS_GetReg1(SiS_P3d4,0x36) & 0xff;
+     temp >>= 4;
+     temp = 1 << temp;
+     temp1 = (ROMAddr[0x23e] << 8) | ROMAddr[0x23d];
+     if(temp1 & temp) return(1);
+     else return(0);
+  } else {
+     return(0);
+  }
 }
 
 void
-SiS_SetPanelDelay (USHORT DelayTime)
+SiS_SetPanelDelay(UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                  USHORT DelayTime)
 {
-	USHORT PanelID;
+  USHORT PanelID, DelayIndex, Delay, temp;
 
-	PanelID = SiS_GetReg1 (SiS_P3d4, 0x36);
-	PanelID = PanelID >> 4;
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(SiS_VBType & VB_SIS301BLV302BLV) {
+         if(ROMAddr) {
+	     if(!(ROMAddr[0x235] & 0x40)) return;
+	 }
+     }
+  }
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+      temp = SiS_GetReg1(SiS_P3c4,0x18);
+  } else {
+      temp = SiS_GetReg1(SiS_P3c4,0x1b);
+  }
+
+  if( (SiS_VBType & VB_SIS301BLV302BLV) && (!(temp & 0x10)) ) {
+       PanelID = 0x12;
+  } else {
+       PanelID = SiS_GetReg1(SiS_P3d4,0x36);
+  }
+
+  DelayIndex = PanelID >> 4;
+
+  if((DelayTime >= 2) && (PanelID & 0x0f) == 1) {
+    Delay = 3;
+  } else {
+    if(DelayTime >= 2) DelayTime -= 2;
+    if(SiS_IF_DEF_LVDS == 0) {
+       if(!(DelayTime & 0x01)) {
+       		Delay = SiS_PanelDelayTbl[DelayIndex].timer[0];
+       } else {
+       		Delay = SiS_PanelDelayTbl[DelayIndex].timer[1];
+		if(HwDeviceExtension->jChipType >= SIS_315H) {
+                    if(DelayTime & 0x04) Delay = 0x190;
+                }
+       }
+    } else {
+       if(!(DelayTime & 0x01)) {
+       		Delay = SiS_PanelDelayTblLVDS[DelayIndex].timer[0];
+       } else {
+       		Delay = SiS_PanelDelayTblLVDS[DelayIndex].timer[1];
+       }
+    }
+    if(ROMAddr) {
+        if(HwDeviceExtension->jChipType < SIS_315H) {
+          if(ROMAddr[0x220] & 0x40) {
+            if(!(DelayTime & 0x01)) {
+	    	Delay = (USHORT)ROMAddr[0x225];
+            } else {
+	    	Delay = (USHORT)ROMAddr[0x226];
+            }
+          }
+        } else {
+	  if(ROMAddr[0x13c] & 0x40) {
+	    if(!(DelayTime & 0x01)) {
+	    	Delay = (USHORT)ROMAddr[0x141];
+            } else {
+	    	Delay = (USHORT)ROMAddr[0x142];
+		if(DelayTime & 0x04) Delay = 0x190;
+            }
+	  }
+	}
+    }
+  }
+  SiS_ShortDelay(Delay);
+}
 
-	if (DelayTime == 0)
-		SiS_LCD_Wait_Time (SiS_PanelDelayTbl[PanelID].timer[0]);
-	else
-		SiS_LCD_Wait_Time (SiS_PanelDelayTbl[PanelID].timer[1]);
+void
+SiS_LongDelay(USHORT delay)
+{
+  while(delay--) {
+    SiS_GenericDelay(0x19df);   /* 6623 */
+  }
 }
 
 void
-SiS_LCD_Wait_Time (UCHAR DelayTime)
+SiS_ShortDelay(USHORT delay)
 {
-	USHORT i, j;
-	ULONG temp, flag;
-
-	flag = 0;
-	for (i = 0; i < DelayTime; i++) {
-		for (j = 0; j < 66; j++) {
-			temp = SiS_GetReg3 (0x61);
-			temp = temp & 0x10;
-			if (temp == flag)
-				continue;
-			flag = temp;
-		}
-	}
+  while(delay--) {
+      SiS_GenericDelay(0x42);   /* 66 */
+  }
 }
 
-/*301b*/
+void
+SiS_GenericDelay(USHORT delay)
+{
+  USHORT temp,flag;
+
+  flag = SiS_GetReg3(0x61) & 0x10;
+
+  while(delay) {
+      temp = SiS_GetReg3(0x61) & 0x10;
+      if(temp == flag) continue;
+      flag = temp;
+      delay--;
+  }
+}
 
 BOOLEAN
-SiS_Is301B (USHORT BaseAddr)
+SiS_Is301B(USHORT BaseAddr)
 {
-	USHORT flag;
-	flag = SiS_GetReg1 (SiS_Part4Port, 0x01);
-	if (flag > (0x0B0))
-		return (0);	/*301b */
-	else
-		return (1);
+  USHORT flag;
+
+  flag = SiS_GetReg1(SiS_Part4Port,0x01);
+  if(flag >= 0x0B0) return(1);
+  else return(0);
 }
 
 BOOLEAN
-SiS_IsDualEdge (USHORT BaseAddr)
+SiS_CRT2IsLCD(USHORT BaseAddr)
 {
-#ifdef CONFIG_FB_SIS_315
-	USHORT flag;
-	flag = SiS_GetReg1 (SiS_P3d4, 0x38);
-	if (flag & EnableDualEdge)
-		return (0);
-	else
-		return (1);
-#endif
-	return (1);
+  USHORT flag;
+
+  flag = SiS_GetReg1(SiS_P3d4,0x30);
+  if(flag & 0x20) return(1);
+  else return(0);
 }
 
 BOOLEAN
-SiS_IsVAMode (USHORT BaseAddr)
+SiS_IsDualEdge(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
-	USHORT flag;
-	flag = SiS_GetReg1 (SiS_P3d4, 0x38);
-#ifdef CONFIG_FB_SIS_315
-	if ((flag & EnableDualEdge) && (flag & SetToLCDA))
-		return (0);
-	else
-		return (1);
+#ifdef SIS315H
+  USHORT flag;
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     flag = SiS_GetReg1(SiS_P3d4,0x38);
+     if(flag & EnableDualEdge)  return(1);    /* TW: Inverted result */
+     else  return(0);
+  } else
 #endif
-	return (1);
+     return(0);
 }
 
+/* TW: Inverted result! */
 BOOLEAN
-SiS_IsDisableCRT2 (USHORT BaseAddr)
+SiS_IsVAMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
-	USHORT flag;
-	flag = SiS_GetReg1 (SiS_P3d4, 0x30);
-	if (flag & 0x20)
-		return (0);	/*301b */
-	else
-		return (1);
-}
+#ifdef SIS315H
+  USHORT flag;
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     flag = SiS_GetReg1(SiS_P3d4,0x38);
+     if((flag & EnableDualEdge) && (flag & SetToLCDA))
+        return(1);
+     else if(SiS_VBType & VB_SIS301BLV302BLV) {   /* TW: Inserted from 650/301LV BIOS */
+       if(flag) return(1);   			  /* TW: Inserted from 650/301LV BIOS */
+       else     return(0);   			  /* TW: Inserted from 650/301LV BIOS */
+     } else  return(0);
+  } else
+#endif
+     return(0);
+ }
 
-/*end 301b*/
+BOOLEAN
+SiS_WeHaveBacklightCtrl(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+{
+#ifdef SIS315H
+  USHORT flag;
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     flag = SiS_GetReg1(SiS_P3d4,0x79);
+     if(flag & 0x10)  return(1);
+     else             return(0);
+  } else
+#endif
+     return(0);
+ }
 
+#if 0
 BOOLEAN
-SiS_BridgeIsOn (USHORT BaseAddr)
+SiS_Is315E(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
-	USHORT flag;
+#ifdef SIS315H
+  USHORT flag;
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     flag = SiS_GetReg1(SiS_P3d4,0x5f);
+     if(flag & 0x10)  return(1);
+     else      	      return(0);
+  } else
+#endif
+     return(0);
+}
+#endif
 
-	if (SiS_IF_DEF_LVDS == 1) {
-		return (1);
-	} else {
-		flag = SiS_GetReg1 (SiS_Part4Port, 0x00);
-		if ((flag == 1) || (flag == 2))
-			return (1);	/*301b */
-		else
-			return (0);
-	}
+BOOLEAN
+SiS_IsYPbPr(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+{
+#ifdef SIS315H
+  USHORT flag;
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     flag = SiS_GetReg1(SiS_P3d4,0x38);
+     if(flag & 0x08)  return(1);
+     else      	      return(0);
+  } else
+#endif
+     return(0);
 }
 
 BOOLEAN
-SiS_BridgeIsEnable (USHORT BaseAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_IsTVOrSomething(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
-	USHORT flag;
-
-	if (SiS_BridgeIsOn (BaseAddr) == 0) {
-		flag = SiS_GetReg1 (SiS_Part1Port, 0x0);
-		if (HwDeviceExtension->jChipType < SIS_315H) {	/* 300 series */
-			if (flag & 0x0a0) {
-				return 1;
-			} else {
-				return 0;
-			}
-		} else {	/* 310 series */
+  USHORT flag;
+
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     flag = SiS_GetReg1(SiS_P3d4,0x30);
+     if(flag & SetCRT2ToTV) return(1);
+     flag = SiS_GetReg1(SiS_P3d4,0x38);
+     if(flag & 0x08)        return(1);
+     else                   return(0);
+  } else
+#endif
+  {
+     flag = SiS_GetReg1(SiS_P3d4,0x30);
+     if(flag & SetCRT2ToTV) return(1);
+  }
+  return(0);
+}
 
-			if (flag & 0x050) {
-				return 1;
-			} else {
-				return 0;
-			}
+BOOLEAN
+SiS_IsLCDOrLCDA(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
+{
+  USHORT flag;
+
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     flag = SiS_GetReg1(SiS_P3d4,0x30);
+     if(flag & SetCRT2ToLCD) return(1);
+     flag = SiS_GetReg1(SiS_P3d4,0x38);
+     if(flag & SetToLCDA)    return(1);
+     else                    return(0);
+  } else
+#endif
+  {
+   flag = SiS_GetReg1(SiS_P3d4,0x30);
+   if(flag & SetCRT2ToLCD)   return(1);
+  }
+  return(0);
 
-		}
-	}
-	return 0;
 }
 
 BOOLEAN
-SiS_BridgeInSlave ()
+SiS_IsDisableCRT2(USHORT BaseAddr)
 {
-	USHORT flag1;
+  USHORT flag;
 
-	flag1 = SiS_GetReg1 (SiS_P3d4, 0x31);
-	if (flag1 & (SetInSlaveMode >> 8)) {
-		return 1;
-	} else {
-		return 0;
-	}
+  flag = SiS_GetReg1(SiS_P3d4,0x30);
+  if(flag & 0x20) return(0);
+  else            return(1);
 }
 
 BOOLEAN
-SiS_GetLCDResInfo301 (ULONG ROMAddr, USHORT SiS_P3d4, USHORT ModeNo,
-		      USHORT ModeIdIndex)
+SiS_BridgeIsOn(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT temp, modeflag, resinfo = 0;
+  USHORT flag;
 
-	SiS_LCDResInfo = 0;
-	SiS_LCDTypeInfo = 0;
-	SiS_LCDInfo = 0;
+  if(SiS_IF_DEF_LVDS == 1) {
+     return(0);   					/* TW: Changed from 1 to 0! */
+  } else {
+#if 0   /* TW: Commented for test on bridge-less systems */
+     if(HwDeviceExtension->jChipType >= SIS_315H) {    	/* TW: New (from 630/301B BIOS - not done there) */
+#endif
+        flag = SiS_GetReg1(SiS_Part4Port,0x00);
+        if((flag == 1) || (flag == 2)) return(0);       /* TW: Changed from 1 to 0! */
+        else return(1);                                 /* TW: Changed from 0 to 1! */
+#if 0
+     } else  return(0);					/* TW: New (from 630/301B BIOS - always return 0) */
+#endif
+  }
+}
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ModeFlag  */
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;	/*si+Ext_ResInfo */
-	}
 
-	if (!(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))) {
-		return 0;
-	}
-	if (!(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2))) {
-		return 0;
-	}
-	temp = SiS_GetReg1 (SiS_P3d4, 0x36);
-	SiS_LCDTypeInfo = temp >> 4;
-	SiS_LCDResInfo = temp & 0x0F;
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (SiS_LCDResInfo < Panel1024x768)
-			SiS_LCDResInfo = Panel1024x768;
-	} else {
-		if (SiS_LCDResInfo < Panel800x600)
-			SiS_LCDResInfo = Panel800x600;
-	}
-	if (SiS_LCDResInfo > Panel640x480)
-		SiS_LCDResInfo = Panel1024x768;
-
-	temp = SiS_GetReg1 (SiS_P3d4, 0x37);
-	SiS_LCDInfo = temp;
-
-	if (SiS_IF_DEF_LVDS == 1) {
-		if (modeflag & HalfDCLK) {
-			if (SiS_IF_DEF_TRUMPION == 0) {
-				if (!(SiS_LCDInfo & LCDNonExpanding)) {
-					if (ModeNo > 0x13) {
-						if (SiS_LCDResInfo ==
-						    Panel1024x768) {
-							if (resinfo == 4) {	/* 512x384  */
-								SiS_SetFlag =
-								    SiS_SetFlag
-								    |
-								    EnableLVDSDDA;
-							}
-						} else {
-							if (SiS_LCDResInfo ==
-							    Panel800x600) {
-								if (resinfo == 3) {	/*400x300  */
-									SiS_SetFlag
-									    =
-									    SiS_SetFlag
-									    |
-									    EnableLVDSDDA;
-								}
-							}
-						}
-					}
-				} else {
-					SiS_SetFlag =
-					    SiS_SetFlag | EnableLVDSDDA;
-				}
-			} else {
-				SiS_SetFlag = SiS_SetFlag | EnableLVDSDDA;
-			}
-		}
-	}
+BOOLEAN
+SiS_BridgeIsEnable(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT flag;
+
+  if(SiS_BridgeIsOn(BaseAddr,HwDeviceExtension) == 0) {
+    flag=SiS_GetReg1(SiS_Part1Port,0x00);
+    if(HwDeviceExtension->jChipType < SIS_315H) {
+      /* 300 series */
+      if(flag & 0x0a0) return 1;
+      else	       return 0;
+    } else {
+      /* 310 series */
+      if(flag & 0x050) return 1;
+      else             return 0;
+    }
+  }
+  return 0;
+}
 
-	if (SiS_VBInfo & SetInSlaveMode) {
-		if (SiS_VBInfo & SetNotSimuMode) {
-			SiS_SetFlag = SiS_SetFlag | LCDVESATiming;
-		}
-	} else {
-		SiS_SetFlag = SiS_SetFlag | LCDVESATiming;
-	}
-	return 1;
+BOOLEAN
+SiS_BridgeInSlave()
+{
+  USHORT flag1;
+
+  flag1 = SiS_GetReg1(SiS_P3d4,0x31);
+  if(flag1 & (SetInSlaveMode >> 8)) return 1;
+  else return 0;
 }
 
+/* TW: New from 650/301LV BIOS */
 void
-SiS_PresetScratchregister (USHORT SiS_P3d4,
-			   PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetHiVision(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	/*SiS_SetReg1(SiS_P3d4,0x30,0x21);  */
-	/*SiS_SetReg1(SiS_P3d4,0x31,0x41);  */
-	/*SiS_SetReg1(SiS_P3d4,0x32,0x28);  */
-	/*SiS_SetReg1(SiS_P3d4,0x33,0x22);  */
-	/*SiS_SetReg1(SiS_P3d4,0x35,0x43);  */
-	/*SiS_SetReg1(SiS_P3d4,0x36,0x01);  */
-	/*SiS_SetReg1(SiS_P3d4,0x37,0x00);  */
+  SiS_HiVision = 0;
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     if(SiS_VBType & VB_SIS301BLV302BLV) {
+        if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+           SiS_HiVision = SiS_GetReg1(SiS_P3d4,0x38);
+	   SiS_HiVision &= 0x38;
+	   SiS_HiVision >>= 3;
+        }
+     }
+  }
 }
 
-void
-SiS_LongWait ()
+/* TW: Checked against 650/LVDS and 650/301LV BIOS */
+BOOLEAN
+SiS_GetLCDResInfo301(UCHAR *ROMAddr,USHORT SiS_P3d4,USHORT ModeNo,
+               USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT i;
+  USHORT temp,modeflag,resinfo=0;
+
+  SiS_LCDResInfo = 0;
+  SiS_LCDTypeInfo = 0;
+  SiS_LCDInfo = 0;
+
+  if (ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+  }
+
+  if(!(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)))   return 0;
+
+  if(!(SiS_VBInfo & (SetSimuScanMode | SwitchToCRT2))) return 0;
+
+  temp = SiS_GetReg1(SiS_P3d4,0x36);
+
+  /*fstn*: Fake CR36 (TypeInfo 2, ResInfo Panel320x480) */
+  if(SiS_IF_DEF_FSTN){
+   	temp = 0x20 | Panel320x480;
+   	SiS_SetReg1(SiS_P3d4,0x36,temp);
+  }
+
+  SiS_LCDTypeInfo = temp >> 4;   /* BIOS uses entire CR36 - 1 */
+  SiS_LCDResInfo = temp & 0x0F;
+
+  if(SiS_IF_DEF_FSTN){
+       	SiS_LCDResInfo = Panel320x480;
+  }
+
+  if(SiS_IF_DEF_LVDS == 0) {
+    	if(SiS_LCDResInfo < PanelMin301) SiS_LCDResInfo = PanelMin301;
+  } else {
+    	if(SiS_LCDResInfo < PanelMinLVDS) SiS_LCDResInfo = PanelMinLVDS;
+  }
+
+  if(SiS_LCDResInfo > PanelMax) SiS_LCDResInfo = Panel1024x768;
+
+  temp=SiS_GetReg1(SiS_P3d4,0x37);
+  if(SiS_IF_DEF_FSTN){
+        /* TW: Fake LVDS bridge for FSTN */
+      	temp = 0x04;
+      	SiS_SetReg1(SiS_P3d4,0x37,temp);
+  }
+  SiS_LCDInfo = temp;
+  /* TW: Inserted entire 315-block from 650/LVDS BIOS */
+  if(SiS_IF_DEF_LVDS == 1) {
+     if (HwDeviceExtension->jChipType >= SIS_315H) {
+        temp = SiS_GetReg1(SiS_P3d4,0x39);
+        if(temp & 0x01) {
+	   SiS_LCDInfo &= 0xFFEF;     /* TW: What is this? */
+	   SiS_LCDInfo |= 0x0100;     /* TW: What is this? */
+        }
+     }
+  }
 
-	i = SiS_GetReg1 (SiS_P3c4, 0x1F);
-	if (!(i & 0xC0)) {
+#ifdef LINUX_KERNEL
+  printk(KERN_INFO "sisfb: (LCDInfo = 0x%x LCDResInfo = 0x%x LCDTypeInfo = 0x%x)\n",
+                   SiS_LCDInfo, SiS_LCDResInfo, SiS_LCDTypeInfo);
+#endif
+#ifdef LINUX_XF86
+  xf86DrvMsg(0, X_INFO, "(init301: LCDInfo = 0x%x LCDResInfo = 0x%x LCDTypeInfo = 0x%x)\n",
+			SiS_LCDInfo, SiS_LCDResInfo, SiS_LCDTypeInfo);
+#endif
 
-		for (i = 0; i < 0xFFFF; i++) {
-			if (!(SiS_GetReg2 (SiS_P3da) & 0x08))
-				break;
-		}
-		for (i = 0; i < 0xFFFF; i++) {
-			if ((SiS_GetReg2 (SiS_P3da) & 0x08))
-				break;
-		}
-	}
+  /* TW: With Trumpion, always Expanding */
+  if(SiS_IF_DEF_TRUMPION != 0){
+       SiS_LCDInfo &= (~LCDNonExpanding);
+  }
+
+  /* TW: Removed LVDS==1 check here; done foe 301B BIOSes as well */
+  if(modeflag & HalfDCLK){
+        if(SiS_IF_DEF_TRUMPION == 0){
+	    if((!(SiS_LCDInfo & 0x0100)) || (SiS_IF_DEF_LVDS == 0)) {  /* TW: Inserted from 650/LVDS BIOS */
+               if(!(SiS_LCDInfo & LCDNonExpanding)){
+	          if(!((SiS_IF_DEF_LVDS == 1) && (SiS_LCDResInfo == Panel640x480))){  /* TW: Inserted from 650/LVDS BIOS */
+                     if(ModeNo > 0x13) {
+                        if(SiS_LCDResInfo == Panel1024x768){
+                           if(resinfo == 4){                              /* 512x384  */
+                              SiS_SetFlag |= EnableLVDSDDA;
+                           }
+                        } else {
+                           if(SiS_LCDResInfo == Panel800x600){
+                              if(resinfo == 3){                           /* 400x300  */
+                                 SiS_SetFlag |= EnableLVDSDDA;
+                              }
+                           }
+                        }
+                     }
+		   } else {
+		     SiS_SetFlag |= EnableLVDSDDA;
+		   }
+               } else { /* NonExpanding */
+                 SiS_SetFlag |= EnableLVDSDDA;
+               }
+           } else {                          /* TW: Inserted from 650/LVDS BIOS */
+	     SiS_SetFlag |= EnableLVDSDDA;   /* TW: Inserted from 650/LVDS BIOS */
+	   }                                 /* TW: Inserted from 650/LVDS BIOS */
+        } else { /* TRUMPION */
+          SiS_SetFlag |= EnableLVDSDDA;
+        }
+  }
+
+  /* TW: wdr: if (VBInfo & LCD) && (VBInfo & (SetSimuScanMode | SwitchToCRT2)) { */
+  if(SiS_VBInfo & SetInSlaveMode){
+    	if(SiS_VBInfo & SetNotSimuMode){
+      		SiS_SetFlag |= LCDVESATiming;
+    	}
+  } else {
+    	SiS_SetFlag |= LCDVESATiming;
+  }
+
+  return 1;
 }
 
 void
-SiS_VBLongWait ()
+SiS_PresetScratchregister(USHORT SiS_P3d4,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempal, temp, i, j;
-
-	if (!(SiS_VBInfo & SetCRT2ToTV)) {
-		temp = 0;
-		for (i = 0; i < 3; i++) {
-			for (j = 0; j < 100; j++) {
-				tempal = SiS_GetReg2 (SiS_P3da);
-				if (temp & 0x01) {	/* VBWaitMode2  */
-					if ((tempal & 0x08)) {
-						continue;
-					}
-					if (!(tempal & 0x08)) {
-						break;
-					}
-				} else {	/* VBWaitMode1  */
-					if (!(tempal & 0x08)) {
-						continue;
-					}
-					if ((tempal & 0x08)) {
-						break;
-					}
-				}
-			}
-			temp = temp ^ 0x01;
-		}
-	} else {
-		SiS_LongWait ();
-	}
-	return;
+  /*SiS_SetReg1(SiS_P3d4,0x30,0x21);  */
+  /*SiS_SetReg1(SiS_P3d4,0x31,0x41);  */
+  /*SiS_SetReg1(SiS_P3d4,0x32,0x28);  */
+  /*SiS_SetReg1(SiS_P3d4,0x33,0x22);  */
+  /*SiS_SetReg1(SiS_P3d4,0x35,0x43);  */
+  /*SiS_SetReg1(SiS_P3d4,0x36,0x01);  */
+  /*SiS_SetReg1(SiS_P3d4,0x37,0x00);  */
 }
 
-BOOLEAN
-SiS_WaitVBRetrace (USHORT BaseAddr)
+void
+SiS_LongWait()
 {
-	USHORT temp;
+  USHORT i;
+
+  i=SiS_GetReg1(SiS_P3c4,0x1F);
+  if(!(i&0xC0)) {
+
+    for(i=0; i<0xFFFF; i++) {
+       if(!(SiS_GetReg2(SiS_P3da) & 0x08))
+         break;
+    }
+    for(i=0; i<0xFFFF; i++) {
+       if((SiS_GetReg2(SiS_P3da) & 0x08))
+         break;
+    }
+  }
+}
 
-	return 0;
+void
+SiS_VBLongWait()
+{
+  if(!(SiS_VBInfo & SetCRT2ToTV)) {
+    SiS_VBWait();
+  } else {
+    SiS_LongWait();
+  }
+  return;
+}
 
-	temp = SiS_GetReg1 (SiS_Part1Port, 0x00);
-	if (!(temp & 0x80)) {
-		return 0;
-	}
+void
+SiS_VBWait(void)
+{
+  USHORT tempal,temp,i,j;
+
+  temp=0;
+  for(i=0;i<3;i++) {
+    for(j=0;j<100;j++) {
+       tempal=SiS_GetReg2(SiS_P3da);
+       if(temp&0x01) {
+          if((tempal&0x08))  continue;
+          if(!(tempal&0x08)) break;
+       } else {
+          if(!(tempal&0x08)) continue;
+          if((tempal&0x08))  break;
+       }
+    }
+    temp=temp^0x01;
+  }
+}
 
-	for (temp = 0; temp == 0;) {
-		temp = SiS_GetReg1 (SiS_Part1Port, 0x25);
-		temp = temp & 0x01;
-	}
-	for (; temp > 0;) {
-		temp = SiS_GetReg1 (SiS_Part1Port, 0x25);
-		temp = temp & 0x01;
-	}
-	return 1;
+void
+SiS_WaitVBRetrace(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(SiS_VBType & VB_SIS301BLV302BLV) {
+        if(!(SiS_GetReg1(SiS_Part1Port,0x00) & 0x20)) return;
+     }
+     if(!(SiS_GetReg1(SiS_Part1Port,0x00) & 0x80)) {
+        SiS_WaitRetrace1(HwDeviceExtension);
+     } else {
+        SiS_WaitRetrace2(HwDeviceExtension);
+     }
+  } else {
+     if(!(SiS_GetReg1(SiS_Part1Port,0x00) & 0x40)) {
+        SiS_WaitRetrace1(HwDeviceExtension);
+     } else {
+        SiS_WaitRetrace2(HwDeviceExtension);
+     }
+  }
 }
 
 void
-SiS_SetRegANDOR (USHORT Port, USHORT Index, USHORT DataAND, USHORT DataOR)
+SiS_WaitRetrace1(PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT temp;
+  USHORT i,watchdog;
+  
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     if(SiS_GetReg1(SiS_P3c4,0x1f) & 0xc0) return;
+     watchdog = 65535;
+     while( (SiS_GetReg2(SiS_P3da) & 0x08) && --watchdog);
+     watchdog = 65535;
+     while( (!(SiS_GetReg2(SiS_P3da) & 0x08)) && --watchdog);
+  } else {
+#if 0  /* TW: Not done in A901 BIOS */
+     if(SiS_VBType & VB_SIS301BLV302BLV) {
+        if(SiS_GetReg1(SiS_P3c4,0x1f) & 0xc0) return;
+     }
+#endif
+     for(i=0; i<10; i++) {
+        watchdog = 65535;
+        while( (SiS_GetReg2(SiS_P3da) & 0x08) && --watchdog);
+	if(watchdog) break;
+     }
+     for(i=0; i<10; i++) {
+        watchdog = 65535;
+        while( (!(SiS_GetReg2(SiS_P3da) & 0x08)) && --watchdog);
+	if(watchdog) break;
+     }
+  }
+}
 
-	temp = SiS_GetReg1 (Port, Index);	/* SiS_Part1Port index 02 */
-	temp = (temp & (DataAND)) | DataOR;
-	SiS_SetReg1 (Port, Index, temp);
+void
+SiS_WaitRetrace2(PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT i,watchdog,temp;
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+     watchdog = 65535;
+     while( (SiS_GetReg1(SiS_Part1Port,0x30) & 0x02) && --watchdog);
+     watchdog = 65535;
+     while( (!(SiS_GetReg1(SiS_Part1Port,0x30) & 0x02)) && --watchdog);
+  } else {
+     for(i=0; i<10; i++) {
+        watchdog = 65535;
+	while( (temp = SiS_GetReg1(SiS_Part1Port,0x25) & 0x02) && --watchdog);
+	if(watchdog) break;
+     }
+     for(i=0; i<10; i++) {
+        watchdog = 65535;
+	while( (!(temp = SiS_GetReg1(SiS_Part1Port,0x25) & 0x02)) && --watchdog);
+	if(watchdog) break;
+     }
+  }
 }
 
+/* =========== Set and Get register routines ========== */
+
 void
-SiS_SetRegAND (USHORT Port, USHORT Index, USHORT DataAND)
+SiS_SetRegANDOR(USHORT Port,USHORT Index,USHORT DataAND,USHORT DataOR)
 {
-	USHORT temp;
+  USHORT temp;
 
-	temp = SiS_GetReg1 (Port, Index);	/* SiS_Part1Port index 02 */
-	temp = temp & DataAND;
-	SiS_SetReg1 (Port, Index, temp);
+  temp=SiS_GetReg1(Port,Index);     /* SiS_Part1Port index 02 */
+  temp=(temp&(DataAND))|DataOR;
+  SiS_SetReg1(Port,Index,temp);
 }
 
 void
-SiS_SetRegOR (USHORT Port, USHORT Index, USHORT DataOR)
+SiS_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND)
 {
-	USHORT temp;
+  USHORT temp;
 
-	temp = SiS_GetReg1 (Port, Index);	/* SiS_Part1Port index 02 */
-	temp = temp | DataOR;
-	SiS_SetReg1 (Port, Index, temp);
+  temp=SiS_GetReg1(Port,Index);     /* SiS_Part1Port index 02 */
+  temp=temp&DataAND;
+  SiS_SetReg1(Port,Index,temp);
 }
 
-void
-SiS_SetGroup2 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-	       USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
-	       PSIS_HW_DEVICE_INFO HwDeviceExtension)
+void SiS_SetRegOR(USHORT Port,USHORT Index,USHORT DataOR)
 {
-	USHORT i, j, tempax, tempbx, tempcx, temp, temp3;
-	USHORT push1, push2, temp1;
-	UCHAR *PhasePoint;
-	UCHAR *TimingPoint;
-	USHORT modeflag, resinfo, crt2crtc, resindex, xres;
-	ULONG longtemp, tempeax, tempebx, temp2, tempecx;
-	USHORT SiS_RY1COE = 0, SiS_RY2COE = 0, SiS_RY3COE = 0, SiS_RY4COE =
-	    0, SiS_RY5COE = 0, SiS_RY6COE = 0, SiS_RY7COE = 0;
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-		resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
-		crt2crtc = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-		crt2crtc = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-	}
+  USHORT temp;
 
-	tempcx = SiS_VBInfo;
-	tempax = (tempcx & 0x00FF) << 8;
-	tempbx = (tempcx & 0x00FF) | ((tempcx & 0x00FF) << 8);
-	tempbx = tempbx & 0x0410;
-	temp = (tempax & 0x0800) >> 8;
-	temp = temp >> 1;
-	temp = temp | (((tempbx & 0xFF00) >> 8) << 1);
-	temp = temp | ((tempbx & 0x00FF) >> 3);
-	temp = temp ^ 0x0C;
-
-	PhasePoint = SiS_PALPhase;
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {	/* PALPhase */
-		temp = temp ^ 0x01;
-		if (SiS_VBInfo & SetInSlaveMode) {
-			TimingPoint = SiS_HiTVSt2Timing;
-			if (SiS_SetFlag & TVSimuMode) {
-				if (modeflag & Charx8Dot)
-					TimingPoint = SiS_HiTVSt1Timing;
-				else
-					TimingPoint = SiS_HiTVTextTiming;
-			}
-		} else
-			TimingPoint = SiS_HiTVExtTiming;
-	} else {
-		if (SiS_VBInfo & SetPALTV) {
-			if ((SiS_VBType & VB_SIS301B)
-			    || (SiS_VBType & VB_SIS302B)) PhasePoint = SiS_PALPhase2;	/* PALPhase */
-			else
-				PhasePoint = SiS_PALPhase;
+  temp=SiS_GetReg1(Port,Index);     /* SiS_Part1Port index 02 */
+  temp=temp|DataOR;
+  SiS_SetReg1(Port,Index,temp);
+}
 
-			TimingPoint = SiS_PALTiming;
-		} else {
-			temp = temp | 0x10;
-			if ((SiS_VBType & VB_SIS301B)
-			    || (SiS_VBType & VB_SIS302B)) PhasePoint = SiS_NTSCPhase2;	/* PALPhase */
-			else
-				PhasePoint = SiS_NTSCPhase;
+/* ========================================================= */
 
-			TimingPoint = SiS_NTSCTiming;
-		}
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x0, temp);
-
-#ifdef CONFIG_FB_SIS_300
-	/*add PALMN */
-	if ((HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		if (SiS_VBInfo & SetCRT2ToTV) {
-			temp = SiS_GetReg1 (SiS_P3d4, 0x31);
-			temp = temp & 0x01;
-			if (temp) {
-				temp1 = SiS_GetReg1 (SiS_P3d4, 0x35);
-				temp1 = temp1 & 0x40;
-				if (temp1)
-					PhasePoint = SiS_PALMPhase;
-				temp1 = SiS_GetReg1 (SiS_P3d4, 0x35);
-				temp1 = temp1 & 0x80;
-				if (temp1)
-					PhasePoint = SiS_PALNPhase;
-			}
-		}
-	}
-/*end add*/
+/* TW: Set 301 TV Encoder (and some LCD relevant) registers */
+/* TW: Checked against 650/301LV and 630/301B (I+II) */
+void
+SiS_SetGroup2(USHORT BaseAddr,UCHAR *ROMAddr, USHORT ModeNo,
+                   USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+		   PSIS_HW_DEVICE_INFO HwDeviceExtension)
+{
+  USHORT i,j,tempax,tempbx,tempcx,temp,temp3;
+  USHORT push1,push2,temp1;
+  UCHAR *PhasePoint;
+  UCHAR *TimingPoint;
+  SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL;
+  USHORT  modeflag,resinfo,crt2crtc,resindex,CRT2Index;
+  ULONG longtemp,tempeax,tempebx,temp2,tempecx;
+  USHORT  SiS_RY1COE=0,SiS_RY2COE=0,SiS_RY3COE=0,SiS_RY4COE=0;
+  UCHAR atable[] = {
+           0xc3,0x9e,0xc3,0x9e,0x02,0x02,0x02,
+	   0xab,0x87,0xab,0x9e,0xe7,0x02,0x02
+  };
+
+  /* TW: Inserted from 650/301LV BIOS */
+  if(SiS_VBInfo & SetCRT2ToLCDA) return;
+
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;      /* si+St_ResInfo */
+    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+    	crt2crtc = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;     /* si+Ext_ResInfo */
+    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    	crt2crtc = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+  }
+
+  tempcx = SiS_VBInfo;
+  tempax = (tempcx & 0x00FF) << 8;
+  tempbx = (tempcx & 0x00FF) | ((tempcx & 0x00FF) << 8);
+  tempbx &= 0x0410;
+  temp = (tempax & 0x0800) >> 8;
+  temp >>= 1;
+  temp |= (((tempbx & 0xFF00) >> 8) << 1);
+  temp |= ((tempbx & 0x00FF) >> 3);
+  temp = temp ^ 0x0C;
+
+  PhasePoint = SiS_PALPhase;
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {          /* PALPhase */
+    temp = temp ^ 0x01;
+    if(SiS_VBInfo & SetInSlaveMode) {
+      TimingPoint = SiS_HiTVSt2Timing;
+      if(SiS_SetFlag & TVSimuMode) {
+        if(modeflag & Charx8Dot) TimingPoint = SiS_HiTVSt1Timing;
+        else TimingPoint = SiS_HiTVTextTiming;
+      }
+    } else TimingPoint = SiS_HiTVExtTiming;
+  } else {
 #endif
-#ifdef CONFIG_FB_SIS_315
-	/*add PALMN */
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		temp = SiS_GetReg1 (SiS_P3d4, 0x31);
-		temp = temp & 0x01;
-		if (temp) {
-			temp1 = SiS_GetReg1 (SiS_P3d4, 0x38);
-			temp1 = temp1 & 0x40;
-			if (temp1)
-				PhasePoint = SiS_PALMPhase;
-			temp1 = SiS_GetReg1 (SiS_P3d4, 0x38);
-			temp1 = temp1 & 0x80;
-			if (temp1)
-				PhasePoint = SiS_PALNPhase;
-		}
-	}
-	/*end add */
+    if(SiS_VBInfo & SetPALTV){
+      if( (SiS_VBType & VB_SIS301BLV302BLV) &&    /* TW: @@@ 650+301LV BIOS only tests 301B, 302B */
+          ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
+         PhasePoint = SiS_PALPhase2;
+      else
+         PhasePoint = SiS_PALPhase;
+
+         TimingPoint = SiS_PALTiming;
+    } else {
+        temp |= 0x10;
+        if( (SiS_VBType & VB_SIS301BLV302BLV) &&  /* TW: @@@ 650+301LV BIOS only tests 301B, 302B */
+	    ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
+        	PhasePoint = SiS_NTSCPhase2;
+        else
+        	PhasePoint = SiS_NTSCPhase;
+      
+        TimingPoint = SiS_NTSCTiming;
+    }
+#ifdef oldHV
+  }
+#endif
+  SiS_SetReg1(SiS_Part2Port,0x00,temp);
+
+#ifdef SIS300
+  if((HwDeviceExtension->jChipType==SIS_630)||
+     (HwDeviceExtension->jChipType==SIS_730)) {
+     	if(SiS_VBInfo & SetCRT2ToTV) {
+             if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
+                  temp1 = SiS_GetReg1(SiS_P3d4,0x35);
+                  if(temp1 & 0x40)
+                     	PhasePoint = SiS_PALMPhase;
+			if( (SiS_VBType & VB_SIS301BLV302BLV) &&  /* TW: From 650/301LV BIOS (see note above) */
+			    ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
+		           PhasePoint = SiS_PALMPhase2;
+                  if(temp1 & 0x80)
+                     	PhasePoint = SiS_PALNPhase;
+			if( (SiS_VBType & VB_SIS301BLV302BLV) &&  /* TW: From 650/301LV BIOS (see note above) */
+			    ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
+		           PhasePoint = SiS_PALNPhase2;
+             }
+        }
+  }
 #endif
-	for (i = 0x31, j = 0; i <= 0x34; i++, j++) {
-		SiS_SetReg1 (SiS_Part2Port, i, PhasePoint[j]);
-	}
-	for (i = 0x01, j = 0; i <= 0x2D; i++, j++) {
-		SiS_SetReg1 (SiS_Part2Port, i, TimingPoint[j]);
-	}
-	for (i = 0x39; i <= 0x45; i++, j++) {
-		SiS_SetReg1 (SiS_Part2Port, i, TimingPoint[j]);	/* di->temp2[j] */
-	}
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		SiS_SetRegANDOR (SiS_Part2Port, 0x3A, 0x1F, 0x00);
-	}
-	temp = SiS_NewFlickerMode;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x0A, 0xFF, temp);
-
-	SiS_SetReg1 (SiS_Part2Port, 0x35, 0x00);	/*301b */
-	SiS_SetReg1 (SiS_Part2Port, 0x36, 0x00);
-	SiS_SetReg1 (SiS_Part2Port, 0x37, 0x00);
-	SiS_SetReg1 (SiS_Part2Port, 0x38, SiS_RY1COE);
-	SiS_SetReg1 (SiS_Part2Port, 0x48, SiS_RY2COE);
-	SiS_SetReg1 (SiS_Part2Port, 0x49, SiS_RY3COE);
-	SiS_SetReg1 (SiS_Part2Port, 0x4a, SiS_RY4COE);
-/*add to change 630+301b filter*/
-
-	resindex = SiS_GetResInfo (ROMAddr, ModeNo, ModeIdIndex);
-	if (ModeNo <= 0x13) {
-		xres = SiS_StResInfo[resindex].HTotal;
-	} else {
-		xres = SiS_ModeResInfo[resindex].HTotal;	/* xres->ax */
-	}
-	if (xres == 640) {
-		SiS_RY1COE = 0xFF;
-		SiS_RY2COE = 0x03;
-		SiS_RY3COE = 0x02;
-		SiS_RY4COE = 0xF6;
-		SiS_RY5COE = 0xFC;
-		SiS_RY6COE = 0x27;
-		SiS_RY7COE = 0x46;
-	}
-	if (xres == 800) {
-		SiS_RY1COE = 0x01;
-		SiS_RY2COE = 0x01;
-		SiS_RY3COE = 0xFC;
-		SiS_RY4COE = 0xF8;
-		SiS_RY5COE = 0x08;
-		SiS_RY6COE = 0x26;
-		SiS_RY7COE = 0x38;
-	}
-	if (xres == 1024) {
-		SiS_RY1COE = 0xFF;
-		SiS_RY2COE = 0xFF;
-		SiS_RY3COE = 0xFC;
-		SiS_RY4COE = 0x00;
-		SiS_RY5COE = 0x0F;
-		SiS_RY6COE = 0x22;
-		SiS_RY7COE = 0x28;
-	}
-	if (xres == 720) {
-		SiS_RY1COE = 0x01;
-		SiS_RY2COE = 0x02;
-		SiS_RY3COE = 0xFE;
-		SiS_RY4COE = 0xF7;
-		SiS_RY5COE = 0x03;
-		SiS_RY6COE = 0x27;
-		SiS_RY7COE = 0x3c;
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x35, SiS_RY1COE);	/*301b */
-	SiS_SetReg1 (SiS_Part2Port, 0x36, SiS_RY2COE);
-	SiS_SetReg1 (SiS_Part2Port, 0x37, SiS_RY3COE);
-	SiS_SetReg1 (SiS_Part2Port, 0x38, SiS_RY4COE);
-	SiS_SetReg1 (SiS_Part2Port, 0x48, SiS_RY5COE);
-	SiS_SetReg1 (SiS_Part2Port, 0x49, SiS_RY6COE);
-	SiS_SetReg1 (SiS_Part2Port, 0x4a, SiS_RY7COE);
-
-/*end add*/
-
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV)
-		tempax = 950;
-	else {
-		if (SiS_VBInfo & SetPALTV)
-			tempax = 520;
-		else
-			tempax = 440;
-	}
-	if (SiS_VDE <= tempax) {
-		tempax = tempax - SiS_VDE;
-		tempax = tempax >> 2;
-		tempax = (tempax & 0x00FF) | ((tempax & 0x00FF) << 8);
-		push1 = tempax;
-		temp = (tempax & 0xFF00) >> 8;
-		temp = temp + (USHORT) TimingPoint[0];
-		SiS_SetReg1 (SiS_Part2Port, 0x01, temp);
-		tempax = push1;
-		temp = (tempax & 0xFF00) >> 8;
-		temp = temp + TimingPoint[1];
-		SiS_SetReg1 (SiS_Part2Port, 0x02, temp);
-	}
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (SiS_VBInfo & SetCRT2ToTV) && (SiS_VGAHDE == 1024)) {
-		if (SiS_VBInfo & SetPALTV) {
-			SiS_SetReg1 (SiS_Part2Port, 0x01, 0x19);
-			SiS_SetReg1 (SiS_Part2Port, 0x02, 0x52);
-		} else {
-			SiS_SetReg1 (SiS_Part2Port, 0x01, 0x0B);
-			SiS_SetReg1 (SiS_Part2Port, 0x02, 0x11);
-		}
-	}
 
-	tempcx = SiS_HT - 1;
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-		tempcx = tempcx - 1;
-	}
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part2Port, 0x1B, temp);
-	temp = (tempcx & 0xFF00) >> 8;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x1D, ~0x0F, temp);
-
-	tempcx = SiS_HT >> 1;
-	push1 = tempcx;		/* push cx */
-	tempcx = tempcx + 7;
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-		tempcx = tempcx - 4;
-	}
-	temp = (tempcx & 0x00FF);
-	temp = temp << 4;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x22, 0x0F, temp);
-
-	tempbx = TimingPoint[j] | ((TimingPoint[j + 1]) << 8);
-	tempbx = tempbx + tempcx;
-	push2 = tempbx;
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part2Port, 0x24, temp);
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp << 4;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x25, 0x0F, temp);
-
-	tempbx = push2;
-	tempbx = tempbx + 8;
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-		tempbx = tempbx - 4;
-		tempcx = tempbx;
-	}
-	temp = (tempbx & 0x00FF) << 4;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x29, 0x0F, temp);
-
-	j = j + 2;
-	tempcx = tempcx + (TimingPoint[j] | ((TimingPoint[j + 1]) << 8));
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part2Port, 0x27, temp);
-	temp = ((tempcx & 0xFF00) >> 8) << 4;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x28, 0x0F, temp);
-
-	tempcx = tempcx + 8;
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-		tempcx = tempcx - 4;
-	}
-	temp = tempcx & 0xFF;
-	temp = temp << 4;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x2A, 0x0F, temp);
-
-	tempcx = push1;		/* pop cx */
-	j = j + 2;
-	temp = TimingPoint[j] | ((TimingPoint[j + 1]) << 8);
-	tempcx = tempcx - temp;
-	temp = tempcx & 0x00FF;
-	temp = temp << 4;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x2D, 0x0F, temp);
-
-	tempcx = tempcx - 11;
-	if (!(SiS_VBInfo & SetCRT2ToTV)) {
-		tempax = SiS_GetVGAHT2 ();
-		tempcx = tempax - 1;
-	}
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part2Port, 0x2E, temp);
-
-	tempbx = SiS_VDE;
-	if (SiS_VGAVDE == 360)
-		tempbx = 746;
-	if (SiS_VGAVDE == 375)
-		tempbx = 746;
-	if (SiS_VGAVDE == 405)
-		tempbx = 853;
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		tempbx = tempbx >> 1;
-	}
-	tempbx = tempbx - 2;
-	temp = tempbx & 0x00FF;
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-		if (SiS_VBInfo & SetInSlaveMode) {
-			if (ModeNo == 0x2f)
-				temp = temp + 1;
-		}
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x2F, temp);
-
-	temp = (tempcx & 0xFF00) >> 8;
-	temp = temp | (((tempbx & 0xFF00) >> 8) << 6);
-	if (!(SiS_VBInfo & SetCRT2ToHiVisionTV)) {
-		temp = temp | 0x10;
-		if (!(SiS_VBInfo & SetCRT2ToSVIDEO)) {
-			temp = temp | 0x20;
-		}
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x30, temp);
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {	/*tv gatingno */
-		tempbx = SiS_VDE;
-		if (SiS_VBInfo & SetCRT2ToTV) {
-			tempbx = tempbx >> 1;
-		}
-		temp = (((tempbx - 3) & 0x0300) >> 8) << 5;
-		SiS_SetReg1 (SiS_Part2Port, 0x46, temp);
-		temp = (tempbx - 3) & 0x00FF;
-		SiS_SetReg1 (SiS_Part2Port, 0x47, temp);
-	}
-/*end 301b*/
-
-	tempbx = tempbx & 0x00FF;
-	if (!(modeflag & HalfDCLK)) {
-		tempcx = SiS_VGAHDE;
-		if (tempcx >= SiS_HDE) {
-			tempbx = tempbx | 0x2000;
-			tempax = tempax & 0x00FF;
-		}
-	}
-	tempcx = 0x0101;
-
-	if (SiS_VBInfo & (SetCRT2ToHiVisionTV | SetCRT2ToTV)) {	/*301b */
-		if (SiS_VGAHDE >= 1024) {
-			tempcx = 0x1920;
-			if (SiS_VGAHDE >= 1280) {
-				tempcx = 0x1420;
-				tempbx = tempbx & 0xDFFF;
-			}
-		}
-	}
-	if (!(tempbx & 0x2000)) {
-		if (modeflag & HalfDCLK) {
-			tempcx = (tempcx & 0xFF00) | ((tempcx & 0x00FF) << 1);
-		}
-		push1 = tempbx;
-		tempeax = SiS_VGAHDE;
-		tempebx = (tempcx & 0xFF00) >> 8;
-		longtemp = tempeax * tempebx;
-		tempecx = tempcx & 0x00FF;
-		longtemp = longtemp / tempecx;
-		/*301b */
-		tempecx = 8 * 1024;
-		if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-			tempecx = tempecx * 8;
-		}
-		longtemp = longtemp * tempecx;
-		tempecx = SiS_HDE;
-		temp2 = longtemp % tempecx;
-		tempeax = longtemp / tempecx;
-		if (temp2 != 0) {
-			tempeax = tempeax + 1;
-		}
-		tempax = (USHORT) tempeax;
-		/*301b */
-		if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-			tempcx = ((tempax & 0xFF00) >> 5) >> 8;
-		}
-		/*end 301b */
-		tempbx = push1;
-		tempbx =
-		    (USHORT) (((tempeax & 0x0000FF00) & 0x1F00) |
-			      (tempbx & 0x00FF));
-		tempax =
-		    (USHORT) (((tempeax & 0x000000FF) << 8) |
-			      (tempax & 0x00FF));
-		temp = (tempax & 0xFF00) >> 8;
-	} else {
-		temp = (tempax & 0x00FF) >> 8;
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x44, temp);
-	temp = (tempbx & 0xFF00) >> 8;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x45, ~0x03F, temp);
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-		if ((tempcx & 0x00FF) == 0x01)
-			tempcx = 0x00;
-		SiS_SetRegANDOR (SiS_Part2Port, 0x46, ~0x007, tempcx);
-		SiS_SetRegOR (SiS_Part2Port, 0x46, 0x18);
-		if (SiS_VBInfo & SetPALTV) {
-			tempbx = 0x0364;
-			tempcx = 0x009c;
-		} else {
-			tempbx = 0x0346;
-			tempcx = 0x0078;
-		}
-		temp = (tempbx & 0x00FF);
-		SiS_SetReg1 (SiS_Part2Port, 0x4B, temp);
-		temp = (tempcx & 0x00FF);
-		SiS_SetReg1 (SiS_Part2Port, 0x4C, temp);
-		tempbx = (tempbx & 0x0300);
-		temp = (tempcx & 0xFF00) >> 8;
-		temp = (temp & 0x0003) << 2;
-		temp = temp | (tempbx >> 8);
-		SiS_SetReg1 (SiS_Part2Port, 0x4D, temp);
-		temp = SiS_GetReg1 (SiS_Part2Port, 0x43);
-		SiS_SetReg1 (SiS_Part2Port, 0x43, temp - 3);
-	}
-/*end 301b*/
-
-#ifdef CONFIG_FB_SIS_300
-/*add PALMN*/
-	if ((HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		if (SiS_VBInfo & SetCRT2ToTV) {
-			temp = SiS_GetReg1 (SiS_P3d4, 0x31);
-			temp = temp & 0x01;
-			if (temp) {
-				temp1 = SiS_GetReg1 (SiS_P3d4, 0x35);
-				temp1 = temp1 & 0x40;
-				if (temp1) {
-					SiS_SetRegANDOR (SiS_Part2Port, 0x00,
-							 0xEF, 0x00);
-					temp3 =
-					    SiS_GetReg1 (SiS_Part2Port, 0x01);
-					temp3 = temp3 - 1;
-					SiS_SetReg1 (SiS_Part2Port, 0x01,
-						     temp3);
-				}
-			}
-		}
-	}
-	/*end add */
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+           if(SiS_VBInfo & SetCRT2ToTV) {
+              if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
+                  temp1 = SiS_GetReg1(SiS_P3d4,0x38);
+                  if(temp1 & 0x40) {
+                     PhasePoint = SiS_PALMPhase;
+		     if( (SiS_VBType & VB_SIS301BLV302BLV) &&  /* TW: @@@ From 650/301LV BIOS (see above) */
+		         ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
+		        PhasePoint = SiS_PALMPhase2;           /* TW: From 650/301LV BIOS */
+		  }
+                  if(temp1 & 0x80) {
+                     PhasePoint = SiS_PALNPhase;
+		     if( (SiS_VBType & VB_SIS301BLV302BLV) && /* TW: @@@ From 650/301LV BIOS (see above) */
+		         ( (!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode) ) )
+		        PhasePoint = SiS_PALNPhase2;          /* TW: From 650/301LV BIOS */
+		  }
+              }
+           }
+  }
 #endif
 
-#ifdef CONFIG_FB_SIS_315
-/*add PALMN*/
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		temp = SiS_GetReg1 (SiS_P3d4, 0x31);
-		temp = temp & 0x01;
-		if (temp) {
-			temp1 = SiS_GetReg1 (SiS_P3d4, 0x38);
-			temp1 = temp1 & 0x40;
-			if (temp1) {
-				SiS_SetRegANDOR (SiS_Part2Port, 0x00, 0xEF,
-						 0x00);
-				temp3 = SiS_GetReg1 (SiS_Part2Port, 0x01);
-				temp3 = temp3 - 1;
-				SiS_SetReg1 (SiS_Part2Port, 0x01, temp3);
-			}
-		}
-	}
-	/*end add */
+  for(i=0x31, j=0; i<=0x34; i++, j++){
+     SiS_SetReg1(SiS_Part2Port,i,PhasePoint[j]);
+  }
+
+  /* TW: Inserted from 650/301LV BIOS */
+  if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
+     if(SiS_VBInfo & SetCRT2ToTV) {
+        if(!(SiS_VBInfo & SetPALTV)) {
+           if((ModeNo == 0x4a) || (ModeNo == 0x38)) {
+               SiS_SetReg1(SiS_Part2Port,0x31,0x1e);
+	       SiS_SetReg1(SiS_Part2Port,0x32,0x8c);
+	       SiS_SetReg1(SiS_Part2Port,0x33,0x5c);
+	       SiS_SetReg1(SiS_Part2Port,0x34,0x7a);
+	   }
+        }
+     }
+  }
+
+  for(i=0x01, j=0; i<=0x2D; i++, j++){
+     SiS_SetReg1(SiS_Part2Port,i,TimingPoint[j]);
+  }
+  for(i=0x39; i<=0x45; i++, j++){
+     SiS_SetReg1(SiS_Part2Port,i,TimingPoint[j]);
+  }
+  if(SiS_VBInfo & SetCRT2ToTV) {
+    if(HwDeviceExtension->jChipType >= SIS_315H) {
+      if (!(SiS_ModeType & 0x07))
+        SiS_SetRegAND(SiS_Part2Port,0x3A,0x1F);
+    } else {
+      SiS_SetRegAND(SiS_Part2Port,0x3A,0x1F);
+    }
+  }
+
+  SiS_SetRegOR(SiS_Part2Port,0x0A,SiS_NewFlickerMode);
+
+#if 0  /* TW: No BIOS does this */
+     SiS_SetReg1(SiS_Part2Port,0x35,0x00); /*301b*/
+     SiS_SetReg1(SiS_Part2Port,0x36,0x00);
+     SiS_SetReg1(SiS_Part2Port,0x37,0x00);
+     SiS_SetReg1(SiS_Part2Port,0x38,SiS_RY1COE);
+     SiS_SetReg1(SiS_Part2Port,0x48,SiS_RY2COE);
+     SiS_SetReg1(SiS_Part2Port,0x49,SiS_RY3COE);
+     SiS_SetReg1(SiS_Part2Port,0x4a,SiS_RY4COE);
+
+     /*add to change 630+301b filter*/
+     resindex=SiS_GetResInfo(ROMAddr,ModeNo,ModeIdIndex);
+     if(ModeNo<=0x13)
+        xres = SiS_StResInfo[resindex].HTotal;
+     else
+        xres = SiS_ModeResInfo[resindex].HTotal;
+
+     if(xres == 640) {  SiS_RY1COE=0xFF; SiS_RY2COE=0x03; SiS_RY3COE=0x02; SiS_RY4COE=0xF6;
+                        SiS_RY5COE=0xFC; SiS_RY6COE=0x27; SiS_RY7COE=0x46;}
+     if(xres == 800) {  SiS_RY1COE=0x01; SiS_RY2COE=0x01; SiS_RY3COE=0xFC; SiS_RY4COE=0xF8;
+                        SiS_RY5COE=0x08; SiS_RY6COE=0x26; SiS_RY7COE=0x38;}
+     if(xres == 1024){  SiS_RY1COE=0xFF; SiS_RY2COE=0xFF; SiS_RY3COE=0xFC; SiS_RY4COE=0x00;
+                        SiS_RY5COE=0x0F; SiS_RY6COE=0x22; SiS_RY7COE=0x28;}
+     if(xres == 720) {  SiS_RY1COE=0x01; SiS_RY2COE=0x02; SiS_RY3COE=0xFE; SiS_RY4COE=0xF7;
+                        SiS_RY5COE=0x03; SiS_RY6COE=0x27; SiS_RY7COE=0x3c;}
+     SiS_SetReg1(SiS_Part2Port,0x35,SiS_RY1COE); /*301b*/
+     SiS_SetReg1(SiS_Part2Port,0x36,SiS_RY2COE);
+     SiS_SetReg1(SiS_Part2Port,0x37,SiS_RY3COE);
+     SiS_SetReg1(SiS_Part2Port,0x38,SiS_RY4COE);
+     SiS_SetReg1(SiS_Part2Port,0x48,SiS_RY5COE);
+     SiS_SetReg1(SiS_Part2Port,0x49,SiS_RY6COE);
+     SiS_SetReg1(SiS_Part2Port,0x4a,SiS_RY7COE);
+     /*end add*/
 #endif
 
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-		if (!(SiS_VBInfo & SetInSlaveMode)) {
-			SiS_SetReg1 (SiS_Part2Port, 0x0B, 0x00);
-		}
-	}
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		return;
-	}
+  /* TW: From 650/301LV and 630/301B BIOS: */
+  SiS_SetReg1(SiS_Part2Port,0x35,SiS_RY1COE);
+  SiS_SetReg1(SiS_Part2Port,0x36,SiS_RY2COE);
+  SiS_SetReg1(SiS_Part2Port,0x37,SiS_RY3COE);
+  SiS_SetReg1(SiS_Part2Port,0x38,SiS_RY4COE);
 
-	tempbx = SiS_HDE - 1;	/* RHACTE=HDE-1 */
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part2Port, 0x2C, temp);
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp << 4;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x2B, 0x0F, temp);
-	temp = 0x01;
-	if (SiS_LCDResInfo == Panel1280x1024) {
-		if (SiS_ModeType == ModeEGA) {
-			if (SiS_VGAHDE >= 1024) {
-				temp = 0x02;
-				if (SiS_SetFlag & LCDVESATiming)
-					temp = 0x01;
-			}
-		}
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x0B, temp);
-
-	tempbx = SiS_VDE;	/* RTVACTEO=(VDE-1)&0xFF */
-	push1 = tempbx;
-	tempbx--;
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part2Port, 0x03, temp);
-	temp = ((tempbx & 0xFF00) >> 8) & 0x07;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x0C, ~0x07, temp);
-
-	tempcx = SiS_VT - 1;
-	push2 = tempcx + 1;
-	temp = tempcx & 0x00FF;	/* RVTVT=VT-1 */
-	SiS_SetReg1 (SiS_Part2Port, 0x19, temp);
-	temp = (tempcx & 0xFF00) >> 8;
-	temp = temp << 5;
-	if (SiS_LCDInfo & LCDRGB18Bit) {
-		temp = temp | 0x10;
-	}
-	if (SiS_VBInfo & SetCRT2ToLCD) {
-		tempbx = (tempbx & 0xFF00) | (SiS_LCDInfo & 0x0FF);
-		if (tempbx & LCDSync) {
-			tempbx = tempbx & LCDSyncBit;
-			tempbx =
-			    (tempbx & 0xFF00) | ((tempbx & 0x00FF) >>
-						 LCDSyncShift);
-			temp = temp | (tempbx & 0x00FF);
-		}
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x1A, temp);
-
-	tempcx++;
-	tempbx = 768;
-	if (SiS_LCDResInfo != Panel1024x768) {
-		tempbx = 1024;
-		if (SiS_LCDResInfo != Panel1280x1024) {
-			tempbx = 1200;	/*301b */
-			if (SiS_LCDResInfo != Panel1600x1200) {
-				if (tempbx != SiS_VDE) {
-					tempbx = 960;
-				}
-			}
-		}
-	}
-	if (SiS_LCDInfo & LCDNonExpanding) {
-		tempbx = SiS_VDE;
-		tempbx--;
-		tempcx--;
-	}
-	tempax = 1;
-	if (!(SiS_LCDInfo & LCDNonExpanding)) {
-		if (tempbx != SiS_VDE) {
-			tempax = tempbx;
-			if (tempax < SiS_VDE) {
-				tempax = 0;
-				tempcx = 0;
-			} else {
-				tempax = tempax - SiS_VDE;
-			}
-			tempax = tempax >> 1;
-		}
-		tempcx = tempcx - tempax;	/* lcdvdes */
-		tempbx = tempbx - tempax;	/* lcdvdee */
-	} else {
-		tempax = tempax >> 1;
-		tempcx = tempcx - tempax;	/* lcdvdes */
-		tempbx = tempbx - tempax;	/* lcdvdee */
-	}
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) tempax = 950;
+  else {
+#endif
+    if(SiS_VBInfo & SetPALTV) tempax = 520;
+    else tempax = 440;
+#ifdef oldHV
+  }
+#endif
 
-	temp = tempcx & 0x00FF;	/* RVEQ1EQ=lcdvdes */
-	SiS_SetReg1 (SiS_Part2Port, 0x05, temp);
-	temp = tempbx & 0x00FF;	/* RVEQ2EQ=lcdvdee */
-	SiS_SetReg1 (SiS_Part2Port, 0x06, temp);
-
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp << 3;
-	temp = temp | ((tempcx & 0xFF00) >> 8);
-	SiS_SetReg1 (SiS_Part2Port, 0x02, temp);
-
-	tempbx = push2;
-	tempax = push1;
-	tempcx = tempbx;
-	tempcx = tempcx - tempax;
-	tempcx = tempcx >> 4;
-	tempbx = tempbx + tempax;
-	tempbx = tempbx >> 1;
-	if (SiS_LCDInfo & LCDNonExpanding) {
-		tempbx = tempbx - 10;
-	}
-	temp = tempbx & 0x00FF;	/* RTVACTEE=lcdvrs */
-	SiS_SetReg1 (SiS_Part2Port, 0x04, temp);
-
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp << 4;
-	tempbx = tempbx + tempcx + 1;
-	temp = temp | (tempbx & 0x000F);
-	SiS_SetReg1 (SiS_Part2Port, 0x01, temp);
-
-	if (SiS_LCDResInfo == Panel1024x768) {
-		if (!(SiS_SetFlag & LCDVESATiming)) {
-			if (!(SiS_LCDInfo & LCDNonExpanding)) {
-				if (ModeNo == 0x13) {
-					SiS_SetReg1 (SiS_Part2Port, 0x04, 0xB9);
-					SiS_SetReg1 (SiS_Part2Port, 0x05, 0xCC);
-					SiS_SetReg1 (SiS_Part2Port, 0x06, 0xA6);
-				} else {
-					temp = crt2crtc & 0x3F;
-					if (temp == 4) {
-						SiS_SetReg1 (SiS_Part2Port,
-							     0x01, 0x2B);
-						SiS_SetReg1 (SiS_Part2Port,
-							     0x02, 0x13);
-						SiS_SetReg1 (SiS_Part2Port,
-							     0x04, 0xE5);
-						SiS_SetReg1 (SiS_Part2Port,
-							     0x05, 0x08);
-						SiS_SetReg1 (SiS_Part2Port,
-							     0x06, 0xE2);
-					}
-				}
-			}
-		}
-	}
+  if(SiS_VDE <= tempax) {
+    tempax -= SiS_VDE;
+    tempax >>= 2;
+    tempax = (tempax & 0x00FF) | ((tempax & 0x00FF) << 8);
+    push1 = tempax;
+    temp = (tempax & 0xFF00) >> 8;
+    temp += (USHORT)TimingPoint[0];
+    SiS_SetReg1(SiS_Part2Port,0x01,temp);
+
+    tempax = push1;
+    temp = (tempax & 0xFF00) >> 8;
+    temp += TimingPoint[1];
+    SiS_SetReg1(SiS_Part2Port,0x02,temp);
+  }
+
+  if( (SiS_VBType & VB_SIS301BLV302BLV) &&
+      (SiS_VBInfo & SetCRT2ToTV) &&
+      (SiS_VGAHDE >= 1024) &&
+      (SiS_HiVision != 3) ) {
+      if(SiS_VBInfo & SetPALTV) {
+         SiS_SetReg1(SiS_Part2Port,0x01,0x19);
+         SiS_SetReg1(SiS_Part2Port,0x02,0x52);
+      } else {
+         if(HwDeviceExtension->jChipType >= SIS_315H) {
+            SiS_SetReg1(SiS_Part2Port,0x01,0x17);
+            SiS_SetReg1(SiS_Part2Port,0x02,0x1d);
+	 } else {
+            SiS_SetReg1(SiS_Part2Port,0x01,0x0b);
+            SiS_SetReg1(SiS_Part2Port,0x02,0x11);
+	 }
+      } 
+    }
+    
+  tempcx = SiS_HT - 1;
+  if(SiS_VBType & VB_SIS301BLV302BLV) {
+        tempcx--;
+  }
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Part2Port,0x1B,temp);
+  temp = (tempcx & 0xFF00) >> 8;
+  SiS_SetRegANDOR(SiS_Part2Port,0x1D,0xF0,temp);
+
+  tempcx = SiS_HT >> 1;
+  push1 = tempcx;                           /* push cx */
+  tempcx += 7;
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV)  tempcx -= 4;   /* TW: @@@ not done in 301LV/630+301B BIOS */
+#endif
+  temp = (tempcx & 0x00FF) << 4;
+  SiS_SetRegANDOR(SiS_Part2Port,0x22,0x0F,temp);
+
+  tempbx = TimingPoint[j] | ((TimingPoint[j+1]) << 8);
+  tempbx += tempcx;
+  push2 = tempbx;
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part2Port,0x24,temp);
+  temp = ((tempbx & 0xFF00) >> 8) << 4;
+  SiS_SetRegANDOR(SiS_Part2Port,0x25,0x0F,temp);
+
+  tempbx = push2;
+
+  tempbx += 8;
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {	/* TW: @@@ not done in 301LV/630+301B BIOS */
+    tempbx -= 4;				/* TW: @@@ not done in 301LV/630+301B BIOS */
+    tempcx = tempbx;				/* TW: @@@ not done in 301LV/630+301B BIOS */
+  }						/* TW: @@@ not done in 301LV/630+301B BIOS */
+#endif
+  temp = (tempbx & 0x00FF) << 4;
+  SiS_SetRegANDOR(SiS_Part2Port,0x29,0x0F,temp);
+
+  j += 2;
+  tempcx += ((TimingPoint[j] | ((TimingPoint[j+1]) << 8)));
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Part2Port,0x27,temp);
+  temp = ((tempcx & 0xFF00) >> 8) << 4;
+  SiS_SetRegANDOR(SiS_Part2Port,0x28,0x0F,temp);
+
+  tempcx += 8;
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV)  tempcx -= 4; /* TW: @@@ not done in 301LV BIOS */
+#endif
+  temp = (tempcx & 0xFF) << 4;
+  SiS_SetRegANDOR(SiS_Part2Port,0x2A,0x0F,temp);
+
+  tempcx = push1;
+  j += 2;
+  tempcx -= (TimingPoint[j] | ((TimingPoint[j+1]) << 8));
+  temp = (tempcx & 0x00FF) << 4;
+  SiS_SetRegANDOR(SiS_Part2Port,0x2D,0x0F,temp);
+
+  tempcx -= 11;
+  if(!(SiS_VBInfo & SetCRT2ToTV)){
+    tempax = SiS_GetVGAHT2() - 1;
+    tempcx = tempax;
+  }
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Part2Port,0x2E,temp);	  
+
+  tempbx = SiS_VDE;
+  if(SiS_VGAVDE == 360) tempbx = 746;
+  if(SiS_VGAVDE == 375) tempbx = 746;
+  if(SiS_VGAVDE == 405) tempbx = 853;
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+  	if(SiS_VBInfo & SetCRT2ToTV) tempbx >>= 1;
+  } else {
+	if((SiS_VBInfo & SetCRT2ToTV) && (!(SiS_HiVision & 0x03))) {
+	   tempbx >>= 1;
+	   if(SiS_SetFlag & TVSimuMode) {
+	      if(ModeNo <= 0x13) {
+	         if(crt2crtc == 1) {
+	            tempbx++;
+                 }
+	      }
+	   } else {
+              if(SiS_VBInfo & SetInSlaveMode) {
+	         if(crt2crtc == 4)   /* TW: BIOS calls GetRatePtrCRT2 here - does not make sense */
+                    if(SiS_ModeType <= 3) tempbx++;
+	      }
+	   }
+        }
+  }
+  tempbx -= 2;
+  temp = tempbx & 0x00FF;
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+    if(SiS_VBInfo & SetInSlaveMode) {
+      if(ModeNo == 0x2f) temp++;
+    }
+  }
+#endif
+  SiS_SetReg1(SiS_Part2Port,0x2F,temp);
 
-	SiS_SetRegANDOR (SiS_Part2Port, 0x09, 0xF0, 0x00);
-	SiS_SetRegANDOR (SiS_Part2Port, 0x0A, 0xF0, 0x00);
+  temp = (tempcx & 0xFF00) >> 8;
+  temp |= (((tempbx & 0xFF00) >> 8) << 6);
+#ifdef oldHV
+  if(!(SiS_VBInfo & SetCRT2ToHiVisionTV)) {
+#endif
+    if(!(SiS_VBInfo & SetCRT2ToSCART)) {		/* TW: New from 630/301B (II) BIOS */
+       temp |= 0x10;
+       if(!(SiS_VBInfo & SetCRT2ToSVIDEO))  temp |= 0x20;
+    }
+#ifdef oldHV
+  }
+#endif
+  SiS_SetReg1(SiS_Part2Port,0x30,temp);
+
+  if(SiS_VBType & VB_SIS301BLV302BLV) {      /* tv gatingno */
+    tempbx = SiS_VDE;
+    if((SiS_VBInfo & SetCRT2ToTV) && (!(SiS_HiVision & 0x03))) {
+         tempbx >>= 1;
+    }
+    temp = (((tempbx - 3) & 0x0300) >> 8) << 5;
+    temp |= 0x18;                                    /* TW: Inserted from 650/301/301LV BIOS */
+    SiS_SetReg1(SiS_Part2Port,0x46,temp);
+    temp = (tempbx - 3) & 0x00FF;
+    SiS_SetReg1(SiS_Part2Port,0x47,temp);
+    if(SiS_HiVision & 0x03) {
+        if(SiS_HiVision & 0x01) temp = 0x30;
+	else temp = 0x50;
+	SiS_SetReg1(SiS_Part2Port,0x4d,temp);
+    }
+  }
+
+  tempbx &= 0x00FF;
+  if(!(modeflag & HalfDCLK)){
+    tempcx = SiS_VGAHDE;
+    if(tempcx >= SiS_HDE){
+      tempbx |= 0x2000;
+      tempax &= 0x00FF;
+    }
+  }
+
+  tempcx = 0x0101;
+  if( (SiS_VBInfo & SetCRT2ToTV) && (!(SiS_HiVision & 0x03)) ) {  /*301b- TW: BIOS BUG! */
+    if(SiS_VGAHDE >= 1024) {
+      if(!(modeflag & HalfDCLK)) {   	/* TW: "if" inserted from 650/301LV and 630/301B BIOS */
+        tempcx = 0x1920;
+        if(SiS_VGAHDE >= 1280) {
+          tempcx = 0x1420;
+          tempbx &= 0xDFFF;
+        }
+      }
+    }
+  }
+
+  if(!(tempbx & 0x2000)){
+
+    if(modeflag & HalfDCLK){
+      tempcx = (tempcx & 0xFF00) | (((tempcx & 0x00FF) << 1) & 0xff);
+    }
+    push1 = tempbx;
+    tempeax = SiS_VGAHDE;
+    tempebx = (tempcx & 0xFF00) >> 8;
+    longtemp = tempeax * tempebx;
+    tempecx = tempcx & 0x00FF;
+    longtemp /= tempecx;
+    longtemp <<= 0x0d;
+    if(SiS_VBType & VB_SIS301BLV302BLV) {
+     	longtemp <<= 3;
+    }
+    tempecx = SiS_HDE;
+    temp2 = longtemp % tempecx;
+    tempeax = longtemp / tempecx;
+    if(temp2 != 0) tempeax++;
+    tempax = (USHORT)tempeax;
+    tempbx = push1;
+    if(SiS_VBType & VB_SIS301BLV302BLV) {   /* TW: Done anyway in BIOS, but does not matter */
+     	tempcx = ((tempax & 0xFF00) >> 5) >> 8;
+    }
+    tempbx |= (tempax & 0x1F00);
+    tempax = ((tempax & 0x00FF) << 8) | (tempax & 0x00FF);
+  }
+
+  temp = (tempax & 0xFF00) >> 8;
+  SiS_SetReg1(SiS_Part2Port,0x44,temp);
+  temp = (tempbx & 0xFF00) >> 8;
+  SiS_SetRegANDOR(SiS_Part2Port,0x45,0xC0,temp);
+
+  if(SiS_VBType & VB_SIS301BLV302BLV) {
+       if(tempbx & 0x2000)
+    		tempcx=0x00;
+       temp = tempcx;
+       temp |= 0x18;
+       SiS_SetRegANDOR(SiS_Part2Port,0x46,0xE0,temp);
+       if(SiS_VBInfo & SetPALTV) {
+             tempbx = 0x0382;    /* TW: BIOS; Was 0x0364; */
+             tempcx = 0x007e;    /* TW: BIOS; Was 0x009c; */
+       } else {
+             tempbx = 0x0369;    /* TW: BIOS; Was 0x0346; */
+             tempcx = 0x0061;    /* TW: BIOS; Was 0x0078; */
+       }
+       temp = (tempbx & 0x00FF) ;
+       SiS_SetReg1(SiS_Part2Port,0x4B,temp);
+       temp = (tempcx & 0x00FF) ;
+       SiS_SetReg1(SiS_Part2Port,0x4C,temp);
+       tempbx &= 0x0300;
+       temp = (tempcx & 0xFF00) >> 8;
+       temp = (temp & 0x0003) << 2;
+       temp |= (tempbx >> 8);
+       SiS_SetRegOR(SiS_Part2Port,0x4D,temp);   /* TW: 650/LV - was SetReg1() (not 630/301B) */
+
+       temp = SiS_GetReg1(SiS_Part2Port,0x43);
+       SiS_SetReg1(SiS_Part2Port,0x43,(USHORT)(temp - 3));
+  }
+
+#ifdef SIS300
+  if((HwDeviceExtension->jChipType==SIS_630)||
+     (HwDeviceExtension->jChipType==SIS_730)) {
+          if(SiS_VBInfo & SetCRT2ToTV) {
+             if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
+                  if(SiS_GetReg1(SiS_P3d4,0x35) & 0x40) {
+                           SiS_SetRegAND(SiS_Part2Port,0x00,0xEF);
+                           temp3=SiS_GetReg1(SiS_Part2Port,0x01);
+                           SiS_SetReg1(SiS_Part2Port,0x01,temp3-1);
+                  }
+             }
+          }
+  }
+#endif
 
-	tempcx = (SiS_HT - SiS_HDE) >> 2;	/* (HT-HDE)>>2     */
-	tempbx = (SiS_HDE + 7);	/* lcdhdee         */
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-		tempbx = tempbx + 2;
-	}
-	push1 = tempbx;
-	temp = tempbx & 0x00FF;	/* RHEQPLE=lcdhdee */
-	SiS_SetReg1 (SiS_Part2Port, 0x23, temp);
-	temp = (tempbx & 0xFF00) >> 8;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x25, ~0x0F, temp);
-	/*301b */
-	temp = 7;
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-		temp = temp + 2;
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x1F, temp);	/* RHBLKE=lcdhdes */
-	SiS_SetRegANDOR (SiS_Part2Port, 0x20, 0x0F, 0x00);
-
-	tempbx = tempbx + tempcx;
-	push2 = tempbx;
-	temp = tempbx & 0xFF;	/* RHBURSTS=lcdhrs */
-	if (SiS_LCDResInfo == Panel1280x1024) {
-		if (!(SiS_LCDInfo & LCDNonExpanding)) {
-			if (SiS_HDE == 1280) {
-				temp = 0x47;
-			}
-		}
-	}
-	SiS_SetReg1 (SiS_Part2Port, 0x1C, temp);
-	temp = (tempbx & 0xFF00) >> 8;
-	temp = temp << 4;
-	SiS_SetRegANDOR (SiS_Part2Port, 0x1D, ~0x0F0, temp);
-
-	tempbx = push2;
-	tempcx = tempcx << 1;
-	tempbx = tempbx + tempcx;
-	temp = tempbx & 0x00FF;	/* RHSYEXP2S=lcdhre */
-	SiS_SetReg1 (SiS_Part2Port, 0x21, temp);
-
-	SiS_SetRegANDOR (SiS_Part2Port, 0x17, 0xFB, 0x00);
-	SiS_SetRegANDOR (SiS_Part2Port, 0x18, 0xDF, 0x00);
-
-	if (!(SiS_SetFlag & LCDVESATiming)) {
-		if (SiS_VGAVDE == 525) {
-			if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {	/*301b */
-				temp = 0xC6;
-			} else
-				temp = 0xC4;
-			SiS_SetReg1 (SiS_Part2Port, 0x2f, temp);
-			SiS_SetReg1 (SiS_Part2Port, 0x30, 0xB3);
-		}
-		if (SiS_VGAVDE == 420) {
-			if (
-			    ((SiS_VBType & VB_SIS301B)
-			     || (SiS_VBType & VB_SIS302B))) {
-				temp = 0x4F;
-			} else
-				temp = 0x4E;
-			SiS_SetReg1 (SiS_Part2Port, 0x2f, temp);
-		}
-	}
+#ifdef SIS315H
+  if (HwDeviceExtension->jChipType >= SIS_315H) {
+            if(SiS_VBInfo & SetCRT2ToTV) {
+               if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
+                    if(SiS_GetReg1(SiS_P3d4,0x38) & 0x40) {
+                             SiS_SetRegAND(SiS_Part2Port,0x00,0xEF);
+                             temp3=SiS_GetReg1(SiS_Part2Port,0x01);
+                             SiS_SetReg1(SiS_Part2Port,0x01,temp3-1);
+                    }
+               }
+            }
+  }
+  /*end add*/
+#endif
+
+#ifdef oldHV
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+    if(!(SiS_VBInfo & SetInSlaveMode)) {
+      SiS_SetReg1(SiS_Part2Port,0x0B,0x00);
+    }
+  }
+#endif
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(SiS_VBInfo & SetCRT2ToTV)  return;
+  } else {
+     if(SiS_VBInfo & SetCRT2ToTV) {
+       if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
+         if(SiS_VBInfo & SetCRT2ToTV) {
+           if(!(SiS_VBInfo & SetPALTV)) {
+             if((ModeNo == 0x4a) || (ModeNo == 0x38)) {
+               SiS_SetReg1(SiS_Part2Port,0x1c,0xa7);
+	       SiS_SetReg1(SiS_Part2Port,0x1d,0x07);
+	       SiS_SetReg1(SiS_Part2Port,0x1e,0xf2);
+	       SiS_SetReg1(SiS_Part2Port,0x1f,0x6e);
+	       SiS_SetReg1(SiS_Part2Port,0x20,0x17);
+	       SiS_SetReg1(SiS_Part2Port,0x21,0x8b);
+	       SiS_SetReg1(SiS_Part2Port,0x22,0x73);
+	       SiS_SetReg1(SiS_Part2Port,0x23,0x53);
+	       SiS_SetReg1(SiS_Part2Port,0x24,0x13);
+	       SiS_SetReg1(SiS_Part2Port,0x25,0x40);
+	       SiS_SetReg1(SiS_Part2Port,0x26,0x34);
+	       SiS_SetReg1(SiS_Part2Port,0x27,0xf4);
+	       SiS_SetReg1(SiS_Part2Port,0x28,0x63);
+	       SiS_SetReg1(SiS_Part2Port,0x29,0xbb);
+	       SiS_SetReg1(SiS_Part2Port,0x2a,0xcc);
+	       SiS_SetReg1(SiS_Part2Port,0x2b,0x7a);
+	       SiS_SetReg1(SiS_Part2Port,0x2c,0x58);
+	       SiS_SetReg1(SiS_Part2Port,0x2d,0xe4);
+	       SiS_SetReg1(SiS_Part2Port,0x2e,0x73);
+	       SiS_SetReg1(SiS_Part2Port,0x2f,0xda);
+	       SiS_SetReg1(SiS_Part2Port,0x30,0x13);
+	       SiS_SetReg1(SiS_Part2Port,0x43,0x72);
+	     }
+           }
+         }
+       }
+       return;
+     }
+  }
+
+  /* TW: From here: LCD Part2 group */
+
+  tempbx = SiS_HDE - 1;         /* RHACTE=HDE-1 */
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part2Port,0x2C,temp);
+  temp = (tempbx & 0xFF00) >> 8;
+  temp <<= 4;
+  SiS_SetRegANDOR(SiS_Part2Port,0x2B,0x0F,temp);
+
+  temp = 0x01;
+  if(SiS_LCDResInfo == Panel1280x1024) {
+    if(SiS_ModeType == ModeEGA) {
+      if(SiS_VGAHDE >= 1024) {
+        temp = 0x02;
+	if(HwDeviceExtension->jChipType >= SIS_315H) {
+           if (SiS_SetFlag & LCDVESATiming) {
+             temp = 0x01;
+	   }
+	}
+      }
+    }
+  }
+  SiS_SetReg1(SiS_Part2Port,0x0B,temp);
+
+  tempbx = SiS_VDE;         /* RTVACTEO=(VDE-1)&0xFF */
+  push1 = tempbx;
+  tempbx--;
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part2Port,0x03,temp);
+  temp = ((tempbx & 0xFF00) >> 8) & 0x07;
+  SiS_SetRegANDOR(SiS_Part2Port,0x0C,0xF8,temp);
+
+  tempcx = SiS_VT;
+  push2 = tempcx;
+  tempcx--;
+  temp = tempcx & 0x00FF;   /* RVTVT=VT-1 */
+  SiS_SetReg1(SiS_Part2Port,0x19,temp);
+
+  temp = (tempcx & 0xFF00) >> 8;
+  temp <<= 5;
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+    if(SiS_VBType & VB_SIS301BLV302BLV) temp |= 0x10;
+    else {
+#if 0
+      if(SiS_LCDInfo & LCDRGB18Bit)   /* TW: 630/301B (II) BIOS does not check this!!! */
+#endif
+      if(SiS_LCDInfo & LCDSync)       /* TW: 630/301 BIOS checks this */
+         temp |= 0x10;
+    }
+  } else temp |= 0x10;
+
+  /* 630/301 does not do all this */
+  if((SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCD)) {
+      tempbx = (tempbx & 0xFF00) | (SiS_LCDInfo & 0x0FF);
+      if(tempbx & LCDSync) {
+        tempbx &= (0xFF00 | LCDSyncBit);
+        tempbx = (tempbx & 0xFF00) | ((tempbx & 0x00FF) >> LCDSyncShift);
+        temp |= (tempbx & 0x00FF);
+      }
+  }
+  SiS_SetReg1(SiS_Part2Port,0x1A,temp);
+
+  SiS_SetRegAND(SiS_Part2Port,0x09,0xF0);
+  SiS_SetRegAND(SiS_Part2Port,0x0A,0xF0);
+
+  SiS_SetRegAND(SiS_Part2Port,0x17,0xFB);
+  SiS_SetRegAND(SiS_Part2Port,0x18,0xDF);
+
+  if(HwDeviceExtension->jChipType >= SIS_315H) {   /* 310 series */
+
+      /* TW: Inserted this entire section from 650/301LV BIOS */
+
+      SiS_GetCRT2Part2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                         &CRT2Index,&resindex);
+
+      switch(CRT2Index) {
+        case 0: CRT2Part2Ptr = SiS_CRT2Part2_1024x768_1;  break;  /* "Normal" */
+        case 1: CRT2Part2Ptr = SiS_CRT2Part2_1280x1024_1; break;
+        case 2: CRT2Part2Ptr = SiS_CRT2Part2_1024x768_2;  break;  /* Non-Expanding */
+        case 3: CRT2Part2Ptr = SiS_CRT2Part2_1280x1024_2; break;
+        case 4: CRT2Part2Ptr = SiS_CRT2Part2_1024x768_3;  break;  /* VESA Timing */
+        case 5: CRT2Part2Ptr = SiS_CRT2Part2_1280x1024_3; break;
+      }
+
+      SiS_SetRegANDOR(SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]);
+      SiS_SetRegANDOR(SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]);
+      for(i = 2, j = 0x04; j <= 0x06; i++, j++ ) {
+        SiS_SetReg1(SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+      }
+      for(j = 0x1c; j <= 0x1d; i++, j++ ) {
+        SiS_SetReg1(SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+      }
+      for(j = 0x1f; j <= 0x21; i++, j++ ) {
+        SiS_SetReg1(SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
+      }
+      SiS_SetReg1(SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]);
+      SiS_SetRegANDOR(SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]);
+
+      if(!(SiS_SetFlag & LCDVESATiming)) {
+        if(SiS_VGAVDE == 0x20d) {
+	  temp = 0xc3;
+	  if(SiS_ModeType <= ModeVGA) {
+	     temp++;
+	     if(SiS_VBType & VB_SIS301BLV302BLV) temp += 2;
+	  }
+	  SiS_SetReg1(SiS_Part2Port,0x2f,temp);
+	  SiS_SetReg1(SiS_Part2Port,0x30,0xb3);
+	}
+	if(SiS_VGAVDE == 0x1a4) {
+	  temp = 0x4d;
+	  if(SiS_ModeType <= ModeVGA) {
+	     temp++;
+	     if(SiS_VBType & VB_SIS301BLV302BLV) temp++;
+	  }
+	  SiS_SetReg1(SiS_Part2Port,0x2f,temp);
+	}
+     } /* 2f5d */
+
+  } else {   /* 300 series */
+
+    tempcx++;
+    tempbx = 768;
+    if(SiS_LCDResInfo != Panel1024x768) {
+      tempbx = 1024;
+      if(SiS_LCDResInfo != Panel1280x1024) {
+         tempbx = 1200;
+         if(SiS_LCDResInfo != Panel1600x1200) {
+            if(tempbx != SiS_VDE) {
+               tempbx = 960;
+            }
+         }
+      }
+    }
+    if(SiS_LCDInfo & LCDNonExpanding) {
+      tempbx = SiS_VDE - 1;
+      tempcx--;
+    }
+    tempax = 1;
+    if(!(SiS_LCDInfo & LCDNonExpanding)) {
+      if(tempbx != SiS_VDE){
+        tempax = tempbx;
+        if(tempax < SiS_VDE) {
+          tempax = 0;
+          tempcx = 0;
+        } else {
+          tempax -= SiS_VDE;
+        }
+        tempax >>= 1;
+      }
+      tempcx -= tempax; /* lcdvdes */
+      tempbx -= tempax; /* lcdvdee */
+    } else {
+      tempax >>= 1;
+      tempcx -= tempax; /* lcdvdes */
+      tempbx -= tempax; /* lcdvdee */
+    }
+
+    temp = tempcx & 0x00FF;   /* RVEQ1EQ=lcdvdes */
+    SiS_SetReg1(SiS_Part2Port,0x05,temp);
+    temp = tempbx & 0x00FF;   /* RVEQ2EQ=lcdvdee */
+    SiS_SetReg1(SiS_Part2Port,0x06,temp);
+
+    temp = ((tempbx & 0xFF00) >> 8 ) << 3;
+    temp |= ((tempcx & 0xFF00) >> 8);
+    SiS_SetReg1(SiS_Part2Port,0x02,temp);
+
+    tempbx = push2;
+    tempax = push1;
+    tempcx = tempbx;
+    tempcx -= tempax;
+    tempcx >>= 4;
+    tempbx += tempax;
+    tempbx >>= 1;
+    if(SiS_LCDInfo & LCDNonExpanding)  tempbx -= 10;
+
+    temp = tempbx & 0x00FF;   		/* RTVACTEE=lcdvrs */
+    SiS_SetReg1(SiS_Part2Port,0x04,temp);
+
+    temp = ((tempbx & 0xFF00) >> 8) << 4;
+    tempbx += (tempcx + 1);
+    temp |= (tempbx & 0x000F);
+    SiS_SetReg1(SiS_Part2Port,0x01,temp);
+
+    /* TW: Code from 630/301B (I+II) BIOS */
+
+    if( ( ( (HwDeviceExtension->jChipType == SIS_630) ||
+            (HwDeviceExtension->jChipType == SIS_730) ) &&
+          (HwDeviceExtension->jChipRevision > 2) )  &&
+        (SiS_LCDResInfo == Panel1024x768) &&
+        (!(SiS_SetFlag & LCDVESATiming))  &&
+        (!(SiS_LCDInfo & LCDNonExpanding)) ) {
+            if(ModeNo == 0x13) {
+              SiS_SetReg1(SiS_Part2Port,0x04,0xB9);
+              SiS_SetReg1(SiS_Part2Port,0x05,0xCC);
+              SiS_SetReg1(SiS_Part2Port,0x06,0xA6);
+            } else {
+              if((crt2crtc & 0x3F) == 4) {
+                SiS_SetReg1(SiS_Part2Port,0x01,0x2B);
+                SiS_SetReg1(SiS_Part2Port,0x02,0x13);
+                SiS_SetReg1(SiS_Part2Port,0x04,0xE5);
+                SiS_SetReg1(SiS_Part2Port,0x05,0x08);
+                SiS_SetReg1(SiS_Part2Port,0x06,0xE2);
+              }
+            }
+    }
+
+    /* TW: Inserted missing code from 630/301B BIOS: (II: 3258) */
+
+    if(SiS_LCDTypeInfo == 0x0c) {
+         crt2crtc &= 0x1f;
+         tempcx = 0;
+         if(!(SiS_VBInfo & SetNotSimuMode)) {
+           if (SiS_VBInfo & SetInSlaveMode) {
+              tempcx += 7;
+           }
+         }
+         tempcx += crt2crtc;
+         if (crt2crtc >= 4) {
+           SiS_SetReg1(SiS_Part2Port,0x06,0xff);
+         }
+
+         if(!(SiS_VBInfo & SetNotSimuMode)) {
+           if (SiS_VBInfo & SetInSlaveMode) {
+             if (crt2crtc == 4) {
+                SiS_SetReg1(SiS_Part2Port,0x01,0x28);
+             }
+           }
+         }
+         SiS_SetReg1(SiS_Part2Port,0x02,0x18);
+         SiS_SetReg1(SiS_Part2Port,0x04,atable[tempcx]);
+    }
+
+    tempcx = (SiS_HT - SiS_HDE) >> 2;    	/* (HT-HDE)>>2     */
+    tempbx = SiS_HDE + 7;            		/* lcdhdee         */
+    if(SiS_VBType & VB_SIS301BLV302BLV) {
+         tempbx += 2;
+    }
+    push1 = tempbx;
+    temp = tempbx & 0x00FF;    			/* RHEQPLE=lcdhdee */
+    SiS_SetReg1(SiS_Part2Port,0x23,temp);
+    temp = (tempbx & 0xFF00) >> 8;
+    SiS_SetRegANDOR(SiS_Part2Port,0x25,0xF0,temp);
+
+    temp = 7;
+    if(SiS_VBType & VB_SIS301BLV302BLV) {
+         temp += 2;
+    }
+    SiS_SetReg1(SiS_Part2Port,0x1F,temp);  	/* RHBLKE=lcdhdes */
+
+    SiS_SetRegAND(SiS_Part2Port,0x20,0x0F);
+
+    tempbx += tempcx;
+    push2 = tempbx;
+    temp = tempbx & 0xFF;            		/* RHBURSTS=lcdhrs */
+    if(SiS_LCDResInfo == Panel1280x1024) {
+      if(SiS_LCDInfo & LCDNonExpanding) {
+        if(SiS_HDE == 1280)  temp = 0x47;
+      }
+    }
+    SiS_SetReg1(SiS_Part2Port,0x1C,temp);
+    temp = ((tempbx & 0xFF00) >> 8) << 4;
+    SiS_SetRegANDOR(SiS_Part2Port,0x1D,0x0F,temp);
+
+    tempbx = push2;
+    tempcx <<= 1;
+    tempbx += tempcx;
+    temp = tempbx & 0x00FF;            		/* RHSYEXP2S=lcdhre */
+    SiS_SetReg1(SiS_Part2Port,0x21,temp);
+
+    if(!(SiS_SetFlag & LCDVESATiming)) {
+      if(SiS_VGAVDE == 525) {
+/*      if(SiS_VBType & VB_SIS301BLV302BLV)  */ /* TW: 630/301B (I+II) */
+        if(SiS_ModeType <= ModeVGA)
+    	   temp=0xC6;
+        else
+       	   temp=0xC3;   /* 650: c4 */
+        SiS_SetReg1(SiS_Part2Port,0x2f,temp);
+        SiS_SetReg1(SiS_Part2Port,0x30,0xB3);
+      } else if(SiS_VGAVDE==420) {
+/*      if(SiS_VBType & VB_SIS301BLV302BLV)  */ /* TW: 630/301B (I+II) */
+        if(SiS_ModeType <= ModeVGA)
+	   temp=0x4F;
+        else
+       	   temp=0x4D;   /* 650: 4e */
+        SiS_SetReg1(SiS_Part2Port,0x2f,temp);
+      }
+    }
+
+  } /* HwDeviceExtension */
 }
 
 USHORT
-SiS_GetVGAHT2 ()
+SiS_GetVGAHT2()
 {
-	ULONG tempax, tempbx;
+  ULONG tempax,tempbx;
 
-	tempbx = ((SiS_VGAVT - SiS_VGAVDE) * SiS_RVBHCMAX) & 0xFFFF;
-	tempax = (SiS_VT - SiS_VDE) * SiS_RVBHCFACT;
-	tempax = (tempax * SiS_HT) / tempbx;
-	return ((USHORT) tempax);
+  tempbx = ((SiS_VGAVT - SiS_VGAVDE) * SiS_RVBHCMAX) & 0xFFFF;
+  tempax = (SiS_VT - SiS_VDE) * SiS_RVBHCFACT;
+  tempax = (tempax * SiS_HT) / tempbx;
+  return((USHORT) tempax);
 }
 
+/* TW: Set 301 Macrovision(tm) registers */
+/* TW: Double-Checked against 650/301LV and 630/301B BIOS */
 void
-SiS_SetGroup3 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-	       USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetGroup3(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+              USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT i;
-	UCHAR *tempdi;
-	USHORT modeflag, temp, temp1;
-
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-	}
-
-	SiS_SetReg1 (SiS_Part3Port, 0x00, 0x00);
-	if (SiS_VBInfo & SetPALTV) {
-		SiS_SetReg1 (SiS_Part3Port, 0x13, 0xFA);
-		SiS_SetReg1 (SiS_Part3Port, 0x14, 0xC8);
-	} else {
-		SiS_SetReg1 (SiS_Part3Port, 0x13, 0xF6);
-		SiS_SetReg1 (SiS_Part3Port, 0x14, 0xBF);
-	}
-#ifdef CONFIG_FB_SIS_300
-	/*add PALMN */
-	if ((HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		if (SiS_VBInfo & SetCRT2ToTV) {
-			temp = SiS_GetReg1 (SiS_P3d4, 0x31);
-			temp = temp & 0x01;
-			if (temp) {
-				temp1 = SiS_GetReg1 (SiS_P3d4, 0x35);
-				temp1 = temp1 & 0x40;
-				if (temp1) {
-					SiS_SetReg1 (SiS_Part3Port, 0x13, 0xFA);
-					SiS_SetReg1 (SiS_Part3Port, 0x14, 0xC8);
-					SiS_SetReg1 (SiS_Part3Port, 0x3D, 0xA8);
-				}
-			}
-		}
-	}
-	/*end add */
+  USHORT i;
+  UCHAR  *tempdi;
+  USHORT modeflag;
+
+  if(SiS_VBInfo & SetCRT2ToLCDA) return;   /* TW: Inserted from BIOS */
+
+  if(ModeNo<=0x13)
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  else
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+
+  SiS_SetReg1(SiS_Part3Port,0x00,0x00);
+
+  if(SiS_VBInfo & SetPALTV) {
+    SiS_SetReg1(SiS_Part3Port,0x13,0xFA);
+    SiS_SetReg1(SiS_Part3Port,0x14,0xC8);
+  } else {
+    if(HwDeviceExtension->jChipType >= SIS_315H) {
+      SiS_SetReg1(SiS_Part3Port,0x13,0xF5);
+      SiS_SetReg1(SiS_Part3Port,0x14,0xB7);
+    } else {
+      SiS_SetReg1(SiS_Part3Port,0x13,0xF6);
+      SiS_SetReg1(SiS_Part3Port,0x14,0xBf);
+    }
+  }
+
+#ifdef SIS300
+  if((HwDeviceExtension->jChipType==SIS_630)||
+     (HwDeviceExtension->jChipType==SIS_730)) {
+           if(SiS_VBInfo & SetCRT2ToTV) {
+              if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
+                  if(SiS_GetReg1(SiS_P3d4,0x35) & 0x40){
+                          SiS_SetReg1(SiS_Part3Port,0x13,0xFA);
+                          SiS_SetReg1(SiS_Part3Port,0x14,0xC8);
+                          SiS_SetReg1(SiS_Part3Port,0x3D,0xA8);
+                  }
+              }
+          }
+  }
 #endif
-#ifdef CONFIG_FB_SIS_315
-/*add PALMN*/
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		temp = SiS_GetReg1 (SiS_P3d4, 0x31);
-		temp = temp & 0x01;
-		if (temp) {
-			temp1 = SiS_GetReg1 (SiS_P3d4, 0x38);
-			temp1 = temp1 & 0x40;
-			if (temp1) {
-				SiS_SetReg1 (SiS_Part3Port, 0x13, 0xFA);
-				SiS_SetReg1 (SiS_Part3Port, 0x14, 0xC8);
-				SiS_SetReg1 (SiS_Part3Port, 0x3D, 0xA8);
-			}
-		}
-	}
-	/*end add */
+
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+         if(SiS_VBInfo & SetCRT2ToTV) {
+             if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
+                   if(SiS_GetReg1(SiS_P3d4,0x38) & 0x40){
+                          SiS_SetReg1(SiS_Part3Port,0x13,0xFA);
+                          SiS_SetReg1(SiS_Part3Port,0x14,0xC8);
+                          SiS_SetReg1(SiS_Part3Port,0x3D,0xA8);
+                   }
+             }
+         }
+  }
 #endif
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV) {
-		tempdi = SiS_HiTVGroup3Data;
-		if (SiS_SetFlag & TVSimuMode) {
-			tempdi = SiS_HiTVGroup3Simu;
-			if (!(modeflag & Charx8Dot)) {
-				tempdi = SiS_HiTVGroup3Text;
-			}
-		}
-		for (i = 0; i <= 0x3E; i++) {
-			SiS_SetReg1 (SiS_Part3Port, i, tempdi[i]);
-		}
-	}
-	return;
+
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+    tempdi = SiS_HiTVGroup3Data;
+    if(SiS_SetFlag & TVSimuMode) {
+      tempdi = SiS_HiTVGroup3Simu;
+      if(!(modeflag & Charx8Dot)) {
+        tempdi = SiS_HiTVGroup3Text;
+      }
+    }
+    for(i=0; i<=0x3E; i++){
+       SiS_SetReg1(SiS_Part3Port,i,tempdi[i]);
+    }
+  }
+  return;
 }
 
+/* TW: Set 301 VGA2 registers */
+/* TW: Double-Checked against 650/301LV and 630/301B BIOS */
 void
-SiS_SetGroup4 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-	       USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
-	       PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetGroup4(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+              USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+	      PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempax, tempcx, tempbx, modeflag, temp, temp2, push1;
-	ULONG tempebx, tempeax, templong;
-
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-	}
-	temp = SiS_RVBHCFACT;
-	SiS_SetReg1 (SiS_Part4Port, 0x13, temp);
-
-	tempbx = SiS_RVBHCMAX;
-	temp = tempbx & 0x00FF;
-	SiS_SetReg1 (SiS_Part4Port, 0x14, temp);
-	temp2 = ((tempbx & 0xFF00) >> 8) << 7;
-
-	tempcx = SiS_VGAHT - 1;
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part4Port, 0x16, temp);
-	temp = ((tempcx & 0xFF00) >> 8) << 3;
-	temp2 = temp | temp2;
-
-	tempcx = SiS_VGAVT - 1;
-	if (!(SiS_VBInfo & SetCRT2ToTV)) {
-		tempcx = tempcx - 5;
-	}
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part4Port, 0x17, temp);
-	temp = temp2 | ((tempcx & 0xFF00) >> 8);
-	SiS_SetReg1 (SiS_Part4Port, 0x15, temp);
-
-	tempcx = SiS_VBInfo;
-	tempbx = SiS_VGAHDE;
-	if (modeflag & HalfDCLK) {
-		tempbx = tempbx >> 1;
-	}
-	if (tempcx & SetCRT2ToHiVisionTV) {
-		temp = 0xA0;
-		if (tempbx != 1024) {
-			temp = 0xC0;
-			if (tempbx != 1280)
-				temp = 0;
-		}
-	} else if ((tempcx & SetCRT2ToTV) && (SiS_VGAHDE == 1024)) {	/*301b */
-		temp = 0xA0;
-	} else {
-		temp = 0x80;
-		if (SiS_VBInfo & SetCRT2ToLCD) {
-			temp = 0;
-			if (tempbx > 800)
-				temp = 0x60;
-		}
-	}
-	if (SiS_LCDResInfo != Panel1280x1024)
-		temp = temp | 0x0A;
-	SiS_SetRegANDOR (SiS_Part4Port, 0x0E, ~0xEF, temp);
-
-	tempebx = SiS_VDE;
-	if (tempcx & SetCRT2ToHiVisionTV) {
-		/* if(!(tempax&0xE000)) tempbx=tempbx>>1; */
-		if (!(temp & 0xE000))
-			tempbx = tempbx >> 1;	/* alan ???? */
-
-	}
-
-	tempcx = SiS_RVBHRS;
-	temp = tempcx & 0x00FF;
-	SiS_SetReg1 (SiS_Part4Port, 0x18, temp);
-
-	tempebx = tempebx;
-	tempeax = SiS_VGAVDE;
-	tempcx = tempcx | 0x04000;
-/*tempeax=tempeax-tempebx;  */
-	if (tempeax <= tempebx) {
-		tempcx = ((tempcx & 0xFF00) ^ 0x4000) | (tempcx & 0x00ff);
-		tempeax = SiS_VGAVDE;
-	}
-
-	else {
-		tempeax = tempeax - tempebx;
-	}
-
-	push1 = tempcx;
-	templong = (tempeax * 256 * 1024) % tempebx;
-	tempeax = (tempeax * 256 * 1024) / tempebx;
-	tempebx = tempeax;
-	if (templong != 0) {
-		tempebx++;
-	}
-	tempcx = push1;
-	temp = (USHORT) (tempebx & 0x000000FF);
-	SiS_SetReg1 (SiS_Part4Port, 0x1B, temp);
-	temp = (USHORT) ((tempebx & 0x0000FF00) >> 8);
-	SiS_SetReg1 (SiS_Part4Port, 0x1A, temp);
-	tempbx = (USHORT) (tempebx >> 16);
-	temp = tempbx & 0x00FF;
-	temp = temp << 4;
-	temp = temp | ((tempcx & 0xFF00) >> 8);
-	SiS_SetReg1 (SiS_Part4Port, 0x19, temp);
-	/*301b */
-
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-		temp = 0x0028;
-		SiS_SetReg1 (SiS_Part4Port, 0x1C, temp);
-		tempax = SiS_VGAHDE;
-		if (modeflag & HalfDCLK) {
-			tempax = tempax >> 1;
-		}
-		if (SiS_VBInfo & (SetCRT2ToLCD)) {
-			if (tempax > 800)
-				tempax = tempax - 800;
-		}
-		tempax = tempax - 1;
-
-		if (SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToHiVisionTV)) {
-			if (SiS_VGAHDE > 800) {
-				if (SiS_VGAHDE == 1024)
-					tempax = (tempax * 25 / 32) - 1;
-				else
-					tempax = (tempax * 20 / 32) - 1;
-			}
-		}
-		temp = (tempax & 0xFF00) >> 8;
-		temp = ((temp & 0x0003) << 4);
-		SiS_SetReg1 (SiS_Part4Port, 0x1E, temp);
-		temp = (tempax & 0x00FF);
-		SiS_SetReg1 (SiS_Part4Port, 0x1D, temp);
-
-		if (SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToHiVisionTV)) {
-			if (SiS_VGAHDE > 800) {
-				SiS_SetRegOR (SiS_Part4Port, 0x1E, 0x08);
-			}
-		}
-		temp = 0x0036;
-		if (SiS_VBInfo & SetCRT2ToTV) {
-			temp = temp | 0x0001;
-		}
-		SiS_SetRegANDOR (SiS_Part4Port, 0x1F, 0x00C0, temp);
-		tempbx = (SiS_HT / 2) - 2;
-		temp = ((tempbx & 0x0700) >> 8) << 3;
-		SiS_SetRegANDOR (SiS_Part4Port, 0x21, 0x00C0, temp);
-		temp = tempbx & 0x00FF;
-		SiS_SetReg1 (SiS_Part4Port, 0x22, temp);
-	}
-/*end 301b*/
-	SiS_SetCRT2VCLK (BaseAddr, ROMAddr, ModeNo, ModeIdIndex,
-			 RefreshRateTableIndex, HwDeviceExtension);
+  USHORT tempax,tempcx,tempbx,modeflag,temp,temp2,push1;
+  ULONG tempebx,tempeax,templong;
+
+  if(ModeNo<=0x13)
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  else
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+
+  /* TW: From 650/301LV BIOS (done above as well, but does not matter) */
+  if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
+      if(SiS_VBInfo & SetCRT2ToLCDA)
+          SiS_SetReg1(SiS_Part4Port,0x24,0x0e);
+  }
+
+  /* TW: From 650/301LV BIOS */
+  if(SiS_VBInfo & SetCRT2ToLCDA) return;
+
+  temp = SiS_RVBHCFACT;
+  SiS_SetReg1(SiS_Part4Port,0x13,temp);
+
+  tempbx = SiS_RVBHCMAX;
+  temp = tempbx & 0x00FF;
+  SiS_SetReg1(SiS_Part4Port,0x14,temp);
+
+  temp2 = (((tempbx & 0xFF00) >> 8) << 7) & 0x00ff;
+
+  tempcx = SiS_VGAHT - 1;
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Part4Port,0x16,temp);
+
+  temp = (((tempcx & 0xFF00) >> 8) << 3) & 0x00ff;
+  temp2 |= temp;
+
+  tempcx = SiS_VGAVT - 1;
+  if(!(SiS_VBInfo & SetCRT2ToTV))  tempcx -= 5;
+
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Part4Port,0x17,temp);
+
+  temp = temp2 | ((tempcx & 0xFF00) >> 8);
+  SiS_SetReg1(SiS_Part4Port,0x15,temp);
+
+  tempcx = SiS_VBInfo;
+  tempbx = SiS_VGAHDE;
+  if(modeflag & HalfDCLK)  tempbx >>= 1;
+
+  /* TW: New for 650/301LV and 630/301B */
+  temp = 0xA0;
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+       temp = 0xA0;
+       if(tempbx != 1024) {
+           temp = 0xC0;
+           if(tempbx != 1280) temp = 0;
+       }
+  } else if(SiS_VBInfo & SetCRT2ToTV) {
+      if(tempbx <= 800) {
+         temp = 0x80;
+	 if(SiS_VBInfo & SetCRT2ToLCD){
+            temp = 0;
+            if(tempbx > 800) temp = 0x60;
+         }
+      }
+  } else {
+      temp = 0x80;
+      if(SiS_VBInfo & SetCRT2ToLCD){
+            temp = 0;
+            if(tempbx > 800) temp = 0x60;
+      }
+  }
+  if(SiS_HiVision & 0x03) {
+        temp = 0;
+	if(SiS_VGAHDE == 1024) temp = 0x20;
+  }
+  SiS_SetRegANDOR(SiS_Part4Port,0x0E,0x10,temp);
+
+  tempebx = SiS_VDE;
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) {
+     if(!(temp & 0xE0)) tempebx >>=1;
+  }
+
+  tempcx = SiS_RVBHRS;
+  temp = tempcx & 0x00FF;
+  SiS_SetReg1(SiS_Part4Port,0x18,temp);
+
+  tempeax = SiS_VGAVDE;
+  tempcx |= 0x4000;
+  if(tempeax <= tempebx){
+    tempcx = ((tempcx & 0xFF00) ^ 0x4000) | (tempcx & 0x00ff);
+  } else {
+    tempeax -= tempebx;
+  }
+
+  push1 = tempcx;
+
+  templong = (tempeax * 256 * 1024) % tempebx;
+  tempeax = (tempeax * 256 * 1024) / tempebx;
+  tempebx = tempeax;
+  if(templong != 0) tempebx++;
+
+  tempcx = push1;
+
+  temp = (USHORT)(tempebx & 0x000000FF);
+  SiS_SetReg1(SiS_Part4Port,0x1B,temp);
+  temp = (USHORT)((tempebx & 0x0000FF00) >> 8);
+  SiS_SetReg1(SiS_Part4Port,0x1A,temp);
+
+  tempbx = (USHORT)(tempebx >> 16);
+  temp = tempbx & 0x00FF;
+  temp <<= 4;
+  temp |= ((tempcx & 0xFF00) >> 8);
+  SiS_SetReg1(SiS_Part4Port,0x19,temp);
+
+  if(SiS_VBType & VB_SIS301BLV302BLV) {
+         SiS_SetReg1(SiS_Part4Port,0x1C,0x28);
+	 tempbx = 0;   			/* TW: From 630/301B and 650/301LV BIOS */
+         tempax = SiS_VGAHDE;
+         if(modeflag & HalfDCLK) tempax >>= 1;
+         if((SiS_VBInfo & SetCRT2ToLCD) || (SiS_HiVision & 0x03)) {
+             if(tempax > 800) tempax -= 800;
+         }
+
+         if((SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToHiVisionTV)) &&
+	                                 (!(SiS_HiVision & 0x03))) {
+           if(tempax > 800) {
+	      tempbx = 8;  		/* TW: From 630/301B and 650/301LV BIOS */
+              if(tempax == 1024)
+	        tempax *= 25;
+              else
+	        tempax *= 20;
+
+	      temp = tempax % 32;
+	      tempax /= 32;
+	      tempax--;
+	      if (temp!=0) tempax++;
+           }
+         }
+	 tempax--;
+         temp = (tempax & 0xFF00) >> 8;
+         temp &= 0x03;
+	 SiS_SetReg1(SiS_Part4Port,0x1D,tempax & 0x00FF);
+	 temp <<= 4;
+	 temp |= tempbx;
+	 SiS_SetReg1(SiS_Part4Port,0x1E,temp);
+
+         temp = 0x0036;
+         if((SiS_VBInfo & (SetCRT2ToTV-SetCRT2ToHiVisionTV)) &&
+	                               (!(SiS_HiVision & 0x03))) {  /* TW: From 650/301LV BIOS */
+		temp |= 0x01;
+	        if(SiS_VBInfo & SetInSlaveMode) {                   /* TW: From 650/301LV BIOS */
+	          if(!(SiS_SetFlag & TVSimuMode))                   /* TW: From 650/301LV BIOS */
+  	                  temp &= 0xFE;                             /* TW: From 650/301LV BIOS */
+		}
+         }
+         SiS_SetRegANDOR(SiS_Part4Port,0x1F,0xC0,temp);
+         tempbx = (SiS_HT >> 1) - 2;
+         temp = ((tempbx & 0x0700) >> 8) << 3;
+         SiS_SetRegANDOR(SiS_Part4Port,0x21,0xC0,temp);
+         temp = tempbx & 0x00FF;
+         SiS_SetReg1(SiS_Part4Port,0x22,temp);
+         if( (SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) &&
+	                        (SiS_VBInfo & SetCRT2ToLCD) ) {
+             SiS_SetReg1(SiS_Part4Port,0x24,0x0e);
+	 }
+  }
+
+  SiS_SetCRT2VCLK(BaseAddr,ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwDeviceExtension);
 }
 
+/* TW: Double-Checked against 650/301LV and 630/301B BIOS */
 void
-SiS_SetCRT2VCLK (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		 USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
-		 PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_SetCRT2VCLK(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                 USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT vclkindex;
-	USHORT tempah, temp1;
-
-	vclkindex =
-	    SiS_GetVCLK2Ptr (ROMAddr, ModeNo, ModeIdIndex,
-			     RefreshRateTableIndex, HwDeviceExtension);
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))) {
-		tempah = SiS_VBVCLKData[vclkindex].Part4_A;
-		SiS_SetReg1 (SiS_Part4Port, 0x0A, tempah);
-		tempah = SiS_VBVCLKData[vclkindex].Part4_B;
-		SiS_SetReg1 (SiS_Part4Port, 0x0B, tempah);
-	} else {
-		SiS_SetReg1 (SiS_Part4Port, 0x0A, 0x01);
-		tempah = SiS_VBVCLKData[vclkindex].Part4_B;
-		SiS_SetReg1 (SiS_Part4Port, 0x0B, tempah);
-		tempah = SiS_VBVCLKData[vclkindex].Part4_A;
-		SiS_SetReg1 (SiS_Part4Port, 0x0A, tempah);
-
-	}
-	SiS_SetReg1 (SiS_Part4Port, 0x12, 0x00);
-	tempah = 0x08;
-	if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-		tempah = tempah | 0x020;
-	}
-	temp1 = SiS_GetReg1 (SiS_Part4Port, 0x12);
-	tempah = tempah | temp1;
-	SiS_SetReg1 (SiS_Part4Port, 0x12, tempah);
+  USHORT vclkindex;
+  USHORT tempah,temp1;
+
+  vclkindex = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                              HwDeviceExtension);
+
+  if(SiS_VBType & VB_SIS301BLV302BLV) {
+   	tempah = SiS_VBVCLKData[vclkindex].Part4_A;
+   	SiS_SetReg1(SiS_Part4Port,0x0A,tempah);
+   	tempah = SiS_VBVCLKData[vclkindex].Part4_B;
+   	SiS_SetReg1(SiS_Part4Port,0x0B,tempah);
+	/* TW: New from 650/301LV BIOS */
+	if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
+           if(SiS_VBInfo & SetCRT2ToTV) {
+	      if(!(SiS_VBInfo & SetPALTV)) {
+                 if((ModeNo == 0x4a) || (ModeNo == 0x38)) {
+		    SiS_SetReg1(SiS_Part4Port,0x0a,0x57);
+		    SiS_SetReg1(SiS_Part4Port,0x0b,0x46);
+		    SiS_SetReg1(SiS_Part4Port,0x1f,0xf6);
+                 }
+              }
+           }
+	}
+  } else {
+   	SiS_SetReg1(SiS_Part4Port,0x0A,0x01);
+   	tempah = SiS_VBVCLKData[vclkindex].Part4_B;
+   	SiS_SetReg1(SiS_Part4Port,0x0B,tempah);
+   	tempah = SiS_VBVCLKData[vclkindex].Part4_A;
+   	SiS_SetReg1(SiS_Part4Port,0x0A,tempah);
+  }
+  SiS_SetReg1(SiS_Part4Port,0x12,0x00);
+  tempah = 0x08;
+  if(SiS_VBInfo & SetCRT2ToRAMDAC) {
+    	tempah |= 0x020;
+  }
+  temp1 = SiS_GetReg1(SiS_Part4Port,0x12);
+  tempah |= temp1;
+  SiS_SetReg1(SiS_Part4Port,0x12,tempah);
 }
 
+/* TW: Double-checked against 650/LVDS (1.10.07), 630/301B/LVDS/LVDS+CH, 650/301LV BIOS */
 USHORT
-SiS_GetVCLK2Ptr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		 USHORT RefreshRateTableIndex,
-		 PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_GetVCLK2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+        USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempbx;
-#ifdef CONFIG_FB_SIS_300
-	USHORT LCDXlat1VCLK[4] = { VCLK65, VCLK65, VCLK65, VCLK65 };
-	USHORT LCDXlat2VCLK[4] = { VCLK108_2, VCLK108_2, VCLK108_2, VCLK108_2 };
-	USHORT LVDSXlat2VCLK[4] = { VCLK65, VCLK65, VCLK65, VCLK65 };
-	USHORT LVDSXlat3VCLK[4] = { VCLK65, VCLK65, VCLK65, VCLK65 };
-#else				/* SIS315H */
-	USHORT LCDXlat1VCLK[4] =
-	    { VCLK65 + 2, VCLK65 + 2, VCLK65 + 2, VCLK65 + 2 };
-	USHORT LCDXlat2VCLK[4] =
-	    { VCLK108_2 + 5, VCLK108_2 + 5, VCLK108_2 + 5, VCLK108_2 + 5 };
-	USHORT LVDSXlat2VCLK[4] =
-	    { VCLK65 + 2, VCLK65 + 2, VCLK65 + 2, VCLK65 + 2 };
-	USHORT LVDSXlat3VCLK[4] =
-	    { VCLK65 + 2, VCLK65 + 2, VCLK65 + 2, VCLK65 + 2 };
+  USHORT tempbx;
+#ifdef SIS300
+  USHORT LCDXlat1VCLK300[4] = {VCLK65,   VCLK65,   VCLK65,   VCLK65};
+  USHORT LCDXlat2VCLK300[4] = {VCLK108_2,VCLK108_2,VCLK108_2,VCLK108_2};
+  USHORT LVDSXlat2VCLK300[4]= {VCLK65,   VCLK65,   VCLK65,   VCLK65};
+  USHORT LVDSXlat3VCLK300[4]= {VCLK65,   VCLK65,   VCLK65,   VCLK65};
+#endif
+#ifdef SIS315H
+  USHORT LCDXlat1VCLK310[4] = {VCLK65+2,   VCLK65+2,   VCLK65+2,   VCLK65+2};
+  USHORT LCDXlat2VCLK310[4] = {VCLK108_2+5,VCLK108_2+5,VCLK108_2+5,VCLK108_2+5};
+  USHORT LVDSXlat2VCLK310[4]= {VCLK65+2,   VCLK65+2,   VCLK65+2,   VCLK65+2};
+  USHORT LVDSXlat3VCLK310[4]= {VCLK108_2+5,VCLK108_2+5,VCLK108_2+5,VCLK108_2+5};
+  			   /* {VCLK65+2,   VCLK65+2,   VCLK65+2,   VCLK65+2}; -  650/LVDS 1.10.07 */
+#endif
+  USHORT LCDXlat0VCLK[4]    = {VCLK40, VCLK40, VCLK40, VCLK40};
+  USHORT LVDSXlat1VCLK[4]   = {VCLK40, VCLK40, VCLK40, VCLK40};
+  USHORT CRT2Index,VCLKIndex=0;
+  USHORT modeflag,resinfo;
+  UCHAR *CHTVVCLKPtr=NULL;
+  USHORT *LCDXlatVCLK1 = NULL;
+  USHORT *LCDXlatVCLK2 = NULL;
+  USHORT *LVDSXlatVCLK2 = NULL;
+  USHORT *LVDSXlatVCLK3 = NULL;
+
+#ifdef SIS315H
+  if(HwDeviceExtension->jChipType >= SIS_315H) {
+		LCDXlatVCLK1 = LCDXlat1VCLK310;
+		LCDXlatVCLK2 = LCDXlat2VCLK310;
+		LVDSXlatVCLK2 = LVDSXlat2VCLK310;
+		LVDSXlatVCLK3 = LVDSXlat3VCLK310;
+  } else {
+#endif
+#ifdef SIS300
+		LCDXlatVCLK1 = LCDXlat1VCLK300;
+		LCDXlatVCLK2 = LCDXlat2VCLK300;
+		LVDSXlatVCLK2 = LVDSXlat2VCLK300;
+		LVDSXlatVCLK3 = LVDSXlat3VCLK300;
+#endif
+#ifdef SIS315H
+  }
 #endif
-	USHORT LVDSXlat1VCLK[4] = { VCLK40, VCLK40, VCLK40, VCLK40 };
-	USHORT CRT2Index, VCLKIndex;
-	USHORT modeflag, resinfo;
-	UCHAR *CHTVVCLKPtr = NULL;
-
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-		resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
-		CRT2Index = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-		resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
-		CRT2Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-	}
 
-	if (SiS_IF_DEF_LVDS == 0) {
-		CRT2Index = CRT2Index >> 6;	/*  for LCD */
-		if ((SiS_VBInfo & SetCRT2ToLCD) || (SiS_VBInfo & SetCRT2ToLCDA)) {	/*301b */
-			if (SiS_LCDResInfo != Panel1024x768) {
-				VCLKIndex = LCDXlat2VCLK[CRT2Index];
-			} else {
-				VCLKIndex = LCDXlat1VCLK[CRT2Index];
-			}
-		} else {	/* for TV */
-			if (SiS_VBInfo & SetCRT2ToTV) {
-				if (SiS_IF_DEF_HiVision == 1) {
-					if (SiS_SetFlag & RPLLDIV2XO) {
-						VCLKIndex = HiTVVCLKDIV2;
-						if (HwDeviceExtension->
-						    jChipType >= SIS_315H) {	/* 310 series */
-/*            VCLKIndex += 11;    for chip310  0x2E */
-							VCLKIndex += 25;	/* for chip315  */
-						}
-					} else {
-						VCLKIndex = HiTVVCLK;
-						if (HwDeviceExtension->
-						    jChipType >= SIS_315H) {	/* 310 series */
-/*            VCLKIndex += 11;    for chip310  0x2E */
-							VCLKIndex += 25;	/* for chip315  */
-						}
-					}
-					if (SiS_SetFlag & TVSimuMode) {
-						if (modeflag & Charx8Dot) {
-							VCLKIndex =
-							    HiTVSimuVCLK;
-							if (HwDeviceExtension->
-							    jChipType >= SIS_315H) {	/* 310 series */
-/*            VCLKIndex += 11;    for chip310  0x2E */
-								VCLKIndex += 25;	/* for chip315  */
-							}
-						} else {
-							VCLKIndex =
-							    HiTVTextVCLK;
-							if (HwDeviceExtension->
-							    jChipType >= SIS_315H) {	/* 310 series */
-/*            VCLKIndex += 11;    for chip310  0x2E */
-								VCLKIndex += 25;	/* for chip315  */
-							}
-						}
-					}
-				} else {
-					if (SiS_VBInfo & SetCRT2ToTV) {
-						if (SiS_SetFlag & RPLLDIV2XO) {
-							VCLKIndex = TVVCLKDIV2;
-							if (HwDeviceExtension->
-							    jChipType >= SIS_315H) {	/* 310 series */
-/*            VCLKIndex += 11;    for chip310  0x2E */
-								VCLKIndex += 25;	/* for chip315  */
-							}
-						} else {
-							VCLKIndex = TVVCLK;
-							if (HwDeviceExtension->
-							    jChipType >= SIS_315H) {	/* 310 series */
-/*            VCLKIndex += 11;    for chip310  0x2E */
-								VCLKIndex += 25;	/* for chip315  */
-							}
-						}
-					}
-				}
-			} else {	/* for CRT2 */
-				VCLKIndex =
-				    (UCHAR) SiS_GetReg2 ((USHORT) (SiS_P3ca + 0x02));	/*  Port 3cch */
-				VCLKIndex = ((VCLKIndex >> 2) & 0x03);
-				if (ModeNo > 0x13) {
-					VCLKIndex =
-					    SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;	/* di+Ext_CRTVCLK */
-					VCLKIndex = VCLKIndex & 0x3f;
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	resinfo = SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
+    	CRT2Index = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	resinfo = SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
+    	CRT2Index = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+  }
+
+  if(SiS_IF_DEF_LVDS==0) {    /* 301 */
+
+     if (SiS_SetFlag & ProgrammingCRT2) {
+
+        CRT2Index >>= 6;
+        if(SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)){      /*  LCD */
+            if(HwDeviceExtension->jChipType < SIS_315H) {
+	       /* TW: Inserted from 630/301B BIOS */
+	       if(SiS_LCDResInfo == Panel800x600)
+	    		VCLKIndex = LCDXlat0VCLK[CRT2Index];
+	       else if(SiS_LCDResInfo == Panel1024x768)
+	    		VCLKIndex = LCDXlatVCLK1[CRT2Index];
+	       else
+	    		VCLKIndex = LCDXlatVCLK2[CRT2Index];
+	    } else {
+               /* TW: 650/301LV BIOS does not check expanding, 315 does  */
+	       if( (HwDeviceExtension->jChipType > SIS_315PRO) ||
+	           (!(SiS_LCDInfo & LCDNonExpanding)) ) {
+      	          if(SiS_LCDResInfo == Panel1024x768){
+		     VCLKIndex = LCDXlatVCLK1[CRT2Index];
+                   } else if(SiS_LCDResInfo == Panel1280x960) {
+		     VCLKIndex = 0x45;
+		     if(resinfo == 0x09) VCLKIndex++;
+	           } else {
+		     VCLKIndex = LCDXlatVCLK2[CRT2Index];
+      	           }
+	       } else {
+                   VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));  /*  Port 3cch */
+         	   VCLKIndex = ((VCLKIndex >> 2) & 0x03);
+        	   if(ModeNo > 0x13) {
+          		VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+        	   }
+		   if(ModeNo <= 0x13) {  /* TW: Inserted from 315 BIOS */
+		      if(SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x42;
+		   }
+		   if(VCLKIndex == 0) VCLKIndex = 0x41;
+		   if(VCLKIndex == 1) VCLKIndex = 0x43;
+		   if(VCLKIndex == 4) VCLKIndex = 0x44;
+	       }
+	    }
+        } else if(SiS_VBInfo & SetCRT2ToTV) {                 /*  TV */
+        	if((SiS_IF_DEF_HiVision == 1) && (SiS_VBInfo & SetCRT2ToHiVisionTV)) {
+          		if(SiS_SetFlag & RPLLDIV2XO)      VCLKIndex = HiTVVCLKDIV2;
+     			else                              VCLKIndex = HiTVVCLK;
+          		if(SiS_SetFlag & TVSimuMode) {
+            			if(modeflag & Charx8Dot)  VCLKIndex = HiTVSimuVCLK;
+            			else 			  VCLKIndex = HiTVTextVCLK;
+          		}
+        	} else {
+       			if(SiS_SetFlag & RPLLDIV2XO)      VCLKIndex = TVVCLKDIV2;
+            		else         		          VCLKIndex = TVVCLK;
+          	}
+		if(HwDeviceExtension->jChipType >= SIS_315H) {
+              		VCLKIndex += 25;
+  		}
+        } else {         					/* RAMDAC2 */
+        	VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));
+        	VCLKIndex = ((VCLKIndex >> 2) & 0x03);
+        	if(ModeNo > 0x13) {
+          		VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 
+			if(HwDeviceExtension->jChipType < SIS_315H) {
+          			VCLKIndex &= 0x3f;
+				if( (HwDeviceExtension->jChipType == SIS_630) &&
+				    (HwDeviceExtension->jChipRevision >= 0x30)) {
+				     if(VCLKIndex == 0x14) VCLKIndex = 0x2e;
 				}
 			}
-		}
-	} else {		/*   LVDS  */
-		if (ModeNo <= 0x13)
-			VCLKIndex = CRT2Index;
-		else
-			VCLKIndex = CRT2Index;
-		if (SiS_IF_DEF_CH7005 == 1) {
-			if (!(SiS_VBInfo & SetCRT2ToLCD)) {
-				VCLKIndex = VCLKIndex & 0x1f;
-				tempbx = 0;
-				if (SiS_VBInfo & SetPALTV)
-					tempbx = tempbx + 2;
-				if (SiS_VBInfo & SetCHTVOverScan)
-					tempbx = tempbx + 1;
-				switch (tempbx) {
-				case 0:
-					CHTVVCLKPtr = SiS_CHTVVCLKUNTSC;
-					break;
-				case 1:
-					CHTVVCLKPtr = SiS_CHTVVCLKONTSC;
-					break;
-				case 2:
-					CHTVVCLKPtr = SiS_CHTVVCLKUPAL;
-					break;
-				case 3:
-					CHTVVCLKPtr = SiS_CHTVVCLKOPAL;
-					break;
-				}
-				VCLKIndex = CHTVVCLKPtr[VCLKIndex];
-			}
-		} else {
-			VCLKIndex = VCLKIndex >> 6;
-			if (SiS_LCDResInfo == Panel800x600)
-				VCLKIndex = LVDSXlat1VCLK[VCLKIndex];
-			else if (SiS_LCDResInfo == Panel1024x768)
-				VCLKIndex = LVDSXlat2VCLK[VCLKIndex];
-			else
-				VCLKIndex = LVDSXlat3VCLK[VCLKIndex];
-		}
-	}
-/*VCLKIndex=VCLKIndex&0x3F;   */
-	if (HwDeviceExtension->jChipType < SIS_315H) {	/* for300 serial */
-		VCLKIndex = VCLKIndex & 0x3F;
-	}
-	return (VCLKIndex);
+        	}
+        }
+
+    } else {   /* If not programming CRT2 */
+
+        VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));
+        VCLKIndex = ((VCLKIndex >> 2) & 0x03);
+        if(ModeNo > 0x13) {
+             VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+	     if(HwDeviceExtension->jChipType < SIS_315H) {
+                VCLKIndex &= 0x3f;
+		if(HwDeviceExtension->jChipType != SIS_630) {
+		   if(VCLKIndex == 0x1b) VCLKIndex = 0x35;
+		}
+	     }
+        }
+    }
+
+  } else {       /*   LVDS  */
+
+    	VCLKIndex = CRT2Index;
+
+	if(SiS_SetFlag & ProgrammingCRT2) {  /* programming CRT2 */
+
+	   if( (SiS_IF_DEF_CH70xx != 0) && (SiS_VBInfo & SetCRT2ToTV) ) {
+
+		VCLKIndex &= 0x1f;
+        	tempbx = 0;
+        	if(SiS_VBInfo & SetPALTV) tempbx += 2;
+        	if(SiS_VBInfo & SetCHTVOverScan) tempbx += 1;
+       		switch(tempbx) {
+          	   case 0: CHTVVCLKPtr = SiS_CHTVVCLKUNTSC;  break;
+         	   case 1: CHTVVCLKPtr = SiS_CHTVVCLKONTSC;  break;
+                   case 2: CHTVVCLKPtr = SiS_CHTVVCLKUPAL;   break;
+                   case 3: CHTVVCLKPtr = SiS_CHTVVCLKOPAL;   break;
+        	}
+        	VCLKIndex = CHTVVCLKPtr[VCLKIndex];
+
+	   } else if(SiS_VBInfo & SetCRT2ToLCD) {
+
+	        VCLKIndex >>= 6;
+     		if((SiS_LCDResInfo==Panel800x600) || (SiS_LCDResInfo==Panel320x480))
+     			VCLKIndex = LVDSXlat1VCLK[VCLKIndex];
+     		else if(SiS_LCDResInfo==Panel1024x768)
+     			VCLKIndex = LVDSXlatVCLK2[VCLKIndex];
+     		else 	VCLKIndex = LVDSXlatVCLK3[VCLKIndex];
+
+	   } else {
+
+	        VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));
+                VCLKIndex = ((VCLKIndex >> 2) & 0x03);
+                if(ModeNo > 0x13) {
+                     VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+		     if( (HwDeviceExtension->jChipType == SIS_630) &&
+                         (HwDeviceExtension->jChipRevision >= 0x30) ) {
+		         	if(VCLKIndex == 0x14) VCLKIndex = 0x2e;
+		     }
+	        }
+
+	   }
+
+	} else {  /* if not programming CRT2 */
+
+	   VCLKIndex = (UCHAR)SiS_GetReg2((USHORT)(SiS_P3ca+0x02));
+           VCLKIndex = ((VCLKIndex >> 2) & 0x03);
+           if(ModeNo > 0x13) {
+              VCLKIndex = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+              if(HwDeviceExtension->jChipType < SIS_315H) {
+	         if(HwDeviceExtension->jChipType != SIS_630) {
+		        if(VCLKIndex == 0x1b) VCLKIndex = 0x35;
+	         }
+	      }
+	   }
+
+	}
+
+  }
+
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+    	VCLKIndex &= 0x3F;
+  }
+  return (VCLKIndex);
 }
 
+/* TW: Set 301 Palette address port registers */
+/* TW: Checked against 650/301LV BIOS */
 void
-SiS_SetGroup5 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-	       USHORT ModeIdIndex)
+SiS_SetGroup5(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+              USHORT ModeIdIndex)
 {
-	USHORT Pindex, Pdata;
 
-	Pindex = SiS_Part5Port;
-	Pdata = SiS_Part5Port + 1;
-	if (SiS_ModeType == ModeVGA) {
-		if (!
-		    (SiS_VBInfo &
-		     (SetInSlaveMode | LoadDACFlag | CRT2DisplayFlag))) {
-			SiS_EnableCRT2 ();
-/*    LoadDAC2(ROMAddr,SiS_Part5Port,ModeNo,ModeIdIndex);  */
-		}
-	}
-	return;
+  if((SiS_VBType & VB_SIS301BLV302BLV) && (SiS_VBInfo & SetCRT2ToLCDA))
+      return;
+
+  if(SiS_ModeType == ModeVGA){
+    if(!(SiS_VBInfo & (SetInSlaveMode|LoadDACFlag))){
+      SiS_EnableCRT2();
+      SiS_LoadDAC2(ROMAddr,SiS_Part5Port,ModeNo,ModeIdIndex);
+    }
+  }
+  return;
 }
 
+/* TW: Checked against 650/301LV BIOS */
 void
-SiS_LoadDAC2 (ULONG ROMAddr, USHORT SiS_Part5Port, USHORT ModeNo,
-	      USHORT ModeIdIndex)
+SiS_LoadDAC2(UCHAR *ROMAddr,USHORT SiS_Part5Port,
+             USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT data, data2;
-	USHORT time, i, j, k;
-	USHORT m, n, o;
-	USHORT si, di, bx, dl;
-	USHORT al, ah, dh;
-	USHORT *table = 0;
-	USHORT Pindex, Pdata, modeflag;
-
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-	}
+   USHORT data,data2;
+   USHORT time,i,j,k;
+   USHORT m,n,o;
+   USHORT si,di,bx,dl;
+   USHORT al,ah,dh;
+   USHORT *table=0;
+   USHORT Pindex,Pdata,modeflag;
+
+/* if(SiS_SetFlag & SetDispDevSwitchFlag) return;  - TW: Not needed */
+
+   if(ModeNo <= 0x13)
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;      /* si+St_ResInfo */
+   else
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;     /* si+Ext_ResInfo */
+
+#if 0
+   if(!(ds:489 & 0x08)) {
+#endif
 
 	Pindex = SiS_Part5Port;
 	Pdata = SiS_Part5Port + 1;
 	data = modeflag & DACInfoFlag;
 	time = 64;
-	if (data == 0x00)
-		table = SiS_MDA_DAC;
-	if (data == 0x08)
-		table = SiS_CGA_DAC;
-	if (data == 0x10)
-		table = SiS_EGA_DAC;
-	if (data == 0x18) {
-		time = 256;
-		table = SiS_VGA_DAC;
+	if(data == 0x00) table = SiS_MDA_DAC;
+	if(data == 0x08) table = SiS_CGA_DAC;
+	if(data == 0x10) table = SiS_EGA_DAC;
+	if(data == 0x18) {
+	   time = 256;
+	   table = SiS_VGA_DAC;
 	}
-	if (time == 256)
-		j = 16;
-	else
-		j = time;
 
-	SiS_SetReg3 (Pindex, 0x00);
+	if(time == 256) j = 16;
+	else j = time;
 
-	for (i = 0; i < j; i++) {
-		data = table[i];
-		for (k = 0; k < 3; k++) {
-			data2 = 0;
-			if (data & 0x01)
-				data2 = 0x2A;
-			if (data & 0x02)
-				data2 = data2 + 0x15;
-			SiS_SetReg3 (Pdata, data2);
-			data = data >> 2;
-		}
-	}
+	SiS_SetReg3(Pindex,0x00);
 
-	if (time == 256) {
-		for (i = 16; i < 32; i++) {
-			data = table[i];
-			for (k = 0; k < 3; k++)
-				SiS_SetReg3 (Pdata, data);
-		}
-		si = 32;
-		for (m = 0; m < 9; m++) {
-			di = si;
-			bx = si + 0x04;
-			dl = 0;
-			for (n = 0; n < 3; n++) {
-				for (o = 0; o < 5; o++) {
-					dh = table[si];
-					ah = table[di];
-					al = table[bx];
-					si++;
-					SiS_WriteDAC2 (Pdata, dl, ah, al, dh);
-				}	/* for 5 */
-				si = si - 2;
-				for (o = 0; o < 3; o++) {
-					dh = table[bx];
-					ah = table[di];
-					al = table[si];
-					si--;
-					SiS_WriteDAC2 (Pdata, dl, ah, al, dh);
-				}	/* for 3 */
-				dl++;
-			}	/* for 3 */
-			si = si + 5;
-		}		/* for 9 */
+	for(i=0; i<j; i++) {
+	   data = table[i];
+	   for(k=0; k<3; k++) {
+		data2 = 0;
+		if(data & 0x01) data2 = 0x2A;
+		if(data & 0x02) data2 += 0x15;
+		data2 <<= 2;   			/* TW: New from 650/301LV BIOS */
+		SiS_SetReg3(Pdata,data2);
+		data >>= 2;
+	   }
 	}
+
+	if(time == 256) {
+	   for(i=16;i<32;i++) {
+		data = table[i];
+		data <<= 2;   			/* TW: New from 650/301LV BIOS */
+		for(k=0; k<3; k++) SiS_SetReg3(Pdata,data);
+	   }
+           si = 32;
+           for(m=0; m<9; m++) {
+             di = si;
+             bx = si + 0x04;
+             dl = 0;
+             for(n=0; n<3; n++) {
+                for(o=0; o<5; o++) {
+                  dh = table[si];
+                  ah = table[di];
+                  al = table[bx];
+                  si++;
+                  SiS_WriteDAC2(Pdata,dl,ah,al,dh);
+                }         /* for 5 */
+                si = si - 2;
+                for(o=0; o<3; o++) {
+                  dh = table[bx];
+                  ah = table[di];
+                  al = table[si];
+                  si--;
+                  SiS_WriteDAC2(Pdata,dl,ah,al,dh);
+                }         /* for 3 */
+                dl++;
+             }            /* for 3 */
+             si = si + 5;
+           }               /* for 9 */
+        }
+#if 0
+    } /* ds:489 & 0x08 */
+#endif
 }
 
+/* TW: Checked against 650/301LV BIOS */
 void
-SiS_WriteDAC2 (USHORT Pdata, USHORT dl, USHORT ah, USHORT al, USHORT dh)
+SiS_WriteDAC2(USHORT Pdata, USHORT dl, USHORT ah, USHORT al, USHORT dh)
 {
-	USHORT temp;
-	USHORT bh, bl;
-
-	bh = ah;
-	bl = al;
-	if (dl != 0) {
-		temp = bh;
-		bh = dh;
-		dh = temp;
-		if (dl == 1) {
-			temp = bl;
-			bl = dh;
-			dh = temp;
-		} else {
-			temp = bl;
-			bl = bh;
-			bh = temp;
-		}
-	}
-	SiS_SetReg3 (Pdata, (USHORT) dh);
-	SiS_SetReg3 (Pdata, (USHORT) bh);
-	SiS_SetReg3 (Pdata, (USHORT) bl);
+  USHORT temp;
+  USHORT bh,bl;
+
+  bh = ah;
+  bl = al;
+  if(dl != 0) {
+    temp = bh;
+    bh = dh;
+    dh = temp;
+    if(dl == 1) {
+       temp = bl;
+       bl = dh;
+       dh = temp;
+    } else {
+       temp = bl;
+       bl = bh;
+       bh = temp;
+    }
+  }
+  dh <<= 2;   				/* TW: New from 650/301LV BIOS */
+  bh <<= 2;   				/* TW: New from 650/301LV BIOS */
+  bl <<= 2;   				/* TW: New from 650/301LV BIOS */
+  SiS_SetReg3(Pdata,(USHORT)dh);
+  SiS_SetReg3(Pdata,(USHORT)bh);
+  SiS_SetReg3(Pdata,(USHORT)bl);
 }
 
+/* TW: Checked against 650/LVDS and 630/301B BIOS */
 void
-SiS_SetCHTVReg (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		USHORT RefreshRateTableIndex)
+SiS_ModCRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT temp, tempbx, tempcl;
-/*  USHORT CRT2CRTC; */
-	USHORT TVType, resindex;
-	SiS_CHTVRegDataStruct *CHTVRegData = NULL;
+  USHORT temp,tempah,i,modeflag,j;
+  USHORT ResInfo,DisplayType;
+  SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL;
+
+  if(ModeNo <= 0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  }
+
+  temp = SiS_GetLVDSCRT1Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                            &ResInfo,&DisplayType);
+
+  if(temp == 0) return;
+
+  /* TW: Inserted from 630/LVDS BIOS */
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(SiS_SetFlag & CRT2IsVGA) return;
+  }
+
+  switch(DisplayType) {
+    case 0 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;           break;
+    case 1 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;          break;
+    case 2 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;         break;
+    case 3 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;         break;
+    case 4 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;        break;
+    case 5 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;       break;
+    case 6 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;           break;
+    case 7 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;          break;
+    case 8 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;         break;
+    case 9 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;         break;
+    case 10: LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;        break;
+    case 11: LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;       break;
+    case 12: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1;           break;
+    case 13: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1_H;         break;
+    case 14: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1;         break;
+    case 15: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1_H;       break;
+    case 16: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2;         break;
+    case 17: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2_H;       break;
+    case 18: LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;               break;
+    case 19: LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;               break;
+    case 20: LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;                break;
+    case 21: LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;                break;
+    case 22: LVDSCRT1Ptr = SiS_LVDSCRT1320x480_1;           break; /* FSTN */
+    case 23: LVDSCRT1Ptr = SiS_LVDSCRT11024x600_1;          break;
+    case 24: LVDSCRT1Ptr = SiS_LVDSCRT11024x600_1_H;        break;
+    case 25: LVDSCRT1Ptr = SiS_LVDSCRT11024x600_2;          break;
+    case 26: LVDSCRT1Ptr = SiS_LVDSCRT11024x600_2_H;        break;
+    case 27: LVDSCRT1Ptr = SiS_LVDSCRT11152x768_1;          break;
+    case 28: LVDSCRT1Ptr = SiS_LVDSCRT11152x768_1_H;        break;
+    case 29: LVDSCRT1Ptr = SiS_LVDSCRT11152x768_2;          break;
+    case 30: LVDSCRT1Ptr = SiS_LVDSCRT11152x768_2_H;        break;
+  }
+
+  SiS_SetRegAND(SiS_P3d4,0x11,0x7f);                        /*unlock cr0-7  */
+
+  tempah = (LVDSCRT1Ptr+ResInfo)->CR[0];
+  SiS_SetReg1(SiS_P3d4,0x00,tempah);
+
+  for(i=0x02,j=1;i<=0x05;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3d4,i,tempah);
+  }
+  for(i=0x06,j=5;i<=0x07;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3d4,i,tempah);
+  }
+  for(i=0x10,j=7;i<=0x11;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3d4,i,tempah);
+  }
+  for(i=0x15,j=9;i<=0x16;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3d4,i,tempah);
+  }
+  for(i=0x0A,j=11;i<=0x0C;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3c4,i,tempah);
+  }
+
+  tempah = (LVDSCRT1Ptr+ResInfo)->CR[14];
+  tempah &= 0xE0;
+  SiS_SetRegANDOR(SiS_P3c4,0x0E,0x1f,tempah);     	/* TW: Modfied (650/LVDS); Was SetReg(tempah) */
+
+  tempah = (LVDSCRT1Ptr+ResInfo)->CR[14];
+  tempah &= 0x01;
+  tempah <<= 5;
+  if(modeflag & DoubleScanMode){
+    	tempah |= 0x080;
+  }
+  SiS_SetRegANDOR(SiS_P3d4,0x09,~0x020,tempah);
+
+  /* TW: Inserted from 650/LVDS BIOS */
+  if(SiS_VBInfo & SetCRT2ToTV) {
+     if(modeflag & HalfDCLK)
+        SiS_SetRegAND(SiS_P3d4,0x11,0x7f);
+  }
+
+  return;
+}
 
-	if (ModeNo <= 0x13) {
-		tempcl = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-	} else {
-		tempcl = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-	}
-	TVType = 0;
-	if (SiS_VBInfo & SetPALTV)
-		TVType = TVType + 2;
-	if (SiS_VBInfo & SetCHTVOverScan)
-		TVType = TVType + 1;
-	switch (TVType) {
-	case 0:
-		CHTVRegData = SiS_CHTVReg_UNTSC;
-		break;
-	case 1:
-		CHTVRegData = SiS_CHTVReg_ONTSC;
-		break;
-	case 2:
-		CHTVRegData = SiS_CHTVReg_UPAL;
-		break;
-	case 3:
-		CHTVRegData = SiS_CHTVReg_OPAL;
-		break;
-	}
-	resindex = tempcl & 0x3F;
+#if 0 /* TW: Unused */
+/*301b*/
+void
+SiS_CHACRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                USHORT RefreshRateTableIndex)
+{
+  USHORT temp,tempah,i,modeflag,j;
+  USHORT ResInfo,DisplayType;
+  SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL;
+
+  if(ModeNo<=0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;      /* si+St_ResInfo */
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;     /* si+Ext_ResInfo */
+  }
+
+  temp=SiS_GetLVDSCRT1Ptr(ROMAddr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
+                       &ResInfo,&DisplayType);
+  if(temp==0){
+    return;
+  }
+
+  switch(DisplayType) {
+    case 0 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;           break;
+    case 1 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;          break;
+    case 2 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;         break;
+    case 3 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;         break;
+    case 4 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;        break;
+    case 5 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;       break;
+    case 6 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;           break;
+    case 7 : LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;          break;
+    case 8 : LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;         break;
+    case 9 : LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;         break;
+    case 10: LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;        break;
+    case 11: LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;       break;
+    case 12: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1;           break;
+    case 13: LVDSCRT1Ptr = SiS_LVDSCRT1XXXxXXX_1_H;         break;
+    case 14: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1;         break;
+    case 15: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_1_H;       break;
+    case 16: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2;         break;
+    case 17: LVDSCRT1Ptr = SiS_LVDSCRT11400x1050_2_H;       break;
+    case 18: LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;               break;
+    case 19: LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;               break;
+    case 20: LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;                break;
+    case 21: LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;                break;
+    case 22: LVDSCRT1Ptr = SiS_LVDSCRT1320x480_1;           break; /* FSTN */
+  }
+
+  tempah=(UCHAR)SiS_GetReg1(SiS_P3d4,0x11);                        /*unlock cr0-7  */
+  tempah=tempah&0x7F;
+  SiS_SetReg1(SiS_P3d4,0x11,tempah);
+  tempah = (LVDSCRT1Ptr+ResInfo)->CR[0];
+  SiS_SetReg1(SiS_P3d4,0x0,tempah);
+  for(i=0x02,j=1;i<=0x05;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3d4,i,tempah);
+  }
+  for(i=0x06,j=5;i<=0x07;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3d4,i,tempah);
+  }
+  for(i=0x10,j=7;i<=0x11;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3d4,i,tempah);
+  }
+  for(i=0x15,j=9;i<=0x16;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3d4,i,tempah);
+  }
+
+  for(i=0x0A,j=11;i<=0x0C;i++,j++){
+    tempah = (LVDSCRT1Ptr+ResInfo)->CR[j];
+    SiS_SetReg1(SiS_P3c4,i,tempah);
+  }
+
+  tempah = (LVDSCRT1Ptr+ResInfo)->CR[14];
+  tempah=tempah&0x0E0;
+  SiS_SetReg1(SiS_P3c4,0x0E,tempah);
+
+  tempah = (LVDSCRT1Ptr+ResInfo)->CR[14];
+  tempah=tempah&0x01;
+  tempah=tempah<<5;
+  if(modeflag&DoubleScanMode){
+    	tempah=tempah|0x080;
+  }
+  SiS_SetRegANDOR(SiS_P3d4,0x09,~0x020,tempah);
+  return;
+}
+/*add for LCDA*/
+#endif
 
-	if (SiS_VBInfo & SetPALTV) {
-		SiS_SetCH7005 (0x4304);
-		SiS_SetCH7005 (0x6909);
-	} else {
-		SiS_SetCH7005 (0x0304);
-		SiS_SetCH7005 (0x7109);
-	}
+BOOLEAN
+SiS_GetLCDACRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		   USHORT RefreshRateTableIndex,USHORT *ResInfo,
+		   USHORT *DisplayType)
+ {
+  USHORT tempbx=0,modeflag=0;
+  USHORT CRT2CRTC=0;
 
-	temp = CHTVRegData[resindex].Reg[0];
-	tempbx = ((temp & 0x00FF) << 8) | 0x00;
-	SiS_SetCH7005 (tempbx);
-	temp = CHTVRegData[resindex].Reg[1];
-	tempbx = ((temp & 0x00FF) << 8) | 0x07;
-	SiS_SetCH7005 (tempbx);
-	temp = CHTVRegData[resindex].Reg[2];
-	tempbx = ((temp & 0x00FF) << 8) | 0x08;
-	SiS_SetCH7005 (tempbx);
-	temp = CHTVRegData[resindex].Reg[3];
-	tempbx = ((temp & 0x00FF) << 8) | 0x0A;
-	SiS_SetCH7005 (tempbx);
-	temp = CHTVRegData[resindex].Reg[4];
-	tempbx = ((temp & 0x00FF) << 8) | 0x0B;
-	SiS_SetCH7005 (tempbx);
-
-	SiS_SetCH7005 (0x2801);
-	SiS_SetCH7005 (0x3103);
-	SiS_SetCH7005 (0x003D);
-	SiS_SetCHTVRegANDOR (0x0010, 0x1F);
-	SiS_SetCHTVRegANDOR (0x0211, 0xF8);
-	SiS_SetCHTVRegANDOR (0x001C, 0xEF);
-
-	if (!(SiS_VBInfo & SetPALTV)) {
-		/* tempcl=CRT2CRTC; */
-		tempcl = tempcl & 0x3F;
-		if (SiS_VBInfo & SetCHTVOverScan) {
-			if (tempcl == 0x04) {	/* 640x480   underscan */
-				SiS_SetCHTVRegANDOR (0x0020, 0xEF);
-				SiS_SetCHTVRegANDOR (0x0121, 0xFE);
-			} else {
-				if (tempcl == 0x05) {	/* 800x600  underscan */
-					SiS_SetCHTVRegANDOR (0x0118, 0xF0);
-					SiS_SetCHTVRegANDOR (0x0C19, 0xF0);
-					SiS_SetCHTVRegANDOR (0x001A, 0xF0);
-					SiS_SetCHTVRegANDOR (0x001B, 0xF0);
-					SiS_SetCHTVRegANDOR (0x001C, 0xF0);
-					SiS_SetCHTVRegANDOR (0x001D, 0xF0);
-					SiS_SetCHTVRegANDOR (0x001E, 0xF0);
-					SiS_SetCHTVRegANDOR (0x001F, 0xF0);
-					SiS_SetCHTVRegANDOR (0x0120, 0xEF);
-					SiS_SetCHTVRegANDOR (0x0021, 0xFE);
-				}
-			}
-		} else {
-			if (tempcl == 0x04) {	/* 640x480   overscan  */
-				SiS_SetCHTVRegANDOR (0x0020, 0xEF);
-				SiS_SetCHTVRegANDOR (0x0121, 0xFE);
-			} else {
-				if (tempcl == 0x05) {	/* 800x600   overscan */
-					SiS_SetCHTVRegANDOR (0x0118, 0xF0);
-					SiS_SetCHTVRegANDOR (0x0F19, 0xF0);
-					SiS_SetCHTVRegANDOR (0x011A, 0xF0);
-					SiS_SetCHTVRegANDOR (0x0C1B, 0xF0);
-					SiS_SetCHTVRegANDOR (0x071C, 0xF0);
-					SiS_SetCHTVRegANDOR (0x011D, 0xF0);
-					SiS_SetCHTVRegANDOR (0x0C1E, 0xF0);
-					SiS_SetCHTVRegANDOR (0x071F, 0xF0);
-					SiS_SetCHTVRegANDOR (0x0120, 0xEF);
-					SiS_SetCHTVRegANDOR (0x0021, 0xFE);
-				}
-			}
-		}
-	}
+  if(ModeNo<=0x13) {
+  	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+  	CRT2CRTC = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  } else {
+  	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+  	CRT2CRTC = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+  }
+
+  tempbx = SiS_LCDResInfo - PanelMinLVDS;
+
+  if(SiS_LCDInfo & LCDNonExpanding) tempbx += 6;
+
+  if(modeflag & HalfDCLK) tempbx += 3;
+
+  *ResInfo = CRT2CRTC & 0x3F;
+  *DisplayType = tempbx;
+
+  return 1;
+}
+
+/* TW: Checked against 650/LVDS BIOS: modified for new panel resolutions */
+BOOLEAN
+SiS_GetLVDSCRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		   USHORT RefreshRateTableIndex,USHORT *ResInfo,
+		   USHORT *DisplayType)
+ {
+  USHORT tempbx,modeflag=0;
+  USHORT Flag,CRT2CRTC;
+
+  if(!(SiS_VBInfo & SetCRT2ToLCDA)) {                    /* TW: Inserted from 650/LVDS BIOS */
+      if(!(SiS_VBInfo & SetInSlaveMode)) return 0;
+  }							 /* TW: Inserted from 650/LVDS BIOS */
+
+  if(ModeNo <= 0x13) {
+    	modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
+    	CRT2CRTC = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  } else {
+    	modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
+    	CRT2CRTC = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+  }
+
+  Flag = 1;
+  tempbx = 0;
+  if(SiS_IF_DEF_CH70xx != 0) {
+    if(!(SiS_VBInfo & SetCRT2ToLCD)) {
+      Flag = 0;
+      tempbx = 18;
+      if(SiS_VBInfo & SetPALTV) tempbx += 2;
+      if(SiS_VBInfo & SetCHTVOverScan) tempbx++;
+    }
+  }
+  if(Flag) {
+    tempbx = SiS_LCDResInfo;
+    tempbx -= PanelMinLVDS;
+    if(SiS_LCDResInfo <= Panel1280x1024) {
+       if(SiS_LCDInfo & LCDNonExpanding) tempbx += 6;
+       if(modeflag & HalfDCLK) tempbx += 3;
+    } else {
+       if(SiS_LCDResInfo == Panel1400x1050) {
+           tempbx = 14;
+	   if(SiS_LCDInfo & LCDNonExpanding) tempbx += 2;
+	   if(modeflag & HalfDCLK) tempbx++;
+       } else if(SiS_LCDInfo & 0x0100) {
+           tempbx = 12;
+	   if(modeflag & HalfDCLK) tempbx++;
+       } else if(SiS_LCDResInfo == Panel1024x600) {
+           tempbx = 23;
+	   if(SiS_LCDInfo & LCDNonExpanding) tempbx += 2;
+	   if(modeflag & HalfDCLK) tempbx++;
+       } else if(SiS_LCDResInfo == Panel1152x768) {
+           tempbx = 27;
+	   if(SiS_LCDInfo & LCDNonExpanding) tempbx += 2;
+	   if(modeflag & HalfDCLK) tempbx++;
+       }
+    }
+  }
+  if(SiS_IF_DEF_FSTN){
+     if(SiS_LCDResInfo==Panel320x480){
+       tempbx=22;
+     }
+  }
+  *ResInfo = CRT2CRTC & 0x3F;
+  *DisplayType = tempbx;
+  return 1;
 }
 
+/* TW: Checked against 650/LVDS (1.10a, 1.10.07), 630/301B (I/II) and 630/LVDS BIOS */
 void
-SiS_SetCHTVRegANDOR (USHORT tempax, USHORT tempbh)
+SiS_SetCRT2ECLK(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,
+           USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-	USHORT tempal, tempah, tempbl;
+  USHORT tempah,tempal,pushax;
+  USHORT vclkindex=0;
 
-	tempal = tempax & 0x00FF;
-	tempah = (tempax >> 8) & 0x00FF;
-	tempbl = SiS_GetCH7005 (tempal);
-	tempbl = (((tempbl & tempbh) | tempah) << 8 | tempal);
-	SiS_SetCH7005 (tempbl);
+  if(HwDeviceExtension->jChipType < SIS_315H) {
+     if(SiS_VBType & VB_SIS301BLV302BLV) {
+        if(!(SiS_VBInfo & SetCRT2ToLCD)) return;
+     }
+  }
+
+  if((SiS_LCDResInfo == Panel640x480) || (SiS_IF_DEF_TRUMPION == 1)) {
+	SiS_SetFlag &= (~ProgrammingCRT2);
+        tempal = SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
+    	tempal &= 0x3F;
+	if(tempal == 2) RefreshRateTableIndex--;
+	vclkindex = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
+                               RefreshRateTableIndex,HwDeviceExtension);
+	SiS_SetFlag |= ProgrammingCRT2;
+  } else {
+        vclkindex = SiS_GetVCLK2Ptr(ROMAddr,ModeNo,ModeIdIndex,
+                               RefreshRateTableIndex,HwDeviceExtension);
+  }
+
+  tempal = 0x02B;
+  if(!(SiS_VBInfo & SetCRT2ToLCDA)) {
+     if(!(SiS_VBInfo & SetInSlaveMode)) {
+    	tempal += 3;
+     }
+  }
+  SiS_SetReg1(SiS_P3c4,0x05,0x86);
+  pushax = tempal;
+  SiS_SetReg1(SiS_P3c4,0x31,0x20);
+  tempah = SiS_VCLKData[vclkindex].SR2B;
+  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  tempal++;
+  tempah = SiS_VCLKData[vclkindex].SR2C;
+  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  SiS_SetReg1(SiS_P3c4,0x31,0x10);
+  tempal = pushax;
+  tempah = SiS_VCLKData[vclkindex].SR2B;
+  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  tempal++;
+  tempah = SiS_VCLKData[vclkindex].SR2C;
+  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  SiS_SetReg1(SiS_P3c4,0x31,0x00);
+  tempal = pushax;
+  tempah = SiS_VCLKData[vclkindex].SR2B;
+  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  tempal++;
+  tempah = SiS_VCLKData[vclkindex].SR2C;
+  SiS_SetReg1(SiS_P3c4,tempal,tempah);
+  return;
 }
 
+#if 0  /* TW: Not used */
 void
-SiS_SetCH7005 (USHORT tempbx)
+SiS_SetDefCRT2ExtRegs(USHORT BaseAddr)
 {
-	USHORT tempah, temp;
-
-	SiS_DDC_Port = 0x3c4;
-	SiS_DDC_Index = 0x11;
-	SiS_DDC_DataShift = 0x00;
-	SiS_DDC_DeviceAddr = 0xEA;
-
-	temp = 1;
-	for (; temp != 0;) {
-		SiS_SetSwitchDDC2 ();
-		SiS_SetStart ();
-		tempah = SiS_DDC_DeviceAddr;
-		temp = SiS_WriteDDC2Data (tempah);
-		if (temp)
-			continue;
-		tempah = tempbx & 0x00FF;
-		temp = SiS_WriteDDC2Data (tempah);
-		if (temp)
-			continue;
-		tempah = (tempbx & 0xFF00) >> 8;
-		temp = SiS_WriteDDC2Data (tempah);
-		if (temp)
-			continue;
-		SiS_SetStop ();
-	}
+  USHORT  temp;
+
+  if(SiS_IF_DEF_LVDS==0) {
+    SiS_SetReg1(SiS_Part1Port,0x02,0x40);
+    SiS_SetReg1(SiS_Part4Port,0x10,0x80);
+    temp=(UCHAR)SiS_GetReg1(SiS_P3c4,0x16);
+    temp &= 0xC3;
+    SiS_SetReg1(SiS_P3d4,0x35,temp);
+  } else {
+    SiS_SetReg1(SiS_P3d4,0x32,0x02);
+    SiS_SetReg1(SiS_Part1Port,0x02,0x00);
+  }
 }
+#endif
 
-USHORT
-SiS_GetCH7005 (USHORT tempbx)
-{
-	USHORT tempah, temp;
-
-	SiS_DDC_Port = 0x3c4;
-	SiS_DDC_Index = 0x11;
-	SiS_DDC_DataShift = 0x00;
-	SiS_DDC_DeviceAddr = 0xEA;
-	SiS_DDC_ReadAddr = tempbx;
-
-	for (;;) {
-		SiS_SetSwitchDDC2 ();
-		SiS_SetStart ();
-		tempah = SiS_DDC_DeviceAddr;
-		temp = SiS_WriteDDC2Data (tempah);
-		if (temp)
-			continue;
-		tempah = SiS_DDC_ReadAddr;
-		temp = SiS_WriteDDC2Data (tempah);
-		if (temp)
-			continue;
-
-		SiS_SetStart ();
-		tempah = SiS_DDC_DeviceAddr;
-		tempah = tempah | 0x01;
-		temp = SiS_WriteDDC2Data (tempah);
-		if (temp)
-			continue;
-		tempah = SiS_ReadDDC2Data (tempah);
-		SiS_SetStop ();
-		return (tempah);
-	}
-}
+/* TW: Start of Chrontel 70xx functions ---------------------- */
 
+/* Set-up the Chrontel Registers */
 void
-SiS_SetSwitchDDC2 (void)
+SiS_SetCHTVReg(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+               USHORT RefreshRateTableIndex)
 {
-	USHORT i;
+  USHORT temp,tempbx,tempcl;
+  USHORT TVType,resindex;
+  SiS_CHTVRegDataStruct *CHTVRegData=NULL;
+
+  if(ModeNo<=0x13)
+    	tempcl = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
+  else
+    	tempcl = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
+
+  TVType = 0;
+  if(SiS_VBInfo & SetPALTV) TVType += 2;
+  if(SiS_VBInfo & SetCHTVOverScan) TVType += 1;
+  switch(TVType) {
+    	case 0: CHTVRegData = SiS_CHTVReg_UNTSC; break;
+    	case 1: CHTVRegData = SiS_CHTVReg_ONTSC; break;
+    	case 2: CHTVRegData = SiS_CHTVReg_UPAL;  break;
+    	case 3: CHTVRegData = SiS_CHTVReg_OPAL;  break;
+  }
+  resindex = tempcl & 0x3F;
+
+  if(SiS_IF_DEF_CH70xx == 1) {
+
+     /* Chrontel 7005 */
+
+     /* TW: We don't support modes >800x600 */
+     if (resindex > 5) return;
+
+     if(SiS_VBInfo & SetPALTV) {
+    	SiS_SetCH700x(0x4304);  /* TW: 0x40=76uA (PAL); 0x03=15bit non-multi RGB*/
+    	SiS_SetCH700x(0x6909);	/* TW: Black level for PAL (105)*/
+     } else {
+    	SiS_SetCH700x(0x0304);  /* TW: upper nibble=71uA (NTSC), 0x03=15bit non-multi RGB*/
+    	SiS_SetCH700x(0x7109);	/* TW: Black level for NTSC (113)*/
+     }
 
-	SiS_SetSCLKHigh ();
-	for (i = 0; i < 1000; i++) {
-		SiS_GetReg1 (SiS_DDC_Port, 0x05);
-	}
-	SiS_SetSCLKLow ();
-	for (i = 0; i < 1000; i++) {
-		SiS_GetReg1 (SiS_DDC_Port, 0x05);
-	}
+     temp = CHTVRegData[resindex].Reg[0];
+     tempbx=((temp&0x00FF)<<8)|0x00;	/* TW: Mode register */
+     SiS_SetCH700x(tempbx);
+     temp = CHTVRegData[resindex].Reg[1];
+     tempbx=((temp&0x00FF)<<8)|0x07;	/* TW: Start active video register */
+     SiS_SetCH700x(tempbx);
+     temp = CHTVRegData[resindex].Reg[2];
+     tempbx=((temp&0x00FF)<<8)|0x08;	/* TW: Position overflow register */
+     SiS_SetCH700x(tempbx);
+     temp = CHTVRegData[resindex].Reg[3];
+     tempbx=((temp&0x00FF)<<8)|0x0A;	/* TW: Horiz Position register */
+     SiS_SetCH700x(tempbx);
+     temp = CHTVRegData[resindex].Reg[4];
+     tempbx=((temp&0x00FF)<<8)|0x0B;	/* TW: Vertical Position register */
+     SiS_SetCH700x(tempbx);
+
+     /* TW: Set minimum flicker filter for Luma channel (SR1-0=00),
+                minimum text enhancement (S3-2=10),
+   	        maximum flicker filter for Chroma channel (S5-4=10)
+	        =00101000=0x28 (When reading, S1-0->S3-2, and S3-2->S1-0!)
+      */
+     SiS_SetCH700x(0x2801);
+
+     /* TW: Set video bandwidth
+            High bandwith Luma composite video filter(S0=1)
+            low bandwith Luma S-video filter (S2-1=00)
+	    disable peak filter in S-video channel (S3=0)
+	    high bandwidth Chroma Filter (S5-4=11)
+	    =00110001=0x31
+     */
+     SiS_SetCH700x(0xb103);       /* old: 3103 */
+
+     /* TW: Register 0x3D does not exist in non-macrovision register map
+            (Maybe this is a macrovision register?)
+      */
+     /* SiS_SetCH70xx(0x003D); */
+
+     /* TW: Register 0x10 only contains 1 writable bit (S0) for sensing,
+            all other bits a read-only. Macrovision?
+      */
+     SiS_SetCH70xxANDOR(0x0010,0x1F);
+
+     /* TW: Register 0x11 only contains 3 writable bits (S0-S2) for
+            contrast enhancement (set to 010 -> gain 2 Yout = 9/8*(Yin-57) )
+      */
+     SiS_SetCH70xxANDOR(0x0211,0xF8);
+
+     /* TW: Clear DSEN
+      */
+     SiS_SetCH70xxANDOR(0x001C,0xEF);
+
+     if(!(SiS_VBInfo&SetPALTV)) {		/* ---- NTSC ---- */
+       tempcl=tempcl&0x3F;
+       if(SiS_VBInfo&SetCHTVOverScan) {
+         if(tempcl==0x04) {   			/* 640x480 overscan: Mode 16 */
+      	   SiS_SetCH70xxANDOR(0x0020,0xEF);   	/* loop filter off */
+           SiS_SetCH70xxANDOR(0x0121,0xFE);       /* ACIV on, no need to set FSCI */
+         } else {
+           if(tempcl==0x05) {    			/* 800x600 overscan: Mode 23 */
+             SiS_SetCH70xxANDOR(0x0118,0xF0);	/* 0x18-0x1f: FSCI 469,762,048 */
+             SiS_SetCH70xxANDOR(0x0C19,0xF0);
+             SiS_SetCH70xxANDOR(0x001A,0xF0);
+             SiS_SetCH70xxANDOR(0x001B,0xF0);
+             SiS_SetCH70xxANDOR(0x001C,0xF0);
+             SiS_SetCH70xxANDOR(0x001D,0xF0);
+             SiS_SetCH70xxANDOR(0x001E,0xF0);
+             SiS_SetCH70xxANDOR(0x001F,0xF0);
+             SiS_SetCH70xxANDOR(0x1020,0xEF);     /* Loop filter on for mode 23 */
+             SiS_SetCH70xxANDOR(0x0021,0xFE);     /* ACIV off, need to set FSCI */
+           }
+         }
+       } else {
+         if(tempcl==0x04) {     			/* ----- 640x480 underscan; Mode 17 */
+           SiS_SetCH70xxANDOR(0x0020,0xEF); 	/* loop filter off */
+           SiS_SetCH70xxANDOR(0x0121,0xFE);
+         } else {
+           if(tempcl==0x05) {   			/* ----- 800x600 underscan: Mode 24 */
+             SiS_SetCH70xxANDOR(0x0118,0xF0);   /* (FSCI was 0x1f1c71c7 - this is for mode 22) */
+             SiS_SetCH70xxANDOR(0x0919,0xF0);	/* FSCI for mode 24 is 428,554,851 */
+             SiS_SetCH70xxANDOR(0x081A,0xF0);
+             SiS_SetCH70xxANDOR(0x0b1B,0xF0);
+             SiS_SetCH70xxANDOR(0x031C,0xF0);
+             SiS_SetCH70xxANDOR(0x0a1D,0xF0);
+             SiS_SetCH70xxANDOR(0x061E,0xF0);
+             SiS_SetCH70xxANDOR(0x031F,0xF0);
+             SiS_SetCH70xxANDOR(0x0020,0xEF);   /* loop filter off for mode 24 */
+             SiS_SetCH70xxANDOR(0x0021,0xFE);	/* ACIV off, need to set FSCI */
+           }
+         }
+       }
+     } else {				/* ---- PAL ---- */
+           /* TW: We don't play around with FSCI in PAL mode */
+         if (tempcl==0x04) {
+           SiS_SetCH70xxANDOR(0x0020,0xEF); 	/* loop filter off */
+           SiS_SetCH70xxANDOR(0x0121,0xFE);     /* ACIV on */
+         } else {
+           SiS_SetCH70xxANDOR(0x0020,0xEF); 	/* loop filter off */
+           SiS_SetCH70xxANDOR(0x0121,0xFE);     /* ACIV on */
+         }
+     }
+
+  } else {
+
+     /* Chrontel 7019 */
+
+     /* TW: We don't support modes >1024x768 */
+     if (resindex > 6) return;
+
+     temp = CHTVRegData[resindex].Reg[0];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x00;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[1];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x01;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[2];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x02;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[3];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x04;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[4];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x03;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[5];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x05;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[6];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x06;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[7];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x07;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[8];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x08;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[9];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x15;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[10];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x1f;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[11];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x0c;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[12];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x0d;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[13];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x0e;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[14];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x0f;
+     SiS_SetCH701x(tempbx);
+
+     temp = CHTVRegData[resindex].Reg[15];
+     tempbx=((temp & 0x00FF) <<8 ) | 0x10;
+     SiS_SetCH701x(tempbx);
+
+#if 0  /* TW: Not done in BIOS 1.10.07 */
+     SiS_SetCH701x(0x3848);
+     SiS_DDC2Delay(SiS_I2CDELAYSHORT * 2);
+     SiS_SetCH701x(0x1848);
+#endif
+  }
 }
 
 void
-SiS_SetStart (void)
+SiS_SetCHTVForLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
-
-	SiS_SetSCLKLow ();
-	SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFD, 0x02);	/*  SetSDA(0x01); */
-	SiS_SetSCLKHigh ();
-	SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFD, 0x00);	/* SetSDA(0x00); */
-	SiS_SetSCLKHigh ();
+  UCHAR regtable[]  = { 0x1c, 0x5f, 0x64, 0x6f, 0x70, 0x71,
+                        0x72, 0x73, 0x74, 0x76, 0x78, 0x7d };
+  UCHAR table28b4[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
+                        0xa3, 0xc8, 0xc7, 0xac, 0x60, 0x02 };
+  UCHAR table28c0[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xef,
+                        0xad, 0xdb, 0xf6, 0xac, 0x60, 0x02 };
+  UCHAR *tableptr = NULL;
+  USHORT tempbh;
+  int i;
+
+  if(SiS_LCDResInfo == Panel1400x1050) {
+      tableptr = table28c0;
+  } else {
+      tableptr = table28b4;
+  }
+  tempbh = SiS_GetCH701x(0x74);
+  if((tempbh == 0xf6) || (tempbh == 0xc7)) {
+     tempbh = SiS_GetCH701x(0x73);
+     if(tempbh == 0xc8) {
+        if(SiS_LCDResInfo != Panel1400x1050) return;
+     } else if(tempbh == 0xdb) {
+        if(SiS_LCDResInfo == Panel1400x1050) return;
+     }
+  }
+  for(i=0; i<0x0c; i++) {
+     SiS_SetCH701x((tableptr[i] << 8) | regtable[i]);
+  }
+  SiS_Chrontel19f2();
+  tempbh = SiS_GetCH701x(0x1e);			/* TW: NEW in BIOS 1.10.07 */
+  tempbh |= 0xc0;				/* TW: NEW in BIOS 1.10.07 */
+  SiS_SetCH701x((tempbh << 8) | 0x1e);		/* TW: NEW in BIOS 1.10.07 */
 }
 
+/* TW: Chrontel 701x functions ================================= */
+
 void
-SiS_SetStop (void)
+SiS_Chrontel19f2(void)
 {
-	SiS_SetSCLKLow ();
-	SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFD, 0x00);	/*  SetSDA(0x00); */
-	SiS_SetSCLKHigh ();
-	SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFD, 0x02);	/* SetSDA(0x01); */
-	SiS_SetSCLKHigh ();
+  UCHAR regtable[]  = { 0x67, 0x68, 0x69, 0x6a, 0x6b };
+  UCHAR table19e8[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
+  UCHAR table19ed[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
+  UCHAR *tableptr = NULL;
+  int i;
+
+  if(SiS_LCDResInfo == Panel1400x1050) {
+      tableptr = table19ed;
+  } else {
+      tableptr = table19e8;
+  }
+
+  for(i=0; i<5; i++) {
+     SiS_SetCH701x((tableptr[i] << 8) | regtable[i]);
+  }
 }
 
-USHORT
-SiS_WriteDDC2Data (USHORT tempax)
+void
+SiS_Chrontel701xOn()
 {
-	USHORT i, flag, temp;
-
-	flag = 0x80;
-	for (i = 0; i < 8; i++) {
-		SiS_SetSCLKLow ();
-		if (tempax & flag) {
-			SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFD,
-					 0x02);
-		} else {
-			SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFD,
-					 0x00);
-		}
-		SiS_SetSCLKHigh ();
-		flag = flag >> 1;
-	}
-	temp = SiS_CheckACK ();
-	return (temp);
+  USHORT temp;
+
+  if(SiS_IF_DEF_CH70xx == 2) {
+        temp = SiS_GetCH701x(0x66);
+        temp |= 0x20;
+	SiS_SetCH701x((temp << 8) | 0x66);
+  }
 }
 
-USHORT
-SiS_ReadDDC2Data (USHORT tempax)
+void
+SiS_Chrontel701xOn2(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr)
 {
-	USHORT i, temp, getdata;
-
-	getdata = 0;
-	for (i = 0; i < 8; i++) {
-		getdata = getdata << 1;
-		SiS_SetSCLKLow ();
-		SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFD, 0x02);
-		SiS_SetSCLKHigh ();
-		temp = SiS_GetReg1 (SiS_DDC_Port, SiS_DDC_Index);
-		if (temp & 0x02)
-			getdata = getdata | 0x01;
-	}
-	return (getdata);
+  USHORT temp;
+
+  if(SiS_IF_DEF_CH70xx == 2) {
+     if(SiS_IsYPbPr(HwDeviceExtension, BaseAddr)) {
+        temp = SiS_GetCH701x(0x01);
+	temp &= 0x3f;
+	temp |= 0x80;
+	SiS_SetCH701x((temp << 8) | 0x01);
+     }
+     SiS_SetCH701x(0x2049);
+     temp = SiS_GetCH701x(0x49);
+     if(SiS_IsYPbPr(HwDeviceExtension, BaseAddr)) {
+        temp = SiS_GetCH701x(0x73);
+	temp |= 0x60;
+	SiS_SetCH701x((temp << 8) | 0x73);
+     }
+     /* TW: New from BIOS 1.10.07: */
+     temp = SiS_GetCH701x(0x47);
+     temp &= 0x7f;
+     SiS_SetCH701x((temp << 8) | 0x47);
+     SiS_LongDelay(2);
+     temp = SiS_GetCH701x(0x47);
+     temp |= 0x80;
+     SiS_SetCH701x((temp << 8) | 0x47);
+  }
 }
 
 void
-SiS_SetSCLKLow (void)
+SiS_Chrontel701xOff()
 {
-	USHORT temp;
+  USHORT temp;
 
-	SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFE, 0x00);	/* SetSCLKLow()  */
-	do {
-		temp = SiS_GetReg1 (SiS_DDC_Port, SiS_DDC_Index);
-	} while (temp & 0x01);
-	SiS_DDC2Delay ();
+  if(SiS_IF_DEF_CH70xx == 2) {
+        temp = SiS_GetCH701x(0x66);
+        temp &= 0xDF;
+	SiS_SetCH701x((temp << 8) | 0x66);
+  }
 }
 
 void
-SiS_SetSCLKHigh (void)
+SiS_Chrontel701xOff2()
 {
-	USHORT temp;
+  USHORT temp;
+
+  if(SiS_IF_DEF_CH70xx == 2) {
+        SiS_LongDelay(2);
+	temp = SiS_GetCH701x(0x76);
+	temp &= 0xfc;
+	SiS_SetCH701x((temp << 8) | 0x76);
+	SiS_SetCH701x(0x0066);
+  }
+}
 
-	SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFE, 0x01);	/* SetSCLKHigh()  */
-	do {
-		temp = SiS_GetReg1 (SiS_DDC_Port, SiS_DDC_Index);
-	} while (!(temp & 0x01));
-	SiS_DDC2Delay ();
+void
+SiS_ChrontelFlip0x48()
+{
+     SiS_SetCH701x(0x1048);
+     SiS_LongDelay(1);
+     SiS_SetCH701x(0x1848);
 }
 
 void
-SiS_DDC2Delay (void)
+SiS_ChrontelDoSomething4(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
-	USHORT i;
+     USHORT temp;
+
+     SiS_SetCH701x(0xaf76);
+     temp = SiS_GetCH701x(0x49);
+     temp &= 1;
+     if(temp != 1) {
+	temp = SiS_GetCH701x(0x47);
+	temp &= 0x70;
+	SiS_SetCH701x((temp << 8) | 0x47);
+	SiS_LongDelay(3);
+	temp = SiS_GetCH701x(0x47);
+	temp |= 0x80;
+	SiS_SetCH701x((temp << 8) | 0x47);
+     }
+}
 
-	for (i = 0; i < DDC2DelayTime; i++) {
-		SiS_GetReg1 (SiS_P3c4, 0x05);
-	}
+void
+SiS_ChrontelDoSomething3(USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                         USHORT BaseAddr)
+{
+     USHORT temp,temp1;
+
+     temp1 = 0;
+     temp = SiS_GetCH701x(0x61);
+     if(temp < 2) {
+          temp++;
+	  SiS_SetCH701x((temp << 8) | 0x61);
+	  temp1 = 1;
+     }
+     SiS_SetCH701x(0xac76);
+     temp = SiS_GetCH701x(0x66);
+     temp |= 0x5f;
+     SiS_SetCH701x((temp << 8) | 0x66);
+     if(ModeNo > 0x13) {
+         if(SiS_WeHaveBacklightCtrl(HwDeviceExtension, BaseAddr)) {
+	    SiS_GenericDelay(0x3ff);
+	 } else {
+	    SiS_GenericDelay(0x2ff);
+	 }
+     } else {
+         if(!temp1)
+	    SiS_GenericDelay(0x2ff);
+     }
+     temp = SiS_GetCH701x(0x76);
+     temp |= 0x03;
+     SiS_SetCH701x((temp << 8) | 0x76);
+     temp = SiS_GetCH701x(0x66);
+     temp &= 0x7f;
+     SiS_SetCH701x((temp << 8) | 0x66);
+     SiS_LongDelay(1);
 }
 
-USHORT
-SiS_CheckACK (void)
+void
+SiS_ChrontelDoSomething2(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr)
 {
-	USHORT tempah;
-
-	SiS_SetSCLKLow ();
-	SiS_SetRegANDOR (SiS_DDC_Port, SiS_DDC_Index, 0xFD, 0x02);
-	SiS_SetSCLKHigh ();
-	tempah = SiS_GetReg1 (SiS_DDC_Port, SiS_DDC_Index);
-	SiS_SetSCLKLow ();
-	if (tempah & 0x02)
-		return (1);
-	else
-		return (0);
+     USHORT temp,tempcl,tempch;
+
+     SiS_LongDelay(1);
+     tempcl = 3;
+     tempch = 0;
+
+     do {
+       temp = SiS_GetCH701x(0x66);
+       temp &= 0x04;
+       if(temp == 0x04) break;
+
+       SiS_SetCHTVForLCD(HwDeviceExtension, BaseAddr);
+
+       if(tempcl == 0) {
+           if(tempch == 3) break;
+	   SiS_ChrontelFlip0x48();
+	   tempcl = 3;
+	   tempch++;
+       }
+       tempcl--;
+       temp = SiS_GetCH701x(0x76);
+       temp &= 0xfb;
+       SiS_SetCH701x((temp << 8) | 0x76);
+       SiS_LongDelay(2);
+       temp = SiS_GetCH701x(0x76);
+       temp |= 0x04;
+       SiS_SetCH701x((temp << 8) | 0x76);
+       SiS_SetCH701x(0x6078);
+       SiS_LongDelay(2);
+    } while(0);
+
+    SiS_SetCH701x(0x0077);
 }
 
 void
-SiS_ModCRT1CRTC (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		 USHORT RefreshRateTableIndex)
+SiS_ChrontelDoSomething1(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                         USHORT BaseAddr)
 {
-	USHORT temp, tempah, i, modeflag, j;
-	USHORT ResInfo, DisplayType;
-	SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr = NULL;
+     USHORT temp;
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-	}
+     temp = SiS_GetCH701x(0x03);
+     temp |= 0x80;
+     temp &= 0xbf;
+     SiS_SetCH701x((temp << 8) | 0x03);
 
-	temp =
-	    SiS_GetLVDSCRT1Ptr (ROMAddr, ModeNo, ModeIdIndex,
-				RefreshRateTableIndex, &ResInfo, &DisplayType);
-	if (temp == 0) {
-		return;
-	}
+     SiS_ChrontelFlip0x48();
 
-	switch (DisplayType) {
-	case 0:
-		LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;
-		break;
-	case 1:
-		LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;
-		break;
-	case 2:
-		LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;
-		break;
-	case 3:
-		LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;
-		break;
-	case 4:
-		LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;
-		break;
-	case 5:
-		LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;
-		break;
-	case 6:
-		LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;
-		break;
-	case 7:
-		LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;
-		break;
-	case 8:
-		LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;
-		break;
-	case 9:
-		LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;
-		break;
-	case 10:
-		LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;
-		break;
-	case 11:
-		LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;
-		break;
-	case 12:
-		LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;
-		break;
-	case 13:
-		LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;
-		break;
-	case 14:
-		LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;
-		break;
-	case 15:
-		LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;
-		break;
-	}
+     SiS_ChrontelDoSomething2(HwDeviceExtension, BaseAddr);
+     
+     temp = SiS_GetReg1(SiS_P3d4,0x34);
+     SiS_ChrontelDoSomething3(temp, HwDeviceExtension, BaseAddr);
 
-	tempah = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x11);	/*unlock cr0-7  */
-	tempah = tempah & 0x7F;
-	SiS_SetReg1 (SiS_P3d4, 0x11, tempah);
-	tempah = (LVDSCRT1Ptr + ResInfo)->CR[0];
-	SiS_SetReg1 (SiS_P3d4, 0x0, tempah);
-	for (i = 0x02, j = 1; i <= 0x05; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3d4, i, tempah);
-	}
-	for (i = 0x06, j = 5; i <= 0x07; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3d4, i, tempah);
-	}
-	for (i = 0x10, j = 7; i <= 0x11; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3d4, i, tempah);
-	}
-	for (i = 0x15, j = 9; i <= 0x16; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3d4, i, tempah);
-	}
+     SiS_SetCH701x(0xaf76);
+}
 
-	for (i = 0x0A, j = 11; i <= 0x0C; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3c4, i, tempah);
-	}
+/* TW: End of Chrontel 701x functions ==================================== */
 
-	tempah = (LVDSCRT1Ptr + ResInfo)->CR[14];
-	tempah = tempah & 0x0E0;
-	SiS_SetReg1 (SiS_P3c4, 0x0E, tempah);
+/* TW: Generic Read/write routines for Chrontel ========================== */
 
-	tempah = (LVDSCRT1Ptr + ResInfo)->CR[14];
-	tempah = tempah & 0x01;
-	tempah = tempah << 5;
-	if (modeflag & DoubleScanMode) {
-		tempah = tempah | 0x080;
-	}
-	SiS_SetRegANDOR (SiS_P3d4, 0x09, ~0x020, tempah);
-	return;
+/* The Chrontel seems to be connected to the 630/730 via
+ * the 630/730's DDC port (which is used as a I2C port here).
+ *
+ * On 630(S)T chipset, the port changed from 0x11 to 0x0a
+ */
+
+void
+SiS_SetCH70xx(USHORT tempbx)
+{
+   if (SiS_IF_DEF_CH70xx == 1)
+      SiS_SetCH700x(tempbx);
+   else
+      SiS_SetCH701x(tempbx);
 }
 
-/*301b*/
+/* TW: Write to Chrontel 700x */
+/* Parameter is [Data (S15-S8) | Register no (S7-S0)] */
 void
-SiS_CHACRT1CRTC (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		 USHORT RefreshRateTableIndex)
+SiS_SetCH700x(USHORT tempbx)
 {
-	USHORT temp, tempah, i, modeflag, j;
-	USHORT ResInfo, DisplayType;
-	SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr = NULL;
+  USHORT tempah,temp,i;
+
+  if(!(SiS_ChrontelInit)) {
+     SiS_DDC_Index = 0x11;		   /* TW: Bit 0 = SC;  Bit 1 = SD */
+     SiS_DDC_Data  = 0x02;                 /* Bitmask in IndexReg for Data */
+     SiS_DDC_Clk   = 0x01;                 /* Bitmask in IndexReg for Clk */
+     SiS_DDC_DataShift = 0x00;
+     SiS_DDC_DeviceAddr = 0xEA;  	   /* TW: DAB (Device Address Byte) */
+  }
+
+  for(i=0;i<10;i++) {	/* TW: Do only 10 attempts to write */
+    SiS_SetSwitchDDC2();
+    if (SiS_SetStart()) continue;	/* TW: Set start condition */
+    tempah=SiS_DDC_DeviceAddr;
+    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
+    if(temp) continue;			/* TW:    (ERROR: no ack) */
+    tempah=tempbx&0x00FF;
+    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write RAB */
+    if(temp) continue;			/* TW:    (ERROR: no ack) */
+    tempah=(tempbx&0xFF00)>>8;
+    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write data */
+    if(temp) continue;			/* TW:    (ERROR: no ack) */
+    if (SiS_SetStop()) continue;	/* TW: Set stop condition */
+    SiS_ChrontelInit = 1;
+    return;
+  }
+
+  if(!(SiS_ChrontelInit)) {
+     SiS_DDC_Index = 0x0a;			/* TW: Bit 0 = SC;  Bit 1 = SD */
+     SiS_DDC_Data  = 0x80;                 /* Bitmask in IndexReg for Data */
+     SiS_DDC_Clk   = 0x40;                 /* Bitmask in IndexReg for Clk */
+     SiS_DDC_DataShift = 0x00;
+     SiS_DDC_DeviceAddr = 0xEA;  		/* TW: DAB (Device Address Byte) */
+
+     for(i=0;i<10;i++) {	/* TW: Do only 10 attempts to write */
+       SiS_SetSwitchDDC2();
+       if (SiS_SetStart()) continue;		/* TW: Set start condition */
+       tempah=SiS_DDC_DeviceAddr;
+       temp=SiS_WriteDDC2Data(tempah);		/* TW: Write DAB (S0=0=write) */
+       if(temp) continue;			/* TW:    (ERROR: no ack) */
+       tempah=tempbx&0x00FF;
+       temp=SiS_WriteDDC2Data(tempah);		/* TW: Write RAB */
+       if(temp) continue;			/* TW:    (ERROR: no ack) */
+       tempah=(tempbx&0xFF00)>>8;
+       temp=SiS_WriteDDC2Data(tempah);		/* TW: Write data */
+       if(temp) continue;			/* TW:    (ERROR: no ack) */
+       if (SiS_SetStop()) continue;		/* TW: Set stop condition */
+       SiS_ChrontelInit = 1;
+       return;
+    }
+  }
+}
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-	}
+/* TW: Write to Chrontel 701x */
+/* Parameter is [Data (S15-S8) | Register no (S7-S0)] */
+void
+SiS_SetCH701x(USHORT tempbx)
+{
+  USHORT tempah,temp,i;
+
+  /* TW: Toggle to DDC port */
+  SiS_SetRegOR(SiS_P3c4,0x38,0x20);
+
+  SiS_DDC_Index = 0x11;			/* TW: Bit 0 = SC;  Bit 1 = SD */
+  SiS_DDC_Data  = 0x08;                 /* Bitmask in IndexReg for Data */
+  SiS_DDC_Clk   = 0x04;                 /* Bitmask in IndexReg for Clk */
+  SiS_DDC_DataShift = 0x00;
+  SiS_DDC_DeviceAddr = 0xEA;  		/* TW: DAB (Device Address Byte) */
+
+  for(i=0;i<10;i++) {	/* TW: Do only 10 attempts to write */
+    if (SiS_SetStart()) continue;	/* TW: Set start condition */
+    tempah=SiS_DDC_DeviceAddr;
+    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
+    if(temp) continue;			/* TW:    (ERROR: no ack) */
+    tempah=tempbx&0x00FF;
+    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write RAB */
+    if(temp) continue;			/* TW:    (ERROR: no ack) */
+    tempah=(tempbx&0xFF00)>>8;
+    temp=SiS_WriteDDC2Data(tempah);	/* TW: Write data */
+    if(temp) continue;			/* TW:    (ERROR: no ack) */
+    if (SiS_SetStop()) continue;	/* TW: Set stop condition */
+    return;
+  }
+}
 
-	temp =
-	    SiS_GetLVDSCRT1Ptr (ROMAddr, ModeNo, ModeIdIndex,
-				RefreshRateTableIndex, &ResInfo, &DisplayType);
-	if (temp == 0) {
-		return;
-	}
+/* TW: Read from Chrontel 70xx */
+/* Parameter is [Register no (S7-S0)] */
+USHORT
+SiS_GetCH70xx(USHORT tempbx)
+{
+   if (SiS_IF_DEF_CH70xx == 1)
+      return(SiS_GetCH700x(tempbx));
+   else
+      return(SiS_GetCH701x(tempbx));
+}
 
-	switch (DisplayType) {
-	case 0:
-		LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1;
-		break;
-	case 1:
-		LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1;
-		break;
-	case 2:
-		LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1;
-		break;
-	case 3:
-		LVDSCRT1Ptr = SiS_LVDSCRT1800x600_1_H;
-		break;
-	case 4:
-		LVDSCRT1Ptr = SiS_LVDSCRT11024x768_1_H;
-		break;
-	case 5:
-		LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_1_H;
-		break;
-	case 6:
-		LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2;
-		break;
-	case 7:
-		LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2;
-		break;
-	case 8:
-		LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2;
-		break;
-	case 9:
-		LVDSCRT1Ptr = SiS_LVDSCRT1800x600_2_H;
-		break;
-	case 10:
-		LVDSCRT1Ptr = SiS_LVDSCRT11024x768_2_H;
-		break;
-	case 11:
-		LVDSCRT1Ptr = SiS_LVDSCRT11280x1024_2_H;
-		break;
-	case 12:
-		LVDSCRT1Ptr = SiS_CHTVCRT1UNTSC;
-		break;
-	case 13:
-		LVDSCRT1Ptr = SiS_CHTVCRT1ONTSC;
-		break;
-	case 14:
-		LVDSCRT1Ptr = SiS_CHTVCRT1UPAL;
-		break;
-	case 15:
-		LVDSCRT1Ptr = SiS_CHTVCRT1OPAL;
-		break;
-	}
+/* TW: Read from Chrontel 700x */
+/* Parameter is [Register no (S7-S0)] */
+USHORT
+SiS_GetCH700x(USHORT tempbx)
+{
+  USHORT tempah,temp,i;
+
+  if(!(SiS_ChrontelInit)) {
+     SiS_DDC_Index = 0x11;		/* TW: Bit 0 = SC;  Bit 1 = SD */
+     SiS_DDC_Data  = 0x02;              /* Bitmask in IndexReg for Data */
+     SiS_DDC_Clk   = 0x01;              /* Bitmask in IndexReg for Clk */
+     SiS_DDC_DataShift = 0x00;
+     SiS_DDC_DeviceAddr = 0xEA;		/* TW: DAB */
+  }
+
+  SiS_DDC_ReadAddr = tempbx;
+
+  for(i=0;i<20;i++) {	/* TW: Do only 20 attempts to read */
+    SiS_SetSwitchDDC2();
+    if(SiS_SetStart()) continue;	/* TW: Set start condition */
+    tempah = SiS_DDC_DeviceAddr;
+    temp = SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
+    if(temp) continue;			/* TW:        (ERROR: no ack) */
+    tempah = SiS_DDC_ReadAddr;		/* TW: Write RAB */
+    temp = SiS_WriteDDC2Data(tempah);
+    if(temp) continue;			/* TW:        (ERROR: no ack) */
+    if (SiS_SetStart()) continue;	/* TW: Re-start */
+    tempah = SiS_DDC_DeviceAddr | 0x01; /* DAB | 0x01 = Read */
+    temp = SiS_WriteDDC2Data(tempah);	/* TW: DAB (S0=1=read) */
+    if(temp) continue;			/* TW:        (ERROR: no ack) */
+    tempah = SiS_ReadDDC2Data(tempah);	/* TW: Read byte */
+    if (SiS_SetStop()) continue;	/* TW: Stop condition */
+    SiS_ChrontelInit = 1;
+    return(tempah);
+  }
+
+  if(!SiS_ChrontelInit) {
+     SiS_DDC_Index = 0x0a;		/* TW: Bit 0 = SC;  Bit 1 = SD */
+     SiS_DDC_Data  = 0x80;              /* Bitmask in IndexReg for Data */
+     SiS_DDC_Clk   = 0x40;              /* Bitmask in IndexReg for Clk */
+     SiS_DDC_DataShift = 0x00;
+     SiS_DDC_DeviceAddr = 0xEA;  	/* TW: DAB (Device Address Byte) */
+
+     for(i=0;i<20;i++) {	/* TW: Do only 20 attempts to read */
+       SiS_SetSwitchDDC2();
+       if(SiS_SetStart()) continue;		/* TW: Set start condition */
+       tempah = SiS_DDC_DeviceAddr;
+       temp = SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
+       if(temp) continue;			/* TW:        (ERROR: no ack) */
+       tempah = SiS_DDC_ReadAddr;		/* TW: Write RAB */
+       temp = SiS_WriteDDC2Data(tempah);
+       if(temp) continue;			/* TW:        (ERROR: no ack) */
+       if (SiS_SetStart()) continue;		/* TW: Re-start */
+       tempah = SiS_DDC_DeviceAddr | 0x01; 	/* DAB | 0x01 = Read */
+       temp = SiS_WriteDDC2Data(tempah);	/* TW: DAB (S0=1=read) */
+       if(temp) continue;			/* TW:        (ERROR: no ack) */
+       tempah = SiS_ReadDDC2Data(tempah);	/* TW: Read byte */
+       if (SiS_SetStop()) continue;		/* TW: Stop condition */
+       SiS_ChrontelInit = 1;
+       return(tempah);
+     }
+  }
+  return(0xFFFF);
+}
 
-	tempah = (UCHAR) SiS_GetReg1 (SiS_P3d4, 0x11);	/*unlock cr0-7  */
-	tempah = tempah & 0x7F;
-	SiS_SetReg1 (SiS_P3d4, 0x11, tempah);
-	tempah = (LVDSCRT1Ptr + ResInfo)->CR[0];
-	SiS_SetReg1 (SiS_P3d4, 0x0, tempah);
-	for (i = 0x02, j = 1; i <= 0x05; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3d4, i, tempah);
-	}
-	for (i = 0x06, j = 5; i <= 0x07; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3d4, i, tempah);
-	}
-	for (i = 0x10, j = 7; i <= 0x11; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3d4, i, tempah);
-	}
-	for (i = 0x15, j = 9; i <= 0x16; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3d4, i, tempah);
-	}
+/* TW: Read from Chrontel 701x */
+/* Parameter is [Register no (S7-S0)] */
+USHORT
+SiS_GetCH701x(USHORT tempbx)
+{
+  USHORT tempah,temp,i;
+
+  /* TW: Toggle to DDC port */
+  SiS_SetRegOR(SiS_P3c4,0x38,0x20);
+
+  SiS_DDC_Index = 0x11;			/* TW: Bit 0 = SC;  Bit 1 = SD */
+  SiS_DDC_Data  = 0x08;                 /* Bitmask in IndexReg for Data */
+  SiS_DDC_Clk   = 0x04;                 /* Bitmask in IndexReg for Clk */
+  SiS_DDC_DataShift = 0x00;
+  SiS_DDC_DeviceAddr = 0xEA;		/* TW: DAB */
+  SiS_DDC_ReadAddr = tempbx;
+
+   for(i=0;i<20;i++) {	/* TW: Do only 20 attempts to read */
+    if(SiS_SetStart()) continue;	/* TW: Set start condition */
+    tempah = SiS_DDC_DeviceAddr;
+    temp = SiS_WriteDDC2Data(tempah);	/* TW: Write DAB (S0=0=write) */
+    if(temp) continue;			/* TW:        (ERROR: no ack) */
+    tempah = SiS_DDC_ReadAddr;		/* TW: Write RAB */
+    temp = SiS_WriteDDC2Data(tempah);
+    if(temp) continue;			/* TW:        (ERROR: no ack) */
+    if (SiS_SetStart()) continue;	/* TW: Re-start */
+    tempah = SiS_DDC_DeviceAddr | 0x01; /* DAB | 0x01 = Read */
+    temp = SiS_WriteDDC2Data(tempah);	/* TW: DAB (S0=1=read) */
+    if(temp) continue;			/* TW:        (ERROR: no ack) */
+    tempah = SiS_ReadDDC2Data(tempah);	/* TW: Read byte */
+    SiS_SetStop();			/* TW: Stop condition */
+    return(tempah);
+   }
+  return 0xFFFF;
+}
 
-	for (i = 0x0A, j = 11; i <= 0x0C; i++, j++) {
-		tempah = (LVDSCRT1Ptr + ResInfo)->CR[j];
-		SiS_SetReg1 (SiS_P3c4, i, tempah);
-	}
+void
+SiS_SetCH70xxANDOR(USHORT tempax,USHORT tempbh)
+{
+  USHORT tempal,tempah,tempbl;
 
-	tempah = (LVDSCRT1Ptr + ResInfo)->CR[14];
-	tempah = tempah & 0x0E0;
-	SiS_SetReg1 (SiS_P3c4, 0x0E, tempah);
+  tempal = tempax & 0x00FF;
+  tempah =(tempax >> 8) & 0x00FF;
+  tempbl = SiS_GetCH70xx(tempal);
+  tempbl = (((tempbl & tempbh) | tempah) << 8 | tempal);
+  SiS_SetCH70xx(tempbl);
+}
 
-	tempah = (LVDSCRT1Ptr + ResInfo)->CR[14];
-	tempah = tempah & 0x01;
-	tempah = tempah << 5;
-	if (modeflag & DoubleScanMode) {
-		tempah = tempah | 0x080;
-	}
-	SiS_SetRegANDOR (SiS_P3d4, 0x09, ~0x020, tempah);
-	return;
+/* TW: Generic I2C functions for Chrontel --------- */
+
+/* I2C functions CHECKED FOR TV BUG */
+void
+SiS_SetSwitchDDC2(void)
+{
+  SiS_SetSCLKHigh();
+  SiS_DDC2Delay(SiS_I2CDELAY);
+
+  SiS_SetSCLKLow();
+  SiS_DDC2Delay(SiS_I2CDELAY);
 }
 
-/*add for LCDA*/
+/* TW: Set I2C start condition */
+/* TW: This is done by a SD high-to-low transition while SC is high */
+USHORT
+SiS_SetStart(void)
+{
+  if (SiS_SetSCLKLow()) return 0xFFFF;			                   /* TW: (SC->low)  */
+  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data);  /* TW: SD->high */
+  if (SiS_SetSCLKHigh()) return 0xFFFF;			                   /* TW: SC->high */
+  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,0x00);          /* TW: SD->low = start condition */
+  if (SiS_SetSCLKHigh()) return 0xFFFF;			                   /* TW: (SC->low) */
+  return 0;
+}
 
-BOOLEAN
-SiS_GetLCDACRT1Ptr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		    USHORT RefreshRateTableIndex, USHORT * ResInfo,
-		    USHORT * DisplayType)
+/* TW: Set I2C stop condition */
+/* TW: This is done by a SD low-to-high transition while SC is high */
+USHORT
+SiS_SetStop(void)
 {
-	USHORT tempbx = 0, modeflag = 0;
-	USHORT CRT2CRTC = 0;
-	/*301b */
-	if (((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-	    && (SiS_VBInfo & SetCRT2ToLCDA)) {
-		tempbx = SiS_LCDResInfo;
-		tempbx -= Panel800x600;
-		if (SiS_LCDInfo & LCDNonExpanding)
-			tempbx += 6;
-		if (modeflag & HalfDCLK)
-			tempbx += +3;
-		if (ModeNo <= 0x13) {
-			modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-			CRT2CRTC = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-		} else {
-			modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-			CRT2CRTC =
-			    SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-		}
-	}
-	*ResInfo = CRT2CRTC & 0x3F;
-	*DisplayType = tempbx;
-	return 1;
+  if (SiS_SetSCLKLow()) return 0xFFFF;			                   /* TW: (SC->low) */
+  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,0x00);          /* TW: SD->low   */
+  if (SiS_SetSCLKHigh()) return 0xFFFF;			                   /* TW: SC->high  */
+  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data);  /* TW: SD->high = stop condition */
+  if (SiS_SetSCLKHigh()) return 0xFFFF;			                   /* TW: (SC->high) */
+  return 0;
 }
 
-/*end for 301b*/
+/* TW: Write 8 bits of data */
+USHORT
+SiS_WriteDDC2Data(USHORT tempax)
+{
+  USHORT i,flag,temp;
+
+  flag=0x80;
+  for(i=0;i<8;i++) {
+    SiS_SetSCLKLow();					                      /* TW: SC->low */
+    if(tempax & flag) {
+      SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data); /* TW: Write bit (1) to SD */
+    } else {
+      SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,0x00);         /* TW: Write bit (0) to SD */
+    }
+    SiS_SetSCLKHigh();					                      /* TW: SC->high */
+    flag >>= 1;
+  }
+  temp=SiS_CheckACK();					                      /* TW: Check acknowledge */
+  return(temp);
+}
 
-BOOLEAN
-SiS_GetLVDSCRT1Ptr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		    USHORT RefreshRateTableIndex, USHORT * ResInfo,
-		    USHORT * DisplayType)
+USHORT
+SiS_ReadDDC2Data(USHORT tempax)
 {
-	USHORT tempbx, modeflag = 0;
-	USHORT Flag, CRT2CRTC;
+  USHORT i,temp,getdata;
+
+  getdata=0;
+  for(i=0; i<8; i++) {
+    getdata <<= 1;
+    SiS_SetSCLKLow();
+    SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data);
+    SiS_SetSCLKHigh();
+    temp = SiS_GetReg1(SiS_DDC_Port,SiS_DDC_Index);
+    if(temp & SiS_DDC_Data) getdata |= 0x01;
+  }
+  return(getdata);
+}
 
-	if (ModeNo <= 0x13) {
-		modeflag = SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;	/* si+St_ResInfo */
-		CRT2CRTC = SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
-	} else {
-		modeflag = SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;	/* si+Ext_ResInfo */
-		CRT2CRTC = SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
-	}
-	if (!(SiS_VBInfo & SetInSlaveMode)) {
-		return 0;
-	}
-	Flag = 1;
-	tempbx = 0;
-	if (SiS_IF_DEF_CH7005 == 1) {
-		if (!(SiS_VBInfo & SetCRT2ToLCD)) {
-			Flag = 0;
-			tempbx = 12;
-			if (SiS_VBInfo & SetPALTV)
-				tempbx += 2;
-			if (SiS_VBInfo & SetCHTVOverScan)
-				tempbx += 1;
-		}
-	}
-	if (Flag) {
-		tempbx = SiS_LCDResInfo;
-		tempbx -= Panel800x600;
-		if (SiS_LCDInfo & LCDNonExpanding)
-			tempbx += 6;
-		if (modeflag & HalfDCLK)
-			tempbx += +3;
-	}
+USHORT
+SiS_SetSCLKLow(void)
+{
+  USHORT temp, watchdog=50000;
+
+  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Clk,0x00);      /* SetSCLKLow()  */
+  do {
+    temp = SiS_GetReg1(SiS_DDC_Port,SiS_DDC_Index);
+  } while((temp & SiS_DDC_Clk) && --watchdog);
+  if (!watchdog) return 0xFFFF;
+  SiS_DDC2Delay(SiS_I2CDELAYSHORT);
+  return 0;
+}
 
-	*ResInfo = CRT2CRTC & 0x3F;
-	*DisplayType = tempbx;
-	return 1;
+USHORT
+SiS_SetSCLKHigh(void)
+{
+  USHORT temp,watchdog=50000;
+
+  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Clk,SiS_DDC_Clk);      /* SetSCLKHigh()  */
+  do {
+    temp = SiS_GetReg1(SiS_DDC_Port,SiS_DDC_Index);
+  } while((!(temp & SiS_DDC_Clk)) && --watchdog);
+  if (!watchdog) return 0xFFFF;
+  SiS_DDC2Delay(SiS_I2CDELAYSHORT);
+  return 0;
 }
 
 void
-SiS_SetCRT2ECLK (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		 USHORT RefreshRateTableIndex,
-		 PSIS_HW_DEVICE_INFO HwDeviceExtension)
+SiS_DDC2Delay(USHORT delaytime)
 {
-	USHORT tempah, tempal;
-	USHORT P3cc = SiS_P3c9 + 3;
-	USHORT vclkindex = 0;
-
-	if (SiS_IF_DEF_TRUMPION == 0) {	/*no trumpion  */
-		tempal = SiS_GetReg2 (P3cc);
-		tempal = tempal & 0x0C;
-		vclkindex =
-		    SiS_GetVCLK2Ptr (ROMAddr, ModeNo, ModeIdIndex,
-				     RefreshRateTableIndex, HwDeviceExtension);
-	} else {		/*trumpion  */
-		SiS_SetFlag = SiS_SetFlag & (~ProgrammingCRT2);
-/*  tempal=*((UCHAR *)(ROMAddr+SiS_RefIndex+0x03));     &di+Ext_CRTVCLK  */
-		tempal = tempal & 0x03F;
-		if (tempal == 0x02) {	/*31.5MHz  */
-/*      SiS_RefIndex=SiS_RefIndex-Ext2StructSize;   */
-		}
-/*    SiS_RefIndex=GetVCLKPtr(ROMAddr,ModeNo);  */
-		SiS_SetFlag = SiS_SetFlag | ProgrammingCRT2;
-	}
-	tempal = 0x02B;
-	if (!(SiS_VBInfo & SetInSlaveMode)) {
-		tempal = tempal + 3;
-	}
-	SiS_SetReg1 (SiS_P3c4, 0x05, 0x86);
-	tempah = SiS_VCLKData[vclkindex].SR2B;
-	SiS_SetReg1 (SiS_P3c4, tempal, tempah);
-	tempal++;
-	tempah = SiS_VCLKData[vclkindex].SR2C;
-	SiS_SetReg1 (SiS_P3c4, tempal, tempah);
-	tempal++;
-	SiS_SetReg1 (SiS_P3c4, tempal, 0x80);
-	return;
+  USHORT i;
+
+  for(i=0; i<delaytime; i++) {
+    SiS_GetReg1(SiS_P3c4,0x05);
+  }
 }
 
-void
-SiS_SetDefCRT2ExtRegs (USHORT BaseAddr)
+/* TW: Check I2C acknowledge */
+/* Returns 0 if ack ok, non-0 if ack not ok */
+USHORT
+SiS_CheckACK(void)
 {
-	USHORT temp;
-
-	if (SiS_IF_DEF_LVDS == 0) {
-		SiS_SetReg1 (SiS_Part1Port, 0x02, 0x40);
-		SiS_SetReg1 (SiS_Part4Port, 0x10, 0x80);
-		temp = (UCHAR) SiS_GetReg1 (SiS_P3c4, 0x16);
-		temp = temp & 0xC3;
-		SiS_SetReg1 (SiS_P3d4, 0x35, temp);
-	} else {
-		SiS_SetReg1 (SiS_P3d4, 0x32, 0x02);
-		SiS_SetReg1 (SiS_Part1Port, 0x02, 0x00);
-	}
+  USHORT tempah;
+
+  SiS_SetSCLKLow();					                   /* TW: (SC->low) */
+  SiS_SetRegANDOR(SiS_DDC_Port,SiS_DDC_Index,~SiS_DDC_Data,SiS_DDC_Data);  /* TW: (SD->high) */
+  SiS_SetSCLKHigh();					                   /* TW: SC->high = clock impulse for ack */
+  tempah = SiS_GetReg1(SiS_DDC_Port,SiS_DDC_Index);	                   /* TW: Read SD */
+  SiS_SetSCLKLow();					                   /* TW: SC->low = end of clock impulse */
+  if(tempah & SiS_DDC_Data) return(1);			                   /* TW: Ack OK if bit = 0 */
+  else return(0);
 }
 
-#ifdef CONFIG_FB_SIS_315
-/*
-    for SIS310 O.E.M.
-*/
+/* TW: End of I2C functions ----------------------- */
+
+
+/* =============== SiS 310 O.E.M. ================= */
+
+#ifdef SIS315H
+
 /*
 ---------------------------------------------------------
-   LCDResInfo 1 : 800x600
+   LCDResInfo 1 : 800x600          TW: Table wrong for LVDS!
               2 : 1024x768
               3 : 1280x1024
-              4 : 1280x960
-              5 : 640x480
+              4 : 1280x960         TW: 1400x1050
+              5 : 640x480          TW: 1600x1200
               6 : 1600x1200
               7 : 1920x1440
    VESA
@@ -5421,19 +7713,32 @@ SiS_SetDefCRT2ExtRegs (USHORT BaseAddr)
 USHORT
 GetLCDPtrIndex (void)
 {
-	USHORT index;
-
-	index = (SiS_LCDResInfo & 0x0F) - 1;
-	index *= 3;
-	if (SiS_LCDInfo & LCDNonExpanding)
-		index += 2;
-	else {
-		if (!(SiS_LCDInfo & LCDVESATiming))
-			index++;
-	}
+   USHORT index;
+
+   if(SiS_IF_DEF_LVDS == 1) {   /* TW: Inserted entire if statement */
+
+     index = SiS_LCDResInfo & 0x0F;
+     if(SiS_LCDResInfo == Panel1400x1050)  index -= 5;
+     if(SiS_LCDResInfo == Panel1600x1200)  index -= 6;
+     index--;
+     index *= 3;
+     if(SiS_LCDInfo & LCDNonExpanding) index += 2;
+     else if(!(SiS_SetFlag & LCDVESATiming)) index++;
+
+   } else {
+
+     index = (SiS_LCDResInfo & 0x0F) - 1;
+     index *= 3;
+     if (SiS_LCDInfo & LCDNonExpanding)
+        index += 2;
+     else if (!(SiS_SetFlag & LCDVESATiming))
+         index++;
+
+   }
+
+  return index;
+ }
 
-	return index;
-}
 
 /*
 ---------------------------------------------------------
@@ -5447,555 +7752,551 @@ GetLCDPtrIndex (void)
 ---------------------------------------------------------
 */
 USHORT
-GetTVPtrIndex (void)
+GetTVPtrIndex(void)
 {
-	USHORT index;
+  USHORT index;
+
+  index = 0;
+  if (SiS_VBInfo & SetPALTV)
+    index++;
+  if (SiS_VBInfo & SetCRT2ToHiVisionTV)  /* Hivision TV use PAL */
+    index++;
 
-	index = 0;
-	if (SiS_VBInfo & SetPALTV)
-		index++;
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV)	/* Hivision TV use PAL */
-		index++;
-	index *= 2;
+  index <<= 1;
 
-	if ((SiS_VBInfo & SetInSlaveMode) && (SiS_SetFlag & TVSimuMode))
-		index++;
+  if((SiS_VBInfo & SetInSlaveMode) && (SiS_SetFlag & TVSimuMode))
+    index++;
 
-	return index;
+  return index;
 }
 
+/* TW: Checked against 650/LVDS (1.10.07) and 650/301LV BIOS (including data) */
 void
-SetDelayComp (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-	      ULONG ROMAddr, USHORT ModeNo)
+SetDelayComp(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+             UCHAR *ROMAddr,USHORT ModeNo)
 {
-	USHORT Part1Port;
-	USHORT delay, index;
-
-	if (SiS_VBInfo & SetCRT2ToRAMDAC) {
-		delay = SiS310_CRT2DelayCompensation1;
-		if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-			delay = SiS310_CRT2DelayCompensation2;
-	} else if (SiS_VBInfo & SetCRT2ToLCD) {
-		index = GetLCDPtrIndex ();
-		delay = SiS310_LCDDelayCompensation1[index];
-		if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-			delay = SiS310_LCDDelayCompensation2[index];
-	} else {
-		index = GetTVPtrIndex ();
-		delay = SiS310_TVDelayCompensation1[index];
-		if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B))
-			delay = SiS310_TVDelayCompensation2[index];
-	}
-
-	Part1Port = BaseAddr + SIS_CRT2_PORT_04;
-	SiS_SetRegANDOR (Part1Port, 0x2D, ~0x0F, delay);	/* index 2D D[3:0] */
-
+  USHORT Part1Port;
+  USHORT delay,index;
+
+  if (SiS_VBInfo & SetCRT2ToRAMDAC) {
+     delay = SiS310_CRT2DelayCompensation1;
+     if (SiS_VBType & (VB_SIS301B | VB_SIS302B))
+       delay = SiS310_CRT2DelayCompensation2;
+     if(SiS_IF_DEF_LVDS == 1)
+       delay = SiS310_CRT2DelayCompensation3;
+  } else if (SiS_VBInfo & SetCRT2ToLCD) {
+       index = GetLCDPtrIndex();
+       delay = SiS310_LCDDelayCompensation1[index];
+       if (SiS_VBType & (VB_SIS301B|VB_SIS302B|VB_SIS301LV))
+         delay = SiS310_LCDDelayCompensation2[index];
+       if(SiS_IF_DEF_LVDS == 1)
+         delay = SiS310_LCDDelayCompensation3[index];
+  } else {
+       index = GetTVPtrIndex();
+       delay = SiS310_TVDelayCompensation1[index];
+       if (SiS_VBType & (VB_SIS301B | VB_SIS302B))
+         delay = SiS310_TVDelayCompensation2[index];
+       if(SiS_IF_DEF_LVDS == 1)
+         delay = SiS310_TVDelayCompensation3[index];
+  }
+  Part1Port=BaseAddr+SIS_CRT2_PORT_04;
+  if(SiS_IF_DEF_LVDS == 1) {
+    if(SiS_VBInfo & SetCRT2ToTV) {
+       SiS_SetRegANDOR(Part1Port,0x2D,0xF0,delay);
+    } else {
+       delay <<= 4;
+       SiS_SetRegANDOR(Part1Port,0x2D,0x0F,delay);
+    }
+  } else {
+     SiS_SetRegANDOR(Part1Port,0x2D,0xF0,delay);  /* index 2D D[3:0] */
+  }
 }
 
-/*
-*/
+/* TW: Checked against 650/301LV BIOS (including data) */
 void
-SetAntiFlicker (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-		ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+SetAntiFlicker(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+               UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT Part2Port;
-	USHORT index, temp;
-
-	Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	temp = GetTVPtrIndex ();
-	temp = (temp >> 1);	/* 0: NTSC, 1 :PAL, 2:HiTV */
-	if (ModeNo <= 0x13) {
-		index = SiS_SModeIDTable[ModeIdIndex].VB_StTVFlickerIndex;
-	} else {
-		index = SiS_EModeIDTable[ModeIdIndex].VB_ExtTVFlickerIndex;
-	}
-	temp = SiS310_TVAntiFlick1[temp][index];
-	temp <<= 4;
+  USHORT Part2Port;
+  USHORT index,temp;
+
+  Part2Port=BaseAddr+SIS_CRT2_PORT_10;
+
+  temp = GetTVPtrIndex();
+  temp >>= 1;  	  /* 0: NTSC, 1 :PAL, 2:HiTV */
 
-	SiS_SetRegANDOR (Part2Port, 0x0A, ~0x70, temp);	/* index 0A D[6:4] */
+  if (ModeNo<=0x13)
+    index = SiS_SModeIDTable[ModeIdIndex].VB_StTVFlickerIndex;
+  else
+    index = SiS_EModeIDTable[ModeIdIndex].VB_ExtTVFlickerIndex;
 
+  temp = SiS310_TVAntiFlick1[temp][index];
+  temp  <<= 4;
+
+  SiS_SetRegANDOR(Part2Port,0x0A,0x8f,temp);  /* index 0A D[6:4] */
 }
 
+/* TW: Checked against 650/301LV BIOS (including data) */
 void
-SetEdgeEnhance (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-		ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+SetEdgeEnhance(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+               UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT Part2Port;
-	USHORT index, temp;
-
-	Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	temp = GetTVPtrIndex ();
-	temp = (temp >> 1);	/* 0: NTSC, 1 :PAL, 2:HiTV */
-	if (ModeNo <= 0x13) {
-		index = SiS_SModeIDTable[ModeIdIndex].VB_StTVEdgeIndex;	/* si+VB_StTVEdgeIndex */
-	} else {
-		index = SiS_EModeIDTable[ModeIdIndex].VB_ExtTVEdgeIndex;	/* si+VB_ExtTVEdgeIndex */
-	}
-	temp = SiS310_TVEdge1[temp][index];
-	temp <<= 5;
+  USHORT Part2Port;
+  USHORT index,temp;
+
+  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+
+  temp = GetTVPtrIndex();
+  temp >>= 1;              	/* 0: NTSC, 1 :PAL, 2:HiTV */
 
-	SiS_SetRegANDOR (Part2Port, 0x3A, ~0xE0, temp);	/* index 0A D[7:5] */
+  if (ModeNo<=0x13)
+    index = SiS_SModeIDTable[ModeIdIndex].VB_StTVEdgeIndex;
+  else
+    index = SiS_EModeIDTable[ModeIdIndex].VB_ExtTVEdgeIndex;
 
+  temp = SiS310_TVEdge1[temp][index];
+  temp <<= 5;
+  SiS_SetRegANDOR(Part2Port,0x3A,0x1F,temp);  /* index 0A D[7:5] */
 }
 
+/* TW: Checked against 650/301LV BIOS */
 void
-SetYFilter (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-	    ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+SetYFilter(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+           UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT Part2Port, temp1, temp2;
-	USHORT index, temp, i, index1;
-	UCHAR OutputSelect = *pSiS_OutputSelect;
-	Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	temp = GetTVPtrIndex ();
-	temp >>= 1;		/* 0: NTSC, 1 :PAL, 2:HiTV */
-
-	if (ModeNo <= 0x13) {
-		index = SiS_SModeIDTable[ModeIdIndex].VB_StTVYFilterIndex;
-	} else {
-		index = SiS_EModeIDTable[ModeIdIndex].VB_ExtTVYFilterIndex;
-	}
-
-	if (SiS_VBInfo & SetCRT2ToHiVisionTV)	/* Hivision TV use PAL */
-		temp = 0;
-
-	/*301b */
-	if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-		for (i = 0x35; i <= 0x38; i++) {
-			SiS_SetReg1 (Part2Port, i,
-				     SiS310_TVYFilter2[temp][index][i - 0x35]);
-		}
-		for (i = 0x48; i <= 0x4A; i++) {
-			SiS_SetReg1 (Part2Port, i,
-				     SiS310_TVYFilter2[temp][index][(i - 0x48) +
-								    0x04]);
-		}
-	}
-	/*end 301b */
-	else {
-		for (i = 0x35; i <= 0x38; i++) {
-			SiS_SetReg1 (Part2Port, i,
-				     SiS310_TVYFilter1[temp][index][i - 0x35]);
-		}
-	}
-/*add PALMN*/
-	if (OutputSelect & EnablePALMN) {
-		index1 = SiS_GetReg1 (SiS_P3d4, 0x31);
-		temp1 = index1 & 0x01;
-		index1 = SiS_GetReg1 (SiS_P3d4, 0x38);
-		temp2 = index1 & 0xC0;
-		if (temp1) {
-			if (temp2 == 0x40) {
-				if ((SiS_VBType & VB_SIS301B)
-				    || (SiS_VBType & VB_SIS302B)) {
-					for (i = 0x35; i <= 0x38; i++) {
-						SiS_SetReg1 (Part2Port, i,
-							     SiS310_PALMFilter2
-							     [index][i - 0x35]);
-					}
-					for (i = 0x48; i <= 0x4A; i++) {
-						SiS_SetReg1 (Part2Port, i,
-							     SiS310_PALMFilter2
-							     [index][(i - 0x48)
-								     + 0x04]);
-					}
-				} else {
-					for (i = 0x35; i <= 0x38; i++)
-						SiS_SetReg1 (Part2Port, i,
-							     SiS310_PALMFilter
-							     [index][i - 0x35]);
-				}
-			}
-			if (temp2 == 0x80) {
-				if ((SiS_VBType & VB_SIS301B)
-				    || (SiS_VBType & VB_SIS302B)) {
-					for (i = 0x35; i <= 0x38; i++) {
-						SiS_SetReg1 (Part2Port, i,
-							     SiS310_PALNFilter2
-							     [index][i - 0x35]);
-					}
-					for (i = 0x48; i <= 0x4A; i++) {
-						SiS_SetReg1 (Part2Port, i,
-							     SiS310_PALNFilter2
-							     [index][(i - 0x48)
-								     + 0x04]);
-					}
-				} else {
-					for (i = 0x35; i <= 0x38; i++)
-						SiS_SetReg1 (Part2Port, i,
-							     SiS310_PALNFilter
-							     [index][i - 0x35]);
-				}
-			}
-		}
-	}
-	/*end PALMN */
+  USHORT Part2Port;
+  USHORT index,temp,i,j;
+  UCHAR  OutputSelect=*pSiS_OutputSelect;
+
+  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+
+  temp = GetTVPtrIndex();
+  temp >>= 1;  			/* 0: NTSC, 1 :PAL, 2:HiTV */
+
+  if (ModeNo<=0x13) {
+    index =  SiS_SModeIDTable[ModeIdIndex].VB_StTVYFilterIndex;
+  } else {
+    index =  SiS_EModeIDTable[ModeIdIndex].VB_ExtTVYFilterIndex;
+  }
+
+  if (SiS_VBInfo&SetCRT2ToHiVisionTV)  /* Hivision TV uses PAL */
+    temp = 0;
+
+  if(SiS_VBType & VB_SIS301BLV302BLV) {
+    for(i=0x35, j=0; i<=0x38; i++, j++) {
+       SiS_SetReg1(Part2Port,i,SiS310_TVYFilter2[temp][index][j]);
+    }
+    for(i=0x48; i<=0x4A; i++, j++) {
+       SiS_SetReg1(Part2Port,i,SiS310_TVYFilter2[temp][index][j]);
+    }
+  } else {
+    for(i=0x35, j=0; i<=0x38; i++, j++){
+       SiS_SetReg1(Part2Port,i,SiS310_TVYFilter1[temp][index][j]);
+    }
+  }
+
+  if(OutputSelect & EnablePALMN) {
+      if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
+         temp = SiS_GetReg1(SiS_P3d4,0x38);
+         temp &= (EnablePALMN | EnablePALN);
+         if(temp == EnablePALMN) {
+              if(SiS_VBType & VB_SIS301BLV302BLV) {
+                 for(i=0x35, j=0; i<=0x38; i++, j++){
+                      SiS_SetReg1(Part2Port,i,SiS310_PALMFilter2[index][j]);
+                 }
+                 for(i=0x48; i<=0x4A; i++, j++) {
+                       SiS_SetReg1(Part2Port,i,SiS310_PALMFilter2[index][j]);
+                 }
+              } else {
+                 for(i=0x35, j=0; i<=0x38; i++, j++) {
+                       SiS_SetReg1(Part2Port,i,SiS310_PALMFilter[index][j]);
+                 }
+              }
+         }
+         if(temp == EnablePALN) {
+              if(SiS_VBType & VB_SIS301BLV302BLV) {
+                 for(i=0x35, j=0; i<=0x38; i++, j++) {
+                      SiS_SetReg1(Part2Port,i,SiS310_PALNFilter2[index][j]);
+                 }
+                 for(i=0x48, j=0; i<=0x4A; i++, j++) {
+                       SiS_SetReg1(Part2Port,i,SiS310_PALNFilter2[index][j]);
+                 }
+             } else {
+                 for(i=0x35, j=0; i<=0x38; i++, j++)
+                       SiS_SetReg1(Part2Port,i,SiS310_PALNFilter[index][j]);
+             }
+         }
+      }
+  }
 }
 
+/* TW: Checked against 650/301LV BIOS (including data) */
 void
-SetPhaseIncr (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-	      ULONG ROMAddr, USHORT ModeNo)
+SetPhaseIncr(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+             UCHAR *ROMAddr,USHORT ModeNo)
 {
-	USHORT Part2Port;
-	USHORT index, temp, temp1, i;
-
-	Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	temp = GetTVPtrIndex ();
-	/* 0: NTSC Graphics, 1: NTSC Text, 2 :PAL Graphics, 3 :PAL Text, 4:HiTV Graphics 5:HiTV Text */
-	index = temp % 2;
-	temp >>= 1;		/* 0: NTSC, 1 :PAL, 2:HiTV */
-	temp1 = SiS_GetReg1 (SiS_P3d4, 0x38);	/*if PALMN Not Set */
-	temp1 = temp1 & 0xC0;
-	if (!temp1) {
-		for (i = 0x31; i <= 0x34; i++) {
-			if ((SiS_VBType & VB_SIS301B)
-			    || (SiS_VBType & VB_SIS302B))
-				    SiS_SetReg1 (Part2Port, i,
-						 SiS310_TVPhaseIncr2[temp]
-						 [index][i - 0x31]);
-			else
-				SiS_SetReg1 (Part2Port, i,
-					     SiS310_TVPhaseIncr1[temp][index][i
-									      -
-									      0x31]);
-		}
+  USHORT Part2Port;
+  USHORT index,temp,temp1,i,j;
+
+  if(!(SiS_VBInfo & SetCRT2ToTV)) return;
+
+  temp1 = SiS_GetReg1(SiS_P3d4,0x38);        /* if PALM/N not set */
+  temp1 &=  (EnablePALMN | EnablePALN);
+  if(temp1) return;
+
+  Part2Port=BaseAddr + SIS_CRT2_PORT_10;
+
+  temp = GetTVPtrIndex();
+  /* 0: NTSC Graphics, 1: NTSC Text,    2:PAL Graphics,
+   * 3: PAL Text,      4: HiTV Graphics 5:HiTV Text
+   */
+  index = temp % 2;
+  temp >>= 1;          /* 0:NTSC, 1:PAL, 2:HiTV */
+
+  for(j=0, i=0x31; i<=0x34; i++, j++) {
+     if(!(SiS_VBType & VB_SIS301BLV302BLV))
+	  SiS_SetReg1(Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]);
+     else if((!(SiS_VBInfo & SetInSlaveMode)) || (SiS_SetFlag & TVSimuMode))
+          SiS_SetReg1(Part2Port,i,SiS310_TVPhaseIncr2[temp][index][j]);
+     else
+          SiS_SetReg1(Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]);
+  }
+  if(SiS_VBType & (VB_SIS301LV | VB_SIS302LV)) {
+     if(!(SiS_VBInfo & SetPALTV)) {
+        if((ModeNo == 0x38) || (ModeNo == 0x4a)) {
+	    SiS_SetReg1(SiS_Part2Port,0x31,0x1e);
+	    SiS_SetReg1(SiS_Part2Port,0x32,0x8c);
+	    SiS_SetReg1(SiS_Part2Port,0x33,0x5c);
+	    SiS_SetReg1(SiS_Part2Port,0x34,0x7a);
 	}
+     }
+  }
 }
+
 void
-SiS_OEM310Setting (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-		   ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex)
+SiS_OEM310Setting(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+                  UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	SetDelayComp (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo);
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		SetAntiFlicker (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo,
-				ModeIdIndex);
-		SetPhaseIncr (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo);
-		SetYFilter (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo,
-			    ModeIdIndex);
-		SetEdgeEnhance (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo,
-				ModeIdIndex);
-	}
+   SetDelayComp(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
+   /* TW: The TV funtions are not for LVDS */
+   if( (SiS_IF_DEF_LVDS == 0) && (SiS_VBInfo & SetCRT2ToTV) ) {
+       SetAntiFlicker(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       SetPhaseIncr(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo);
+       SetYFilter(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       if(!(SiS_VBType & VB_SIS301BLV302BLV)) {
+          SetEdgeEnhance(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       }
+   }
 }
 
+/* TW: New and checked from 650/301LV BIOS */
+void
+SiS_OEMLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+                  UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
+{
+   USHORT tempbx,tempah,tempbl,tempbh,tempcl;
+
+   if(SiS_IF_DEF_LVDS == 1) return;
+
+   if(SiS_VBInfo & SetCRT2ToLCDA) {
+      SiS_UnLockCRT2(HwDeviceExtension,BaseAddr);
+      tempbh = SiS_GetReg1(SiS_Part1Port,0x1a);
+      tempbh &= 0x38;
+      tempbh >>= 3;
+      tempbl = SiS_GetReg1(SiS_Part1Port,0x18);
+      tempbx = (tempbh << 8) | tempbl;
+      if(SiS_LCDTypeInfo == 1)  tempbx -= 0x12;
+      SiS_SetReg1(SiS_Part1Port,0x18,tempbx & 0x00ff);
+      tempah = (tempbx & 0xff00) >> 8;
+      tempah &= 0x07;
+      tempah <<= 3;
+      SiS_SetRegANDOR(SiS_Part1Port,0x1a,0xc7,tempah);
+      tempah = SiS_GetReg1(SiS_Part1Port,0x19);
+      tempah &= 0x0f;
+      if(SiS_LCDTypeInfo == 1)  tempah -= 2;
+      tempah &= 0x0f;
+      SiS_SetRegANDOR(SiS_Part1Port,0x19,0xF0,tempah);
+      tempah = SiS_GetReg1(SiS_Part1Port,0x14);
+      if(SiS_LCDTypeInfo == 1)  tempah++;
+      tempah -= 8;
+      SiS_SetReg1(SiS_Part1Port,0x14,tempah);
+   } else if(SiS_VBInfo & SetCRT2ToLCD) {
+      tempcl = tempbh = SiS_GetReg1(SiS_Part2Port,0x01);
+      tempbh &= 0x70;
+      tempbh >>= 4;
+      tempbl = SiS_GetReg1(SiS_Part2Port,0x04);
+      tempbx = (tempbh << 8) | tempbl;
+      if(SiS_LCDTypeInfo == 1)  {
+           tempbx -= 0x1e;
+	   tempcl &= 0x0f;
+	   tempcl -= 4;
+	   tempcl &= 0x0f;
+      }
+      tempbl = tempbx & 0x00ff;
+      tempbh = (tempbx >> 8) & 0x00ff;
+      SiS_SetReg1(SiS_Part2Port,0x04,tempbl);
+      tempbh <<= 4;
+      tempbh |= tempcl;
+      SiS_SetRegANDOR(SiS_Part2Port,0x01,0x80,tempbh);
+   }
+}
 #endif
 
-#ifdef CONFIG_FB_SIS_300
-/*
-    for SIS300 O.E.M.
-*/
 
+/*  =================  SiS 300 O.E.M. ================== */
+
+#ifdef SIS300
+
+#if 0   /* Not used */
 USHORT
-GetRevisionID (PSIS_HW_DEVICE_INFO HwDeviceExtension)
+GetRevisionID(PSIS_HW_DEVICE_INFO HwDeviceExtension)
 {
-#ifdef CONFIG_FB_SIS_300
-	ULONG temp1, base;
-	USHORT temp2 = 0;
-	/* add to set SR14 */
-	if ((HwDeviceExtension->jChipType == SIS_540) ||
-	    (HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		base = 0x80000008;
-		OutPortLong (base, 0xcf8);
-		temp1 = InPortLong (0xcfc);
-		temp1 = temp1 & 0x000000FF;
-		temp2 = (USHORT) (temp1);
-		return temp2;
-	}
+   ULONG temp1;
+#ifndef LINUX_XF86
+   ULONG base;
 #endif
+   USHORT temp2 = 0;
+
+   if((HwDeviceExtension->jChipType==SIS_540)||
+      (HwDeviceExtension->jChipType==SIS_630)||
+      (HwDeviceExtension->jChipType==SIS_730)) {
+#ifndef LINUX_XF86
+     	base = 0x80000008;
+     	OutPortLong(base,0xcf8);
+     	temp1 = InPortLong(0xcfc);
+#else
+	temp1=pciReadLong(0x00000000, 0x08);
+#endif
+     	temp1 &= 0x000000FF;
+     	temp2 = (USHORT)(temp1);
+    	return temp2;
+   }
+   return 0;
 }
+#endif
 
+/* TW: Checked against 630/301B BIOS (incl data) */
 USHORT
-GetOEMLCDPtr (PSIS_HW_DEVICE_INFO HwDeviceExtension)
+GetOEMLCDPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension, int Flag)
 {
-	USHORT temp, tempbx = 0, tempax;
-
-	if (SiS_IF_DEF_LVDS == 0) {
-		if (SiS_VBInfo & SetCRT2ToLCD) {	/* LCD */
-			tempax = SiS_LCDResInfo;
-			tempbx = SiS_LCDResInfo;
-			tempbx = tempbx - Panel1024x768;
-			if (!(SiS_SetFlag & LCDVESATiming)) {
-				tempbx += 4;
-				temp = GetRevisionID (HwDeviceExtension);
-				if ((HwDeviceExtension->jChipType == SIS_540)
-				    && (temp < 1))
-					tempbx += 4;
-				if ((HwDeviceExtension->jChipType == SIS_630)
-				    && (temp < 3))
-					tempbx += 4;
-			}
-			if ((tempax == Panel1024x768)
-			    && (SiS_LCDInfo == LCDNonExpanding)) {
-				tempbx = tempbx + 3;
-			}
-			/*add OEMLCDPanelIDSupport */
-			tempbx = SiS_LCDTypeInfo;
-			tempbx = tempbx << 1;
-			if (!(SiS_SetFlag & LCDVESATiming))
-				tempbx = tempbx + 1;
-		}
-	}
-	tempbx *= 2;
-	return tempbx;
+  USHORT tempbx=0;
+  UCHAR customtable[] = {
+  	0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
+	0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
+  };
+
+  if(Flag) {
+      if(customtable[SiS_LCDTypeInfo] == 0xFF) return 0xFFFF;
+  }
+  if(SiS_IF_DEF_LVDS == 0) {
+        tempbx = SiS_LCDTypeInfo << 2;
+	if(SiS_VBInfo & SetInSlaveMode) tempbx += 2;
+	if(SiS_LCDInfo & LCDNonExpanding) tempbx++;
+  } else {
+  	tempbx = SiS_LCDTypeInfo;
+	if(SiS_LCDInfo & LCDNonExpanding) tempbx += 16;
+  }
+  return tempbx;
 }
 
-USHORT
-GetOEMTVPtr (void)
+/* TW: Checked against 630/301B and 630/LVDS BIOS (incl data) */
+void
+SetOEMLCDDelay(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+               UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT index;
-
-	index = 0;
-	if (!(SiS_VBInfo & SetInSlaveMode))
-		index = index + 4;
-
-	if (SiS_VBInfo & SetCRT2ToSCART) {
-		index = index + 2;
-	} else {
-		if (SiS_VBInfo & SetCRT2ToHiVisionTV)
-			index = index + 3;
-		else {
-			if (SiS_VBInfo & SetPALTV)
-				index = index + 1;
-		}
-	}
-	return index;
+  USHORT Part1Port;
+  USHORT index,temp;
+
+  /* TW: The Panel Compensation Delay should be set according to tables
+   *     here. Unfortunately, the different BIOS versions don't case about
+   *     a uniform way using eg. ROM byte 0x220, but use different
+   *     hard coded delays (0x04, 0x20, 0x18) in SetGroup1(). So we can't
+   *     rely on the other OEM bits in 0x237, 0x238 here either.
+   */
+#if 0
+  if(ROMAddr) {
+     if(!(ROMAddr[0x237] & 0x01)) return;
+     if(!(ROMAddr[0x237] & 0x02)) return;
+  }
+#endif
+  /* TW: We just check if a non-standard delay has been set; if not,
+   * we use our tables. Otherwise don't do anything here.
+   */
+  if(ROMAddr) {
+     if(ROMAddr[0x220] & 0x80) return;
+  }
+  /* TW: We don't need to set this if the user select a custom pdc */
+  if(HwDeviceExtension->pdc) return;
+
+  Part1Port = BaseAddr + SIS_CRT2_PORT_04;
+
+  temp = GetOEMLCDPtr(HwDeviceExtension, 0);
+
+  index = SiS_VBModeIDTable[ModeIdIndex].VB_LCDDelayIndex;
+
+  if (SiS_IF_DEF_LVDS == 0) {
+    	temp = SiS300_OEMLCDDelay2[temp][index];
+  } else {
+        temp = SiS300_OEMLCDDelay3[temp][index];
+  }
+  temp &= 0x3c;
+  SiS_SetRegANDOR(Part1Port,0x13,~0x3C,temp);  /* index 0A D[6:4] */
 }
 
-void
-SetOEMTVDelay (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-	       ULONG ROMAddr, USHORT ModeNo)
+/* TW: Checked against 630/301B and 630/LVDS BIOS */
+USHORT
+GetOEMTVPtr(void)
 {
-	USHORT Part1Port;
-	USHORT index, temp, ModeIdIndex;
-	Part1Port = BaseAddr + SIS_CRT2_PORT_04;
-	ModeIdIndex = SiS_SearchVBModeID (ROMAddr, ModeNo);
-	temp = GetOEMTVPtr ();
-	index = SiS_VBModeIDTable[ModeIdIndex].VB_TVDelayIndex;
-	temp = SiS300_OEMTVDelay[temp][index];
-	temp = temp & 0x3c;
-	SiS_SetRegANDOR (Part1Port, 0x13, ~0x3C, temp);	/* index 0A D[6:4] */
+  USHORT index;
+
+  index = 0;
+  if(!(SiS_VBInfo & SetInSlaveMode)) index += 4;
+  if(SiS_IF_DEF_LVDS == 0) {
+     if(SiS_VBInfo & SetCRT2ToSCART) index += 2;
+     else if (SiS_VBInfo & SetCRT2ToHiVisionTV) index += 3;
+     else if(SiS_VBInfo & SetPALTV)  index += 1;
+  } else {
+     if(SiS_VBInfo & SetCHTVOverScan) index += 2;
+     if(SiS_VBInfo & SetPALTV)  index += 1;
+  }
+  return index;
 }
 
+/* TW: Checked against 630/301B and 630/LVDS BIOS (incl data) */
 void
-SetOEMLCDDelay (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-		ULONG ROMAddr, USHORT ModeNo)
+SetOEMTVDelay(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+              UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT Part2Port;
-	USHORT index, temp, ModeIdIndex;
-	Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	ModeIdIndex = SiS_SearchVBModeID (ROMAddr, ModeNo);
-	temp = GetOEMLCDPtr (HwDeviceExtension);
-	index = SiS_VBModeIDTable[ModeIdIndex].VB_LCDDelayIndex;
-	temp = SiS300_OEMLCDDelay1[temp][index];
-	/*add OEMLCDPanelIDSupport */
-	temp = SiS300_OEMLCDDelay2[temp][index];
-	temp = temp & 0x3c;
-	SiS_SetRegANDOR (Part2Port, 0x13, ~0x3C, temp);	/* index 0A D[6:4] */
+  USHORT Part1Port;
+  USHORT index,temp;
+
+#if 0
+  if(ROMAddr) {
+     if(!(ROMAddr[0x238] & 0x01)) return;
+     if(!(ROMAddr[0x238] & 0x02)) return;
+  }
+#endif
+
+  Part1Port = BaseAddr + SIS_CRT2_PORT_04;
+
+  temp = GetOEMTVPtr();
+
+  index = SiS_VBModeIDTable[ModeIdIndex].VB_TVDelayIndex;
+
+  if(SiS_IF_DEF_LVDS == 0) {
+     temp = SiS300_OEMTVDelay301[temp][index];
+  } else {
+     temp = SiS300_OEMTVDelayLVDS[temp][index];
+  }
+  temp &= 0x3c;
+  SiS_SetRegANDOR(Part1Port,0x13,~0x3C,temp);  /* index 0A D[6:4] */
 }
 
-/*
-*/
+/* TW: Checked against 630/301B BIOS (incl data) */
 void
-SetOEMAntiFlicker (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-		   ULONG ROMAddr, USHORT ModeNo)
+SetOEMAntiFlicker(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                  USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+		  USHORT ModeIdIndex)
 {
-	USHORT Part2Port;
-	USHORT index, temp;
-	USHORT ModeIdIndex;
-	Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	ModeIdIndex = SiS_SearchVBModeID (ROMAddr, ModeNo);
-	temp = GetOEMTVPtr ();
-	index = SiS_VBModeIDTable[ModeIdIndex].VB_TVFlickerIndex;
-	temp = SiS300_OEMTVFlicker[temp][index];
-	temp = temp & 0x70;
-	SiS_SetRegANDOR (Part2Port, 0x0A, ~0x70, temp);	/* index 0A D[6:4] */
+  USHORT Part2Port;
+  USHORT index,temp;
+
+  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+
+  temp = GetOEMTVPtr();
+
+  index = SiS_VBModeIDTable[ModeIdIndex].VB_TVFlickerIndex;
 
+  temp = SiS300_OEMTVFlicker[temp][index];
+  temp &= 0x70;
+  SiS_SetRegANDOR(Part2Port,0x0A,0x8F,temp);  /* index 0A D[6:4] */
 }
 
+/* TW: Checked against 630/301B BIOS (incl data) */
 void
-SetOEMPhaseIncr (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-		 ULONG ROMAddr, USHORT ModeNo)
+SetOEMPhaseIncr(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+                UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT Part2Port;
-	USHORT index, i, ModeIdIndex;
-
-	Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	// temp = GetTVPtrIndex();
-	/* 0: NTSC Graphics, 1: NTSC Text, 2 :PAL Graphics, 3 :PAL Text, 4:HiTV Graphics 5:HiTV Text */
-	// index = temp % 2;
-	// temp >>= 1;   /* 0: NTSC, 1 :PAL, 2:HiTV */
-	ModeIdIndex = SiS_SearchVBModeID (ROMAddr, ModeNo);
-	index = SiS_VBModeIDTable[ModeIdIndex].VB_TVPhaseIndex;
-	if (SiS_VBInfo & SetInSlaveMode) {
-		if (SiS_VBInfo & SetPALTV) {
-			for (i = 0x31; i <= 0x34; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_StPALPhase[index][i -
-								      0x31]);
-		} else {
-			for (i = 0x31; i <= 0x34; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_StNTSCPhase[index][i -
-								       0x31]);
-		}
-		if (SiS_VBInfo & SetCRT2ToSCART) {
-			for (i = 0x31; i <= 0x34; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_StSCARTPhase[index][i -
-									0x31]);
-		}
-	} else {
-		if (SiS_VBInfo & SetPALTV) {
-			for (i = 0x31; i <= 0x34; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_ExtPALPhase[index][i -
-								       0x31]);
-		} else {
-			for (i = 0x31; i <= 0x34; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_ExtNTSCPhase[index][i -
-									0x31]);
-		}
-		if (SiS_VBInfo & SetCRT2ToSCART) {
-			for (i = 0x31; i <= 0x34; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_ExtSCARTPhase[index][i -
-									 0x31]);
-		}
-	}
+  USHORT Part2Port;
+  USHORT index,i,j,temp;
+
+  if(SiS_VBInfo & SetCRT2ToHiVisionTV) return;
+
+  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+
+  temp = GetOEMTVPtr();
+
+  index = SiS_VBModeIDTable[ModeIdIndex].VB_TVPhaseIndex;
+
+  if(SiS_VBType & VB_SIS301BLV302BLV) {
+       for(i=0x31, j=0; i<=0x34; i++, j++) {
+          SiS_SetReg1(Part2Port,i,SiS300_Phase2[temp][index][j]);
+       }
+  } else {
+       for(i=0x31, j=0; i<=0x34; i++, j++) {
+          SiS_SetReg1(Part2Port,i,SiS300_Phase1[temp][index][j]);
+       }
+  }
 }
 
+/* TW: Checked against 630/301B BIOS (incl data) */
 void
-SetOEMYFilter (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-	       ULONG ROMAddr, USHORT ModeNo)
+SetOEMYFilter(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+              UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex)
 {
-	USHORT Part2Port;
-	USHORT index, temp1, temp2, i, ModeIdIndex, index1;
-	Part2Port = BaseAddr + SIS_CRT2_PORT_10;
-	/*301b */
-	ModeIdIndex = SiS_SearchVBModeID (ROMAddr, ModeNo);
-	index = SiS_VBModeIDTable[ModeIdIndex].VB_TVYFilterIndex;
-	if (SiS_VBInfo & SetInSlaveMode) {
-		if (SiS_VBInfo & SetPALTV) {
-			for (i = 0x35; i <= 0x38; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_StPALFilter[index][i -
-								       0x35]);
-		} else {
-			for (i = 0x35; i <= 0x38; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_StNTSCFilter[index][i -
-									0x35]);
-		}
-	} else {
-		if (SiS_VBInfo & SetPALTV) {
-			for (i = 0x35; i <= 0x38; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_ExtPALFilter[index][i -
-									0x35]);
-		} else {
-			for (i = 0x35; i <= 0x38; i++)
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_ExtNTSCFilter[index][i -
-									 0x35]);
-		}
-	}
-
-	if ((SiS_VBType & VB_SIS301B) || (SiS_VBType & VB_SIS302B)) {
-		if (SiS_VBInfo & SetPALTV) {
-			for (i = 0x35; i <= 0x38; i++) {
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_PALFilter2[index][i -
-								      0x35]);
-			}
-			for (i = 0x48; i <= 0x4A; i++) {
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_PALFilter2[index][(i - 0x48)
-								      + 0x04]);
-			}
-		} else {
-			for (i = 0x35; i <= 0x38; i++) {
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_NTSCFilter2[index][i -
-								       0x35]);
-			}
-			for (i = 0x48; i <= 0x4A; i++) {
-				SiS_SetReg1 (Part2Port, i,
-					     SiS300_NTSCFilter2[index][
-								       (i -
-									0x48) +
-								       0x04]);
-			}
-		}
-	}
-
-/*add PALMN*/
-	if ((HwDeviceExtension->jChipType == SIS_630) ||
-	    (HwDeviceExtension->jChipType == SIS_730)) {
-		index1 = SiS_GetReg1 (SiS_P3d4, 0x31);
-		temp1 = index1 & 0x01;
-		index1 = SiS_GetReg1 (SiS_P3d4, 0x35);
-		temp2 = index1 & 0xC0;
-		if (temp1) {
-			if (temp2 == 0x40) {
-				if ((SiS_VBType & VB_SIS301B)
-				    || (SiS_VBType & VB_SIS302B)) {
-					for (i = 0x35; i <= 0x38; i++) {
-						SiS_SetReg1 (Part2Port, i,
-							     SiS300_PALMFilter2
-							     [index][i - 0x35]);
-					}
-					for (i = 0x48; i <= 0x4A; i++) {
-						SiS_SetReg1 (Part2Port, i,
-							     SiS300_PALMFilter2
-							     [index][(i - 0x48)
-								     + 0x04]);
-					}
-				} else {
-					for (i = 0x35; i <= 0x38; i++)
-						SiS_SetReg1 (Part2Port, i,
-							     SiS300_PALMFilter
-							     [index][i - 0x35]);
-				}
-			}
-			if (temp2 == 0x80) {
-				if ((SiS_VBType & VB_SIS301B)
-				    || (SiS_VBType & VB_SIS302B)) {
-					for (i = 0x35; i <= 0x38; i++) {
-						SiS_SetReg1 (Part2Port, i,
-							     SiS300_PALNFilter2
-							     [index][i - 0x35]);
-					}
-					for (i = 0x48; i <= 0x4A; i++) {
-						SiS_SetReg1 (Part2Port, i,
-							     SiS300_PALNFilter2
-							     [index][(i - 0x48)
-								     + 0x04]);
-					}
-				} else {
-					for (i = 0x35; i <= 0x38; i++)
-						SiS_SetReg1 (Part2Port, i,
-							     SiS300_PALNFilter
-							     [index][i - 0x35]);
-				}
-			}
-		}
-	}
-	/*end PALMN */
+  USHORT Part2Port;
+  USHORT index,temp,temp1,i,j;
+
+  if(SiS_VBInfo & (SetCRT2ToSCART | SetCRT2ToHiVisionTV)) return;
+
+  Part2Port = BaseAddr + SIS_CRT2_PORT_10;
+
+  temp = GetOEMTVPtr();
+
+  index = SiS_VBModeIDTable[ModeIdIndex].VB_TVYFilterIndex;
+
+  if(SiS_GetReg1(SiS_P3d4,0x31) & 0x01) {
+       temp1 = SiS_GetReg1(SiS_P3d4,0x35);
+       if(temp1 & (EnablePALMN | EnablePALN)) {
+          temp = 16;
+	  if(temp1 & EnablePALN) temp = 18;
+       }
+  }
+  if(SiS_VBType & VB_SIS301BLV302BLV) {
+      for(i=0x35, j=0; i<=0x38; i++, j++) {
+       	SiS_SetReg1(Part2Port,i,SiS300_Filter2[temp][index][j]);
+      }
+      for(i=0x48; i<=0x4A; i++, j++) {
+     	SiS_SetReg1(Part2Port,i,SiS300_Filter2[temp][index][j]);
+      }
+  } else {
+      for(i=0x35, j=0; i<=0x38; i++, j++) {
+       	SiS_SetReg1(Part2Port,i,SiS300_Filter1[temp][index][j]);
+      }
+  }
 }
 
 void
-SiS_OEM300Setting (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-		   ULONG ROMAddr, USHORT ModeNo)
+SiS_OEM300Setting(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+		  USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo)
 {
-	if (SiS_VBInfo & SetCRT2ToLCD) {
-		SetOEMLCDDelay (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo);
-	}
-	if (SiS_VBInfo & SetCRT2ToTV) {
-		SetOEMTVDelay (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo);
-		SetOEMAntiFlicker (HwDeviceExtension, BaseAddr, ROMAddr,
-				   ModeNo);
-		/* SetOEMPhaseIncr(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo); */
-		SetOEMYFilter (HwDeviceExtension, BaseAddr, ROMAddr, ModeNo);
-	}
+  USHORT ModeIdIndex;
+
+  ModeIdIndex = SiS_SearchVBModeID(ROMAddr,&ModeNo);
+  if(!(ModeIdIndex)) return;
+
+  if (SiS_VBInfo & SetCRT2ToLCD) {
+       SetOEMLCDDelay(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+  }
+  if (SiS_VBInfo & SetCRT2ToTV) {
+       SetOEMTVDelay(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       if(SiS_IF_DEF_LVDS==0) {
+       		SetOEMAntiFlicker(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+    		SetOEMPhaseIncr(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       		SetOEMYFilter(HwDeviceExtension,BaseAddr,ROMAddr,ModeNo,ModeIdIndex);
+       }
+  }
 }
 #endif
+
+
diff --git a/drivers/video/sis/init301.h b/drivers/video/sis/init301.h
index 557a7cd7605d..6d24c931b7e5 100644
--- a/drivers/video/sis/init301.h
+++ b/drivers/video/sis/init301.h
@@ -7,217 +7,308 @@
 #include "vgatypes.h"
 #include "vstruct.h"
 
+#ifdef TC
+#include <stdio.h>
+#include <string.h>
+#include <conio.h>
+#include <dos.h>
+#include <stdlib.h>
+#endif
+
+#ifdef LINUX_XF86
+#include "xf86.h"
+#include "xf86Pci.h"
+#include "xf86PciInfo.h"
+#include "sis.h"
+#include "sis_regs.h"
+#endif
+
+#ifdef LINUX_KERNEL
 #include <asm/io.h>
 #include <linux/types.h>
 #include <linux/sisfb.h>
+#endif
+
+#ifdef WIN2000
+#include <stdio.h>
+#include <string.h>
+#include <miniport.h>
+#include "dderror.h"
+#include "devioctl.h"
+#include "miniport.h"
+#include "ntddvdeo.h"
+#include "video.h"
+#include "sisv.h"
+#endif
+
+USHORT   SiS_SetFlag;
+USHORT   SiS_RVBHCFACT,SiS_RVBHCMAX,SiS_RVBHRS;
+USHORT   SiS_VGAVT,SiS_VGAHT;
+USHORT   SiS_VT,SiS_HT;
+USHORT   SiS_VGAVDE,SiS_VGAHDE;
+USHORT   SiS_VDE,SiS_HDE;
+USHORT   SiS_NewFlickerMode,SiS_RY1COE,SiS_RY2COE,SiS_RY3COE,SiS_RY4COE;
+USHORT   SiS_LCDHDES,SiS_LCDVDES;
+USHORT   SiS_DDC_Port, SiS_DDC_Index,SiS_DDC_Data, SiS_DDC_Clk;
+USHORT   SiS_DDC_DataShift, SiS_DDC_DeviceAddr, SiS_DDC_Flag;
+USHORT   SiS_DDC_ReadAddr, SiS_DDC_Buffer;
+
+USHORT   Panel800x600,   Panel1024x768,  Panel1280x1024, Panel1600x1200;
+USHORT   Panel1280x960,  Panel1400x1050, Panel320x480,   Panel1152x768;
+USHORT   Panel1280x768,  Panel1024x600,  Panel640x480,   Panel1152x864;
+USHORT   PanelMax, PanelMinLVDS, PanelMin301;
+
+USHORT   SiS_ChrontelInit;
+
+extern   USHORT   SiS_CRT1Mode;
+extern   USHORT   SiS_P3c4,SiS_P3d4;
+extern   USHORT   SiS_P3ca;
+extern   USHORT   SiS_P3c9;
+extern   USHORT   SiS_P3da;
+extern   USHORT   SiS_Part1Port,SiS_Part2Port;
+extern   USHORT   SiS_Part3Port,SiS_Part4Port,SiS_Part5Port;
+extern   USHORT   SiS_MDA_DAC[];
+extern   USHORT   SiS_CGA_DAC[];
+extern   USHORT   SiS_EGA_DAC[];
+extern   USHORT   SiS_VGA_DAC[];
+extern   USHORT   SiS_ModeType;
+extern   USHORT   SiS_SelectCRT2Rate;
+extern   USHORT   SiS_IF_DEF_LVDS;
+extern   USHORT   SiS_IF_DEF_TRUMPION;
+extern   USHORT   SiS_IF_DEF_CH70xx;
+extern   USHORT   SiS_Backup70xx;
+extern   USHORT   SiS_IF_DEF_HiVision;
+extern   USHORT   SiS_IF_DEF_DSTN;   /*add for dstn*/
+extern   USHORT   SiS_IF_DEF_FSTN;   /*add for fstn*/
+extern   USHORT   SiS_VBInfo;
+extern   USHORT   SiS_VBType;
+extern   USHORT   SiS_VBExtInfo;
+extern   USHORT   SiS_LCDResInfo;
+extern   USHORT   SiS_LCDTypeInfo;
+extern   USHORT   SiS_LCDInfo;
+extern   USHORT   SiS_HiVision;
+
+extern   BOOLEAN  SiS_SearchVBModeID(UCHAR *RomAddr, USHORT *);
+
+BOOLEAN  SiS_Is301B(USHORT BaseAddr);
+BOOLEAN  SiS_IsDisableCRT2(USHORT BaseAddr);
+BOOLEAN  SiS_IsVAMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsDualEdge(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_CRT2IsLCD(USHORT BaseAddr);
+
+void     SiS_SetDefCRT2ExtRegs(USHORT BaseAddr);
+USHORT   SiS_GetRatePtrCRT2(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
+BOOLEAN  SiS_AdjustCRT2Rate(UCHAR *ROMAddr,USHORT ModeNo,USHORT MODEIdIndex,USHORT RefreshRateTableIndex,USHORT *i);
+void     SiS_SaveCRT2Info(USHORT ModeNo);
+void     SiS_GetCRT2Data(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                         PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetCRT2DataLVDS(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                             PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetCRT2PtrA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                         USHORT *CRT2Index,USHORT *ResIndex);
+void     SiS_GetCRT2Part2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		             USHORT RefreshRateTableIndex,USHORT *CRT2Index,
+		             USHORT *ResIndex);
+void     SiS_GetCRT2Data301(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                            PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_GetResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_GetCRT2ResInfo(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetRAMDAC2DATA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                            PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetCRT2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+		        USHORT *CRT2Index,USHORT *ResIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT2ModeRegs(USHORT BaseAddr,USHORT ModeNo,USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO );
+void     SiS_SetHiVision(USHORT BaseAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+void     SiS_GetLVDSDesData(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                            PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT2Offset(USHORT Part1Port,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                           USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_GetOffset(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                       PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_GetColorDepth(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+USHORT   SiS_GetMCLK(UCHAR *ROMAddr, PSIS_HW_DEVICE_INFO HwDeviceExtension);
+USHORT   SiS_CalcDelayVB(void);
+USHORT   SiS_GetVCLK2Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT2Sync(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT RefreshRateTableIndex,
+                         PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetRegANDOR(USHORT Port,USHORT Index,USHORT DataAND,USHORT DataOR);
+void     SiS_SetRegOR(USHORT Port,USHORT Index,USHORT DataOR);
+void     SiS_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND);
+USHORT   SiS_GetVGAHT2(void);
+void     SiS_SetGroup2(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                       USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetGroup3(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                       PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetGroup4(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                       USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetGroup5(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_SetCRT2VCLK(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                         USHORT RefreshRateTableIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_EnableCRT2(void);
+void     SiS_LoadDAC2(UCHAR *ROMAddr,USHORT Part5Port,USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_WriteDAC2(USHORT Pdata,USHORT dl, USHORT ah, USHORT al, USHORT dh);
+void     SiS_GetVBInfo301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                          PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_GetLCDResInfo(UCHAR *ROMAddr,USHORT P3d4,USHORT ModeNo,USHORT ModeIdIndex);
+BOOLEAN  SiS_BridgeIsOn(USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
+BOOLEAN  SiS_BridgeIsEnable(USHORT BaseAddr,PSIS_HW_DEVICE_INFO);
+BOOLEAN  SiS_BridgeInSlave(void);
+void     SiS_PresetScratchregister(USHORT SiS_P3d4,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetTVSystem(VOID);
+void     SiS_LongWait(VOID);
+USHORT   SiS_GetQueueConfig(VOID);
+void     SiS_VBLongWait(VOID);
+USHORT   SiS_GetVCLKLen(UCHAR *ROMAddr);
+void     SiS_WaitVBRetrace(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_WaitRetrace1(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_WaitRetrace2(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetCRT2ECLK(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                         PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetLVDSDesPtr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                           USHORT *PanelIndex,USHORT *ResIndex,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_GetLVDSDesPtrA(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+                            USHORT *PanelIndex,USHORT *ResIndex);
+void     SiS_SetTPData(VOID);
+void     SiS_ModCRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+			 PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN  SiS_GetLVDSCRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,
+		       USHORT *ResInfo,USHORT *DisplayType);
+void     SiS_SetCHTVReg(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex);
+void     SiS_GetCHTVRegPtr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex);
+void     SiS_SetCH700x(USHORT tempax);
+USHORT   SiS_GetCH700x(USHORT tempax);
+void     SiS_SetCH701x(USHORT tempax);
+USHORT   SiS_GetCH701x(USHORT tempax);
+void     SiS_SetCH70xx(USHORT tempax);
+USHORT   SiS_GetCH70xx(USHORT tempax);
+void     SiS_SetCH70xxANDOR(USHORT tempax,USHORT tempbh);
+void     SiS_SetSwitchDDC2(void);
+USHORT   SiS_SetStart(void);
+USHORT   SiS_SetStop(void);
+void     SiS_DDC2Delay(USHORT delaytime);
+USHORT   SiS_SetSCLKLow(void);
+USHORT   SiS_SetSCLKHigh(void);
+USHORT   SiS_ReadDDC2Data(USHORT tempax);
+USHORT   SiS_WriteDDC2Data(USHORT tempax);
+USHORT   SiS_CheckACK(void);
+#ifdef SIS315H
+void     SiS_OEM310Setting(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+                           UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void     SiS_OEMLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+                    UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+#endif
+#ifdef SIS300
+void     SiS_OEM300Setting(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+                           UCHAR *ROMAddr,USHORT ModeNo);
+#endif
+USHORT   GetRevisionID(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_LowModeStuff(USHORT ModeNo,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+
+BOOLEAN  SiS_GetLCDResInfo301(UCHAR *ROMAddr,USHORT SiS_P3d4, USHORT ModeNo, USHORT ModeIdIndex,
+                             PSIS_HW_DEVICE_INFO HwDeviceExtension);
+/* void    SiS_CHACRT1CRTC(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                        USHORT RefreshRateTableIndex); */
+BOOLEAN  SiS_GetLCDACRT1Ptr(UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+		   USHORT RefreshRateTableIndex,USHORT *ResInfo,
+		   USHORT *DisplayType);
+/* 310 series OEM */
+USHORT 	GetLCDPtrIndex (void);
+USHORT  GetTVPtrIndex(void);
+void    SetDelayComp(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+             	     UCHAR *ROMAddr,USHORT ModeNo);
+void    SetAntiFlicker(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+               	       UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void    SetEdgeEnhance (PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+                        UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void    SetYFilter(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+           	   UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void	SetPhaseIncr(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+             	     UCHAR *ROMAddr,USHORT ModeNo);
+/* 300 series OEM */
+USHORT 	GetOEMLCDPtr(PSIS_HW_DEVICE_INFO HwDeviceExtension, int Flag);
+USHORT 	GetOEMTVPtr(void);
+void	SetOEMTVDelay(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+              	      UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void	SetOEMLCDDelay(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+               	       UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void	SetOEMAntiFlicker(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                          USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void  	SetOEMPhaseIncr(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+                        UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+void	SetOEMYFilter(PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT BaseAddr,
+              	      UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex);
+
+extern   void     SiS_SetReg1(USHORT, USHORT, USHORT);
+extern   void     SiS_SetReg3(USHORT, USHORT);
+extern   UCHAR    SiS_GetReg1(USHORT, USHORT);
+extern   UCHAR    SiS_GetReg2(USHORT);
+extern   BOOLEAN  SiS_SearchModeID(UCHAR *ROMAddr, USHORT *ModeNo,USHORT *ModeIdIndex);
+extern   BOOLEAN  SiS_GetRatePtr(ULONG, USHORT);
+extern   void     SiS_SetReg4(USHORT, ULONG);
+extern   ULONG    SiS_GetReg3(USHORT);
+extern   void     SiS_DisplayOff(void);
+extern   void     SiS_DisplayOn(void);
+extern   UCHAR    SiS_GetModePtr(UCHAR *ROMAddr, USHORT ModeNo,USHORT ModeIdIndex);
+#ifdef SIS315H
+extern   UCHAR    SiS_Get310DRAMType(UCHAR *ROMAddr,PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#endif
+
+BOOLEAN  SiS_SetCRT2Group301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,
+                             PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_SetGroup1(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                       PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);
+void     SiS_SetGroup1_LVDS(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                            PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);
+void     SiS_SetGroup1_LCDA(USHORT  BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                            PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);/*301b*/
+void     SiS_SetGroup1_301(USHORT BaseAddr,UCHAR *ROMAddr,USHORT ModeNo,USHORT ModeIdIndex,
+                           PSIS_HW_DEVICE_INFO HwDeviceExtension,USHORT RefreshRateTableIndex);
+#ifdef SIS300
+void     SiS_SetCRT2FIFO_300(UCHAR *ROMAddr,USHORT ModeNo,
+                             PSIS_HW_DEVICE_INFO HwDeviceExtension);
+#endif
+#ifdef SIS315H
+void     SiS_SetCRT2FIFO_310(UCHAR *ROMAddr,USHORT ModeNo,
+                             PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_CRT2AutoThreshold(USHORT  BaseAddr);
+#endif
+BOOLEAN  SiS_GetLCDDDCInfo(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+void     SiS_UnLockCRT2(PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+void     SiS_LockCRT2(PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+void     SiS_DisableBridge(PSIS_HW_DEVICE_INFO,USHORT  BaseAddr);
+void     SiS_EnableBridge(PSIS_HW_DEVICE_INFO,USHORT BaseAddr);
+void     SiS_SetPanelDelay(UCHAR* ROMAddr,PSIS_HW_DEVICE_INFO,USHORT DelayTime);
+void     SiS_ShortDelay(USHORT delay);
+void     SiS_LongDelay(USHORT delay);
+void     SiS_GenericDelay(USHORT delay);
+void     SiS_VBWait(void);
+
+/* TW: New functions (with temporary names) */
+void     SiS_Chrontel701xOn(void);
+void     SiS_Chrontel701xOn2(PSIS_HW_DEVICE_INFO HwDeviceExtension,
+                           USHORT BaseAddr);
+void     SiS_Chrontel701xOff(void);
+void     SiS_Chrontel701xOff2(void);
+void     SiS_ChrontelFlip0x48(void);
+void     SiS_ChrontelDoSomething4(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_ChrontelDoSomething3(USHORT ModeNo, PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_ChrontelDoSomething2(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_ChrontelDoSomething1(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_WeHaveBacklightCtrl(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+#if 0
+BOOLEAN  SiS_IsSomethingCR5F(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+#endif
+BOOLEAN  SiS_IsYPbPr(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsTVOrSomething(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+BOOLEAN  SiS_IsLCDOrLCDA(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_SetCHTVForLCD(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr);
+void     SiS_Chrontel19f2(void);
+BOOLEAN  SiS_CR36BIOSWord23b(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_CR36BIOSWord23d(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+BOOLEAN  SiS_IsSR13_CR30(PSIS_HW_DEVICE_INFO HwDeviceExtension);
 
-USHORT SiS_SetFlag;
-USHORT SiS_RVBHCFACT, SiS_RVBHCMAX, SiS_RVBHRS;
-USHORT SiS_VGAVT, SiS_VGAHT;
-USHORT SiS_VT, SiS_HT;
-USHORT SiS_VGAVDE, SiS_VGAHDE;
-USHORT SiS_VDE, SiS_HDE;
-USHORT SiS_NewFlickerMode, SiS_RY1COE, SiS_RY2COE, SiS_RY3COE, SiS_RY4COE;
-USHORT SiS_LCDHDES, SiS_LCDVDES;
-USHORT SiS_DDC_Port;
-USHORT SiS_DDC_Index;
-USHORT SiS_DDC_DataShift;
-USHORT SiS_DDC_DeviceAddr;
-USHORT SiS_DDC_Flag;
-USHORT SiS_DDC_ReadAddr;
-USHORT SiS_DDC_Buffer;
-
-extern USHORT SiS_CRT1Mode;
-extern USHORT SiS_P3c4, SiS_P3d4;
-/*extern   USHORT      SiS_P3c0,SiS_P3ce,SiS_P3c2;*/
-extern USHORT SiS_P3ca;
-/*extern   USHORT      SiS_P3c6,SiS_P3c7,SiS_P3c8;*/
-extern USHORT SiS_P3c9;
-extern USHORT SiS_P3da;
-extern USHORT SiS_Part1Port, SiS_Part2Port;
-extern USHORT SiS_Part3Port, SiS_Part4Port, SiS_Part5Port;
-extern USHORT SiS_MDA_DAC[];
-extern USHORT SiS_CGA_DAC[];
-extern USHORT SiS_EGA_DAC[];
-extern USHORT SiS_VGA_DAC[];
-extern USHORT SiS_ModeType;
-extern USHORT SiS_SelectCRT2Rate;
-extern USHORT SiS_IF_DEF_LVDS;
-extern USHORT SiS_IF_DEF_TRUMPION;
-extern USHORT SiS_IF_DEF_CH7005;
-extern USHORT SiS_IF_DEF_HiVision;
-extern USHORT SiS_IF_DEF_DSTN;	/*add for dstn */
-extern USHORT SiS_VBInfo;
-extern USHORT SiS_VBType;	/*301b */
-extern USHORT SiS_LCDResInfo;
-extern USHORT SiS_LCDTypeInfo;
-extern USHORT SiS_LCDInfo;
-extern BOOLEAN SiS_SearchVBModeID (ULONG, USHORT);
-extern BOOLEAN SiS_Is301B (USHORT BaseAddr);	/*301b */
-extern BOOLEAN SiS_IsDisableCRT2 (USHORT BaseAddr);
-extern BOOLEAN SiS_IsVAMode (USHORT BaseAddr);
-extern BOOLEAN SiS_IsDualEdge (USHORT BaseAddr);
-/*end 301b*/
-
-void SiS_SetDefCRT2ExtRegs (USHORT BaseAddr);
-USHORT SiS_GetRatePtrCRT2 (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-BOOLEAN SiS_AjustCRT2Rate (ULONG ROMAddr, USHORT ModeNo, USHORT MODEIdIndex,
-			   USHORT RefreshRateTableIndex, USHORT * i);
-void SiS_SaveCRT2Info (USHORT ModeNo);
-void SiS_GetCRT2Data (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		      USHORT RefreshRateTableIndex);
-void SiS_GetCRT2DataLVDS (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			  USHORT RefreshRateTableIndex);
-void SiS_GetCRT2PtrA (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		      USHORT RefreshRateTableIndex, USHORT * CRT2Index, USHORT * ResIndex);	/*301b */
-void SiS_GetCRT2Data301 (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			 USHORT RefreshRateTableIndex);
-USHORT SiS_GetResInfo (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-void SiS_GetCRT2ResInfo (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-void SiS_GetRAMDAC2DATA (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			 USHORT RefreshRateTableIndex);
-void SiS_GetCRT2Ptr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		     USHORT RefreshRateTableIndex, USHORT * CRT2Index,
-		     USHORT * ResIndex);
-void SiS_SetCRT2ModeRegs (USHORT BaseAddr, USHORT ModeNo, PSIS_HW_DEVICE_INFO);
-
-void SiS_GetLVDSDesData (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			 USHORT RefreshRateTableIndex);
-void SiS_SetCRT2Offset (USHORT Part1Port, ULONG ROMAddr, USHORT ModeNo,
-			USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
-			PSIS_HW_DEVICE_INFO HwDeviceExtension);
-USHORT SiS_GetOffset (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		      USHORT RefreshRateTableIndex,
-		      PSIS_HW_DEVICE_INFO HwDeviceExtension);
-USHORT SiS_GetColorDepth (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-USHORT SiS_GetVCLK (ULONG ROMAddr, USHORT ModeNo);
-USHORT SiS_GetVCLKPtr (ULONG ROMAddr, USHORT ModeNo);
-USHORT SiS_GetColorTh (ULONG ROMAddr);
-USHORT SiS_GetMCLK (ULONG ROMAddr);
-USHORT SiS_GetMCLKPtr (ULONG ROMAddr);
-USHORT SiS_GetDRAMType (ULONG ROMAddr);
-USHORT SiS_CalcDelayVB (void);
-extern USHORT SiS_GetVCLK2Ptr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			       USHORT RefreshRateTableIndex,
-			       PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_SetCRT2Sync (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		      USHORT RefreshRateTableIndex);
-void SiS_SetRegANDOR (USHORT Port, USHORT Index, USHORT DataAND, USHORT DataOR);
-void SiS_SetRegOR (USHORT Port, USHORT Index, USHORT DataOR);
-void SiS_SetRegAND (USHORT Port, USHORT Index, USHORT DataAND);
-USHORT SiS_GetVGAHT2 (void);
-void SiS_SetGroup2 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		    USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
-		    PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_SetGroup3 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		    USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_SetGroup4 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		    USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
-		    PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_SetGroup5 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		    USHORT ModeIdIndex);
-void SiS_SetCRT2VCLK (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		      USHORT ModeIdIndex, USHORT RefreshRateTableIndex,
-		      PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_EnableCRT2 (void);
-void SiS_LoadDAC2 (ULONG ROMAddr, USHORT Part5Port, USHORT ModeNo,
-		   USHORT ModeIdIndex);
-void SiS_WriteDAC2 (USHORT Pdata, USHORT dl, USHORT ah, USHORT al, USHORT dh);
-void SiS_GetVBInfo301 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		       USHORT ModeIdIndex,
-		       PSIS_HW_DEVICE_INFO HwDeviceExtension);
-BOOLEAN SiS_GetLCDResInfo (ULONG ROMAddr, USHORT P3d4, USHORT ModeNo,
-			   USHORT ModeIdIndex);
-BOOLEAN SiS_BridgeIsOn (USHORT BaseAddr);
-BOOLEAN SiS_BridgeIsEnable (USHORT BaseAddr, PSIS_HW_DEVICE_INFO);
-BOOLEAN SiS_BridgeInSlave (void);
-/*void     SiS_PresetScratchregister(USHORT P3d4);*/
-void SiS_PresetScratchregister (USHORT SiS_P3d4,
-				PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_SetTVSystem (VOID);
-void SiS_LongWait (VOID);
-USHORT SiS_GetQueueConfig (VOID);
-void SiS_VBLongWait (VOID);
-USHORT SiS_GetVCLKLen (ULONG ROMAddr);
-BOOLEAN SiS_WaitVBRetrace (USHORT BaseAddr);
-void SiS_SetCRT2ECLK (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		      USHORT RefreshRateTableIndex,
-		      PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_GetLVDSDesPtr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			USHORT RefreshRateTableIndex, USHORT * PanelIndex,
-			USHORT * ResIndex);
-void SiS_GetLVDSDesPtrA (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			 USHORT RefreshRateTableIndex, USHORT * PanelIndex,
-			 USHORT * ResIndex);	/*301b */
-void SiS_SetTPData (VOID);
-void SiS_ModCRT1CRTC (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		      USHORT RefreshRateTableIndex);
-extern BOOLEAN SiS_GetLVDSCRT1Ptr (ULONG ROMAddr, USHORT ModeNo,
-				   USHORT ModeIdIndex,
-				   USHORT RefreshRateTableIndex,
-				   USHORT * ResInfo, USHORT * DisplayType);
-void SiS_SetCHTVReg (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-		     USHORT RefreshRateTableIndex);
-void SiS_SetCHTVRegANDOR (USHORT tempax, USHORT tempbh);
-void SiS_GetCHTVRegPtr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex,
-			USHORT RefreshRateTableIndex);
-void SiS_SetCH7005 (USHORT tempax);
-USHORT SiS_GetCH7005 (USHORT tempax);
-void SiS_SetSwitchDDC2 (void);
-void SiS_SetStart (void);
-void SiS_SetStop (void);
-void SiS_DDC2Delay (void);
-void SiS_SetSCLKLow (void);
-void SiS_SetSCLKHigh (void);
-USHORT SiS_ReadDDC2Data (USHORT tempax);
-USHORT SiS_WriteDDC2Data (USHORT tempax);
-USHORT SiS_CheckACK (void);
-void SiS_OEM310Setting (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-			ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-void SiS_OEM300Setting (PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT BaseAddr,
-			ULONG ROMAddr, USHORT ModeNo);
-USHORT GetRevisionID (PSIS_HW_DEVICE_INFO HwDeviceExtension);
-extern void SiS_SetReg1 (USHORT, USHORT, USHORT);
-extern void SiS_SetReg3 (USHORT, USHORT);
-extern UCHAR SiS_GetReg1 (USHORT, USHORT);
-extern UCHAR SiS_GetReg2 (USHORT);
-extern BOOLEAN SiS_SearchModeID (ULONG ROMAddr, USHORT ModeNo,
-				 USHORT * ModeIdIndex);
-extern BOOLEAN SiS_GetRatePtr (ULONG, USHORT);
-extern void SiS_SetReg4 (USHORT, ULONG);
-extern ULONG SiS_GetReg3 (USHORT);
-extern void SiS_DisplayOff (void);
-extern void SiS_CRT2AutoThreshold (USHORT BaseAddr);
-extern void SiS_DisplayOn (void);
-extern UCHAR SiS_GetModePtr (ULONG ROMAddr, USHORT ModeNo, USHORT ModeIdIndex);
-extern UCHAR SiS_Get310DRAMType (ULONG ROMAddr);
-
-BOOLEAN SiS_SetCRT2Group301 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-			     PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_SetGroup1 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-		    USHORT ModeIdIndex, PSIS_HW_DEVICE_INFO HwDeviceExtension,
-		    USHORT RefreshRateTableIndex);
-void SiS_SetGroup1_LVDS (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-			 USHORT ModeIdIndex,
-			 PSIS_HW_DEVICE_INFO HwDeviceExtension,
-			 USHORT RefreshRateTableIndex);
-void SiS_SetGroup1_LCDA (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-			 USHORT ModeIdIndex,
-			 PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT RefreshRateTableIndex);	/*301b */
-void SiS_SetGroup1_301 (USHORT BaseAddr, ULONG ROMAddr, USHORT ModeNo,
-			USHORT ModeIdIndex,
-			PSIS_HW_DEVICE_INFO HwDeviceExtension,
-			USHORT RefreshRateTableIndex);
-void SiS_SetCRT2FIFO (USHORT Part1Port, ULONG ROMAddr, USHORT ModeNo,
-		      PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_SetCRT2FIFO2 (USHORT Part1Port, ULONG ROMAddr, USHORT ModeNo,
-		       PSIS_HW_DEVICE_INFO HwDeviceExtension);
-BOOLEAN SiS_GetLCDDDCInfo (PSIS_HW_DEVICE_INFO HwDeviceExtension);
-void SiS_UnLockCRT2 (PSIS_HW_DEVICE_INFO, USHORT BaseAddr);
-void SiS_LockCRT2 (PSIS_HW_DEVICE_INFO, USHORT BaseAddr);
-void SiS_DisableBridge (PSIS_HW_DEVICE_INFO, USHORT BaseAddr);
-void SiS_EnableBridge (PSIS_HW_DEVICE_INFO, USHORT BaseAddr);
-void SiS_SetPanelDelay (USHORT DelayTime);
-void SiS_LCD_Wait_Time (UCHAR DelayTime);
+/* TW end */
 
 #endif
diff --git a/drivers/video/sis/initdef.h b/drivers/video/sis/initdef.h
index 4d6247fd479a..a4b344e6ab4d 100644
--- a/drivers/video/sis/initdef.h
+++ b/drivers/video/sis/initdef.h
@@ -1,4 +1,6 @@
 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/initdef.h,v 1.4 2000/12/02 01:16:17 dawes Exp $ */
+
+
 #ifndef _INITDEF_
 #define _INITDEF_
 
@@ -6,18 +8,21 @@
 #define SiS540                  0x5300
 #define SiS630                  0x6300
 #define SiS730                  0x6300
-#define VB_SIS301		0x0001	/*301b */
-#define VB_SIS301B		0x0002
-#define VB_SIS302B		0x0004
-#define  VB_NoLCD		0x8000
 
-/*end 301b*/
+/* SiS_VBType */
+#define VB_SIS301	      	0x0001
+#define VB_SIS301B        	0x0002
+#define VB_SIS302B        	0x0004
+#define VB_SIS301LV     	0x0008
+#define VB_SIS302LV     	0x0010
+#define VB_NoLCD        	0x8000
+#define VB_SIS301BLV302BLV      (VB_SIS301B|VB_SIS302B|VB_SIS301LV|VB_SIS302LV)
+
 #define CRT1Len                 17
 #define LVDSCRT1Len             15
 #define CHTVRegDataLen          5
 
-#define ModeInfoFlag            0x07
-#define IsTextMode              0x07
+/* SiS_ModeType */
 #define ModeText                0x00
 #define ModeCGA                 0x01
 #define ModeEGA                 0x02
@@ -27,10 +32,14 @@
 #define Mode24Bpp               0x06
 #define Mode32Bpp               0x07
 
+#define ModeInfoFlag            0x07
+#define IsTextMode              0x07
+
 #define DACInfoFlag             0x18
 #define MemoryInfoFlag          0x1E0
 #define MemorySizeShift         0x05
 
+/* modeflag */
 #define Charx8Dot               0x0200
 #define LineCompareOff          0x0400
 #define CRT2Mode                0x0800
@@ -38,16 +47,17 @@
 #define NoSupportSimuTV         0x2000
 #define DoubleScanMode          0x8000
 
+/* Infoflag */
 #define SupportAllCRT2          0x0078
 #define SupportTV               0x0008
 #define SupportHiVisionTV       0x0010
 #define SupportLCD              0x0020
-#define SupportRAMDAC2          0x0040
+#define SupportRAMDAC2          0x0040  
 #define NoSupportTV             0x0070
 #define NoSupportHiVisionTV     0x0060
 #define NoSupportLCD            0x0058
 #define SupportCHTV 		0x0800
-#define SupportTV1024           0x0800	/*301b */
+#define SupportTV1024           0x0800  /*301b*/            
 #define InterlaceMode           0x0080
 #define SyncPP                  0x0000
 #define SyncPN                  0x4000
@@ -59,7 +69,8 @@
 #define ECLKindex3              0x0300
 #define ECLKindex4              0x0400
 
-#define SetSimuScanMode         0x0001
+/* VBInfo */
+#define SetSimuScanMode         0x0001   /* CR 30 */
 #define SwitchToCRT2            0x0002
 #define SetCRT2ToTV             0x009C
 #define SetCRT2ToAVIDEO         0x0004
@@ -68,30 +79,93 @@
 #define SetCRT2ToLCD            0x0020
 #define SetCRT2ToRAMDAC         0x0040
 #define SetCRT2ToHiVisionTV     0x0080
-#define SetNTSCTV               0x0000
+#define SetNTSCTV               0x0000   /* CR 31 */
 #define SetPALTV                0x0100
 #define SetInSlaveMode          0x0200
 #define SetNotSimuMode          0x0400
 #define SetNotSimuTVMode        0x0400
 #define SetDispDevSwitch        0x0800
 #define LoadDACFlag             0x1000
+#define SetCHTVOverScan  	0x1000  /* TW: Re-defined (from 0x8000) */
 #define DisableCRT2Display      0x2000
+#define CRT2DisplayFlag         0x2000
 #define DriverMode              0x4000
-#define HotKeySwitch            0x8000
-#define SetCHTVOverScan  	0x8000
-#define SetCRT2ToLCDA		0x8000	/*301b */
+#define HotKeySwitch            0x8000  /* TW: ? */
+#define SetCRT2ToLCDA           0x8000
 #define PanelRGB18Bit           0x0100
 #define PanelRGB24Bit           0x0000
 
-#define TVOverScan              0x10
+#define TVOverScan              0x10    /* Bit in CR35 (300 series only) */
 #define TVOverScanShift         4
 #define ClearBufferFlag         0x20
-#define EnableDualEdge 		0x01	/*301b */
-#define SetToLCDA		0x02
+
+/* CR32 (Newer 630, and 310/325 series)
+
+   [0]   VB connected with CVBS
+   [1]   VB connected with SVHS
+   [2]   VB connected with SCART
+   [3]   VB connected with LCD
+   [4]   VB connected with CRT2 (secondary VGA)
+   [5]   CRT1 monitor is connected
+   [6]   VB connected with Hi-Vision TV
+   [7]   VB connected with DVI combo connector
+
+
+   CR37
+
+   [0]   Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS)
+   [3:1] External chip
+         300 series:
+	    001   SiS301 (never seen)
+	    010   LVDS
+	    011   LVDS + Tumpion Zurac
+	    100   LVDS + Chrontel 7005
+	    110   Chrontel 7005
+	  310/325 series
+	    001   SiS30x (never seen)
+	    010   LVDS
+	    011   LVDS + Chrontel 7019
+	  All other combinations reserved
+   [4]    LVDS: Expanding(0)/Non-expanding(1) LCD display
+          30x:  SiS30x(0)/LCD monitor(1) scaling display
+   [5]    LCD polarity select
+          0: VESA DMT Standard
+	  1: EDID 2.x defined
+   [6]    LCD honrizontal polarity select
+          0: High active
+	  1: Low active
+   [7]    LCD vertical polarity select
+          0: High active
+	  1: Low active
+*/
+
+#define EnableDualEdge 		0x01   /* CR38 (310/325 series) */
+/* #define PAL_NTSC             0x01      (only on 315PRO) */
+#define SetToLCDA		0x02   /* TW: LCD channel A (302 only) */
+#define SetYPbPr                0x10   /* TW: ? */
+#define EnablePALMN             0x40
+#define EnablePALN              0x80
+
+/* CR79 (310/325 series only)
+   [3-0] Notify driver
+         0001 Mode Switch event (set by BIOS)
+	 0010 Epansion On/Off event
+	 0011 TV UnderScan/OverScan event
+	 0100 Set Brightness event
+	 0101 Set Contrast event
+	 0110 Set Mute event
+	 0111 Set Volume Up/Down event
+   [4]   Enable Backlight Control by BIOS/driver (set by driver)
+   [5]   PAL/NTSC (set by BIOS)
+   [6]   Expansion On/Off (set by BIOS)
+   [7]   TV UnderScan/OverScan (set by BIOS)
+*/
+
 
 #define SetSCARTOutput          0x01
 #define BoardTVType             0x02
-#define  EnablePALMN		0x40
+
+/* SetFlag */
 #define ProgrammingCRT2         0x01
 #define TVSimuMode              0x02
 #define RPLLDIV2XO              0x04
@@ -100,35 +174,57 @@
 #define SetDispDevSwitchFlag    0x20
 #define CheckWinDos             0x40
 #define SetJDOSMode             0x80
+#define CRT2IsVGA	        0x80  /* TW: Not sure about this name... */
+
+/* LCDResInfo */
+#define Panel300_800x600        0x01	/* CR36 */
+#define Panel300_1024x768       0x02
+#define Panel300_1280x1024      0x03
+#define Panel300_1280x960       0x04
+#define Panel300_640x480        0x05
+#define Panel300_1024x600       0x06
+#define Panel300_1152x768       0x07
+/* #define Panel300_1600x1200      0x06  OLD */
+#define Panel300_320x480        0x08 	/* fstn - TW: This is fake, can be any */
+
+#define Panel310_800x600        0x01
+#define Panel310_1024x768       0x02
+#define Panel310_1280x1024      0x03
+#define Panel310_640x480        0x04
+#define Panel310_1024x600       0x05
+#define Panel310_1152x864       0x06
+#define Panel310_1280x960       0x07
+#define Panel310_1152x768       0x08
+#define Panel310_1400x1050      0x09
+#define Panel310_1280x768       0x0a
+#define Panel310_1600x1200      0x0b
+#define Panel310_320x480        0x0c           /* fstn - TW: This is fake, can be any */
 
-#define Panel800x600            0x01
-#define Panel1024x768           0x02
-#define Panel1280x1024          0x03
-#define Panel1280x960           0x04
-#define Panel640x480            0x05
-#define Panel1600x1200          0x06	/*301b */
-#define LCDRGB18Bit             0x01
 #define ExtChipType             0x0e
 #define ExtChip301              0x02
 #define ExtChipLVDS             0x04
 #define ExtChipTrumpion         0x06
 #define ExtChipCH7005           0x08
-#define ExtChipMitacTV          0x0a
+#define ExtChipMitacTV          0x0a            /* TW: Incorrect, 0x0a = Chrontel 7005 only */
+
+#define IsM650                  0x80   		/* TW: CR5F */
+
+/* LCDInfo */
+#define LCDRGB18Bit             0x01
+#define LCDNonExpandingShift    0x04
 #define LCDNonExpanding         0x10
-#define LCDNonExpandingShift    4
 #define LCDSync                 0x20
+/* TW: What is.. */        /*  0x100   */
 #define LCDSyncBit              0xe0
 #define LCDSyncShift            6
 
-#define DDC2DelayTime           300
-
-#define CRT2DisplayFlag         0x2000
 #define LCDDataLen              8
 #define HiTVDataLen             12
 #define TVDataLen               16
 #define SetPALTV                0x0100
-#define HalfDCLK                0x1000
+#define HalfDCLK                0x1000  /* modeflag */
 #define NTSCHT                  1716
+#define NTSC2HT                 1920
 #define NTSCVT                  525
 #define PALHT                   1728
 #define PALVT                   625
@@ -141,25 +237,23 @@
 
 #define VCLKStartFreq           25
 #define SoftDramType            0x80
-#define VCLK40                  0x04
-#define VCLK65                  0x09
-#define VCLK108_2               0x14
-#define LCDRGB18Bit             0x01
+
+#define VCLK40                  0x04   /* Index in VCLKData array */
+#define VCLK65                  0x09   /* Index in VCLKData array */
+#define VCLK108_2               0x14   /* Index in VCLKData array */
+#define TVVCLKDIV2              0x21   /* Indices in (VB)VCLKData arrays */
+#define TVVCLK                  0x22
+#define HiTVVCLKDIV2            0x23
+#define HiTVVCLK                0x24
+#define HiTVSimuVCLK            0x25
+#define HiTVTextVCLK            0x26
+
 #define LoadDACFlag             0x1000
 #define AfterLockCRT2           0x4000
 #define SetCRT2ToAVIDEO         0x0004
 #define SetCRT2ToSCART          0x0010
 #define Ext2StructSize          5
 
-#define TVVCLKDIV2              0x021
-#define TVVCLK                  0x022
-
-#define HiTVVCLKDIV2            0x023
-#define HiTVVCLK                0x024
-#define HiTVSimuVCLK            0x025
-#define HiTVTextVCLK            0x026
-#define SwitchToCRT2            0x0002
-#define LCDVESATiming           0x08
 #define SetSCARTOutput          0x01
 #define AVIDEOSense             0x01
 #define SVIDEOSense             0x02
@@ -172,14 +266,13 @@
 #define HotPlugFunction         0x08
 #define StStructSize            0x06
 
-#define SIS_CRT2_PORT_04        0x04 - 0x030
+#define SIS_CRT2_PORT_04        0x04 - 0x30
 #define SIS_CRT2_PORT_10        0x10 - 0x30
 #define SIS_CRT2_PORT_12        0x12 - 0x30
 #define SIS_CRT2_PORT_14        0x14 - 0x30
 
-#define LCDNonExpanding         0x10
 #define ADR_CRT2PtrData         0x20E
-#define offset_Zurac            0x210
+#define offset_Zurac            0x210   /* TW: Trumpion Zurac data pointer */
 #define ADR_LVDSDesPtrData      0x212
 #define ADR_LVDSCRT1DataPtr     0x214
 #define ADR_CHTVVCLKPtr         0x216
@@ -198,26 +291,26 @@
 #define ModeSettingAddr         0x53
 
 #define SelectCRT1Rate          0x4
+        
+#define _PanelType00             0x00
+#define _PanelType01             0x08
+#define _PanelType02             0x10
+#define _PanelType03             0x18
+#define _PanelType04             0x20
+#define _PanelType05             0x28
+#define _PanelType06             0x30
+#define _PanelType07             0x38
+#define _PanelType08             0x40
+#define _PanelType09             0x48
+#define _PanelType0A             0x50
+#define _PanelType0B             0x58
+#define _PanelType0C             0x60
+#define _PanelType0D             0x68
+#define _PanelType0E             0x70
+#define _PanelType0F             0x78
 
-#define _PanelType00            0x00
-#define _PanelType01            0x08
-#define _PanelType02            0x10
-#define _PanelType03            0x18
-#define _PanelType04            0x20
-#define _PanelType05            0x28
-#define _PanelType06            0x30
-#define _PanelType07            0x38
-#define _PanelType08            0x40
-#define _PanelType09            0x48
-#define _PanelType0A            0x50
-#define _PanelType0B            0x58
-#define _PanelType0C            0x60
-#define _PanelType0D            0x68
-#define _PanelType0E            0x70
-#define _PanelType0F            0x78
-
-#define PRIMARY_VGA		0	/* 1: SiS is primary vga 0:SiS is secondary vga */
-#define BIOSIDCodeAddr          0x235
+#define PRIMARY_VGA       	0     /* 1: SiS is primary vga 0:SiS is secondary vga */
+#define BIOSIDCodeAddr          0x235  /* TW: Offsets to ptrs in BIOS image */
 #define OEMUtilIDCodeAddr       0x237
 #define VBModeIDTableAddr       0x239
 #define OEMTVPtrAddr            0x241
@@ -258,55 +351,57 @@
 
 #define OEMLCDPanelIDSupport    0x0080
 
-/* =============================================================
-   for 310
-============================================================== */
-#define SoftDRAMType      	0x80
-#define SoftSetting_OFFSET	0x52
-#define SR07_OFFSET		0x7C
-#define SR15_OFFSET		0x7D
-#define SR16_OFFSET		0x81
-#define SR17_OFFSET		0x85
-#define SR19_OFFSET		0x8D
-#define SR1F_OFFSET		0x99
-#define SR21_OFFSET		0x9A
-#define SR22_OFFSET		0x9B
-#define SR23_OFFSET		0x9C
-#define SR24_OFFSET		0x9D
-#define SR25_OFFSET		0x9E
-#define SR31_OFFSET		0x9F
-#define SR32_OFFSET		0xA0
-#define SR33_OFFSET		0xA1
-
-#define CR40_OFFSET		0xA2
-#define SR25_1_OFFSET		0xF6
-#define CR49_OFFSET		0xF7
-
-#define VB310Data_1_2_Offset	0xB6
-#define VB310Data_4_D_Offset	0xB7
-#define VB310Data_4_E_Offset	0xB8
-#define VB310Data_4_10_Offset	0xBB
-
-#define RGBSenseDataOffset	0xBD
-#define YCSenseDataOffset	0xBF
-#define VideoSenseDataOffset	0xC1
-#define OutputSelectOffset	0xF3
-
-#define ECLK_MCLK_DISTANCE	0x14
-#define VBIOSTablePointerStart	0x100
-#define StandTablePtrOffset	VBIOSTablePointerStart+0x02
-#define EModeIDTablePtrOffset	VBIOSTablePointerStart+0x04
-#define CRT1TablePtrOffset	VBIOSTablePointerStart+0x06
-#define ScreenOffsetPtrOffset	VBIOSTablePointerStart+0x08
-#define VCLKDataPtrOffset	VBIOSTablePointerStart+0x0A
-#define MCLKDataPtrOffset	VBIOSTablePointerStart+0x0E
-#define CRT2PtrDataPtrOffset	VBIOSTablePointerStart+0x10
-#define TVAntiFlickPtrOffset	VBIOSTablePointerStart+0x12
-#define TVDelayPtr1Offset	VBIOSTablePointerStart+0x14
-#define TVPhaseIncrPtr1Offset	VBIOSTablePointerStart+0x16
-#define TVYFilterPtr1Offset	VBIOSTablePointerStart+0x18
-#define LCDDelayPtr1Offset	VBIOSTablePointerStart+0x20
-#define TVEdgePtr1Offset	VBIOSTablePointerStart+0x24
-#define CRT2Delay1Offset	VBIOSTablePointerStart+0x28
+/*
+  =============================================================
+   			for 310/325 series
+  =============================================================
+*/
+#define SoftDRAMType        0x80
+#define SoftSetting_OFFSET  0x52
+#define SR07_OFFSET  0x7C
+#define SR15_OFFSET  0x7D
+#define SR16_OFFSET  0x81
+#define SR17_OFFSET  0x85
+#define SR19_OFFSET  0x8D
+#define SR1F_OFFSET  0x99
+#define SR21_OFFSET  0x9A
+#define SR22_OFFSET  0x9B
+#define SR23_OFFSET  0x9C
+#define SR24_OFFSET  0x9D
+#define SR25_OFFSET  0x9E
+#define SR31_OFFSET  0x9F
+#define SR32_OFFSET  0xA0
+#define SR33_OFFSET  0xA1
+
+#define CR40_OFFSET  0xA2
+#define SR25_1_OFFSET  0xF6
+#define CR49_OFFSET  0xF7
+
+#define VB310Data_1_2_Offset  0xB6
+#define VB310Data_4_D_Offset  0xB7
+#define VB310Data_4_E_Offset  0xB8
+#define VB310Data_4_10_Offset 0xBB
+
+#define RGBSenseDataOffset    0xBD
+#define YCSenseDataOffset     0xBF
+#define VideoSenseDataOffset  0xC1
+#define OutputSelectOffset    0xF3
+
+#define ECLK_MCLK_DISTANCE  0x14
+#define VBIOSTablePointerStart    0x100
+#define StandTablePtrOffset       VBIOSTablePointerStart+0x02
+#define EModeIDTablePtrOffset     VBIOSTablePointerStart+0x04
+#define CRT1TablePtrOffset        VBIOSTablePointerStart+0x06
+#define ScreenOffsetPtrOffset     VBIOSTablePointerStart+0x08
+#define VCLKDataPtrOffset         VBIOSTablePointerStart+0x0A
+#define MCLKDataPtrOffset         VBIOSTablePointerStart+0x0E
+#define CRT2PtrDataPtrOffset      VBIOSTablePointerStart+0x10
+#define TVAntiFlickPtrOffset      VBIOSTablePointerStart+0x12
+#define TVDelayPtr1Offset         VBIOSTablePointerStart+0x14
+#define TVPhaseIncrPtr1Offset     VBIOSTablePointerStart+0x16
+#define TVYFilterPtr1Offset       VBIOSTablePointerStart+0x18
+#define LCDDelayPtr1Offset        VBIOSTablePointerStart+0x20
+#define TVEdgePtr1Offset          VBIOSTablePointerStart+0x24
+#define CRT2Delay1Offset          VBIOSTablePointerStart+0x28
 
 #endif
diff --git a/drivers/video/sis/oem300.h b/drivers/video/sis/oem300.h
index 0d42507b7ee8..2a6ac988cc74 100644
--- a/drivers/video/sis/oem300.h
+++ b/drivers/video/sis/oem300.h
@@ -1,397 +1,606 @@
-UCHAR SiS300_TVEdge1[3][2] = {
-	{0x0, 0x4},
-	{0x0, 0x4},
-	{0x0, 0x0}
-};
-
-UCHAR SiS300_OEMTVDelay[8][4] = {
-	{0x08, 0x08, 0x08, 0x08},
-	{0x08, 0x08, 0x08, 0x08},
-	{0x08, 0x08, 0x08, 0x08},
-	{0x2c, 0x2c, 0x2c, 0x2c},
-	{0x08, 0x08, 0x08, 0x08},
-	{0x08, 0x08, 0x08, 0x08},
-	{0x08, 0x08, 0x08, 0x08},
-	{0x20, 0x20, 0x20, 0x20}
-};
-
-UCHAR SiS300_OEMTVFlicker[8][4] = {
-	{0x00, 0x00, 0x00, 0x00},
-	{0x00, 0x00, 0x00, 0x00},
-	{0x00, 0x00, 0x00, 0x00},
-	{0x00, 0x00, 0x00, 0x00},
-	{0x00, 0x00, 0x00, 0x00},
-	{0x00, 0x00, 0x00, 0x00},
-	{0x00, 0x00, 0x00, 0x00},
-	{0x00, 0x00, 0x00, 0x00}
-};
-
-UCHAR SiS300_OEMLCDDelay1[12][4] = {
-	{0x2c, 0x2c, 0x2c, 0x2c},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x2c, 0x2c, 0x2c, 0x2c},
-	{0x2c, 0x2c, 0x2c, 0x2c},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x24, 0x24, 0x24, 0x24},
-	{0x24, 0x24, 0x24, 0x24},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x24, 0x24, 0x24, 0x24}
-};
-
-UCHAR SiS300_OEMLCDDelay2[32][4] = {
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20},
-	{0x20, 0x20, 0x20, 0x20}
-};
-
-UCHAR SiS300_StNTSCPhase[6][4] = {
-	{0x21, 0xed, 0x00, 0x08},
-	{0x21, 0xed, 0x8a, 0x08},
-	{0x21, 0xed, 0x8a, 0x08},
-	{0x21, 0xed, 0x8a, 0x08},
-	{0x21, 0xed, 0x8a, 0x08},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS300_StPALPhase[6][4] = {
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS300_StSCARTPhase[6][4] = {
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0xff, 0xff, 0xff, 0xff}
-};
 
-UCHAR SiS300_StHiTVPhase[6][4] = {
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS300_ExtNTSCPhase[6][4] = {
-	{0x21, 0xed, 0x00, 0x08},
-	{0x21, 0xed, 0x8a, 0x08},
-	{0x21, 0xed, 0x8a, 0x08},
-	{0x21, 0xed, 0x8a, 0x08},
-	{0x21, 0xed, 0x8a, 0x08},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS300_ExtPALPhase[6][4] = {
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS300_ExtSCARTPhase[6][4] = {
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0xff, 0xff, 0xff, 0xff}
-};
+/* OEM Data for 300 series */
 
-UCHAR SiS300_ExtHiTVPhase[6][4] = {
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0x2a, 0x05, 0xd3, 0x00},
-	{0xff, 0xff, 0xff, 0xff}
+UCHAR SiS300_OEMTVDelay301[8][4] =
+{
+	{0x08,0x08,0x08,0x08},
+	{0x08,0x08,0x08,0x08},
+	{0x08,0x08,0x08,0x08},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x08,0x08,0x08,0x08},
+	{0x08,0x08,0x08,0x08},
+	{0x08,0x08,0x08,0x08},
+	{0x20,0x20,0x20,0x20}
 };
 
-UCHAR SiS300_StNTSCFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x10, 0x18},
-	{0xf7, 0x06, 0x19, 0x14},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x15, 0x25, 0xf6},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xff, 0xff, 0xff, 0xff}
+UCHAR SiS300_OEMTVDelayLVDS[8][4] =
+{
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20}
 };
 
-UCHAR SiS300_StPALFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x10, 0x32},
-	{0xf3, 0x00, 0x1d, 0x20},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xfc, 0xfb, 0x14, 0x2a},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xff, 0xff, 0xff, 0xff}
+UCHAR SiS300_OEMTVFlicker[8][4] =
+{
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00},
+	{0x00,0x00,0x00,0x00}
 };
 
-UCHAR SiS300_StSCARTFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x10, 0x32},
-	{0xf3, 0x00, 0x1d, 0x20},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xfc, 0xfb, 0x14, 0x2a},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xff, 0xff, 0xff, 0xff}
+#if 0   /* TW: Not used */
+UCHAR SiS300_OEMLCDDelay1[12][4]={
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x2c,0x2c,0x2c,0x2c},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x24,0x24,0x24,0x24},
+	{0x24,0x24,0x24,0x24},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x24,0x24,0x24,0x24}
 };
+#endif
 
-UCHAR SiS300_StHiTVFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x10, 0x32},
-	{0xf3, 0x00, 0x1d, 0x20},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xfc, 0xfb, 0x14, 0x2a},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xff, 0xff, 0xff, 0xff}
+/* TW: From 630/301B BIOS */
+UCHAR SiS300_OEMLCDDelay2[64][4] =		 /* for 301/301b/302b/301LV/302LV */
+{
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20}
 };
 
-UCHAR SiS300_ExtNTSCFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x10, 0x18},
-	{0xf7, 0x06, 0x19, 0x14},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x15, 0x25, 0xf6},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xff, 0xff, 0xff, 0xff}
+/* TW: Added for LVDS */
+UCHAR SiS300_OEMLCDDelay3[32][4] = {	/* For LVDS */
+	{0x20,0x20,0x20,0x20},  /* --- Expanding panels */
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x04,0x04,0x04,0x04},		/* Clevo 2202 (PanelType 12); Mitac needs 0x20! */
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},  	/* Uniwill N241S2 (PanelType 14)*/
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},  /* ---- NonExpanding panels */
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x04,0x04,0x04,0x04},          /* Gericom 2200C (PanelType 28) */
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20},
+	{0x20,0x20,0x20,0x20}
 };
 
-UCHAR SiS300_ExtPALFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x10, 0x32},
-	{0xf3, 0x00, 0x1d, 0x20},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xfc, 0xfb, 0x14, 0x2a},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xff, 0xff, 0xff, 0xff}
+UCHAR SiS300_Phase1[8][6][4] =
+{
+    {
+	{0x21,0xed,0x00,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x21,0xed,0x00,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    }
 };
 
-UCHAR SiS300_ExtSCARTFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x10, 0x32},
-	{0xf3, 0x00, 0x1d, 0x20},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xfc, 0xfb, 0x14, 0x2a},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xff, 0xff, 0xff, 0xff}
-};
 
-UCHAR SiS300_ExtHiTVFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x10, 0x32},
-	{0xf3, 0x00, 0x1d, 0x20},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xfc, 0xfb, 0x14, 0x2a},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xf1, 0xf7, 0x1f, 0x32},
-	{0xff, 0xff, 0xff, 0xff}
+UCHAR SiS300_Phase2[8][6][4] =
+{
+    {
+        {0x21,0xed,0x00,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x21,0xed,0x00,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0x21,0xed,0x8a,0x08},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+        {0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00},
+	{0xff,0xff,0xff,0xff}
+    }
 };
 
-UCHAR SiS300_NTSCFilter2[9][7] = {
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38},
-	{0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28}
+UCHAR SiS300_Filter1[10][17][4] =
+{
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x10,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xfc,0xfb,0x14,0x2a},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xff,0xff,0xff,0xff}
+    },
+    {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xff,0xff,0xff,0xff}
+    },
 };
 
-UCHAR SiS300_PALFilter2[9][7] = {
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38},
-	{0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28}
+UCHAR SiS300_Filter2[10][9][7] =
+{
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    },
+    {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+    }
 };
 
-UCHAR SiS300_PALMFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x10, 0x18},
-	{0xf7, 0x06, 0x19, 0x14},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x15, 0x25, 0xf6},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS300_PALNFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x10, 0x18},
-	{0xf7, 0x06, 0x19, 0x14},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x15, 0x25, 0xf6},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS300_PALMFilter2[9][7] = {
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38},
-	{0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28}
-};
-
-UCHAR SiS300_PALNFilter2[9][7] = {
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38},
-	{0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28}
-};
diff --git a/drivers/video/sis/oem310.h b/drivers/video/sis/oem310.h
index 327129b7f83d..76a79d504f44 100644
--- a/drivers/video/sis/oem310.h
+++ b/drivers/video/sis/oem310.h
@@ -1,204 +1,262 @@
-UCHAR SiS310_CRT2DelayCompensation1 = 0x4;	/* 301A */
-
-UCHAR SiS310_LCDDelayCompensation1[] = { 
-	0x0, 0x0, 0x0, 0xb, 0xb, 0xb, 0x8, 0x8, 
-	0x8, 0x8, 0x8, 0x8, 0x0, 0x0, 0x0, 0x0, 
-	0x0, 0x0, 0x0, 0x0, 0x0 
-};
-	
-UCHAR SiS310_TVDelayCompensation1[] = { 0x2, 0x2, 0x2, 0x2, 0x8, 0xb };
-UCHAR SiS310_CRT2DelayCompensation2 = 0xC;	/* 301B */
-UCHAR SiS310_LCDDelayCompensation2[] = {
-	0x0, 0x0, 0x0, 0x0C, 0x0C, 0x0C, 0x0C, 
-	0x0C, 0x0C, 0x8, 0x8, 0x8, 0x0, 0x0, 
-	0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0
-};
-
-UCHAR SiS310_TVDelayCompensation2[] = { 0x3, 0x3, 0x3, 0x3, 0x8, 0xb };
-
-UCHAR SiS310_TVAntiFlick1[3][2] = {
-	{0x4, 0x0},
-	{0x4, 0x8},
-	{0x0, 0x0}
-};
-
-UCHAR SiS310_TVEdge1[3][2] = {
-	{0x0, 0x4},
-	{0x0, 0x4},
-	{0x0, 0x0}
-};
-
-UCHAR SiS310_TVYFilter1[3][8][4] = {
-	{
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0xeb, 0x4, 0x25, 0x18},
-	 {0xf7, 0x6, 0x19, 0x14},
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0xeb, 0x4, 0x25, 0x18},
-	 {0xee, 0xc, 0x22, 0x8},
-	 {0xeb, 0x15, 0x25, 0xf6}
-	 }
-	,
-	{
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0xf1, 0xf7, 0x1f, 0x32},
-	 {0xf3, 0x0, 0x1d, 0x20},
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0xf1, 0xf7, 0x1f, 0x32},
-	 {0xf3, 0x0, 0x1d, 0x20},
-	 {0xfc, 0xfb, 0x14, 0x2a}
-	}
-	,
-	{
-	 {0x0, 0x0, 0x0, 0x0},
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0xeb, 0x4, 0x25, 0x18},
-	 {0xf7, 0x6, 0x19, 0x14},
-	 {0x0, 0xf4, 0x10, 0x38},
-	 {0xeb, 0x4, 0x25, 0x18},
-	 {0xee, 0xc, 0x22, 0x8}
-	}
-};
-
-/*301b*/
-UCHAR SiS310_TVYFilter2[3][9][7] = {
-	{
-	 {0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	 {0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	 {0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	 {0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	 {0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	 {0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	 {0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	 {0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38},
-	 {0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28}
-	 }
-	,
-	{
-	 {0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	 {0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	 {0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	 {0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	 {0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	 {0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	 {0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	 {0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38},
-	 {0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28}
-	}
-	,
-	{
-
-	 {0x0, 0x0, 0x0, 0xF4, 0xFF, 0x1C, 0x22},
-	 {0x0, 0x0, 0x0, 0xF4, 0xFF, 0x1C, 0x22},
-	 {0x0, 0x0, 0x0, 0xF4, 0xFF, 0x1C, 0x22},
-	 {0x0, 0x0, 0x0, 0xF4, 0xFF, 0x1C, 0x22},
-	 {0x0, 0x0, 0x0, 0xF4, 0xFF, 0x1C, 0x22},
-	 {0x0, 0x0, 0x0, 0xF4, 0xFF, 0x1C, 0x22},
-	 {0x0, 0x0, 0x0, 0xF4, 0xFF, 0x1C, 0x22},
-	 {0x0, 0x0, 0x0, 0xF4, 0xFF, 0x1C, 0x22}
-	}
-};
-/*end 301b*/
-/*add PALMN*/
-
-UCHAR SiS310_PALMFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x10, 0x18},
-	{0xf7, 0x06, 0x19, 0x14},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x15, 0x25, 0xf6},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS310_PALNFilter[17][4] = {
-	{0x00, 0xf4, 0x10, 0x38},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x10, 0x18},
-	{0xf7, 0x06, 0x19, 0x14},
-	{0x00, 0xf4, 0x10, 0x38},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x15, 0x25, 0xf6},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xeb, 0x04, 0x25, 0x18},
-	{0xff, 0xff, 0xff, 0xff}
-};
-
-UCHAR SiS310_PALMFilter2[9][7] = {
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38},
-	{0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28}
-};
-
-UCHAR SiS310_PALNFilter2[9][7] = {
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0xFF, 0x03, 0x02, 0xF6, 0xFC, 0x27, 0x46},
-	{0x01, 0x02, 0xFE, 0xF7, 0x03, 0x27, 0x3C},
-	{0x01, 0x01, 0xFC, 0xF8, 0x08, 0x26, 0x38},
-	{0xFF, 0xFF, 0xFC, 0x00, 0x0F, 0x22, 0x28}
-};
-
-/*end PALMN*/
-UCHAR SiS310_TVPhaseIncr1[3][2][4] = {
-	{
-	 {0x21, 0xed, 0x8a, 0x8},
-	 {0x21, 0xed, 0x8a, 0x8}
-	 }
-	,
-	{
-	 {0x2a, 0x5, 0xd3, 0x0},
-	 {0x2a, 0x5, 0xd3, 0x0}
-	 }
-	,
-	{
-	 {0x2a, 0x5, 0xd3, 0x0},
-	 {0x2a, 0x5, 0xd3, 0x0}
-	 }
-};
-
-UCHAR SiS310_TVPhaseIncr2[3][2][4] = {
-	{
-	 {0x21, 0xF0, 0x7b, 0xd6},
-	 {0x21, 0xF0, 0x7b, 0xd6}
-	 }
-	,
-	{
-	 {0x2a, 0x09, 0x86, 0xe9},
-	 {0x2a, 0x09, 0x86, 0xe9}
-	 }
-	,
-	{
-	 {0x2a, 0x5, 0xd3, 0x0},
-	 {0x2a, 0x5, 0xd3, 0x0}
-	 }
+
+/* OEM Data for 300 series */
+
+UCHAR SiS310_CRT2DelayCompensation1 = 0x04; /* 301A */
+
+UCHAR SiS310_LCDDelayCompensation1[] =
+{
+		 0x00,0x00,0x00,
+		 0x0b,0x0b,0x0b,
+		 0x08,0x08,0x08,
+		 0x08,0x08,0x08,
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00,
+		 0x00,0x00,0x00
+};
+
+UCHAR SiS310_TVDelayCompensation1[] =
+{
+		  0x02,0x02,    /* NTSC Enhanced, Standard */
+                  0x02,0x02,    /* PAL */
+		  0x08,0x0b     /* HiVision */
+};
+
+UCHAR SiS310_CRT2DelayCompensation2 = 0x00;   /* TW: From 650/301LV BIOS; was 0x0C; */      /* 301B */
+
+UCHAR SiS310_LCDDelayCompensation2[] =
+{
+		  0x01,0x01,0x01,   /* TW: From 650/301LV BIOS */
+		  0x01,0x01,0x01,
+		  0x01,0x01,0x01,
+		  0x01,0x01,0x01,
+		  0x01,0x01,0x01,
+		  0x01,0x01,0x01,
+		  0x01,0x01,0x01
+#if 0
+		  0x00,0x00,0x00,   /* 800x600 VESA, non-VESA, non-expanding */
+		  0x0C,0x0C,0x0C,   /* 1024x768 */
+		  0x0C,0x0C,0x0C,   /* 1280x1024 */
+		  0x08,0x08,0x08,   /* 1280x960 */
+		  0x00,0x00,0x00,   /* 640x480 */
+		  0x00,0x00,0x00,   /* 1600x1200 */
+		  0x00,0x00,0x00    /* 1920x1440 */
+#endif
+};
+
+UCHAR SiS310_TVDelayCompensation2[] =
+{
+		  0x05,0x05,        /* TW: From 650/301LV BIOS */
+		  0x05,0x05,
+		  0x05,0x05
+#if 0
+		  0x03,0x03,        /* NTSC Enhanced, Standard */
+                  0x03,0x03,        /* PAL */
+		  0x08,0x0b         /* HiVision */
+#endif
 };
+
+UCHAR SiS310_CRT2DelayCompensation3 = 0x00;   /* LVDS */
+
+UCHAR SiS310_LCDDelayCompensation3[] =
+{
+                   0x00,0x00,0x00,  /* 800x600 */
+		   0x00,0x00,0x00,  /* 1024x768 */
+		   0x00,0x00,0x00,  /* 1280x1024 */
+		   0x00,0x00,0x00,  /* 1400x1050 */
+		   0x00,0x00,0x00   /* 1600x1200 */
+};
+
+UCHAR SiS310_TVDelayCompensation3[] =
+{
+		   0x0a,0x0a,
+		   0x0a,0x0a,
+		   0x0a,0x0a
+};
+
+UCHAR SiS310_TVAntiFlick1[3][2] =
+{
+            {0x4,0x0},
+	    {0x4,0x8},
+	    {0x0,0x0}
+};
+
+UCHAR SiS310_TVEdge1[3][2] =
+{
+            {0x0,0x4},
+	    {0x0,0x4},
+	    {0x0,0x0}
+};
+
+UCHAR SiS310_TVYFilter1[3][8][4] =
+{
+ {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xf1,0x04,0x1f,0x18},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xee,0x0c,0x22,0x08},
+	{0xeb,0x15,0x25,0xf6}
+ },
+ {
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0x00,0xf4,0x10,0x38},
+	{0xf1,0xf7,0x1f,0x32},
+	{0xf3,0x00,0x1d,0x20},
+	{0xfc,0xfb,0x14,0x2a}
+ },
+ {
+	{0x00,0x00,0x00,0x00},
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xee,0x0c,0x22,0x08}
+ }
+};
+
+UCHAR SiS310_TVYFilter2[3][9][7] =
+{
+ {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+ },
+ {
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+ },
+ {
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
+	{0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}
+ }
+};
+
+UCHAR SiS310_PALMFilter[17][4] =
+{
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xff,0xff,0xff,0xff}
+};
+
+UCHAR SiS310_PALNFilter[17][4] =
+{
+	{0x00,0xf4,0x10,0x38},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x10,0x18},
+	{0xf7,0x06,0x19,0x14},
+	{0x00,0xf4,0x10,0x38},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x15,0x25,0xf6},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xeb,0x04,0x25,0x18},
+	{0xff,0xff,0xff,0xff}
+};
+
+
+UCHAR SiS310_PALMFilter2[9][7] =
+{
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+};
+
+UCHAR SiS310_PALNFilter2[9][7] =
+{
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
+	{0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
+	{0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
+	{0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
+};
+
+UCHAR SiS310_TVPhaseIncr1[3][2][4]=
+{
+ {
+	{0x21,0xed,0xba,0x08},
+	{0x21,0xed,0xba,0x08}
+ },
+ {
+	{0x2a,0x05,0xe3,0x00},
+	{0x2a,0x05,0xe3,0x00}
+ },
+ {
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00}
+ }
+};
+
+UCHAR SiS310_TVPhaseIncr2[3][2][4]=
+{
+ {
+	{0x21,0xF1,0x37,0x56},
+	{0x21,0xF1,0x37,0x56}
+ },
+ {
+	{0x2a,0x09,0x86,0xe9},
+	{0x2a,0x09,0x86,0xe9}
+ },
+ {
+	{0x2a,0x05,0xd3,0x00},
+	{0x2a,0x05,0xd3,0x00}
+ }
+};
+
+
+
diff --git a/drivers/video/sis/osdef.h b/drivers/video/sis/osdef.h
index 1c3ad2b40f20..acd87d59b6b9 100644
--- a/drivers/video/sis/osdef.h
+++ b/drivers/video/sis/osdef.h
@@ -1,37 +1,159 @@
-#define LINUX_KERNEL
+/* #define WINCE_HEADER */
+/* #define WIN2000 */
+/* #define TC */
+#define LINUX_KERNEL	   /* Kernel framebuffer */
+/* #define LINUX_XF86 */   /* XFree86 */
 
+/**********************************************************************/
+#ifdef LINUX_KERNEL
+	#include <linux/config.h>
+	#ifdef CONFIG_FB_SIS_300
+ 		#define SIS300
+	#endif
+
+	#ifdef CONFIG_FB_SIS_315
+		#define SIS315H
+	#endif
+#else
+/*	#define SIS300*/
+	#define SIS315H
+#endif
+#ifdef LINUX_XF86
+	#define SIS300
+	/* #define SIS315H */ /* TW: done above */
+#endif
+
+/**********************************************************************/
+#ifdef TC
+#endif
+#ifdef WIN2000
+#endif
+#ifdef WINCE_HEADER
+#endif
+#ifdef LINUX_XF86
+#endif
+#ifdef LINUX_KERNEL
+#endif
+/**********************************************************************/
+#ifdef TC
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize);
+#endif
+#ifdef WIN2000
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) MemFill((PVOID) MemoryAddress,(ULONG) MemorySize,(UCHAR) value);
+#endif
+#ifdef WINCE_HEADER
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize);
+#endif
+#ifdef LINUX_XF86
+#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize)
+#endif
+#ifdef LINUX_KERNEL
 #define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize)
+#endif
+/**********************************************************************/
+
+/**********************************************************************/
+
+#ifdef TC
+#define SiS_MemoryCopy(Destination,Soruce,Length) memmove(Destination, Soruce, Length);
+#endif
+#ifdef WIN2000
+#define SiS_MemoryCopy(Destination,Soruce,Length)  /*VideoPortMoveMemory((PUCHAR)Destination , Soruce,length);*/
+#endif
+#ifdef WINCE_HEADER
+#define SiS_MemoryCopy(Destination,Soruce,Length) memmove(Destination, Soruce, Length);
+#endif
+#ifdef LINUX_XF86
+#define SiS_MemoryCopy(Destination,Soruce,Length) memcpy(Destination,Soruce,Length)
+#endif
+#ifdef LINUX_KERNEL
 #define SiS_MemoryCopy(Destination,Soruce,Length) memcpy(Destination,Soruce,Length)
+#endif
 
 /**********************************************************************/
 
 #ifdef OutPortByte
 #undef OutPortByte
-#endif				/* OutPortByte */
+#endif /* OutPortByte */
 
 #ifdef OutPortWord
 #undef OutPortWord
-#endif				/* OutPortWord */
+#endif /* OutPortWord */
 
 #ifdef OutPortLong
 #undef OutPortLong
-#endif				/* OutPortLong */
+#endif /* OutPortLong */
 
 #ifdef InPortByte
 #undef InPortByte
-#endif				/* InPortByte */
+#endif /* InPortByte */
 
 #ifdef InPortWord
 #undef InPortWord
-#endif				/* InPortWord */
+#endif /* InPortWord */
 
 #ifdef InPortLong
 #undef InPortLong
-#endif				/* InPortLong */
+#endif /* InPortLong */
+
+/**********************************************************************/
+/*  TC                                                                */
+/**********************************************************************/
 
+#ifdef TC
+#define OutPortByte(p,v) outp((unsigned short)(p),(unsigned char)(v))
+#define OutPortWord(p,v) outp((unsigned short)(p),(unsigned short)(v))
+#define OutPortLong(p,v) outp((unsigned short)(p),(unsigned long)(v))
+#define InPortByte(p)    inp((unsigned short)(p))
+#define InPortWord(p)    inp((unsigned short)(p))
+#define InPortLong(p)    ((inp((unsigned short)(p+2))<<16) | inp((unsigned short)(p)))
+#endif
+
+/**********************************************************************/
+/*  LINUX XF86                                                        */
+/**********************************************************************/
+
+#ifdef LINUX_XF86
+#define OutPortByte(p,v) outb((CARD16)(p),(CARD8)(v))
+#define OutPortWord(p,v) outw((CARD16)(p),(CARD16)(v))
+#define OutPortLong(p,v) outl((CARD16)(p),(CARD32)(v))
+#define InPortByte(p)    inb((CARD16)(p))
+#define InPortWord(p)    inw((CARD16)(p))
+#define InPortLong(p)    inl((CARD16)(p))
+#endif
+
+#ifdef LINUX_KERNEL
 #define OutPortByte(p,v) outb((u8)(v),(u16)(p))
 #define OutPortWord(p,v) outw((u16)(v),(u16)(p))
 #define OutPortLong(p,v) outl((u32)(v),(u16)(p))
 #define InPortByte(p)    inb((u16)(p))
 #define InPortWord(p)    inw((u16)(p))
 #define InPortLong(p)    inl((u16)(p))
+#endif
+
+/**********************************************************************/
+/*  WIN 2000                                                          */
+/**********************************************************************/
+
+#ifdef WIN2000
+#define OutPortByte(p,v) VideoPortWritePortUchar ((PUCHAR) (p), (UCHAR) (v))
+#define OutPortWord(p,v) VideoPortWritePortUshort((PUSHORT) (p), (USHORT) (v))
+#define OutPortLong(p,v) VideoPortWritePortUlong ((PULONG) (p), (ULONG) (v))
+#define InPortByte(p)    VideoPortReadPortUchar  ((PUCHAR) (p))
+#define InPortWord(p)    VideoPortReadPortUshort ((PUSHORT) (p))
+#define InPortLong(p)    VideoPortReadPortUlong  ((PULONG) (p))
+#endif
+
+
+/**********************************************************************/
+/*  WIN CE                                                          */
+/**********************************************************************/
+
+#ifdef WINCE_HEADER
+#define OutPortByte(p,v) WRITE_PORT_UCHAR ((PUCHAR) (p), (UCHAR) (v))
+#define OutPortWord(p,v) WRITE_PORT_USHORT((PUSHORT) (p), (USHORT) (v))
+#define OutPortLong(p,v) WRITE_PORT_ULONG ((PULONG) (p), (ULONG) (v))
+#define InPortByte(p)    READ_PORT_UCHAR  ((PUCHAR) (p))
+#define InPortWord(p)    READ_PORT_USHORT ((PUSHORT) (p))
+#define InPortLong(p)    READ_PORT_ULONG  ((PULONG) (p))
+#endif
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c
index 43a751fddea6..f112d9202103 100644
--- a/drivers/video/sis/sis_main.c
+++ b/drivers/video/sis/sis_main.c
@@ -1,16 +1,26 @@
 /*
- * SiS 300/630/540/315H/315 frame buffer device For Kernal 2.4.x
+ * SiS 300/630/730/540/315/550/650/740 frame buffer device
+ * for Linux kernels 2.4.x and 2.5.x
  *
- * This driver is partly based on the VBE 2.0 compliant graphic 
- * boards framebuffer driver, which is 
- * 
- * (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
+ * Partly based on the VBE 2.0 compliant graphic boards framebuffer driver,
+ * which is (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
  *
+ * Authors:   	SiS (www.sis.com.tw)
+ *		(Various others)
+ *		Thomas Winischhofer <thomas@winischhofer.net>:
+ *			- many fixes and enhancements for 630 & 310/325 series,
+ *			- extended bridge handling, TV output for Chrontel
+ *                      - 650/LVDS support (for LCD panels up to 1400x1050)
+ *                      - 650/Chrontel 7019 support
+ *                      - 301B/301LV LCD and TV support
+ *			- memory queue handling enhancements,
+ *			- everything marked with "TW"
+ *			(see http://www.winischhofer.net/linuxsis630.shtml
+ *			for more information and updates)
  */
 
-//#undef SISFBDEBUG
-
 #include <linux/config.h>
+#include <linux/version.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
@@ -29,11 +39,12 @@
 #include <linux/capability.h>
 #include <linux/fs.h>
 #include <linux/agp_backend.h>
+
 #include <linux/types.h>
 #include <linux/sisfb.h>
 
 #include <asm/io.h>
-#include <asm/mtrr.h>
+#include <asm/mtrr.h> 
 
 #include <video/fbcon.h>
 #include <video/fbcon-cfb8.h>
@@ -44,9 +55,13 @@
 #include "osdef.h"
 #include "vgatypes.h"
 #include "sis_main.h"
+//#ifdef LINUXBIOS
+//#include "bios.h"
+//#endif
 
 /* -------------------- Macro definitions ---------------------------- */
-
+// #define SISFBDEBUG
+#undef SISFBDEBUG /* TW */
 #ifdef SISFBDEBUG
 #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
 #else
@@ -64,71 +79,88 @@
 
 /* --------------- Hardware Access Routines -------------------------- */
 
-void sisfb_set_reg1 (u16 port, u16 index, u16 data)
+void sisfb_set_reg1(u16 port, u16 index, u16 data)
 {
-	outb ((u8) (index & 0xff), port);
+	outb((u8) (index & 0xff), port);
 	port++;
-	outb ((u8) (data & 0xff), port);
+	outb((u8) (data & 0xff), port);
 }
 
-void sisfb_set_reg3 (u16 port, u16 data)
+void sisfb_set_reg3(u16 port, u16 data)
 {
-	outb ((u8) (data & 0xff), port);
+	outb((u8) (data & 0xff), port);
 }
 
-void sisfb_set_reg4 (u16 port, unsigned long data)
+void sisfb_set_reg4(u16 port, unsigned long data)
 {
-	outl ((u32) (data & 0xffffffff), port);
+	outl((u32) (data & 0xffffffff), port);
 }
 
-u8 sisfb_get_reg1 (u16 port, u16 index)
+u8 sisfb_get_reg1(u16 port, u16 index)
 {
 	u8 data;
 
-	outb ((u8) (index & 0xff), port);
+	outb((u8) (index & 0xff), port);
 	port += 1;
-	data = inb (port);
+	data = inb(port);
 	return (data);
 }
 
-u8 sisfb_get_reg2 (u16 port)
+u8 sisfb_get_reg2(u16 port)
 {
 	u8 data;
 
-	data = inb (port);
-
+	data = inb(port);
 	return (data);
 }
 
-u32 sisfb_get_reg3 (u16 port)
+u32 sisfb_get_reg3(u16 port)
 {
 	u32 data;
 
-	data = inl (port);
+	data = inl(port);
 	return (data);
 }
 
+// Eden Chen
+//void sisfb_clear_DAC(u16 port)
+//{
+//	int i,j;
+//
+//	vgawb(DAC_ADR, 0x00);
+//	for(i=0; i<256; i++)
+//		for(j=0; j<3; j++)
+//			vgawb(DAC_DATA, 0);
+//}
+
+//void sisfb_clear_buffer(PHW_DEVICE_EXTENSION psishw_ext)
+//{
+//	memset((char *) ivideo.video_vbase, 0,
+//		video_linelength * ivideo.video_height);
+//}
+// ~Eden Chen
+
 /* --------------- Interface to BIOS code ---------------------------- */
 
-BOOLEAN sisfb_query_VGA_config_space (PSIS_HW_DEVICE_INFO psishw_ext,
-			      unsigned long offset, unsigned long set,
-			      unsigned long *value)
+BOOLEAN
+sisfb_query_VGA_config_space(PSIS_HW_DEVICE_INFO psishw_ext,
+	unsigned long offset, unsigned long set, unsigned long *value)
 {
 	static struct pci_dev *pdev = NULL;
 	static unsigned char init = 0, valid_pdev = 0;
 
 	if (!set)
-		DPRINTK ("Get VGA offset 0x%lx\n", offset);
+		DPRINTK("sisfb: Get VGA offset 0x%lx\n", offset);
 	else
-		DPRINTK ("Set offset 0x%lx to 0x%lx\n", offset, *value);
+		DPRINTK("sisfb: Set offset 0x%lx to 0x%lx\n", offset, *value);
 
 	if (!init) {
 		init = TRUE;
-		pci_for_each_dev (pdev) {
-			DPRINTK ("Current: 0x%x, target: 0x%x\n", pdev->device,
-				 ivideo.chip_id);
+		pci_for_each_dev(pdev) {
+			DPRINTK("sisfb: Current: 0x%x, target: 0x%x\n",
+			         pdev->device, ivideo.chip_id);
 			if ((pdev->vendor == PCI_VENDOR_ID_SI)
-			    && (pdev->device == ivideo.chip_id)) {
+			           && (pdev->device == ivideo.chip_id)) {
 				valid_pdev = TRUE;
 				break;
 			}
@@ -136,22 +168,21 @@ BOOLEAN sisfb_query_VGA_config_space (PSIS_HW_DEVICE_INFO psishw_ext,
 	}
 
 	if (!valid_pdev) {
-		printk (KERN_DEBUG "Can't find SiS %d VGA device.\n",
-			ivideo.chip_id);
+		printk(KERN_DEBUG "sisfb: Can't find SiS %d VGA device.\n",
+				ivideo.chip_id);
 		return FALSE;
 	}
 
 	if (set == 0)
-		pci_read_config_dword (pdev, offset, (u32 *) value);
+		pci_read_config_dword(pdev, offset, (u32 *)value);
 	else
-		pci_write_config_dword (pdev, offset, (u32) (*value));
+		pci_write_config_dword(pdev, offset, (u32)(*value));
 
 	return TRUE;
 }
 
-BOOLEAN sisfb_query_north_bridge_space (PSIS_HW_DEVICE_INFO psishw_ext,
-				unsigned long offset, unsigned long set,
-				unsigned long *value)
+BOOLEAN sisfb_query_north_bridge_space(PSIS_HW_DEVICE_INFO psishw_ext,
+	unsigned long offset, unsigned long set, unsigned long *value)
 {
 	static struct pci_dev *pdev = NULL;
 	static unsigned char init = 0, valid_pdev = 0;
@@ -172,16 +203,19 @@ BOOLEAN sisfb_query_north_bridge_space (PSIS_HW_DEVICE_INFO psishw_ext,
 		case SIS_550:
 			nbridge_id = PCI_DEVICE_ID_SI_550;
 			break;
+		case SIS_650:
+			nbridge_id = PCI_DEVICE_ID_SI_650;
+			break;
 		default:
 			nbridge_id = 0;
 			break;
 		}
 
-		pci_for_each_dev (pdev) {
-			DPRINTK ("Current: 0x%x, target: 0x%x\n", pdev->device,
-				 ivideo.chip_id);
+		pci_for_each_dev(pdev) {
+			DPRINTK("Current: 0x%x, target: 0x%x\n",
+					pdev->device, ivideo.chip_id);
 			if ((pdev->vendor == PCI_VENDOR_ID_SI)
-			    && (pdev->device == nbridge_id)) {
+					&& (pdev->device == nbridge_id)) {
 				valid_pdev = TRUE;
 				break;
 			}
@@ -189,68 +223,77 @@ BOOLEAN sisfb_query_north_bridge_space (PSIS_HW_DEVICE_INFO psishw_ext,
 	}
 
 	if (!valid_pdev) {
-		printk (KERN_DEBUG "Can't find SiS %d North Bridge device.\n",
-			nbridge_id);
+		printk(KERN_DEBUG "sisfb: Can't find SiS %d North Bridge device.\n",
+				nbridge_id);
 		return FALSE;
 	}
 
 	if (set == 0)
-		pci_read_config_dword (pdev, offset, (u32 *) value);
+		pci_read_config_dword(pdev, offset, (u32 *)value);
 	else
-		pci_write_config_dword (pdev, offset, (u32) (*value));
+		pci_write_config_dword(pdev, offset, (u32)(*value));
 
 	return TRUE;
 }
 
 /* -------------------- Export functions ----------------------------- */
 
-static void sis_get_glyph (struct fb_info *info, SIS_GLYINFO * gly)
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
+static void sis_get_glyph(SIS_GLYINFO *gly)
+#else
+static void sis_get_glyph(struct fb_info *info, SIS_GLYINFO *gly)
+#endif
 {
-	struct display *p = &fb_display[info->currcon];
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
+	struct display *p = &fb_display[currcon];
+#else
+        struct display *p = &fb_display[info->currcon];
+#endif
 	u16 c;
 	u8 *cdat;
 	int widthb;
 	u8 *gbuf = gly->gmask;
 	int size;
 
-	gly->fontheight = fontheight (p);
-	gly->fontwidth = fontwidth (p);
-	widthb = (fontwidth (p) + 7) / 8;
+
+	gly->fontheight = fontheight(p);
+	gly->fontwidth = fontwidth(p);
+	widthb = (fontwidth(p) + 7) / 8;
 
 	c = gly->ch & p->charmask;
-	if (fontwidth (p) <= 8)
-		cdat = p->fontdata + c * fontheight (p);
+	if (fontwidth(p) <= 8)
+		cdat = p->fontdata + c * fontheight(p);
 	else
-		cdat = p->fontdata + (c * fontheight (p) << 1);
+		cdat = p->fontdata + (c * fontheight(p) << 1);
 
-	size = fontheight (p) * widthb;
-	memcpy (gbuf, cdat, size);
+	size = fontheight(p) * widthb;
+	memcpy(gbuf, cdat, size);
 	gly->ngmask = size;
 }
 
-void sis_dispinfo (struct ap_data *rec)
+void sis_dispinfo(struct ap_data *rec)
 {
-	rec->minfo.bpp = ivideo.video_bpp;
-	rec->minfo.xres = ivideo.video_width;
-	rec->minfo.yres = ivideo.video_height;
+	rec->minfo.bpp    = ivideo.video_bpp;
+	rec->minfo.xres   = ivideo.video_width;
+	rec->minfo.yres   = ivideo.video_height;
 	rec->minfo.v_xres = ivideo.video_vwidth;
 	rec->minfo.v_yres = ivideo.video_vheight;
-	rec->minfo.org_x = ivideo.org_x;
-	rec->minfo.org_y = ivideo.org_y;
-	rec->minfo.vrate = ivideo.refresh_rate;
-	rec->iobase = ivideo.vga_base - 0x30;
-	rec->mem_size = ivideo.video_size;
-	rec->disp_state = ivideo.disp_state;
-	rec->version = (VER_MAJOR << 24) | (VER_MINOR << 16) | VER_LEVEL;
-	rec->hasVB = ivideo.hasVB;
-	rec->TV_type = ivideo.TV_type;
-	rec->TV_plug = ivideo.TV_plug;
-	rec->chip = ivideo.chip;
+	rec->minfo.org_x  = ivideo.org_x;
+	rec->minfo.org_y  = ivideo.org_y;
+	rec->minfo.vrate  = ivideo.refresh_rate;
+	rec->iobase       = ivideo.vga_base - 0x30;
+	rec->mem_size     = ivideo.video_size;
+	rec->disp_state   = ivideo.disp_state; 
+	rec->version      = (VER_MAJOR << 24) | (VER_MINOR << 16) | VER_LEVEL; 
+	rec->hasVB        = ivideo.hasVB; 
+	rec->TV_type      = ivideo.TV_type; 
+	rec->TV_plug      = ivideo.TV_plug; 
+	rec->chip         = ivideo.chip;
 }
 
 /* ------------------ Internal Routines ------------------------------ */
 
-static void sisfb_search_mode (const char *name)
+static void sisfb_search_mode(const char *name)
 {
 	int i = 0;
 
@@ -258,64 +301,66 @@ static void sisfb_search_mode (const char *name)
 		return;
 
 	while (sisbios_mode[i].mode_no != 0) {
-		if (!strcmp (name, sisbios_mode[i].name)) {
+		if (!strcmp(name, sisbios_mode[i].name)) {
 			sisfb_mode_idx = i;
 			break;
 		}
 		i++;
 	}
-
 	if (sisfb_mode_idx < 0)
-		DPRINTK ("Invalid user mode : %s\n", name);
+		printk(KERN_INFO "sisfb: Invalid mode '%s'\n", name);
 }
 
-static void sisfb_validate_mode (void)
+static void sisfb_validate_mode(void)
 {
+   u16 xres, yres;
+
 	switch (ivideo.disp_state & DISPTYPE_DISP2) {
 	case DISPTYPE_LCD:
-// Eden Chen
-		switch (sishw_ext.ulCRT2LCDType) {
+	    switch (sishw_ext.ulCRT2LCDType) {
 		case LCD_1024x768:
-			if (sisbios_mode[sisfb_mode_idx].xres > 1024)
-				sisfb_mode_idx = -1;
-			break;
+			xres = 1024; yres =  768;  break;
 		case LCD_1280x1024:
+		        xres = 1280; yres = 1024;  break;
 		case LCD_1280x960:
-			if (sisbios_mode[sisfb_mode_idx].xres > 1280)
-				sisfb_mode_idx = -1;
-			break;
+	                xres = 1280; yres =  960;  break;
 		case LCD_2048x1536:
-			if (sisbios_mode[sisfb_mode_idx].xres > 2048)
-				sisfb_mode_idx = -1;
-			break;
+		        xres = 2048; yres = 1536;  break;
 		case LCD_1920x1440:
-			if (sisbios_mode[sisfb_mode_idx].xres > 1920)
-				sisfb_mode_idx = -1;
-			break;
+			xres = 1920; yres = 1440;  break;
 		case LCD_1600x1200:
-			if (sisbios_mode[sisfb_mode_idx].xres > 1600)
-				sisfb_mode_idx = -1;
-			break;
+			xres = 1600; yres = 1200;  break;
 		case LCD_800x600:
-			if (sisbios_mode[sisfb_mode_idx].xres > 800)
-				sisfb_mode_idx = -1;
-			break;
+			xres =  800; yres =  600;  break;
 		case LCD_640x480:
-			if (sisbios_mode[sisfb_mode_idx].xres > 640)
-				sisfb_mode_idx = -1;
-			break;
+			xres =  640; yres =  480;  break;
+		case LCD_320x480:	/* TW: FSTN */
+			xres =  320; yres =  480;  break;
+                case LCD_1024x600:
+			xres = 1024; yres =  600;  break;
+		case LCD_1152x864:
+			xres = 1152; yres =  864;  break;
+		case LCD_1152x768:
+			xres = 1152; yres =  768;  break;
+		case LCD_1280x768:
+			xres = 1280; yres =  768;  break;
+		case LCD_1400x1050:
+			xres = 1400; yres = 1050;  break;
 		default:
-			sisfb_mode_idx = -1;
+		        xres =    0; yres =    0;  break;
 		}
-// ~Eden Chen
-
+		if(sisbios_mode[sisfb_mode_idx].xres > xres)
+		        sisfb_mode_idx = -1;
+                if(sisbios_mode[sisfb_mode_idx].yres > yres)
+		        sisfb_mode_idx = -1;
 		if (sisbios_mode[sisfb_mode_idx].xres == 720)
 			sisfb_mode_idx = -1;
 		break;
 	case DISPTYPE_TV:
-		switch (sisbios_mode[sisfb_mode_idx].xres) {
-		case 800:
+	    switch (sisbios_mode[sisfb_mode_idx].xres) {
+	        case 512:
 		case 640:
+		case 800:
 			break;
 		case 720:
 			if (ivideo.TV_type == TVMODE_NTSC) {
@@ -325,12 +370,22 @@ static void sisfb_validate_mode (void)
 				if (sisbios_mode[sisfb_mode_idx].yres != 576)
 					sisfb_mode_idx = -1;
 			}
+			/* TW: LVDS/CHRONTEL does not support 720 */
+			if (ivideo.hasVB == HASVB_LVDS_CHRONTEL ||
+						ivideo.hasVB == HASVB_CHRONTEL)
+					sisfb_mode_idx = -1;
 			break;
-			/*karl */
 		case 1024:
 			if (ivideo.TV_type == TVMODE_NTSC) {
-				if (sisbios_mode[sisfb_mode_idx].bpp == 32)
-					sisfb_mode_idx -= 1;
+				if(sisbios_mode[sisfb_mode_idx].bpp == 32)
+				       sisfb_mode_idx = -1;
+			}
+			/* TW: LVDS/CHRONTEL only supports < 800 (1024 on 650/Ch7019)*/
+			if (ivideo.hasVB == HASVB_LVDS_CHRONTEL ||
+						ivideo.hasVB == HASVB_CHRONTEL) {
+			    if(ivideo.chip < SIS_315H) {
+					sisfb_mode_idx = -1;
+			    }
 			}
 			break;
 		default:
@@ -338,9 +393,51 @@ static void sisfb_validate_mode (void)
 		}
 		break;
 	}
+
+	if(ivideo.chip < SIS_315H) {
+             if(sisbios_mode[sisfb_mode_idx].xres > 1920)
+	         sisfb_mode_idx = -1;
+	}
+	/* TW: TODO: Validate modes available on either 300 or 310/325 series only */
+}
+
+static void sisfb_search_crt2type(const char *name)
+{
+	int i = 0;
+
+	if (name == NULL)
+		return;
+
+	while (sis_crt2type[i].type_no != -1) {
+		if (!strcmp(name, sis_crt2type[i].name)) {
+			sisfb_crt2type = sis_crt2type[i].type_no;
+			break;
+		}
+		i++;
+	}
+	if (sisfb_crt2type < 0)
+		printk(KERN_INFO "sisfb: Invalid CRT2 type: %s\n", name);
+}
+
+static void sisfb_search_queuemode(const char *name)
+{
+	int i = 0;
+
+	if (name == NULL)
+		return;
+
+	while (sis_queuemode[i].type_no != -1) {
+		if (!strcmp(name, sis_queuemode[i].name)) {
+			sisfb_queuemode = sis_queuemode[i].type_no;
+			break;
+		}
+		i++;
+	}
+	if (sisfb_queuemode < 0)
+		printk(KERN_INFO "sisfb: Invalid queuemode type: %s\n", name);
 }
 
-static u8 sisfb_search_refresh_rate (unsigned int rate)
+static u8 sisfb_search_refresh_rate(unsigned int rate)
 {
 	u16 xres, yres;
 	int i = 0;
@@ -350,44 +447,39 @@ static u8 sisfb_search_refresh_rate (unsigned int rate)
 
 	sisfb_rate_idx = 0;
 	while ((sisfb_vrate[i].idx != 0) && (sisfb_vrate[i].xres <= xres)) {
-		if ((sisfb_vrate[i].xres == xres)
-		    && (sisfb_vrate[i].yres == yres)) {
+		if ((sisfb_vrate[i].xres == xres) && (sisfb_vrate[i].yres == yres)) {
 			if (sisfb_vrate[i].refresh == rate) {
 				sisfb_rate_idx = sisfb_vrate[i].idx;
 				break;
 			} else if (sisfb_vrate[i].refresh > rate) {
 				if ((sisfb_vrate[i].refresh - rate) <= 2) {
-					DPRINTK
-					    ("Adjust rate from %d up to %d\n",
-					     rate, sisfb_vrate[i].refresh);
+					DPRINTK("sisfb: Adjusting rate from %d up to %d\n",
+						rate, sisfb_vrate[i].refresh);
 					sisfb_rate_idx = sisfb_vrate[i].idx;
-					ivideo.refresh_rate =
-					    sisfb_vrate[i].refresh;
-				} else if (((rate - sisfb_vrate[i - 1].refresh) <=  2) 
-				    	&& (sisfb_vrate[i].idx != 1)) {
-					DPRINTK("Adjust rate from %d down to %d\n",
-					     rate, sisfb_vrate[i - 1].refresh);
-					sisfb_rate_idx = sisfb_vrate[i - 1].idx;
-					ivideo.refresh_rate = sisfb_vrate[i - 1].refresh;
+					ivideo.refresh_rate = sisfb_vrate[i].refresh;
+				} else if (((rate - sisfb_vrate[i-1].refresh) <= 2)
+						&& (sisfb_vrate[i].idx != 1)) {
+					DPRINTK("sisfb: Adjusting rate from %d down to %d\n",
+						rate, sisfb_vrate[i-1].refresh);
+					sisfb_rate_idx = sisfb_vrate[i-1].idx;
+					ivideo.refresh_rate = sisfb_vrate[i-1].refresh;
 				}
 				break;
 			}
 		}
 		i++;
 	}
-
 	if (sisfb_rate_idx > 0) {
 		return sisfb_rate_idx;
 	} else {
-		DPRINTK ("Unsupported rate %d for %dx%d mode\n", rate, xres,
-			 yres);
+		printk(KERN_INFO
+			"sisfb: Unsupported rate %d for %dx%d\n", rate, xres, yres);
 		return 0;
 	}
-
 }
 
-static int sis_getcolreg (unsigned regno, unsigned *red, unsigned *green, unsigned *blue,
-	       unsigned *transp, struct fb_info *fb_info)
+static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green, unsigned *blue,
+			 unsigned *transp, struct fb_info *fb_info)
 {
 	if (regno >= video_cmap_len)
 		return 1;
@@ -399,10 +491,10 @@ static int sis_getcolreg (unsigned regno, unsigned *red, unsigned *green, unsign
 	return 0;
 }
 
-static int sisfb_setcolreg (unsigned regno, unsigned red, unsigned green, unsigned blue,
-	      		    unsigned transp, struct fb_info *fb_info)
-{
 
+static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
+                           unsigned transp, struct fb_info *fb_info)
+{
 	if (regno >= video_cmap_len)
 		return 1;
 
@@ -413,17 +505,16 @@ static int sisfb_setcolreg (unsigned regno, unsigned red, unsigned green, unsign
 	switch (ivideo.video_bpp) {
 #ifdef FBCON_HAS_CFB8
 	case 8:
-		vgawb (DAC_ADR, regno);
-		vgawb (DAC_DATA, red >> 10);
-		vgawb (DAC_DATA, green >> 10);
-		vgawb (DAC_DATA, blue >> 10);
+		vgawb(DAC_ADR, regno);
+		vgawb(DAC_DATA, red >> 10);
+		vgawb(DAC_DATA, green >> 10);
+		vgawb(DAC_DATA, blue >> 10);
 		if (ivideo.disp_state & DISPTYPE_DISP2) {
-			vgawb (DAC2_ADR, regno);
-			vgawb (DAC2_DATA, red >> 8);
-			vgawb (DAC2_DATA, green >> 8);
-			vgawb (DAC2_DATA, blue >> 8);
+		 	vgawb(DAC2_ADR,  regno);
+			vgawb(DAC2_DATA, red >> 8);
+			vgawb(DAC2_DATA, green >> 8);
+			vgawb(DAC2_DATA, blue >> 8);
 		}
-
 		break;
 #endif
 #ifdef FBCON_HAS_CFB16
@@ -439,7 +530,8 @@ static int sisfb_setcolreg (unsigned regno, unsigned red, unsigned green, unsign
 		red >>= 8;
 		green >>= 8;
 		blue >>= 8;
-		fbcon_cmap.cfb24[regno] = (red << 16) | (green << 8) | (blue);
+		fbcon_cmap.cfb24[regno] =
+		    (red << 16) | (green << 8) | (blue);
 		break;
 #endif
 #ifdef FBCON_HAS_CFB32
@@ -447,33 +539,44 @@ static int sisfb_setcolreg (unsigned regno, unsigned red, unsigned green, unsign
 		red >>= 8;
 		green >>= 8;
 		blue >>= 8;
-		fbcon_cmap.cfb32[regno] = (red << 16) | (green << 8) | (blue);
+		fbcon_cmap.cfb32[regno] =
+		    (red << 16) | (green << 8) | (blue);
 		break;
 #endif
 	}
 	return 0;
 }
 
-static int sisfb_do_set_var (struct fb_var_screeninfo *var, int isactive,
-		  struct fb_info *info)
+static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
+		      struct fb_info *info)
 {
 	unsigned int htotal =
-	    var->left_margin + var->xres + var->right_margin + var->hsync_len;
-	unsigned int vtotal =
-	    var->upper_margin + var->yres + var->lower_margin + var->vsync_len;
+		var->left_margin + var->xres + var->right_margin +
+		var->hsync_len;
+	unsigned int vtotal = 0; /* TW */
+	/*	var->upper_margin + var->yres + var->lower_margin +
+		var->vsync_len;     */
 	double drate = 0, hrate = 0;
 	int found_mode = 0;
 	int old_mode;
 
-	if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED)
+	if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
+		vtotal = var->upper_margin + var->yres + var->lower_margin +
+		         var->vsync_len;   /* TW */
 		vtotal <<= 1;
-	else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
+	} else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
+		vtotal = var->upper_margin + var->yres + var->lower_margin +
+		         var->vsync_len;   /* TW */
 		vtotal <<= 2;
-	else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
-		var->yres <<= 1;
-
-	if (!htotal || !vtotal) {
-		DPRINTK ("Invalid 'var' Information!\n");
+	} else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
+		vtotal = var->upper_margin + (var->yres/2) + var->lower_margin +
+		         var->vsync_len;   /* TW */
+		/* var->yres <<= 1; */ /* TW */
+	} else 	vtotal = var->upper_margin + var->yres + var->lower_margin +
+		         var->vsync_len;
+
+	if (!(htotal) || !(vtotal)) {
+		DPRINTK("sisfb: Invalid 'var' information\n");
 		return -EINVAL;
 	}
 
@@ -481,19 +584,17 @@ static int sisfb_do_set_var (struct fb_var_screeninfo *var, int isactive,
 	hrate = drate / htotal;
 	ivideo.refresh_rate = (unsigned int) (hrate / vtotal * 2 + 0.5);
 
-	DPRINTK ("Chagne mode to %dx%dx%d-%dMHz\n",
-		 var->xres, var->yres, var->bits_per_pixel,
-		 ivideo.refresh_rate);
+	printk("sisfb: Change mode to %dx%dx%d-%dHz\n",
+		var->xres,var->yres,var->bits_per_pixel,ivideo.refresh_rate);
 
 	old_mode = sisfb_mode_idx;
 	sisfb_mode_idx = 0;
 
-	while ((sisbios_mode[sisfb_mode_idx].mode_no != 0)
-	       && (sisbios_mode[sisfb_mode_idx].xres <= var->xres)) {
-		if ((sisbios_mode[sisfb_mode_idx].xres == var->xres)
-		    && (sisbios_mode[sisfb_mode_idx].yres == var->yres)
-		    && (sisbios_mode[sisfb_mode_idx].bpp ==
-			var->bits_per_pixel)) {
+	while( (sisbios_mode[sisfb_mode_idx].mode_no != 0) &&
+	       (sisbios_mode[sisfb_mode_idx].xres <= var->xres) ) {
+		if( (sisbios_mode[sisfb_mode_idx].xres == var->xres) &&
+		    (sisbios_mode[sisfb_mode_idx].yres == var->yres) &&
+		    (sisbios_mode[sisfb_mode_idx].bpp == var->bits_per_pixel)) {
 			sisfb_mode_no = sisbios_mode[sisfb_mode_idx].mode_no;
 			found_mode = 1;
 			break;
@@ -502,83 +603,66 @@ static int sisfb_do_set_var (struct fb_var_screeninfo *var, int isactive,
 	}
 
 	if (found_mode)
-		sisfb_validate_mode ();
+		sisfb_validate_mode();
 	else
 		sisfb_mode_idx = -1;
 
-	if (sisfb_mode_idx < 0) {
-		DPRINTK ("sisfb does not support mode %dx%d-%d\n", var->xres,
-			 var->yres, var->bits_per_pixel);
+       	if (sisfb_mode_idx < 0) {
+		printk("sisfb: Mode %dx%d-%d not supported\n", var->xres,
+		       var->yres, var->bits_per_pixel);
 		sisfb_mode_idx = old_mode;
 		return -EINVAL;
 	}
 
-	if (sisfb_search_refresh_rate (ivideo.refresh_rate) == 0) {
+	if (sisfb_search_refresh_rate(ivideo.refresh_rate) == 0) {
 		sisfb_rate_idx = sisbios_mode[sisfb_mode_idx].rate_idx;
 		ivideo.refresh_rate = 60;
 	}
 
 	if (((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) && isactive) {
-		sisfb_pre_setmode ();
 
-// Eden Chen
-/*
-#ifdef CONFIG_FB_SIS_300
-		if (SiSSetMode(&sishw_ext, sisfb_mode_no)) {
-			DPRINTK("set mode[0x%x]: failed\n", sisfb_mode_no);
-			return -1;
-		}
-#endif
+		sisfb_pre_setmode();
 
-#ifdef CONFIG_FB_SIS_315
-		if (SiSSetMode310(&sishw_ext, sisfb_mode_no)) {
-			DPRINTK("set mode[0x%x]: failed\n", sisfb_mode_no);
+		if (SiSSetMode(&sishw_ext, sisfb_mode_no) == 0) {
+			printk("sisfb: Setting mode[0x%x] failed\n", sisfb_mode_no);
 			return -1;
 		}
 
-#endif
-*/
-		if (SiSSetMode (&sishw_ext, sisfb_mode_no) == 0) {
-			DPRINTK ("set mode[0x%x]: failed\n", sisfb_mode_no);
-			return -1;
-		}
+		vgawb(SEQ_ADR, IND_SIS_PASSWORD);
+		vgawb(SEQ_DATA, SIS_PASSWORD);
 
-		vgawb (SEQ_ADR, IND_SIS_PASSWORD);
-		vgawb (SEQ_DATA, SIS_PASSWORD);
-// ~Eden Chen
-		sisfb_post_setmode ();
+		sisfb_post_setmode();
 
-		DPRINTK ("Set New Mode : %dx%dx%d-%d \n",
-			 sisbios_mode[sisfb_mode_idx].xres,
-			 sisbios_mode[sisfb_mode_idx].yres,
-			 sisbios_mode[sisfb_mode_idx].bpp, ivideo.refresh_rate);
+		DPRINTK("sisfb: Set new mode: %dx%dx%d-%d \n", sisbios_mode[sisfb_mode_idx].xres,
+			sisbios_mode[sisfb_mode_idx].yres, sisbios_mode[sisfb_mode_idx].bpp,
+			ivideo.refresh_rate);
 
 		ivideo.video_bpp = sisbios_mode[sisfb_mode_idx].bpp;
-		ivideo.video_vwidth = ivideo.video_width =
-		    sisbios_mode[sisfb_mode_idx].xres;
-		ivideo.video_vheight = ivideo.video_height =
-		    sisbios_mode[sisfb_mode_idx].yres;
+		ivideo.video_vwidth = ivideo.video_width = sisbios_mode[sisfb_mode_idx].xres;
+		ivideo.video_vheight = ivideo.video_height = sisbios_mode[sisfb_mode_idx].yres;
 		ivideo.org_x = ivideo.org_y = 0;
 		video_linelength = ivideo.video_width * (ivideo.video_bpp >> 3);
-
 	}
 	return 0;
 }
 
-static void sisfb_set_disp (int con, struct fb_var_screeninfo *var)
+static void sisfb_set_disp(int con, struct fb_var_screeninfo *var)
 {
 	struct fb_fix_screeninfo fix;
 	struct display *display;
 	struct display_switch *sw;
-	u32 flags;
+	long flags;
 
 	if (con >= 0)
 		display = &fb_display[con];
 	else
-		display = &disp;
+		display = &disp;	
 
-	sisfb_get_fix (&fix, con, 0);
+	sisfb_get_fix(&fix, con, 0);
 
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
+	display->screen_base = ivideo.video_vbase;
+#endif
 	display->visual = fix.visual;
 	display->type = fix.type;
 	display->type_aux = fix.type_aux;
@@ -590,139 +674,147 @@ static void sisfb_set_disp (int con, struct fb_var_screeninfo *var)
 	display->inverse = sisfb_inverse;
 	display->var = *var;
 
-	save_flags (flags);
+	save_flags(flags);
 	switch (ivideo.video_bpp) {
 #ifdef FBCON_HAS_CFB8
-	case 8:
+	   case 8:
 		sw = &fbcon_cfb8;
 		break;
 #endif
 #ifdef FBCON_HAS_CFB16
-	case 15:
-	case 16:
+	   case 15:
+	   case 16:
 		sw = &fbcon_cfb16;
 		display->dispsw_data = fbcon_cmap.cfb16;
 		break;
 #endif
 #ifdef FBCON_HAS_CFB24
-	case 24:
+	   case 24:
 		sw = &fbcon_cfb24;
 		display->dispsw_data = fbcon_cmap.cfb24;
 		break;
 #endif
 #ifdef FBCON_HAS_CFB32
-	case 32:
+	   case 32:
 		sw = &fbcon_cfb32;
 		display->dispsw_data = fbcon_cmap.cfb32;
 		break;
 #endif
-	default:
+	   default:
 		sw = &fbcon_dummy;
 		return;
 	}
-	memcpy (&sisfb_sw, sw, sizeof (*sw));
+	memcpy(&sisfb_sw, sw, sizeof(*sw));
 	display->dispsw = &sisfb_sw;
-	restore_flags (flags);
+	restore_flags(flags);
 
 	display->scrollmode = SCROLL_YREDRAW;
 	sisfb_sw.bmove = fbcon_redraw_bmove;
 }
 
-static void sisfb_do_install_cmap (int con, struct fb_info *info)
+static void sisfb_do_install_cmap(int con, struct fb_info *info)
 {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
 	if (con != info->currcon)
 		return;
 
-	if (fb_display[con].cmap.len)
-		fb_set_cmap (&fb_display[con].cmap, 1, info);
-	else
-		fb_set_cmap (fb_default_cmap (video_cmap_len), 1, info);
+        if (fb_display[con].cmap.len)
+                fb_set_cmap(&fb_display[con].cmap, 1, info);
+        else
+		fb_set_cmap(fb_default_cmap(video_cmap_len), 1, info);
+#else
+        if (con != currcon)
+		return;
+
+        if (fb_display[con].cmap.len)
+		fb_set_cmap(&fb_display[con].cmap, 1, sisfb_setcolreg, info);
+        else
+		fb_set_cmap(fb_default_cmap(video_cmap_len), 1,
+			    sisfb_setcolreg, info);
+#endif
+
 }
 
+
 /* --------------- Chip-dependent Routines --------------------------- */
 
-#ifdef CONFIG_FB_SIS_300	/* for SiS 300/630/540/730 */
-static int sisfb_get_dram_size_300 (void)
+#ifdef CONFIG_FB_SIS_300 /* for SiS 300/630/540/730 */
+static int sisfb_get_dram_size_300(void)
 {
 	struct pci_dev *pdev = NULL;
 	int pdev_valid = 0;
-	u8 pci_data, reg;
+	u8  pci_data, reg;
 	u16 nbridge_id;
 
 	switch (ivideo.chip) {
-	case SIS_540:
+	   case SIS_540:
 		nbridge_id = PCI_DEVICE_ID_SI_540;
 		break;
-	case SIS_630:
+	   case SIS_630:
 		nbridge_id = PCI_DEVICE_ID_SI_630;
 		break;
-	case SIS_730:
+	   case SIS_730:
 		nbridge_id = PCI_DEVICE_ID_SI_730;
 		break;
-	default:
+	   default:
 		nbridge_id = 0;
 		break;
 	}
 
-	if (nbridge_id == 0) {
-		vgawb (SEQ_ADR, IND_SIS_DRAM_SIZE);
+	if (nbridge_id == 0) {  /* 300 */
+		vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
 		ivideo.video_size =
-		    ((unsigned
-		      int) ((vgarb (SEQ_DATA) & SIS_DRAM_SIZE_MASK) + 1) << 20);
-	} else {
-		pci_for_each_dev (pdev) {
-			if ((pdev->vendor == PCI_VENDOR_ID_SI)
-			    && (pdev->device == nbridge_id)) {
-				//&& (pdev->device == PCI_DEVICE_ID_SI_630)) {
-				pci_read_config_byte (pdev, IND_BRI_DRAM_STATUS,
-						      &pci_data);
+		        ((unsigned int) ((vgarb(SEQ_DATA) & SIS_DRAM_SIZE_MASK) + 1) << 20);
+	} else {		/* 540, 630, 730 */
+		pci_for_each_dev(pdev) {
+			if ((pdev->vendor == PCI_VENDOR_ID_SI) 
+				&& (pdev->device == nbridge_id)) {
+				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS, &pci_data);
 				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
-				ivideo.video_size =
-				    (unsigned int) (1 << (pci_data + 21));
+				ivideo.video_size = (unsigned int)(1 << (pci_data+21));
 				pdev_valid = 1;
-
+	
 				reg = SIS_DATA_BUS_64 << 6;
-				vgawb (SEQ_ADR, IND_SIS_DRAM_SIZE);
+				vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
 				switch (pci_data) {
-				case BRI_DRAM_SIZE_2MB:
+				   case BRI_DRAM_SIZE_2MB:
 					reg |= SIS_DRAM_SIZE_2MB;
 					break;
-				case BRI_DRAM_SIZE_4MB:
+				   case BRI_DRAM_SIZE_4MB:
 					reg |= SIS_DRAM_SIZE_4MB;
 					break;
-				case BRI_DRAM_SIZE_8MB:
+				   case BRI_DRAM_SIZE_8MB:
 					reg |= SIS_DRAM_SIZE_8MB;
 					break;
-				case BRI_DRAM_SIZE_16MB:
+				   case BRI_DRAM_SIZE_16MB:
 					reg |= SIS_DRAM_SIZE_16MB;
 					break;
-				case BRI_DRAM_SIZE_32MB:
+				   case BRI_DRAM_SIZE_32MB:
 					reg |= SIS_DRAM_SIZE_32MB;
 					break;
-				case BRI_DRAM_SIZE_64MB:
+				   case BRI_DRAM_SIZE_64MB:
 					reg |= SIS_DRAM_SIZE_64MB;
 					break;
 				}
-				vgawb (SEQ_DATA, reg);
+				vgawb(SEQ_DATA, reg);
 				break;
-			}
-		}
-
+			}  
+		}   
+	
 		if (!pdev_valid)
 			return -1;
 	}
-
 	return 0;
 }
 
-static void sisfb_detect_VB_connect_300(void)
+static void sisfb_detect_VB_connect_300()
 {
 	u8 sr16, sr17, cr32, temp;
 
-	vgawb (SEQ_ADR, IND_SIS_SCRATCH_REG_17);
-	sr17 = vgarb (SEQ_DATA);
-	vgawb (CRTC_ADR, IND_SIS_SCRATCH_REG_CR32);
-	cr32 = vgarb (CRTC_DATA);
+	vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_17);
+	sr17 = vgarb(SEQ_DATA);
+	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR32);
+	cr32 = vgarb(CRTC_DATA);
 
 	ivideo.TV_plug = ivideo.TV_type = 0;
 	if ((sr17 & 0x0F) && (ivideo.chip != SIS_300)) {
@@ -735,25 +827,29 @@ static void sisfb_detect_VB_connect_300(void)
 				sisfb_crt1off = 0;
 		}
 
-		if (sr17 & 0x08)
+		if (sisfb_crt2type != -1)
+			/* TW: override detected CRT2 type */
+			ivideo.disp_state = sisfb_crt2type;
+		else if (sr17 & 0x08 )
 			ivideo.disp_state = DISPTYPE_CRT2;
 		else if (sr17 & 0x02)
 			ivideo.disp_state = DISPTYPE_LCD;
-		else if (sr17 & 0x04) {
+		else if (sr17 & 0x04)
 			ivideo.disp_state = DISPTYPE_TV;
-			if (sr17 & 0x20)
-				ivideo.TV_plug = TVPLUG_SVIDEO;
-			else if (sr17 & 0x10)
-				ivideo.TV_plug = TVPLUG_COMPOSITE;
-
-			vgawb (SEQ_ADR, IND_SIS_SCRATCH_REG_16);
-			sr16 = vgarb (SEQ_DATA);
-			if (sr16 & 0x20)
-				ivideo.TV_type = TVMODE_PAL;
-			else
-				ivideo.TV_type = TVMODE_NTSC;
-		} else
+		else
 			ivideo.disp_state = 0;
+
+		if (sr17 & 0x20)
+			ivideo.TV_plug = TVPLUG_SVIDEO;
+		else if (sr17 & 0x10)
+			ivideo.TV_plug = TVPLUG_COMPOSITE;
+
+		vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_16);
+		sr16 = vgarb(SEQ_DATA);
+		if (sr16 & 0x20)
+			ivideo.TV_type = TVMODE_PAL;
+		else
+			ivideo.TV_type = TVMODE_NTSC;
 	} else {
 		if ((cr32 & SIS_CRT1) && !sisfb_crt1off)
 			sisfb_crt1off = 0;
@@ -764,79 +860,97 @@ static void sisfb_detect_VB_connect_300(void)
 				sisfb_crt1off = 0;
 		}
 
-		if (cr32 & SIS_VB_CRT2)
+		if (sisfb_crt2type != -1)
+			/* TW: override detected CRT2 type */
+			ivideo.disp_state = sisfb_crt2type;
+		else if (cr32 & SIS_VB_CRT2)
 			ivideo.disp_state = DISPTYPE_CRT2;
 		else if (cr32 & SIS_VB_LCD)
 			ivideo.disp_state = DISPTYPE_LCD;
-		else if (cr32 & SIS_VB_TV) {
+		else if (cr32 & SIS_VB_TV)
 			ivideo.disp_state = DISPTYPE_TV;
-			if (cr32 & SIS_VB_HIVISION) {
-				ivideo.TV_type = TVMODE_HIVISION;
-				ivideo.TV_plug = TVPLUG_SVIDEO;
-			} else if (cr32 & SIS_VB_SVIDEO)
-				ivideo.TV_plug = TVPLUG_SVIDEO;
-			else if (cr32 & SIS_VB_COMPOSITE)
-				ivideo.TV_plug = TVPLUG_COMPOSITE;
-			else if (cr32 & SIS_VB_SCART)
-				ivideo.TV_plug = TVPLUG_SCART;
-
-			if (ivideo.TV_type == 0) {
-				// Eden Chen
-				//temp = *((u8 *)(sishw_ext.VirtualRomBase+0x52));
-				//if (temp&0x40) {
-				//      temp=*((u8 *)(sishw_ext.VirtualRomBase+0x53));
-				//} else {
-				vgawb (SEQ_ADR, IND_SIS_POWER_ON_TRAP);
-				temp = vgarb (SEQ_DATA);
-				//}
-				// ~Eden Chen
-				if (temp & 0x01)
-					ivideo.TV_type = TVMODE_PAL;
-				else
-					ivideo.TV_type = TVMODE_NTSC;
-			}
-		} else
+		else
 			ivideo.disp_state = 0;
+
+		/* TW: Detect TV plug & type anyway */
+		if (cr32 & SIS_VB_HIVISION) {
+			ivideo.TV_type = TVMODE_HIVISION;
+			ivideo.TV_plug = TVPLUG_SVIDEO;
+		}
+		else if (cr32 & SIS_VB_SVIDEO)
+			ivideo.TV_plug = TVPLUG_SVIDEO;
+		else if (cr32 & SIS_VB_COMPOSITE)
+			ivideo.TV_plug = TVPLUG_COMPOSITE;
+		else if (cr32 & SIS_VB_SCART)
+			ivideo.TV_plug = TVPLUG_SCART;
+
+		if (ivideo.TV_type == 0) {
+			// Eden Chen
+			//temp = *((u8 *)(sishw_ext.VirtualRomBase+0x52));
+			//if (temp&0x40) {
+			//	temp=*((u8 *)(sishw_ext.VirtualRomBase+0x53));
+				//} else {
+			vgawb(SEQ_ADR, IND_SIS_POWER_ON_TRAP);
+			temp = vgarb(SEQ_DATA);
+			//}
+			// ~Eden Chen
+			if (temp & 0x01)
+				ivideo.TV_type = TVMODE_PAL;
+			else
+				ivideo.TV_type = TVMODE_NTSC;
+		}
 	}
+
+	/* TW: Copy forceCRT1 option to CRT1off if option is given */
+    	if (sisfb_forcecrt1 != -1) {
+		vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_17);
+    		sr17 = vgarb(SEQ_DATA);
+    		if (sisfb_forcecrt1) {
+			sisfb_crt1off=0;
+			sr17 |= 0x80;
+		} else {
+			sisfb_crt1off=1;
+			sr17 &= ~0x80;
+		}
+		vgawb(SEQ_DATA, sr17);
+    	}
 }
 
-static void sisfb_get_VB_type_300 (void)
+static void sisfb_get_VB_type_300(void)
 {
 	u8 reg;
 
 	if (ivideo.chip != SIS_300) {
-		if (!sisfb_has_VB_300 ()) {
-			vgawb (CRTC_ADR, IND_SIS_SCRATCH_REG_CR37);
-			reg = vgarb (CRTC_DATA);
+		if (!sisfb_has_VB_300()) {
+			vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR37);
+			reg = vgarb(CRTC_DATA);
 
 			switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
-			case SIS_EXTERNAL_CHIP_SIS301:
+			   case SIS_EXTERNAL_CHIP_SIS301:
 				ivideo.hasVB = HASVB_301;
 				break;
-			case SIS_EXTERNAL_CHIP_LVDS:
+			   case SIS_EXTERNAL_CHIP_LVDS:
 				ivideo.hasVB = HASVB_LVDS;
 				break;
-			case SIS_EXTERNAL_CHIP_TRUMPION:
+			   case SIS_EXTERNAL_CHIP_TRUMPION:
 				ivideo.hasVB = HASVB_TRUMPION;
 				break;
-			case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
+			   case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
 				ivideo.hasVB = HASVB_LVDS_CHRONTEL;
 				break;
-			case SIS_EXTERNAL_CHIP_CHRONTEL:
+			   case SIS_EXTERNAL_CHIP_CHRONTEL:
 				ivideo.hasVB = HASVB_CHRONTEL;
 				break;
-			default:
+			   default:
 				break;
 			}
 		}
 	} else {
-		sisfb_has_VB_300 ();
+		sisfb_has_VB_300();
 	}
-
-	//sishw_ext.hasVB = ivideo.hasVB;
 }
 
-static int sisfb_has_VB_300 (void)
+static int sisfb_has_VB_300(void)
 {
 	// Eden Chen
 	//u8 sr38, sr39, vb_chipid;
@@ -846,146 +960,201 @@ static int sisfb_has_VB_300 (void)
 	//sr38 = vgarb(SEQ_DATA);
 	//vgawb(SEQ_ADR, IND_SIS_POWER_ON_TRAP2);
 	//sr39 = vgarb(SEQ_DATA);
-	vgawb (VB_PART4_ADR, 0x0);
-	vb_chipid = vgarb (VB_PART4_DATA);
+	vgawb(VB_PART4_ADR, 0x0);
+	vb_chipid = vgarb(VB_PART4_DATA);
 
 	switch (vb_chipid) {
-	case 0x01:
+	   case 0x01:
 		ivideo.hasVB = HASVB_301;
 		break;
-	case 0x02:
+	   case 0x02:
 		ivideo.hasVB = HASVB_302;
 		break;
-	case 0x03:
+	   case 0x03:
 		ivideo.hasVB = HASVB_303;
 		break;
-	default:
+	   default:
 		ivideo.hasVB = HASVB_NONE;
 		return FALSE;
 	}
 	return TRUE;
-}
 
-#endif				/* CONFIG_FB_SIS_300 */
+	//if (
+	//	( (ivideo.chip == SIS_300) && (sr38 & 0x20) )
+	//	||
+	//	( (ivideo.chip == SIS_540) && (sr38 & 0x20) && (!(sr39 & 0x80)) )
+	//	||
+	//	( (ivideo.chip == SIS_630 ) && (sr38 & 0x20) && (!(sr39 & 0x80)) && 
+	//		((ivideo.revision_id & 0xf0) < 0x30) && (vb_chipid == 1) ) 
+	//	||
+	//	( (ivideo.chip == SIS_630 ) && ((ivideo.revision_id & 0xf0) >= 0x30) && 
+	//		(vb_chipid == 1) ) 
+	//	||
+	//	( (ivideo.chip == SIS_730) && (vb_chipid == 1) ) /* 730 */
+	//) {
+	//	ivideo.hasVB = HASVB_301;
+	//	return TRUE;
+	//} else {
+	//	ivideo.hasVB = HASVB_NONE;
+	//	return FALSE;
+	//}
 
-#ifdef CONFIG_FB_SIS_315	/* for SiS 315H/315 */
-static int sisfb_get_dram_size_315 (void)
+	// ~Eden Chen
+}
+#endif  /* CONFIG_FB_SIS_300 */
+
+#ifdef CONFIG_FB_SIS_315    /* for SiS 315/550/650/740 */
+static int sisfb_get_dram_size_315(void)
 {
-#ifdef LINUXBIOS
 	struct pci_dev *pdev = NULL;
 	int pdev_valid = 0;
-	u8 pci_data;
-#endif
-	u8 reg = 0;
+	u8  pci_data;
+	u8  reg = 0;
 
-	if (ivideo.chip == SIS_550) {
+	if (ivideo.chip == SIS_550 || ivideo.chip == SIS_650) {
 #ifdef LINUXBIOS
-		pci_for_each_dev (pdev) {
-			if ((pdev->vendor == PCI_VENDOR_ID_SI)
-			    && (pdev->device == PCI_DEVICE_ID_SI_550)) {
-				pci_read_config_byte (pdev, IND_BRI_DRAM_STATUS,
-						      &pci_data);
+		pci_for_each_dev(pdev) {
+			if ( (pdev->vendor == PCI_VENDOR_ID_SI)
+				&& ( (pdev->device == PCI_DEVICE_ID_SI_550)
+				  || (pdev->device == PCI_DEVICE_ID_SI_650))) {
+				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS,
+				                     &pci_data);
 				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
 				ivideo.video_size =
-				    (unsigned int) (1 << (pci_data + 21));
+				    (unsigned int)(1 << (pci_data+21));
 				pdev_valid = 1;
 
-				vgawb (SEQ_ADR, IND_SIS_DRAM_SIZE);
-				reg = vgarb (SEQ_DATA) & 0xC0;
+				/* TW: Initialize SR14 "by hand" */
+				vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
+				reg = vgarb(SEQ_DATA) & 0xC0;
 
 				switch (pci_data) {
-					//case BRI_DRAM_SIZE_2MB:
-					//      reg |= (SIS315_DRAM_SIZE_2MB << 4); break;
-				case BRI_DRAM_SIZE_4MB:
+				//case BRI_DRAM_SIZE_2MB:
+				//	reg |= (SIS315_DRAM_SIZE_2MB << 4); break;
+				   case BRI_DRAM_SIZE_4MB:
 					reg |= SIS550_DRAM_SIZE_4MB;
 					break;
-				case BRI_DRAM_SIZE_8MB:
+				   case BRI_DRAM_SIZE_8MB:
 					reg |= SIS550_DRAM_SIZE_8MB;
 					break;
-				case BRI_DRAM_SIZE_16MB:
+				   case BRI_DRAM_SIZE_16MB:
 					reg |= SIS550_DRAM_SIZE_16MB;
 					break;
-				case BRI_DRAM_SIZE_32MB:
+				   case BRI_DRAM_SIZE_32MB:
 					reg |= SIS550_DRAM_SIZE_32MB;
 					break;
-				case BRI_DRAM_SIZE_64MB:
+				   case BRI_DRAM_SIZE_64MB:
 					reg |= SIS550_DRAM_SIZE_64MB;
 					break;
-					/* case BRI_DRAM_SIZE_128MB:
-					   reg |= (SIS315_DRAM_SIZE_128MB << 4); break; */
+				   /* case BRI_DRAM_SIZE_128MB:
+					reg |= (SIS315_DRAM_SIZE_128MB << 4); break; */
 				}
 
-				/* TODO : set Dual channel and bus width bits here */
+			        /* TODO : set Dual channel and bus width bits here */
 
-				vgawb (SEQ_DATA, reg);
+				vgawb(SEQ_DATA, reg);
 				break;
-			}
+			}  
 		}
-
+	
 		if (!pdev_valid)
 			return -1;
 #else
-		vgawb (SEQ_ADR, IND_SIS_DRAM_SIZE);
-		reg = vgarb (SEQ_DATA);
+		vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
+		reg = vgarb(SEQ_DATA);
 		switch (reg & SIS550_DRAM_SIZE_MASK) {
-		case SIS550_DRAM_SIZE_4MB:
-			ivideo.video_size = 0x400000;
-			break;
-		case SIS550_DRAM_SIZE_8MB:
-			ivideo.video_size = 0x800000;
-			break;
-		case SIS550_DRAM_SIZE_16MB:
-			ivideo.video_size = 0x1000000;
-			break;
-		case SIS550_DRAM_SIZE_24MB:
-			ivideo.video_size = 0x1800000;
-			break;
-		case SIS550_DRAM_SIZE_32MB:
-			ivideo.video_size = 0x2000000;
-			break;
-		case SIS550_DRAM_SIZE_64MB:
-			ivideo.video_size = 0x4000000;
-			break;
-		case SIS550_DRAM_SIZE_96MB:
-			ivideo.video_size = 0x6000000;
-			break;
-		case SIS550_DRAM_SIZE_128MB:
-			ivideo.video_size = 0x8000000;
-			break;
-		case SIS550_DRAM_SIZE_256MB:
-			ivideo.video_size = 0x10000000;
-			break;
-		default:
-			return -1;
+		   case SIS550_DRAM_SIZE_4MB:
+			ivideo.video_size = 0x400000;   break;
+		   case SIS550_DRAM_SIZE_8MB:
+			ivideo.video_size = 0x800000;   break;
+		   case SIS550_DRAM_SIZE_16MB:
+			ivideo.video_size = 0x1000000;  break;
+		   case SIS550_DRAM_SIZE_24MB:
+			ivideo.video_size = 0x1800000;  break;
+		   case SIS550_DRAM_SIZE_32MB:
+			ivideo.video_size = 0x2000000;	break;
+		   case SIS550_DRAM_SIZE_64MB:
+			ivideo.video_size = 0x4000000;	break;
+		   case SIS550_DRAM_SIZE_96MB:
+			ivideo.video_size = 0x6000000;	break;
+		   case SIS550_DRAM_SIZE_128MB:
+			ivideo.video_size = 0x8000000;	break;
+		   case SIS550_DRAM_SIZE_256MB:
+			ivideo.video_size = 0x10000000;	break;
+		   default:
+		        /* TW: Some 550 BIOSes don't seem to initialize SR14 correctly (if at all),
+			 *     do it the hard way ourselves in this case. Unfortunately, we don't
+			 *     support 24, 48, 96 and other "odd" amounts here.
+			 */
+		        printk(KERN_INFO
+			       "sisfb: Warning: Could not determine memory size, "
+			       "now reading from PCI config\n");
+			pdev_valid = 0;
+			pci_for_each_dev(pdev) {
+			   if ( (pdev->vendor == PCI_VENDOR_ID_SI)
+			         && (pdev->device == PCI_DEVICE_ID_SI_550) ) {
+				pci_read_config_byte(pdev, IND_BRI_DRAM_STATUS,
+				                     &pci_data);
+				pci_data = (pci_data & BRI_DRAM_SIZE_MASK) >> 4;
+				ivideo.video_size = (unsigned int)(1 << (pci_data+21));
+				pdev_valid = 1;
+				/* TW: Initialize SR14=IND_SIS_DRAM_SIZE */
+				vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
+				reg = vgarb(SEQ_DATA) & 0xC0;
+				switch (pci_data) {
+				   case BRI_DRAM_SIZE_4MB:
+					reg |= SIS550_DRAM_SIZE_4MB;  break;
+				   case BRI_DRAM_SIZE_8MB:
+					reg |= SIS550_DRAM_SIZE_8MB;  break;
+				   case BRI_DRAM_SIZE_16MB:
+					reg |= SIS550_DRAM_SIZE_16MB; break;
+				   case BRI_DRAM_SIZE_32MB:
+					reg |= SIS550_DRAM_SIZE_32MB; break;
+				   case BRI_DRAM_SIZE_64MB:
+					reg |= SIS550_DRAM_SIZE_64MB; break;
+				   /* case BRI_DRAM_SIZE_128MB:
+					reg |= (SIS315_DRAM_SIZE_128MB << 4); break; */
+				   default:
+				   	printk(KERN_INFO "sisfb: Unable to determine memory size, giving up.\n");
+					return -1;
+				}
+				vgawb(SEQ_DATA, reg);
+			   }
+			}
+			if (!pdev_valid) {
+				printk(KERN_INFO "sisfb: Total confusion - No SiS PCI VGA device found?!\n");
+				return -1;
+			}
+			return 0;
 		}
 #endif
 		return 0;
-	} else {
-		vgawb (SEQ_ADR, IND_SIS_DRAM_SIZE);
-		reg = vgarb (SEQ_DATA);
+	} else {	/* 315 */
+		vgawb(SEQ_ADR, IND_SIS_DRAM_SIZE);
+		reg = vgarb(SEQ_DATA);
 		switch ((reg & SIS315_DRAM_SIZE_MASK) >> 4) {
-		case SIS315_DRAM_SIZE_2MB:
+		   case SIS315_DRAM_SIZE_2MB:
 			ivideo.video_size = 0x200000;
 			break;
-		case SIS315_DRAM_SIZE_4MB:
+		   case SIS315_DRAM_SIZE_4MB:
 			ivideo.video_size = 0x400000;
 			break;
-		case SIS315_DRAM_SIZE_8MB:
+		   case SIS315_DRAM_SIZE_8MB:
 			ivideo.video_size = 0x800000;
 			break;
-		case SIS315_DRAM_SIZE_16MB:
+		   case SIS315_DRAM_SIZE_16MB:
 			ivideo.video_size = 0x1000000;
 			break;
-		case SIS315_DRAM_SIZE_32MB:
+		   case SIS315_DRAM_SIZE_32MB:
 			ivideo.video_size = 0x2000000;
 			break;
-		case SIS315_DRAM_SIZE_64MB:
+		   case SIS315_DRAM_SIZE_64MB:
 			ivideo.video_size = 0x4000000;
 			break;
-		case SIS315_DRAM_SIZE_128MB:
+		   case SIS315_DRAM_SIZE_128MB:
 			ivideo.video_size = 0x8000000;
 			break;
-		default:
+		   default:
 			return -1;
 		}
 	}
@@ -993,209 +1162,318 @@ static int sisfb_get_dram_size_315 (void)
 	reg &= SIS315_DUAL_CHANNEL_MASK;
 	reg >>= 2;
 	switch (reg) {
-	case SIS315_SINGLE_CHANNEL_2_RANK:
+	   case SIS315_SINGLE_CHANNEL_2_RANK:
 		ivideo.video_size <<= 1;
 		break;
-	case SIS315_DUAL_CHANNEL_1_RANK:
+	   case SIS315_DUAL_CHANNEL_1_RANK:
 		ivideo.video_size <<= 1;
 		break;
+	   case SIS315_ASYM_DDR:		/* TW: DDR asymentric */
+		ivideo.video_size += (ivideo.video_size/2);
+		break;
 	}
 
 	return 0;
 }
 
-static void sisfb_detect_VB_connect_315 (void)
+static void sisfb_detect_VB_connect_315(void)
 {
-	u8 cr32, temp;
+	u8 sr17, cr32, temp;
 
-	vgawb (CRTC_ADR, IND_SIS_SCRATCH_REG_CR32);
-	cr32 = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR32);
+	cr32 = vgarb(CRTC_DATA);
 
 	ivideo.TV_plug = ivideo.TV_type = 0;
 	if ((cr32 & SIS_CRT1) && !sisfb_crt1off)
 		sisfb_crt1off = 0;
 	else {
-		if (cr32 & 0x5F)
+		if (cr32 & 0x5F)   
 			sisfb_crt1off = 1;
 		else
 			sisfb_crt1off = 0;
 	}
 
-	if (cr32 & SIS_VB_CRT2)
+	if (sisfb_crt2type != -1)
+		/* TW: Override with option */
+		ivideo.disp_state = sisfb_crt2type;
+	else if (cr32 & SIS_VB_CRT2)
 		ivideo.disp_state = DISPTYPE_CRT2;
 	else if (cr32 & SIS_VB_LCD)
 		ivideo.disp_state = DISPTYPE_LCD;
-	else if (cr32 & SIS_VB_TV) {
+	else if (cr32 & SIS_VB_TV)
 		ivideo.disp_state = DISPTYPE_TV;
+	else
+		ivideo.disp_state = 0;
 
-		if (cr32 & SIS_VB_HIVISION) {
-			ivideo.TV_type = TVMODE_HIVISION;
-			ivideo.TV_plug = TVPLUG_SVIDEO;
-		} else if (cr32 & SIS_VB_SVIDEO)
-			ivideo.TV_plug = TVPLUG_SVIDEO;
-		else if (cr32 & SIS_VB_COMPOSITE)
-			ivideo.TV_plug = TVPLUG_COMPOSITE;
-		else if (cr32 & SIS_VB_SCART)
-			ivideo.TV_plug = TVPLUG_SCART;
+	if (cr32 & SIS_VB_HIVISION) {
+		ivideo.TV_type = TVMODE_HIVISION;
+		ivideo.TV_plug = TVPLUG_SVIDEO;
+	} else if (cr32 & SIS_VB_SVIDEO)
+		ivideo.TV_plug = TVPLUG_SVIDEO;
+	else if (cr32 & SIS_VB_COMPOSITE)
+		ivideo.TV_plug = TVPLUG_COMPOSITE;
+	else if (cr32 & SIS_VB_SCART)
+		ivideo.TV_plug = TVPLUG_SCART;
+
+	if (ivideo.TV_type == 0) {
+	    /* TW: PAL/NTSC changed for 315/650 */
+	    if(ivideo.chip <= SIS_315PRO) {
+#if 0
+		vgawb(SEQ_ADR, IND_SIS_POWER_ON_TRAP);
+		temp = vgarb(SEQ_DATA);
+#endif
+                vgawb(CRTC_ADR, 0x38);
+		temp = vgarb(CRTC_DATA);
+		if (temp & 0x10)
+			ivideo.TV_type = TVMODE_PAL;
+		else
+			ivideo.TV_type = TVMODE_NTSC;
+	    } else {
+	        vgawb(CRTC_ADR, 0x79);
+		temp = vgarb(CRTC_DATA);
+		if (temp & 0x20)
+			ivideo.TV_type = TVMODE_PAL;
+		else
+			ivideo.TV_type = TVMODE_NTSC;
+	    }
+	}
 
-		if (ivideo.TV_type == 0) {
-			vgawb (SEQ_ADR, IND_SIS_POWER_ON_TRAP);
-			temp = vgarb (SEQ_DATA);
+	/* TW: Copy forceCRT1 option to CRT1off if option is given */
+    	if (sisfb_forcecrt1 != -1) {
+		vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_17);
+    		sr17 = vgarb(SEQ_DATA);
+    		if (sisfb_forcecrt1) {
+			sisfb_crt1off=0;
+			sr17 |= 0x80;
+		} else {
+			sisfb_crt1off=1;
+			sr17 &= ~0x80;
+		}
+		vgawb(SEQ_DATA, sr17);
+    	}
+}
 
-			if (temp & 0x01)
-				ivideo.TV_type = TVMODE_PAL;
-			else
-				ivideo.TV_type = TVMODE_NTSC;
+static void sisfb_get_VB_type_315(void)
+{
+	u8 reg;
+
+		if (!sisfb_has_VB_315()) {
+			vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR37);
+			reg = vgarb(CRTC_DATA);
+
+			/* TW: CR37 changed on 310/325 series */
+			switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
+			   case SIS_EXTERNAL_CHIP_SIS301:
+				ivideo.hasVB = HASVB_301;
+				break;
+			   case SIS310_EXTERNAL_CHIP_LVDS:
+				ivideo.hasVB = HASVB_LVDS;
+				break;
+			   case SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL:
+				ivideo.hasVB = HASVB_LVDS_CHRONTEL;
+				break;
+			   default:
+				break;
+			}
 		}
-	} else
-		ivideo.disp_state = 0;
 }
 
-static void sisfb_get_VB_type_315 (void)
+
+static int sisfb_has_VB_315(void)
 {
 	u8 vb_chipid;
 
-	vgawb (VB_PART4_ADR, 0x0);
-	vb_chipid = vgarb (VB_PART4_DATA);
+	vgawb(VB_PART4_ADR, 0x00);
+	vb_chipid = vgarb(VB_PART4_DATA);
 
 	switch (vb_chipid) {
-	case 0x01:
+	   case 0x01:
 		ivideo.hasVB = HASVB_301;
 		break;
-	case 0x02:
+	   case 0x02:
 		ivideo.hasVB = HASVB_302;
 		break;
-	case 0x03:
+	   case 0x03:
 		ivideo.hasVB = HASVB_303;
 		break;
-	default:
+	   default:
 		ivideo.hasVB = HASVB_NONE;
+		return FALSE;
 	}
-	// Eden Chen
-	//sishw_ext.hasVB = ivideo.hasVB;
-	// ~Eden Chen
+	return TRUE;
 }
-#endif				/* CONFIG_FB_SIS_315 */
+
+#endif   /* CONFIG_FB_SIS_315 */
 
 /* --------------------- Heap Routines ------------------------------- */
 
-static int sisfb_heap_init (void)
+static int sisfb_heap_init(void)
 {
 	SIS_OH *poh;
-	u8 temp = 0;
+	u8 temp=0;
 #ifdef CONFIG_FB_SIS_315
-	int agp_enabled = 1;
-	u32 agp_size;
+	int            agp_enabled = 1;
+	u32            agp_size;
 	unsigned long *cmdq_baseport = 0;
 	unsigned long *read_port = 0;
 	unsigned long *write_port = 0;
-	SIS_CMDTYPE cmd_type;
+	SIS_CMDTYPE    cmd_type;
 #ifndef AGPOFF
-	agp_kern_info *agp_info;
-	agp_memory *agp;
-	u32 agp_phys;
+	agp_kern_info  *agp_info;
+	agp_memory     *agp;
+	u32            agp_phys;
 #endif
 #endif
-	/*karl:10/01/2001 */
-	if (!sisfb_mem) {
-
-		if (ivideo.video_size > 0x800000)
-			sisfb_heap_start =
-			    (unsigned long) ivideo.video_vbase + 0x800000;
-		else
-			sisfb_heap_start =
-			    (unsigned long) ivideo.video_vbase + 0x400000;
-	} else
-		sisfb_heap_start =
-		    (unsigned long) (ivideo.video_vbase + sisfb_mem * 0x100000);
+/* TW: The heap start is either set manually using the "mem" parameter, or
+ *     defaults as follows:
+ *     -) If more than 16MB videoRAM available, let our heap start at 12MB.
+ *     -) If more than  8MB videoRAM available, let our heap start at  8MB.
+ *     -) If 4MB or less is available, let it start at 4MB.
+ *     This is for avoiding a clash with X driver which uses the beginning
+ *     of the videoRAM. To limit size of X framebuffer, use Option MaxXFBMem
+ *     in XF86Config-4.
+ *     The heap start can also be specified by parameter "mem" when starting the sisfb
+ *     driver. sisfb mem=1024 lets heap starts at 1MB, etc.
+ */
+     if ((!sisfb_mem) || (sisfb_mem > (ivideo.video_size/1024))) {
+        if (ivideo.video_size > 0x1000000) {
+	        ivideo.heapstart = 0xc00000;
+	} else if (ivideo.video_size > 0x800000) {
+	        ivideo.heapstart = 0x800000;
+	} else {
+		ivideo.heapstart = 0x400000;
+	}
+     } else {
+           ivideo.heapstart = sisfb_mem * 1024;
+     }
+     sisfb_heap_start =
+	       (unsigned long) (ivideo.video_vbase + ivideo.heapstart);
+     printk(KERN_INFO "sisfb: Memory heap starting at %dK\n",
+     					(int)(ivideo.heapstart / 1024));
 
-	sisfb_heap_end = (unsigned long) ivideo.video_vbase + ivideo.video_size;
-	sisfb_heap_size = sisfb_heap_end - sisfb_heap_start;
+     sisfb_heap_end = (unsigned long) ivideo.video_vbase + ivideo.video_size;
+     sisfb_heap_size = sisfb_heap_end - sisfb_heap_start;
 
 #ifdef CONFIG_FB_SIS_315
-
-	cmdq_baseport =
-	    (unsigned long *) (ivideo.mmio_vbase + MMIO_QUEUE_PHYBASE);
-	write_port =
-	    (unsigned long *) (ivideo.mmio_vbase + MMIO_QUEUE_WRITEPORT);
-	read_port = (unsigned long *) (ivideo.mmio_vbase + MMIO_QUEUE_READPORT);
-
-	DPRINTK ("AGP base: 0x%p, read: 0x%p, write: 0x%p\n", cmdq_baseport,
-		 read_port, write_port);
-
-	agp_size = COMMAND_QUEUE_AREA_SIZE;
+     if (sisvga_engine == SIS_315_VGA) {
+        /* TW: Now initialize the 310 series' command queue mode.
+	 * On 310, there are three queue modes available which
+	 *     are chosen by setting bits 7:5 in SR26:
+	 * 1. MMIO queue mode (bit 5, 0x20). The hardware will keep
+	 *    track of the queue, the FIFO, command parsing and so
+	 *    on. This is the one comparable to the 300 series.
+	 * 2. VRAM queue mode (bit 6, 0x40). In this case, one will
+	 *    have to do queue management himself. Register 0x85c4 will
+	 *    hold the location of the next free queue slot, 0x85c8
+	 *    is the "queue read pointer" whose way of working is
+	 *    unknown to me. Anyway, this mode would require a
+	 *    translation of the MMIO commands to some kind of
+	 *    accelerator assembly and writing these commands
+	 *    to the memory location pointed to by 0x85c4.
+	 *    We will not use this, as nobody knows how this
+	 *    "assembly" works, and as it would require a complete
+	 *    re-write of the accelerator code.
+	 * 3. AGP queue mode (bit 7, 0x80). Works as 2., but keeps the
+	 *    queue in AGP memory space.
+	 *
+	 * SR26 bit 4 is called "Bypass H/W queue".
+	 * SR26 bit 1 is called "Enable Command Queue Auto Correction"
+	 * SR26 bit 0 resets the queue
+	 * Size of queue memory is encoded in bits 3:2 like this:
+	 *    00  (0x00)  512K
+	 *    01  (0x04)  1M
+	 *    10  (0x08)  2M
+	 *    11  (0x0C)  4M
+	 * The queue location is to be written to 0x85C0.
+	 *
+         */
+	cmdq_baseport = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_PHYBASE);
+	write_port    = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_WRITEPORT);
+	read_port     = (unsigned long *)(ivideo.mmio_vbase + MMIO_QUEUE_READPORT);
+
+	DPRINTK("AGP base: 0x%p, read: 0x%p, write: 0x%p\n", cmdq_baseport, read_port, write_port);
+
+	agp_size  = COMMAND_QUEUE_AREA_SIZE;
 
 #ifndef AGPOFF
+	if (sisfb_queuemode == AGP_CMD_QUEUE) {
+		agp_info = vmalloc(sizeof(agp_kern_info));
+		memset((void*)agp_info, 0x00, sizeof(agp_kern_info));
+		agp_copy_info(agp_info);
 
-	agp_info = vmalloc (sizeof (agp_kern_info));
-	memset ((void *) agp_info, 0x00, sizeof (agp_kern_info));
-	agp_copy_info (agp_info);
-
-	agp_backend_acquire ();
+		agp_backend_acquire();
 
-	agp =
-	    agp_allocate_memory (COMMAND_QUEUE_AREA_SIZE / PAGE_SIZE,
-				 AGP_NORMAL_MEMORY);
-	if (agp == NULL) {
-		DPRINTK ("Allocate AGP buffer failed.\n");
-		agp_enabled = 0;
-	} else {
-		if (agp_bind_memory (agp, agp->pg_start) != 0) {
-			DPRINTK ("AGP : can not bind memory\n");
+		agp = agp_allocate_memory(COMMAND_QUEUE_AREA_SIZE/PAGE_SIZE,
+					  AGP_NORMAL_MEMORY);
+		if (agp == NULL) {
+			DPRINTK("sisfb: Allocating AGP buffer failed.\n");
 			agp_enabled = 0;
 		} else {
-			agp_enable (0);
+			if (agp_bind_memory(agp, agp->pg_start) != 0) {
+				DPRINTK("sisfb: AGP: Failed to bind memory\n");
+				/* TODO: Free AGP memory here */
+				agp_enabled = 0;
+			} else {
+				agp_enable(0);
+			}
 		}
 	}
-
 #else
-	agp_enabled = 0;
+	agp_enabled= 0;
 #endif
-	if (agp_enabled)
+
+	/* TW: Now select the queue mode */
+
+	if ((agp_enabled) && (sisfb_queuemode == AGP_CMD_QUEUE)) {
 		cmd_type = AGP_CMD_QUEUE;
-	else if (sisfb_heap_size >= COMMAND_QUEUE_AREA_SIZE)
+		printk(KERN_INFO "sisfb: Using AGP queue mode\n");
+/*	} else if (sisfb_heap_size >= COMMAND_QUEUE_AREA_SIZE)  */
+        } else if (sisfb_queuemode == VM_CMD_QUEUE) {
 		cmd_type = VM_CMD_QUEUE;
-	else
+		printk(KERN_INFO "sisfb: Using VRAM queue mode\n");
+	} else {
+		printk(KERN_INFO "sisfb: Using MMIO queue mode\n");
 		cmd_type = MMIO_CMD;
+	}
 
 	switch (agp_size) {
-	case 0x80000:
+	   case 0x80000:
 		temp = SIS_CMD_QUEUE_SIZE_512k;
 		break;
-	case 0x100000:
+	   case 0x100000:
 		temp = SIS_CMD_QUEUE_SIZE_1M;
 		break;
-	case 0x200000:
+	   case 0x200000:
 		temp = SIS_CMD_QUEUE_SIZE_2M;
 		break;
-	case 0x400000:
+	   case 0x400000:
 		temp = SIS_CMD_QUEUE_SIZE_4M;
 		break;
 	}
 
 	switch (cmd_type) {
-	case AGP_CMD_QUEUE:
+	   case AGP_CMD_QUEUE:
 #ifndef AGPOFF
-		DPRINTK ("AGP buffer base:0x%lx, offset:0x%x, size is %dK\n",
-			 agp_info->aper_base, agp->physical, agp_size / 1024);
+		DPRINTK("sisfb: AGP buffer base:0x%lx, offset:0x%x, size: %dK\n",
+			agp_info->aper_base, agp->physical, agp_size/1024);
 
 		agp_phys = agp_info->aper_base + agp->physical;
 
-		vgawb (CRTC_ADR, IND_SIS_AGP_IO_PAD);
-		vgawb (CRTC_DATA, 0);
-		vgawb (CRTC_DATA, SIS_AGP_2X);
+		vgawb(CRTC_ADR, IND_SIS_AGP_IO_PAD);
+		vgawb(CRTC_DATA, 0);
+		vgawb(CRTC_DATA, SIS_AGP_2X);
 
-		vgawb (SEQ_ADR, IND_SIS_CMDQUEUE_THRESHOLD);
-		vgawb (SEQ_DATA, COMMAND_QUEUE_THRESHOLD);
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_THRESHOLD);
+		vgawb(SEQ_DATA, COMMAND_QUEUE_THRESHOLD);
 
-		vgawb (SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb (SEQ_DATA, SIS_CMD_QUEUE_RESET);
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
+		vgawb(SEQ_DATA, SIS_CMD_QUEUE_RESET);
 
 		*write_port = *read_port;
 
 		temp |= SIS_AGP_CMDQUEUE_ENABLE;
-		vgawb (SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb (SEQ_DATA, temp);
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
+		vgawb(SEQ_DATA, temp);
 
 		*cmdq_baseport = agp_phys;
 
@@ -1203,94 +1481,124 @@ static int sisfb_heap_init (void)
 #endif
 		break;
 
-	case VM_CMD_QUEUE:
+	   case VM_CMD_QUEUE:
 		sisfb_heap_end -= COMMAND_QUEUE_AREA_SIZE;
 		sisfb_heap_size -= COMMAND_QUEUE_AREA_SIZE;
 
-		vgawb (SEQ_ADR, IND_SIS_CMDQUEUE_THRESHOLD);
-		vgawb (SEQ_DATA, COMMAND_QUEUE_THRESHOLD);
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_THRESHOLD);
+		vgawb(SEQ_DATA, COMMAND_QUEUE_THRESHOLD);
 
-		vgawb (SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb (SEQ_DATA, SIS_CMD_QUEUE_RESET);
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
+		vgawb(SEQ_DATA, SIS_CMD_QUEUE_RESET);
 
 		*write_port = *read_port;
 
 		temp |= SIS_VRAM_CMDQUEUE_ENABLE;
-		vgawb (SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb (SEQ_DATA, temp);
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
+		vgawb(SEQ_DATA, temp);
 
 		*cmdq_baseport = ivideo.video_size - COMMAND_QUEUE_AREA_SIZE;
 
 		sisfb_caps |= VM_CMD_QUEUE_CAP;
 
-		DPRINTK ("VM Cmd Queue offset = 0x%lx, size is %dK\n",
-			 *cmdq_baseport, COMMAND_QUEUE_AREA_SIZE / 1024);
+		DPRINTK("sisfb: VM Cmd Queue offset = 0x%lx, size is %dK\n",
+			*cmdq_baseport, COMMAND_QUEUE_AREA_SIZE/1024);
 		break;
-	default:
-		vgawb (SEQ_ADR, IND_SIS_CMDQUEUE_SET);
-		vgawb (SEQ_DATA, SIS_MMIO_CMD_ENABLE);
+
+	   default:  /* MMIO */
+	   	/* TW: This previously only wrote SIS_MMIO_CMD_ENABLE
+		 * to IND_SIS_CMDQUEUE_SET. I doubt that this is
+		 * enough. Reserve memory in any way.
+		 */
+	   	sisfb_heap_end -= COMMAND_QUEUE_AREA_SIZE;
+		sisfb_heap_size -= COMMAND_QUEUE_AREA_SIZE;
+
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_THRESHOLD);
+		vgawb(SEQ_DATA, COMMAND_QUEUE_THRESHOLD);
+
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
+		vgawb(SEQ_DATA, SIS_CMD_QUEUE_RESET);
+
+		*write_port = *read_port;
+
+		/* TW: Set Auto_Correction bit; this works in sisfb lite,
+		 * so why not.
+		 */
+		temp |= (SIS_MMIO_CMD_ENABLE | SIS_CMD_AUTO_CORR);
+		vgawb(SEQ_ADR, IND_SIS_CMDQUEUE_SET);
+		vgawb(SEQ_DATA, temp);
+
+		*cmdq_baseport = ivideo.video_size - COMMAND_QUEUE_AREA_SIZE;
+
+		DPRINTK("sisfb: MMIO Cmd Queue offset = 0x%lx, size is %dK\n",
+			*cmdq_baseport, COMMAND_QUEUE_AREA_SIZE/1024);
 		break;
 	}
-
+     } /* sisvga_engine = 315 */
 #endif
 
 #ifdef CONFIG_FB_SIS_300
-	if (sisfb_heap_size >= TURBO_QUEUE_AREA_SIZE) {
-		unsigned int tqueue_pos;
+     if (sisvga_engine == SIS_300_VGA) {
+  	    /* TW: Now initialize TurboQueue. TB is always located at the very
+	     * top of the video RAM. */
+	    if (sisfb_heap_size >= TURBO_QUEUE_AREA_SIZE) {
+		unsigned int  tqueue_pos;
 		u8 tq_state;
 
-		tqueue_pos =
-		    (ivideo.video_size - TURBO_QUEUE_AREA_SIZE) / (64 * 1024);
+		tqueue_pos = (ivideo.video_size -
+		       TURBO_QUEUE_AREA_SIZE) / (64 * 1024);
 		temp = (u8) (tqueue_pos & 0xff);
-		vgawb (SEQ_ADR, IND_SIS_TURBOQUEUE_SET);
-		tq_state = vgarb (SEQ_DATA);
+		vgawb(SEQ_ADR, IND_SIS_TURBOQUEUE_SET);
+		tq_state = vgarb(SEQ_DATA);
 		tq_state |= 0xf0;
 		tq_state &= 0xfc;
 		tq_state |= (u8) (tqueue_pos >> 8);
-		vgawb (SEQ_DATA, tq_state);
-		vgawb (SEQ_ADR, IND_SIS_TURBOQUEUE_ADR);
-		vgawb (SEQ_DATA, temp);
+		vgawb(SEQ_DATA, tq_state);
+		vgawb(SEQ_ADR, IND_SIS_TURBOQUEUE_ADR);
+		vgawb(SEQ_DATA, temp);
 
 		sisfb_caps |= TURBO_QUEUE_CAP;
 
 		sisfb_heap_end -= TURBO_QUEUE_AREA_SIZE;
 		sisfb_heap_size -= TURBO_QUEUE_AREA_SIZE;
-		DPRINTK ("Turbo Queue: start at 0x%lx, size is %dK\n",
-			 sisfb_heap_end, TURBO_QUEUE_AREA_SIZE / 1024);
-	}
+		DPRINTK("sisfb: TurboQueue start at 0x%lx, size is %dK\n",
+			sisfb_heap_end, TURBO_QUEUE_AREA_SIZE/1024);
+	    }
+     }
 #endif
-
-	if (sisfb_heap_size >= HW_CURSOR_AREA_SIZE) {
-		sisfb_heap_end -= HW_CURSOR_AREA_SIZE;
-		sisfb_heap_size -= HW_CURSOR_AREA_SIZE;
+        /* TW: Now reserve memory for the HWCursor. It is always located at the very
+               top of the videoRAM, right below the TB memory area (if used). */
+	if (sisfb_heap_size >= sisfb_hwcursor_size) {
+		sisfb_heap_end -= sisfb_hwcursor_size;
+		sisfb_heap_size -= sisfb_hwcursor_size;
 		sisfb_hwcursor_vbase = sisfb_heap_end;
 
 		sisfb_caps |= HW_CURSOR_CAP;
 
-		DPRINTK ("Hardware Cursor: start at 0x%lx, size is %dK\n",
-			 sisfb_heap_end, HW_CURSOR_AREA_SIZE / 1024);
+		DPRINTK("sisfb: Hardware Cursor start at 0x%lx, size is %dK\n",
+			sisfb_heap_end, sisfb_hwcursor_size/1024);
 	}
 
 	sisfb_heap.poha_chain = NULL;
 	sisfb_heap.poh_freelist = NULL;
 
-	poh = sisfb_poh_new_node ();
+	poh = sisfb_poh_new_node();
 
 	if (poh == NULL)
 		return 1;
-
+	
 	poh->poh_next = &sisfb_heap.oh_free;
 	poh->poh_prev = &sisfb_heap.oh_free;
 	poh->size = sisfb_heap_end - sisfb_heap_start + 1;
 	poh->offset = sisfb_heap_start - (unsigned long) ivideo.video_vbase;
 
-	DPRINTK ("sisfb:Heap start:0x%p, end:0x%p, len=%dk\n",
-		 (char *) sisfb_heap_start, (char *) sisfb_heap_end,
-		 (unsigned int) poh->size / 1024);
-
-	DPRINTK ("sisfb:First Node offset:0x%x, size:%dk\n",
-		 (unsigned int) poh->offset, (unsigned int) poh->size / 1024);
+	DPRINTK("sisfb: Heap start:0x%p, end:0x%p, len=%dk\n",
+		(char *) sisfb_heap_start, (char *) sisfb_heap_end,
+		(unsigned int) poh->size / 1024);
 
+	DPRINTK("sisfb: First Node offset:0x%x, size:%dk\n",
+		(unsigned int) poh->offset, (unsigned int) poh->size / 1024);
+	
 	sisfb_heap.oh_free.poh_next = poh;
 	sisfb_heap.oh_free.poh_prev = poh;
 	sisfb_heap.oh_free.size = 0;
@@ -1303,7 +1611,7 @@ static int sisfb_heap_init (void)
 	return 0;
 }
 
-static SIS_OH *sisfb_poh_new_node (void)
+static SIS_OH *sisfb_poh_new_node(void)
 {
 	int i;
 	unsigned long cOhs;
@@ -1311,14 +1619,16 @@ static SIS_OH *sisfb_poh_new_node (void)
 	SIS_OH *poh;
 
 	if (sisfb_heap.poh_freelist == NULL) {
-		poha = kmalloc (OH_ALLOC_SIZE, GFP_KERNEL);
+		poha = kmalloc(OH_ALLOC_SIZE, GFP_KERNEL);
+		if(!poha)
+		    return NULL;
 
 		poha->poha_next = sisfb_heap.poha_chain;
 		sisfb_heap.poha_chain = poha;
 
 		cOhs =
 		    (OH_ALLOC_SIZE -
-		     sizeof (SIS_OHALLOC)) / sizeof (SIS_OH) + 1;
+		     sizeof(SIS_OHALLOC)) / sizeof(SIS_OH) + 1;
 
 		poh = &poha->aoh[0];
 		for (i = cOhs - 1; i != 0; i--) {
@@ -1336,15 +1646,15 @@ static SIS_OH *sisfb_poh_new_node (void)
 	return (poh);
 }
 
-static SIS_OH *sisfb_poh_allocate (unsigned long size)
+static SIS_OH *sisfb_poh_allocate(unsigned long size)
 {
 	SIS_OH *pohThis;
 	SIS_OH *pohRoot;
 	int bAllocated = 0;
 
 	if (size > sisfb_heap.max_freesize) {
-		DPRINTK ("sisfb: Can't allocate %dk size on offscreen\n",
-			 (unsigned int) size / 1024);
+		DPRINTK("sisfb: Can't allocate %dk size on offscreen\n",
+			(unsigned int) size / 1024);
 		return (NULL);
 	}
 
@@ -1359,16 +1669,16 @@ static SIS_OH *sisfb_poh_allocate (unsigned long size)
 	}
 
 	if (!bAllocated) {
-		DPRINTK ("sisfb: Can't allocate %dk size on offscreen\n",
-			 (unsigned int) size / 1024);
+		DPRINTK("sisfb: Can't allocate %dk size on offscreen\n",
+			(unsigned int) size / 1024);
 		return (NULL);
 	}
 
 	if (size == pohThis->size) {
 		pohRoot = pohThis;
-		sisfb_delete_node (pohThis);
+		sisfb_delete_node(pohThis);
 	} else {
-		pohRoot = sisfb_poh_new_node ();
+		pohRoot = sisfb_poh_new_node();
 
 		if (pohRoot == NULL) {
 			return (NULL);
@@ -1384,16 +1694,17 @@ static SIS_OH *sisfb_poh_allocate (unsigned long size)
 	sisfb_heap.max_freesize -= size;
 
 	pohThis = &sisfb_heap.oh_used;
-	sisfb_insert_node (pohThis, pohRoot);
+	sisfb_insert_node(pohThis, pohRoot);
 
 	return (pohRoot);
 }
 
-static void sisfb_delete_node (SIS_OH * poh)
+static void sisfb_delete_node(SIS_OH *poh)
 {
 	SIS_OH *poh_prev;
 	SIS_OH *poh_next;
 
+
 	poh_prev = poh->poh_prev;
 	poh_next = poh->poh_next;
 
@@ -1403,7 +1714,7 @@ static void sisfb_delete_node (SIS_OH * poh)
 	return;
 }
 
-static void sisfb_insert_node (SIS_OH * pohList, SIS_OH * poh)
+static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh)
 {
 	SIS_OH *pohTemp;
 
@@ -1416,9 +1727,8 @@ static void sisfb_insert_node (SIS_OH * pohList, SIS_OH * poh)
 	poh->poh_next = pohTemp;
 }
 
-static SIS_OH *sisfb_poh_free (unsigned long base)
+static SIS_OH *sisfb_poh_free(unsigned long base)
 {
-
 	SIS_OH *pohThis;
 	SIS_OH *poh_freed;
 	SIS_OH *poh_prev;
@@ -1452,41 +1762,43 @@ static SIS_OH *sisfb_poh_free (unsigned long base)
 	while (pohThis != &sisfb_heap.oh_free) {
 		if (pohThis->offset == ulUpper) {
 			poh_next = pohThis;
-		} else if ((pohThis->offset + pohThis->size) == ulLower) {
+		}
+			else if ((pohThis->offset + pohThis->size) ==
+				 ulLower) {
 			poh_prev = pohThis;
 		}
 		pohThis = pohThis->poh_next;
 	}
 
-	sisfb_delete_node (poh_freed);
+	sisfb_delete_node(poh_freed);
 
 	if (poh_prev && poh_next) {
 		poh_prev->size += (poh_freed->size + poh_next->size);
-		sisfb_delete_node (poh_next);
-		sisfb_free_node (poh_freed);
-		sisfb_free_node (poh_next);
+		sisfb_delete_node(poh_next);
+		sisfb_free_node(poh_freed);
+		sisfb_free_node(poh_next);
 		return (poh_prev);
 	}
 
 	if (poh_prev) {
 		poh_prev->size += poh_freed->size;
-		sisfb_free_node (poh_freed);
+		sisfb_free_node(poh_freed);
 		return (poh_prev);
 	}
 
 	if (poh_next) {
 		poh_next->size += poh_freed->size;
 		poh_next->offset = poh_freed->offset;
-		sisfb_free_node (poh_freed);
+		sisfb_free_node(poh_freed);
 		return (poh_next);
 	}
 
-	sisfb_insert_node (&sisfb_heap.oh_free, poh_freed);
+	sisfb_insert_node(&sisfb_heap.oh_free, poh_freed);
 
 	return (poh_freed);
 }
 
-static void sisfb_free_node (SIS_OH * poh)
+static void sisfb_free_node(SIS_OH *poh)
 {
 	if (poh == NULL) {
 		return;
@@ -1498,20 +1810,20 @@ static void sisfb_free_node (SIS_OH * poh)
 	return;
 }
 
-void sis_malloc (struct sis_memreq *req)
+void sis_malloc(struct sis_memreq *req)
 {
 	SIS_OH *poh;
 
-	poh = sisfb_poh_allocate (req->size);
+	poh = sisfb_poh_allocate(req->size);
 
 	if (poh == NULL) {
 		req->offset = 0;
 		req->size = 0;
-		DPRINTK ("sisfb: VMEM Allocation Failed\n");
+		DPRINTK("sisfb: Video RAM allocation failed\n");
 	} else {
-		DPRINTK ("sisfb: VMEM Allocation Successed : 0x%p\n",
-			 (char *) (poh->offset +
-				   (unsigned long) ivideo.video_vbase));
+		DPRINTK("sisfb: Video RAM allocation succeeded: 0x%p\n",
+			(char *) (poh->offset +
+				  (unsigned long) ivideo.video_vbase));
 
 		req->offset = poh->offset;
 		req->size = poh->size;
@@ -1519,280 +1831,294 @@ void sis_malloc (struct sis_memreq *req)
 
 }
 
-void sis_free (unsigned long base)
+void sis_free(unsigned long base)
 {
 	SIS_OH *poh;
 
-	poh = sisfb_poh_free (base);
+	poh = sisfb_poh_free(base);
 
 	if (poh == NULL) {
-		DPRINTK ("sisfb: sisfb_poh_free() failed at base 0x%x\n",
-			 (unsigned int) base);
+		DPRINTK("sisfb: sisfb_poh_free() failed at base 0x%x\n",
+			(unsigned int) base);
 	}
 }
 
 /* ------------------ SetMode Routines ------------------------------- */
 
-static void sisfb_pre_setmode (void)
+static void sisfb_pre_setmode(void)
 {
 	u8 cr30 = 0, cr31 = 0;
 
-	vgawb (CRTC_ADR, 0x31);
-	cr31 = vgarb (CRTC_DATA) & ~0x60;
+	vgawb(CRTC_ADR, 0x31);
+	cr31 = vgarb(CRTC_DATA) & ~0x60;
 
 	switch (ivideo.disp_state & DISPTYPE_DISP2) {
-	case DISPTYPE_CRT2:
+	   case DISPTYPE_CRT2:
+		printk(KERN_INFO "sisfb: CRT2 type is VGA\n");
 		cr30 = (SIS_VB_OUTPUT_CRT2 | SIS_SIMULTANEOUS_VIEW_ENABLE);
 		cr31 |= SIS_DRIVER_MODE;
 		break;
-	case DISPTYPE_LCD:
-		cr30 = (SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE);
+	   case DISPTYPE_LCD:
+		printk(KERN_INFO "sisfb: CRT2 type is LCD\n");
+		cr30  = (SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE);
 		cr31 |= SIS_DRIVER_MODE;
 		break;
-	case DISPTYPE_TV:
+	   case DISPTYPE_TV:
+		printk(KERN_INFO "sisfb: CRT2 type is TV\n");
 		if (ivideo.TV_type == TVMODE_HIVISION)
-			cr30 =
-			    (SIS_VB_OUTPUT_HIVISION |
-			     SIS_SIMULTANEOUS_VIEW_ENABLE);
+			cr30 = (SIS_VB_OUTPUT_HIVISION | SIS_SIMULTANEOUS_VIEW_ENABLE);
 		else if (ivideo.TV_plug == TVPLUG_SVIDEO)
-			cr30 =
-			    (SIS_VB_OUTPUT_SVIDEO |
-			     SIS_SIMULTANEOUS_VIEW_ENABLE);
+			cr30 = (SIS_VB_OUTPUT_SVIDEO | SIS_SIMULTANEOUS_VIEW_ENABLE);
 		else if (ivideo.TV_plug == TVPLUG_COMPOSITE)
-			cr30 =
-			    (SIS_VB_OUTPUT_COMPOSITE |
-			     SIS_SIMULTANEOUS_VIEW_ENABLE);
+			cr30 = (SIS_VB_OUTPUT_COMPOSITE | SIS_SIMULTANEOUS_VIEW_ENABLE);
 		else if (ivideo.TV_plug == TVPLUG_SCART)
-			cr30 =
-			    (SIS_VB_OUTPUT_SCART |
-			     SIS_SIMULTANEOUS_VIEW_ENABLE);
+			cr30 = (SIS_VB_OUTPUT_SCART | SIS_SIMULTANEOUS_VIEW_ENABLE);
 		cr31 |= SIS_DRIVER_MODE;
-
-		/*karl */
-		if (sisfb_tvmode == 1)
+		/* cr31 &= ~0x04; */ /* TW @@@ 5/5/02 */ /* TW: No NotSimuMode by default  */
+                /*karl*/
+	        if (sisfb_tvmode == 1 || ivideo.TV_type == TVMODE_PAL)
 			cr31 |= 0x1;
-		if (sisfb_tvmode == 2)
-			cr31 &= ~0x1;
-
+                if (sisfb_tvmode == 2 || ivideo.TV_type == TVMODE_NTSC)
+                        cr31 &= ~0x1;
 		break;
-	default:
+	   default:	/* CRT2 disable */
+		printk(KERN_INFO "sisfb: CRT2 is disabled\n");
 		cr30 = 0x00;
 		cr31 |= (SIS_DRIVER_MODE | SIS_VB_OUTPUT_DISABLE);
 	}
 
-	vgawb (CRTC_ADR, IND_SIS_SCRATCH_REG_CR30);
-	vgawb (CRTC_DATA, cr30);
-	vgawb (CRTC_ADR, IND_SIS_SCRATCH_REG_CR31);
-	vgawb (CRTC_DATA, cr31);
-	vgawb (CRTC_ADR, IND_SIS_SCRATCH_REG_CR33);
-	vgawb (CRTC_DATA, sisfb_rate_idx & 0x0F);
+	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR30);
+	vgawb(CRTC_DATA, cr30);
+	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR31);
+	vgawb(CRTC_DATA, cr31);
+
+	vgawb(CRTC_ADR, IND_SIS_SCRATCH_REG_CR33);
+/*
+	if (ivideo.disp_state & DISPTYPE_CRT2) {
+		sisfb_rate_idx &= 0x0F;
+		sisfb_rate_idx |= (sisfb_rate_idx << 4);
+		vgawb(CRTC_DATA, sisfb_rate_idx);
+	} else {
+		vgawb(CRTC_DATA, sisfb_rate_idx & 0x0F);
+	}
+*/
+	vgawb(CRTC_DATA, sisfb_rate_idx & 0x0F);
 }
 
-static void sisfb_post_setmode (void)
+static void sisfb_post_setmode(void)
 {
 	u8 reg;
 
-	vgawb (CRTC_ADR, 0x17);
-	reg = vgarb (CRTC_DATA);
+	/* TW: We can't switch off CRT1 on LVDS/Chrontel in 8bpp Modes */
+	if ((ivideo.hasVB == HASVB_LVDS) || (ivideo.hasVB == HASVB_LVDS_CHRONTEL)) {
+		if (ivideo.video_bpp == 8) {
+			sisfb_crt1off = 0;
+		}
+	}
 
-	if ((ivideo.hasVB == HASVB_LVDS)
-	    || (ivideo.hasVB == HASVB_LVDS_CHRONTEL)) if (ivideo.video_bpp == 8)
+	/* TW: We can't switch off CRT1 on 630+301B in 8bpp Modes */
+	if ( (sishw_ext.ujVBChipID == VB_CHIP_301B) && (sisvga_engine == SIS_300_VGA) &&
+	     (ivideo.disp_state & DISPTYPE_LCD) ) {
+	        if (ivideo.video_bpp == 8) {
 			sisfb_crt1off = 0;
+	        }
+	}
 
-	if (sisfb_crt1off)
+	/* TW: We can't switch off CRT1 if bridge is in slave mode */
+	vgawb(VB_PART1_ADR,0x00);
+	reg = vgarb(VB_PART1_DATA);
+	if(sisvga_engine == SIS_300_VGA) {
+		if((reg & 0xa0) == 0x20) {
+			sisfb_crt1off = 0;
+		}
+	}
+	if(sisvga_engine == SIS_315_VGA) {
+		if((reg & 0x50) == 0x10) {
+			sisfb_crt1off = 0;
+		}
+	}
+
+	vgawb(CRTC_ADR, 0x17);
+	reg = vgarb(CRTC_DATA);
+	if (sisfb_crt1off)	  
 		reg &= ~0x80;
-	else
+	else 	      
 		reg |= 0x80;
-	vgawb (CRTC_DATA, reg);
-
-	vgawb (SEQ_ADR, IND_SIS_RAMDAC_CONTROL);
-	reg = vgarb (SEQ_DATA);
+	vgawb(CRTC_DATA, reg);
+	
+	vgawb(SEQ_ADR, IND_SIS_RAMDAC_CONTROL);
+	reg = vgarb(SEQ_DATA);
 	reg &= ~0x04;
-	vgawb (SEQ_DATA, reg);
+	vgawb(SEQ_DATA, reg);
 
 	if ((ivideo.disp_state & DISPTYPE_TV) && (ivideo.hasVB == HASVB_301)) {
-		/*karl */
-		vgawb (VB_PART4_ADR, 0x01);
-		reg = vgarb (VB_PART4_DATA);
-
-		if ((reg != 0xB1) && (reg != 0xB0)) {	/*301B Revision ID */
-			// Eden Chen
-			switch (ivideo.video_width) {
-			case 320:
-				filter_tb =
-				    (ivideo.TV_type == TVMODE_NTSC) ? 4 : 12;
-				break;
-			case 640:
-				filter_tb =
-				    (ivideo.TV_type == TVMODE_NTSC) ? 5 : 13;
-				break;
-			case 720:
-				filter_tb =
-				    (ivideo.TV_type == TVMODE_NTSC) ? 6 : 14;
-				break;
-			case 800:
-				filter_tb =
-				    (ivideo.TV_type == TVMODE_NTSC) ? 7 : 15;
-				break;
-			default:
-				filter = -1;
-				break;
-			}
-			// ~Eden Chen
-
-			// Eden Chen
-			//vgawb(VB_PART1_ADR,  0x24);
-			vgawb (VB_PART1_ADR, IND_SIS_CRT2_WRITE_ENABLE);
-			// ~Eden Chen
-			vgawb (VB_PART1_DATA, 0x1);
 
-			// Eden Chen for Debug
-			// ~Eden Chen
+	   vgawb(VB_PART4_ADR,0x01);
+	   reg = vgarb(VB_PART4_DATA);
+	   if (reg < 0xB0)        	/* 301B Revision ID */
+           {	
+		// Eden Chen
+		switch (ivideo.video_width) {
+		   case 320:
+			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 4 : 12;
+			break;
+		   case 640:
+			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 5 : 13;
+			break;
+		   case 720:
+			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 6 : 14;
+			break;
+		   case 800:
+			filter_tb = (ivideo.TV_type == TVMODE_NTSC) ? 7 : 15;
+			break;
+		   default:
+			filter = -1;
+			break;
+		}
+		// ~Eden Chen
 
-			if (ivideo.TV_type == TVMODE_NTSC) {
-				vgawb (VB_PART2_ADR, 0x3A);
-				reg = vgarb (VB_PART2_DATA);
-				reg &= 0x1F;
-				vgawb (VB_PART2_DATA, reg);
-
-				if (ivideo.TV_plug == TVPLUG_SVIDEO) {
-					vgawb (VB_PART2_ADR, 0x30);
-					reg = vgarb (VB_PART2_DATA);
-					reg &= 0xDF;
-					vgawb (VB_PART2_DATA, reg);
-				} else if (ivideo.TV_plug == TVPLUG_COMPOSITE) {
-					vgawb (VB_PART2_ADR, 0x30);
-					reg = vgarb (VB_PART2_DATA);
-					reg |= 0x20;
-					vgawb (VB_PART2_DATA, reg);
-
-					switch (ivideo.video_width) {
-					case 640:
-						vgawb (VB_PART2_ADR, 0x35);
-						vgawb (VB_PART2_DATA, 0xEB);
-						vgawb (VB_PART2_ADR, 0x36);
-						vgawb (VB_PART2_DATA, 0x04);
-						vgawb (VB_PART2_ADR, 0x37);
-						vgawb (VB_PART2_DATA, 0x25);
-						vgawb (VB_PART2_ADR, 0x38);
-						vgawb (VB_PART2_DATA, 0x18);
-						break;
-					case 720:
-						vgawb (VB_PART2_ADR, 0x35);
-						vgawb (VB_PART2_DATA, 0xEE);
-						vgawb (VB_PART2_ADR, 0x36);
-						vgawb (VB_PART2_DATA, 0x0C);
-						vgawb (VB_PART2_ADR, 0x37);
-						vgawb (VB_PART2_DATA, 0x22);
-						vgawb (VB_PART2_ADR, 0x38);
-						vgawb (VB_PART2_DATA, 0x08);
-						break;
-					case 800:
-						vgawb (VB_PART2_ADR, 0x35);
-						vgawb (VB_PART2_DATA, 0xEB);
-						vgawb (VB_PART2_ADR, 0x36);
-						vgawb (VB_PART2_DATA, 0x15);
-						vgawb (VB_PART2_ADR, 0x37);
-						vgawb (VB_PART2_DATA, 0x25);
-						vgawb (VB_PART2_ADR, 0x38);
-						vgawb (VB_PART2_DATA, 0xF6);
-						break;
-					}
-				}
-			} else if (ivideo.TV_type == TVMODE_PAL) {
-				vgawb (VB_PART2_ADR, 0x3A);
-				reg = vgarb (VB_PART2_DATA);
-				reg &= 0x1F;
-				vgawb (VB_PART2_DATA, reg);
-
-				if (ivideo.TV_plug == TVPLUG_SVIDEO) {
-					vgawb (VB_PART2_ADR, 0x30);
-					reg = vgarb (VB_PART2_DATA);
-					reg &= 0xDF;
-					vgawb (VB_PART2_DATA, reg);
-				} else if (ivideo.TV_plug == TVPLUG_COMPOSITE) {
-					vgawb (VB_PART2_ADR, 0x30);
-					reg = vgarb (VB_PART2_DATA);
-					reg |= 0x20;
-					vgawb (VB_PART2_DATA, reg);
-
-					switch (ivideo.video_width) {
-					case 640:
-						vgawb (VB_PART2_ADR, 0x35);
-						vgawb (VB_PART2_DATA, 0xF1);
-						vgawb (VB_PART2_ADR, 0x36);
-						vgawb (VB_PART2_DATA, 0xF7);
-						vgawb (VB_PART2_ADR, 0x37);
-						vgawb (VB_PART2_DATA, 0x1F);
-						vgawb (VB_PART2_ADR, 0x38);
-						vgawb (VB_PART2_DATA, 0x32);
-						break;
-					case 720:
-						vgawb (VB_PART2_ADR, 0x35);
-						vgawb (VB_PART2_DATA, 0xF3);
-						vgawb (VB_PART2_ADR, 0x36);
-						vgawb (VB_PART2_DATA, 0x00);
-						vgawb (VB_PART2_ADR, 0x37);
-						vgawb (VB_PART2_DATA, 0x1D);
-						vgawb (VB_PART2_ADR, 0x38);
-						vgawb (VB_PART2_DATA, 0x20);
-						break;
-					case 800:
-						vgawb (VB_PART2_ADR, 0x35);
-						vgawb (VB_PART2_DATA, 0xFC);
-						vgawb (VB_PART2_ADR, 0x36);
-						vgawb (VB_PART2_DATA, 0xFB);
-						vgawb (VB_PART2_ADR, 0x37);
-						vgawb (VB_PART2_DATA, 0x14);
-						vgawb (VB_PART2_ADR, 0x38);
-						vgawb (VB_PART2_DATA, 0x2A);
-						break;
-					}
+		// Eden Chen
+		//vgawb(VB_PART1_ADR,  0x24);
+		vgawb(VB_PART1_ADR,  sisfb_CRT2_write_enable);
+		// ~Eden Chen
+		vgawb(VB_PART1_DATA, 0x01);
+		
+		if (ivideo.TV_type == TVMODE_NTSC) {
+			vgawb(VB_PART2_ADR, 0x3A);
+			reg = vgarb(VB_PART2_DATA);
+			reg &= 0x1F;
+			vgawb(VB_PART2_DATA, reg);
+
+			if (ivideo.TV_plug == TVPLUG_SVIDEO) {
+				vgawb(VB_PART2_ADR, 0x30);
+				reg = vgarb(VB_PART2_DATA);
+				reg &= 0xDF;
+				vgawb(VB_PART2_DATA, reg);
+			} else if (ivideo.TV_plug == TVPLUG_COMPOSITE) {
+				vgawb(VB_PART2_ADR, 0x30);
+				reg = vgarb(VB_PART2_DATA);
+				reg |= 0x20;
+				vgawb(VB_PART2_DATA, reg);
+
+				switch (ivideo.video_width) {
+				case 640:
+					vgawb(VB_PART2_ADR,  0x35);
+					vgawb(VB_PART2_DATA, 0xEB);
+					vgawb(VB_PART2_ADR,  0x36);
+					vgawb(VB_PART2_DATA, 0x04);
+					vgawb(VB_PART2_ADR,  0x37);
+					vgawb(VB_PART2_DATA, 0x25);
+					vgawb(VB_PART2_ADR,  0x38);
+					vgawb(VB_PART2_DATA, 0x18);
+					break;
+				case 720:
+					vgawb(VB_PART2_ADR,  0x35);
+					vgawb(VB_PART2_DATA, 0xEE);
+					vgawb(VB_PART2_ADR,  0x36);
+					vgawb(VB_PART2_DATA, 0x0C);
+					vgawb(VB_PART2_ADR,  0x37);
+					vgawb(VB_PART2_DATA, 0x22);
+					vgawb(VB_PART2_ADR,  0x38);
+					vgawb(VB_PART2_DATA, 0x08);
+					break;
+				case 800:
+					vgawb(VB_PART2_ADR,  0x35);
+					vgawb(VB_PART2_DATA, 0xEB);
+					vgawb(VB_PART2_ADR,  0x36);
+					vgawb(VB_PART2_DATA, 0x15);
+					vgawb(VB_PART2_ADR,  0x37);
+					vgawb(VB_PART2_DATA, 0x25);
+					vgawb(VB_PART2_ADR,  0x38);
+					vgawb(VB_PART2_DATA, 0xF6);
+					break;
 				}
 			}
-			// Eden 
-			if ((filter >= 0) && (filter <= 7)) {
-				DPRINTK
-				    ("FilterTable[%d]-%d: %02x %02x %02x %02x\n",
-				     filter_tb, filter,
-				     sis_TV_filter[filter_tb].filter[filter][0],
-				     sis_TV_filter[filter_tb].filter[filter][1],
-				     sis_TV_filter[filter_tb].filter[filter][2],
-				     sis_TV_filter[filter_tb].filter[filter][3]
-				    );
-				vgawb (VB_PART2_ADR, 0x35);
-				vgawb (VB_PART2_DATA,
-				       sis_TV_filter[filter_tb].
-				       filter[filter][0]);
-				vgawb (VB_PART2_ADR, 0x36);
-				vgawb (VB_PART2_DATA,
-				       sis_TV_filter[filter_tb].
-				       filter[filter][1]);
-				vgawb (VB_PART2_ADR, 0x37);
-				vgawb (VB_PART2_DATA,
-				       sis_TV_filter[filter_tb].
-				       filter[filter][2]);
-				vgawb (VB_PART2_ADR, 0x38);
-				vgawb (VB_PART2_DATA,
-				       sis_TV_filter[filter_tb].
-				       filter[filter][3]);
+		} else if (ivideo.TV_type == TVMODE_PAL) {
+			vgawb(VB_PART2_ADR, 0x3A);
+			reg = vgarb(VB_PART2_DATA);
+			reg &= 0x1F;
+			vgawb(VB_PART2_DATA, reg);
+
+			if (ivideo.TV_plug == TVPLUG_SVIDEO) {
+				vgawb(VB_PART2_ADR, 0x30);
+				reg = vgarb(VB_PART2_DATA);
+				reg &= 0xDF;
+				vgawb(VB_PART2_DATA, reg);
+			} else if (ivideo.TV_plug == TVPLUG_COMPOSITE) {
+				vgawb(VB_PART2_ADR, 0x30);
+				reg = vgarb(VB_PART2_DATA);
+				reg |= 0x20;
+				vgawb(VB_PART2_DATA, reg);
+
+				switch (ivideo.video_width) {
+				case 640:
+					vgawb(VB_PART2_ADR,  0x35);
+					vgawb(VB_PART2_DATA, 0xF1);
+					vgawb(VB_PART2_ADR,  0x36);
+					vgawb(VB_PART2_DATA, 0xF7);
+					vgawb(VB_PART2_ADR,  0x37);
+					vgawb(VB_PART2_DATA, 0x1F);
+					vgawb(VB_PART2_ADR,  0x38);
+					vgawb(VB_PART2_DATA, 0x32);
+					break;
+				case 720:
+					vgawb(VB_PART2_ADR,  0x35);
+					vgawb(VB_PART2_DATA, 0xF3);
+					vgawb(VB_PART2_ADR,  0x36);
+					vgawb(VB_PART2_DATA, 0x00);
+					vgawb(VB_PART2_ADR,  0x37);
+					vgawb(VB_PART2_DATA, 0x1D);
+					vgawb(VB_PART2_ADR,  0x38);
+					vgawb(VB_PART2_DATA, 0x20);
+					break;
+				case 800:
+					vgawb(VB_PART2_ADR,  0x35);
+					vgawb(VB_PART2_DATA, 0xFC);
+					vgawb(VB_PART2_ADR,  0x36);
+					vgawb(VB_PART2_DATA, 0xFB);
+					vgawb(VB_PART2_ADR,  0x37);
+					vgawb(VB_PART2_DATA, 0x14);
+					vgawb(VB_PART2_ADR,  0x38);
+					vgawb(VB_PART2_DATA, 0x2A);
+					break;
+				}
 			}
-			// ~Eden 
 		}
+
+		// Eden 
+		if ((filter >= 0) && (filter <=7)) {
+			DPRINTK("FilterTable[%d]-%d: %02x %02x %02x %02x\n", filter_tb, filter, 
+				sis_TV_filter[filter_tb].filter[filter][0],
+				sis_TV_filter[filter_tb].filter[filter][1],
+				sis_TV_filter[filter_tb].filter[filter][2],
+				sis_TV_filter[filter_tb].filter[filter][3]
+			);
+			vgawb(VB_PART2_ADR,  0x35);
+			vgawb(VB_PART2_DATA, sis_TV_filter[filter_tb].filter[filter][0]);
+			vgawb(VB_PART2_ADR,  0x36);
+			vgawb(VB_PART2_DATA, sis_TV_filter[filter_tb].filter[filter][1]);
+			vgawb(VB_PART2_ADR,  0x37);
+			vgawb(VB_PART2_DATA, sis_TV_filter[filter_tb].filter[filter][2]);
+			vgawb(VB_PART2_ADR,  0x38);
+			vgawb(VB_PART2_DATA, sis_TV_filter[filter_tb].filter[filter][3]);
+		}
+		// ~Eden 
+	     }
+	  
 	}
 
 }
 
-static void sisfb_crtc_to_var (struct fb_var_screeninfo *var)
+static void sisfb_crtc_to_var(struct fb_var_screeninfo *var)
 {
 	u16 VRE, VBE, VRS, VBS, VDE, VT;
 	u16 HRE, HBE, HRS, HBS, HDE, HT;
-	u8 sr_data, cr_data, cr_data2, cr_data3, mr_data;
+	u8  sr_data, cr_data, cr_data2, cr_data3, mr_data;
 	int A, B, C, D, E, F, temp;
 	double hrate, drate;
 
-	vgawb (SEQ_ADR, IND_SIS_COLOR_MODE);
-	sr_data = vgarb (SEQ_DATA);
+	vgawb(SEQ_ADR, IND_SIS_COLOR_MODE);
+	sr_data = vgarb(SEQ_DATA);
 
 	if (sr_data & SIS_INTERLACED_MODE)
 		var->vmode = FB_VMODE_INTERLACED;
@@ -1800,25 +2126,25 @@ static void sisfb_crtc_to_var (struct fb_var_screeninfo *var)
 		var->vmode = FB_VMODE_NONINTERLACED;
 
 	switch ((sr_data & 0x1C) >> 2) {
-	case SIS_8BPP_COLOR_MODE:
+	   case SIS_8BPP_COLOR_MODE:
 		var->bits_per_pixel = 8;
 		break;
-	case SIS_16BPP_COLOR_MODE:
+	   case SIS_16BPP_COLOR_MODE:
 		var->bits_per_pixel = 16;
 		break;
-	case SIS_32BPP_COLOR_MODE:
+	   case SIS_32BPP_COLOR_MODE:
 		var->bits_per_pixel = 32;
 		break;
 	}
 
 	switch (var->bits_per_pixel) {
-	case 8:
+	   case 8:
 		var->red.length = 6;
 		var->green.length = 6;
 		var->blue.length = 6;
 		video_cmap_len = 256;
 		break;
-	case 16:
+	   case 16:
 		var->red.offset = 11;
 		var->red.length = 5;
 		var->green.offset = 5;
@@ -1828,9 +2154,8 @@ static void sisfb_crtc_to_var (struct fb_var_screeninfo *var)
 		var->transp.offset = 0;
 		var->transp.length = 0;
 		video_cmap_len = 16;
-
 		break;
-	case 24:
+	   case 24:
 		var->red.offset = 16;
 		var->red.length = 8;
 		var->green.offset = 8;
@@ -1841,7 +2166,7 @@ static void sisfb_crtc_to_var (struct fb_var_screeninfo *var)
 		var->transp.length = 0;
 		video_cmap_len = 16;
 		break;
-	case 32:
+	   case 32:
 		var->red.offset = 16;
 		var->red.length = 8;
 		var->green.offset = 8;
@@ -1854,47 +2179,45 @@ static void sisfb_crtc_to_var (struct fb_var_screeninfo *var)
 		break;
 	}
 
-	vgawb (SEQ_ADR, 0xA);
-	sr_data = vgarb (SEQ_DATA);
+	vgawb(SEQ_ADR, 0xA);
+	sr_data = vgarb(SEQ_DATA);
 
-	vgawb (CRTC_ADR, 0x6);
-	cr_data = vgarb (CRTC_DATA);
-	vgawb (CRTC_ADR, 0x7);
-	cr_data2 = vgarb (CRTC_DATA);
-	VT =
-	    (cr_data & 0xFF) | ((u16) (cr_data2 & 0x01) << 8) |
-	    ((u16) (cr_data2 & 0x20) << 4) | ((u16) (sr_data & 0x01) << 10);
+	vgawb(CRTC_ADR, 0x6);
+	cr_data = vgarb(CRTC_DATA);
+	vgawb(CRTC_ADR, 0x7);
+	cr_data2 = vgarb(CRTC_DATA);
+	VT = (cr_data & 0xFF) | ((u16) (cr_data2 & 0x01) << 8) |
+	     ((u16) (cr_data2 & 0x20) << 4) | ((u16) (sr_data & 0x01) <<
+					      10);
 	A = VT + 2;
 
-	vgawb (CRTC_ADR, 0x12);
-	cr_data = vgarb (CRTC_DATA);
-	VDE =
-	    (cr_data & 0xff) | ((u16) (cr_data2 & 0x02) << 7) |
-	    ((u16) (cr_data2 & 0x40) << 3) | ((u16) (sr_data & 0x02) << 9);
+	vgawb(CRTC_ADR, 0x12);
+	cr_data = vgarb(CRTC_DATA);
+	VDE = (cr_data & 0xff) | ((u16) (cr_data2 & 0x02) << 7) |
+	      ((u16) (cr_data2 & 0x40) << 3) | ((u16) (sr_data & 0x02) << 9);
 	E = VDE + 1;
 
-	vgawb (CRTC_ADR, 0x10);
-	cr_data = vgarb (CRTC_DATA);
-	VRS =
-	    (cr_data & 0xff) | ((u16) (cr_data2 & 0x04) << 6) |
-	    ((u16) (cr_data2 & 0x80) << 2) | ((u16) (sr_data & 0x08) << 7);
+	vgawb(CRTC_ADR, 0x10);
+	cr_data = vgarb(CRTC_DATA);
+	VRS = (cr_data & 0xff) | ((u16) (cr_data2 & 0x04) << 6) |
+	      ((u16) (cr_data2 & 0x80) << 2) | ((u16) (sr_data & 0x08) << 7);
 	F = VRS + 1 - E;
 
-	vgawb (CRTC_ADR, 0x15);
-	cr_data = vgarb (CRTC_DATA);
-	vgawb (CRTC_ADR, 0x9);
-	cr_data3 = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, 0x15);
+	cr_data = vgarb(CRTC_DATA);
+	vgawb(CRTC_ADR, 0x9);
+	cr_data3 = vgarb(CRTC_DATA);
 	VBS = (cr_data & 0xff) | ((u16) (cr_data2 & 0x08) << 5) |
-	    ((u16) (cr_data3 & 0x20) << 4) | ((u16) (sr_data & 0x04) << 8);
+	      ((u16) (cr_data3 & 0x20) << 4) | ((u16) (sr_data & 0x04) << 8);
 
-	vgawb (CRTC_ADR, 0x16);
-	cr_data = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, 0x16);
+	cr_data = vgarb(CRTC_DATA);
 	VBE = (cr_data & 0xff) | ((u16) (sr_data & 0x10) << 4);
 	temp = VBE - ((E - 1) & 511);
 	B = (temp > 0) ? temp : (temp + 512);
 
-	vgawb (CRTC_ADR, 0x11);
-	cr_data = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, 0x11);
+	cr_data = vgarb(CRTC_DATA);
 	VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
 	temp = VRE - ((E + F - 1) & 31);
 	C = (temp > 0) ? temp : (temp + 32);
@@ -1902,41 +2225,46 @@ static void sisfb_crtc_to_var (struct fb_var_screeninfo *var)
 	D = B - F - C;
 
 	var->yres = var->yres_virtual = E;
+	/* TW: We have to report the physical dimension to the console! */
+	if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
+		var->yres <<= 1;
+		var->yres_virtual <<=1;
+	}
+	/* TW end */
 	var->upper_margin = D;
 	var->lower_margin = F;
 	var->vsync_len = C;
 
-	vgawb (SEQ_ADR, 0xb);
-	sr_data = vgarb (SEQ_DATA);
+	vgawb(SEQ_ADR, 0xb);
+	sr_data = vgarb(SEQ_DATA);
 
-	vgawb (CRTC_ADR, 0x0);
-	cr_data = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, 0x0);
+	cr_data = vgarb(CRTC_DATA);
 	HT = (cr_data & 0xff) | ((u16) (sr_data & 0x03) << 8);
 	A = HT + 5;
 
-	vgawb (CRTC_ADR, 0x1);
-	cr_data = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, 0x1);
+	cr_data = vgarb(CRTC_DATA);
 	HDE = (cr_data & 0xff) | ((u16) (sr_data & 0x0C) << 6);
 	E = HDE + 1;
 
-	vgawb (CRTC_ADR, 0x4);
-	cr_data = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, 0x4);
+	cr_data = vgarb(CRTC_DATA);
 	HRS = (cr_data & 0xff) | ((u16) (sr_data & 0xC0) << 2);
 	F = HRS - E - 3;
 
-	vgawb (CRTC_ADR, 0x2);
-	cr_data = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, 0x2);
+	cr_data = vgarb(CRTC_DATA);
 	HBS = (cr_data & 0xff) | ((u16) (sr_data & 0x30) << 4);
 
-	vgawb (SEQ_ADR, 0xc);
-	sr_data = vgarb (SEQ_DATA);
-	vgawb (CRTC_ADR, 0x3);
-	cr_data = vgarb (CRTC_DATA);
-	vgawb (CRTC_ADR, 0x5);
-	cr_data2 = vgarb (CRTC_DATA);
-	HBE =
-	    (cr_data & 0x1f) | ((u16) (cr_data2 & 0x80) >> 2) |
-	    ((u16) (sr_data & 0x03) << 6);
+	vgawb(SEQ_ADR, 0xc);
+	sr_data = vgarb(SEQ_DATA);
+	vgawb(CRTC_ADR, 0x3);
+	cr_data = vgarb(CRTC_DATA);
+	vgawb(CRTC_ADR, 0x5);
+	cr_data2 = vgarb(CRTC_DATA);
+	HBE = (cr_data & 0x1f) | ((u16) (cr_data2 & 0x80) >> 2) |
+	      ((u16) (sr_data & 0x03) << 6);
 	HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
 
 	temp = HBE - ((E - 1) & 255);
@@ -1956,7 +2284,7 @@ static void sisfb_crtc_to_var (struct fb_var_screeninfo *var)
 
 	var->sync = 0;
 
-	mr_data = vgarb (0x1C);
+	mr_data = vgarb(0x1C);
 	if (mr_data & 0x80)
 		var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
 	else
@@ -1978,21 +2306,24 @@ static void sisfb_crtc_to_var (struct fb_var_screeninfo *var)
 
 /* ------------------ Public Routines -------------------------------- */
 
-static int sisfb_get_fix (struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
+static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
+			 struct fb_info *info)
 {
-	memset (fix, 0, sizeof (struct fb_fix_screeninfo));
-	strcpy (fix->id, fb_info.modename);
+	memset(fix, 0, sizeof(struct fb_fix_screeninfo));
+	strcpy(fix->id, fb_info.modename);
 
 	fix->smem_start = ivideo.video_base;
-
-	/*karl:10/01/2001 */
-	if (!sisfb_mem) {
-		if (ivideo.video_size > 0x800000)
-			fix->smem_len = 0x800000;
-		else
-			fix->smem_len = 0x400000;
-	} else
-		fix->smem_len = sisfb_mem * 0x100000;
+        
+        /*karl:10/01/2001*/ /* TW */
+        if ((!sisfb_mem) || (sisfb_mem > (ivideo.video_size/1024))) {
+	    if (ivideo.video_size > 0x1000000) {
+	        fix->smem_len = 0xc00000;
+	    } else if (ivideo.video_size > 0x800000)
+		fix->smem_len = 0x800000;
+	    else
+		fix->smem_len = 0x400000;
+        } else
+		fix->smem_len = sisfb_mem * 1024;
 
 	fix->type = video_type;
 	fix->type_aux = 0;
@@ -2012,98 +2343,121 @@ static int sisfb_get_fix (struct fb_fix_screeninfo *fix, int con, struct fb_info
 	fix->reserved[2] = sisfb_caps;
 
 	return 0;
-
 }
 
-static int sisfb_get_var (struct fb_var_screeninfo *var, int con, struct fb_info *info)
+static int sisfb_get_var(struct fb_var_screeninfo *var, int con,
+			 struct fb_info *info)
 {
 	if (con == -1)
-		memcpy (var, &default_var, sizeof (struct fb_var_screeninfo));
+		memcpy(var, &default_var, sizeof(struct fb_var_screeninfo));
 	else
 		*var = fb_display[con].var;
 
+	/* JennyLee 2001126: for FSTN */
+	if (var->xres == 320 && var->yres == 480)
+		var->yres = 240;
+	/* ~JennyLee */
+
 	return 0;
 }
 
-static int sisfb_set_var (struct fb_var_screeninfo *var, int con, struct fb_info *info)
+static int sisfb_set_var(struct fb_var_screeninfo *var, int con,
+			 struct fb_info *info)
 {
 	int err;
 	unsigned int cols, rows;
 
 	fb_display[con].var.activate = FB_ACTIVATE_NOW;
-
-	if (sisfb_do_set_var (var, con == info->currcon, info)) {
-		sisfb_crtc_to_var (var);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
+	if (sisfb_do_set_var(var, con == info->currcon, info)) {
+#else
+        if (sisfb_do_set_var(var, con == currcon, info)) {
+#endif
+		sisfb_crtc_to_var(var);
 		return -EINVAL;
 	}
 
-	sisfb_crtc_to_var (var);
-
-	sisfb_set_disp (con, var);
+	sisfb_crtc_to_var(var);
+	
+	sisfb_set_disp(con, var);
 
 	if (info->changevar)
 		(*info->changevar) (con);
 
-	if ((err = fb_alloc_cmap (&fb_display[con].cmap, 0, 0)))
+	if ((err = fb_alloc_cmap(&fb_display[con].cmap, 0, 0)))
 		return err;
 
-	sisfb_do_install_cmap (con, info);
-
+	sisfb_do_install_cmap(con, info);
+	
 	cols = sisbios_mode[sisfb_mode_idx].cols;
 	rows = sisbios_mode[sisfb_mode_idx].rows;
-	vc_resize_con (rows, cols, fb_display[con].conp->vc_num);
+	vc_resize_con(rows, cols, fb_display[con].conp->vc_num);
 
 	return 0;
-
 }
 
-static int sisfb_get_cmap (struct fb_cmap *cmap, int kspc, int con, struct fb_info *info)
+static int sisfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
+			  struct fb_info *info)
 {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
 	if (con == info->currcon)
-		return fb_get_cmap (cmap, kspc, sis_getcolreg, info);
-	else if (fb_display[con].cmap.len)
-		fb_copy_cmap (&fb_display[con].cmap, cmap, kspc ? 0 : 2);
+#else
+        if (con == currcon)
+#endif
+		return fb_get_cmap(cmap, kspc, sis_getcolreg, info);
+	else if (fb_display[con].cmap.len)	
+		fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
 	else
-		fb_copy_cmap (fb_default_cmap (video_cmap_len), cmap,
-			      kspc ? 0 : 2);
+		fb_copy_cmap(fb_default_cmap(video_cmap_len), cmap, kspc ? 0 : 2);
 
 	return 0;
 }
 
-static int sisfb_set_cmap (struct fb_cmap *cmap, int kspc, int con, struct fb_info *info)
+static int sisfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
+			  struct fb_info *info)
 {
 	int err;
 
 	if (!fb_display[con].cmap.len) {
-		err = fb_alloc_cmap (&fb_display[con].cmap, video_cmap_len, 0);
+		err = fb_alloc_cmap(&fb_display[con].cmap, video_cmap_len, 0);
 		if (err)
 			return err;
 	}
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
 	if (con == info->currcon)
-		return fb_set_cmap (cmap, kspc, info);
+		return fb_set_cmap(cmap, kspc, info);
+#else
+        if (con == currcon)
+		return fb_set_cmap(cmap, kspc, sisfb_setcolreg, info);
+#endif
 	else
-		fb_copy_cmap (cmap, &fb_display[con].cmap, kspc ? 0 : 1);
+		fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1);
 	return 0;
 }
 
-static int sisfb_ioctl (struct inode *inode, struct file *file,
-	     unsigned int cmd, unsigned long arg, int con, struct fb_info *info)
+static int sisfb_ioctl(struct inode *inode, struct file *file,
+		       unsigned int cmd, unsigned long arg, int con,
+		       struct fb_info *info)
 {
 	switch (cmd) {
-	case FBIO_ALLOC:
-		if (!capable (CAP_SYS_RAWIO))
+	   case FBIO_ALLOC:
+		if (!capable(CAP_SYS_RAWIO))
 			return -EPERM;
-		sis_malloc ((struct sis_memreq *) arg);
+		sis_malloc((struct sis_memreq *) arg);
 		break;
-	case FBIO_FREE:
-		if (!capable (CAP_SYS_RAWIO))
+	   case FBIO_FREE:
+		if (!capable(CAP_SYS_RAWIO))
 			return -EPERM;
-		sis_free (*(unsigned long *) arg);
+		sis_free(*(unsigned long *) arg);
 		break;
-	case FBIOGET_GLYPH:
-		sis_get_glyph (info, (SIS_GLYINFO *) arg);
+	   case FBIOGET_GLYPH:
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
+		sis_get_glyph((SIS_GLYINFO *) arg);
+#else
+                sis_get_glyph(info,(SIS_GLYINFO *) arg);
+#endif
 		break;
-	case FBIOGET_HWCINFO:
+	   case FBIOGET_HWCINFO:
 		{
 			unsigned long *hwc_offset = (unsigned long *) arg;
 
@@ -2115,32 +2469,47 @@ static int sisfb_ioctl (struct inode *inode, struct file *file,
 
 			break;
 		}
-	case FBIOPUT_MODEINFO:
+	   case FBIOPUT_MODEINFO:
 		{
-			struct mode_info *x = (struct mode_info *) arg;
-
-			ivideo.video_bpp = x->bpp;
-			ivideo.video_width = x->xres;
-			ivideo.video_height = x->yres;
-			ivideo.video_vwidth = x->v_xres;
-			ivideo.video_vheight = x->v_yres;
-			ivideo.org_x = x->org_x;
-			ivideo.org_y = x->org_y;
-			ivideo.refresh_rate = x->vrate;
-
+			struct mode_info *x = (struct mode_info *)arg;
+			
+			ivideo.video_bpp      = x->bpp;
+			ivideo.video_width    = x->xres;
+			ivideo.video_height   = x->yres;
+			ivideo.video_vwidth   = x->v_xres;
+			ivideo.video_vheight  = x->v_yres;
+			ivideo.org_x          = x->org_x;
+			ivideo.org_y          = x->org_y;
+			ivideo.refresh_rate   = x->vrate;
+			
 			break;
 		}
-	case FBIOGET_DISPINFO:
-		sis_dispinfo ((struct ap_data *) arg);
+	   case FBIOGET_DISPINFO:
+		sis_dispinfo((struct ap_data *)arg);
 		break;
-	default:
+	   case SISFB_GET_INFO:  /* TW: New for communication with X driver */
+	        {
+			sisfb_info *x = (sisfb_info *)arg;
+
+			x->sisfb_id = SISFB_ID;
+			x->sisfb_version = VER_MAJOR;
+			x->sisfb_revision = VER_MINOR;
+			x->sisfb_patchlevel = VER_LEVEL;
+			x->chip_id = ivideo.chip_id;
+			x->memory = ivideo.video_size / 1024;
+			x->heapstart = ivideo.heapstart / 1024;
+			x->fbvidmode = sisfb_mode_no;
+	                break;
+		}
+	   default:
 		return -EINVAL;
 	}
 	return 0;
 
 }
 
-static int sisfb_mmap (struct fb_info *info, struct file *file, struct vm_area_struct *vma)
+static int sisfb_mmap(struct fb_info *info, struct file *file,
+		      struct vm_area_struct *vma)
 {
 	struct fb_var_screeninfo var;
 	unsigned long start;
@@ -2150,17 +2519,21 @@ static int sisfb_mmap (struct fb_info *info, struct file *file, struct vm_area_s
 	if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
 		return -EINVAL;
 	off = vma->vm_pgoff << PAGE_SHIFT;
-
+	
 	start = (unsigned long) ivideo.video_base;
-	len = PAGE_ALIGN ((start & ~PAGE_MASK) + ivideo.video_size);
+	len = PAGE_ALIGN((start & ~PAGE_MASK) + ivideo.video_size);
 
 	if (off >= len) {
 		off -= len;
-		sisfb_get_var (&var, info->currcon, info);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
+		sisfb_get_var(&var, info->currcon, info);
+#else
+		sisfb_get_var(&var, currcon, info);
+#endif
 		if (var.accel_flags)
 			return -EINVAL;
 		start = (unsigned long) ivideo.mmio_base;
-		len = PAGE_ALIGN ((start & ~PAGE_MASK) + sisfb_mmio_size);
+		len = PAGE_ALIGN((start & ~PAGE_MASK) + sisfb_mmio_size);
 	}
 
 	start &= PAGE_MASK;
@@ -2169,11 +2542,17 @@ static int sisfb_mmap (struct fb_info *info, struct file *file, struct vm_area_s
 	off += start;
 	vma->vm_pgoff = off >> PAGE_SHIFT;
 
-#if defined(__i386__)
+#if defined(__i386__) || defined(__x86_64__)
 	if (boot_cpu_data.x86 > 3)
-		pgprot_val (vma->vm_page_prot) |= _PAGE_PCD;
+		pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+	if (io_remap_page_range(vma->vm_start, off, vma->vm_end - vma->vm_start,
+				vma->vm_page_prot))
+#else	/* TW: 2.5 API */
+	if (io_remap_page_range(vma, vma->vm_start, off, vma->vm_end - vma->vm_start,
+				vma->vm_page_prot))
 #endif
-	if (io_remap_page_range(vma, vma->vm_start, off, vma->vm_end - vma->vm_start, vma->vm_page_prot)) 
 		return -EAGAIN;
 	return 0;
 
@@ -2186,69 +2565,85 @@ static struct fb_ops sisfb_ops = {
 	fb_set_var:	sisfb_set_var,
 	fb_get_cmap:	sisfb_get_cmap,
 	fb_set_cmap:	sisfb_set_cmap,
-	fb_setcolreg:	sisfb_setcolreg,
-	fb_blank:	sisfb_blank,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
+        fb_setcolreg:   sisfb_setcolreg,
+        fb_blank:       sisfb_blank,
+#endif
 	fb_ioctl:	sisfb_ioctl,
 	fb_mmap:	sisfb_mmap,
 };
 
 /* ------------ Interface to the low level console driver -------------*/
 
-static int sisfb_update_var (int con, struct fb_info *info)
+static int sisfb_update_var(int con, struct fb_info *info)
 {
 	return 0;
 }
 
-static int sisfb_switch (int con, struct fb_info *info)
+static int sisfb_switch(int con, struct fb_info *info)
 {
 	int cols, rows;
 
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
 	if (fb_display[info->currcon].cmap.len)
-		fb_get_cmap (&fb_display[info->currcon].cmap, 1, sis_getcolreg, info);
+		fb_get_cmap(&fb_display[info->currcon].cmap, 1, sis_getcolreg, info);
+#else
+        if (fb_display[currcon].cmap.len)
+		fb_get_cmap(&fb_display[currcon].cmap, 1, sis_getcolreg, info);
+#endif
 
 	fb_display[con].var.activate = FB_ACTIVATE_NOW;
 
-	if (!memcmp(&fb_display[con].var, &fb_display[info->currcon].var, sizeof (struct fb_var_screeninfo))) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
+	if (!memcmp(&fb_display[con].var, &fb_display[info->currcon].var,
+	                           sizeof(struct fb_var_screeninfo))) {
 		info->currcon = con;
 		return 1;
 	}
 
 	info->currcon = con;
+#else
+	if (!memcmp(&fb_display[con].var, &fb_display[currcon].var,
+	                           sizeof(struct fb_var_screeninfo))) {
+		currcon = con;
+		return 1;
+	}
 
-	sisfb_do_set_var (&fb_display[con].var, 1, info);
+	currcon = con;
+#endif
 
-	sisfb_set_disp (con, &fb_display[con].var);
+	sisfb_do_set_var(&fb_display[con].var, 1, info);
 
-	sisfb_do_install_cmap (con, info);
+	sisfb_set_disp(con, &fb_display[con].var);
+	
+	sisfb_do_install_cmap(con, info);
 
 	cols = sisbios_mode[sisfb_mode_idx].cols;
 	rows = sisbios_mode[sisfb_mode_idx].rows;
-	vc_resize_con (rows, cols, fb_display[con].conp->vc_num);
+	vc_resize_con(rows, cols, fb_display[con].conp->vc_num);
 
-	sisfb_update_var (con, info);
+	sisfb_update_var(con, info);
 
 	return 1;
-
 }
 
-static int sisfb_blank(int blank, struct fb_info *info)
+static void sisfb_blank(int blank, struct fb_info *info)
 {
 	u8 reg;
 
-	vgawb (CRTC_ADR, 0x17);
-	reg = vgarb (CRTC_DATA);
+	vgawb(CRTC_ADR, 0x17);
+	reg = vgarb(CRTC_DATA);
 
-	if (blank > 0)
+	if (blank > 0)		
 		reg &= 0x7f;
-	else
+	else			
 		reg |= 0x80;
 
-	vgawb (CRTC_ADR, 0x17);
-	vgawb (CRTC_DATA, reg);
-	return 0;
+	vgawb(CRTC_ADR, 0x17);
+	vgawb(CRTC_DATA, reg);
 }
 
-int sisfb_setup (char *options)
+int sisfb_setup(char *options)
 {
 	char *this_opt;
 
@@ -2258,46 +2653,60 @@ int sisfb_setup (char *options)
 	if (!options || !*options)
 		return 0;
 
-	while ((this_opt = strsep (&options, ",")) != NULL) {
+	while((this_opt = strsep(&options, ",")) != NULL) {
 		if (!*this_opt)
 			continue;
 
-		if (!strcmp (this_opt, "inverse")) {
+		if (!strcmp(this_opt, "inverse")) {
 			sisfb_inverse = 1;
-			fb_invert_cmaps ();
-		} else if (!strncmp (this_opt, "font:", 5)) {
-			strcpy (fb_info.fontname, this_opt + 5);
-		} else if (!strncmp (this_opt, "mode:", 5)) {
-			sisfb_search_mode (this_opt + 5);
-		} else if (!strncmp (this_opt, "vrate:", 6)) {
+			fb_invert_cmaps();
+		} else if (!strncmp(this_opt, "font:", 5)) {
+			strcpy(fb_info.fontname, this_opt + 5);
+		} else if (!strncmp(this_opt, "mode:", 5)) {
+			sisfb_search_mode(this_opt + 5);
+		} else if (!strncmp(this_opt, "vrate:", 6)) {
+			ivideo.refresh_rate =
+			    simple_strtoul(this_opt + 6, NULL, 0);
+		} else if (!strncmp(this_opt, "rate:", 5)) {
 			ivideo.refresh_rate =
-			    simple_strtoul (this_opt + 6, NULL, 0);
-		} else if (!strncmp (this_opt, "off", 3)) {
+			    simple_strtoul(this_opt + 5, NULL, 0);
+		} else if (!strncmp(this_opt, "off", 3)) {
 			sisfb_off = 1;
-		} else if (!strncmp (this_opt, "crt1off", 7)) {
+		} else if (!strncmp(this_opt, "crt1off", 7)) {
 			sisfb_crt1off = 1;
-		} else if (!strncmp (this_opt, "filter:", 7)) {
-			filter = (int) simple_strtoul (this_opt + 7, NULL, 0);
-		}
-		/*karl */
-		else if (!strncmp (this_opt, "tvmode:", 7)) {
-			if (!strncmp (this_opt + 7, "pal", 3))
-				sisfb_tvmode = 1;
-			if (!strncmp (this_opt + 7, "ntsc", 4))
-				sisfb_tvmode = 2;
+		} else if (!strncmp(this_opt, "filter:", 7)) {
+			filter = (int)simple_strtoul(this_opt + 7, NULL, 0);
+		} else if (!strncmp(this_opt, "forcecrt2type:", 14)) {
+			sisfb_search_crt2type(this_opt + 14);
+		} else if (!strncmp(this_opt, "forcecrt1:", 10)) {
+			sisfb_forcecrt1 = (int)simple_strtoul(this_opt + 10, NULL, 0);
+                } else if (!strncmp(this_opt, "tvmode:",7)) {
+                        if (!strncmp(this_opt + 7, "pal",3))
+                         	sisfb_tvmode = 1;
+                        if (!strncmp(this_opt + 7, "ntsc",4))
+                         	sisfb_tvmode = 2;
+                } else if (!strncmp(this_opt, "mem:",4)) {
+		        sisfb_mem = simple_strtoul(this_opt + 4, NULL, 0);
+                } else if (!strncmp(this_opt, "dstn:", 5)) {
+			enable_dstn = simple_strtoul(this_opt + 5, NULL, 0);
+			/* TW: DSTN overrules forcecrt2type */
+			if (enable_dstn) sisfb_crt2type = DISPTYPE_LCD;
+		} else if (!strncmp(this_opt, "queuemode:", 10)) {
+			sisfb_search_queuemode(this_opt + 10);
+		} else if (!strncmp(this_opt, "pdc:", 4)) {
+		        sisfb_pdc = simple_strtoul(this_opt + 4, NULL, 0);
+		        if(sisfb_pdc & ~0x3c) {
+			   printk(KERN_INFO "sisfb: Illegal pdc parameter\n");
+			   sisfb_pdc = 0;
+		        }
+		} else {
+			printk(KERN_INFO "sisfb: Invalid parameter %s\n", this_opt);
 		}
-		/*karl:10/01/2001 */
-		else if (!strncmp (this_opt, "mem:", 4)) {
-
-			sisfb_mem = simple_strtoul (this_opt + 4, NULL, 0);
-
-		} else
-			DPRINTK ("invalid parameter %s\n", this_opt);
 	}
 	return 0;
 }
 
-int __init sisfb_init (void)
+int __init sisfb_init(void)
 {
 	struct pci_dev *pdev = NULL;
 	struct board *b;
@@ -2305,493 +2714,689 @@ int __init sisfb_init (void)
 	//unsigned long rom_vbase;
 	u32 reg32;
 	u16 reg16;
-	u8 reg;
-	int nRes;
+	u8  reg;
+	int temp1, temp2;
+
+	outb(0x77, 0x80);
 
-	outb (0x77, 0x80);
+#if 0 	
+	/* for DOC VB */
+	sisfb_set_reg4(0xcf8,0x800000e0);
+	reg32 = sisfb_get_reg3(0xcfc);
+	reg32 = reg32 | 0x00001000;
+	sisfb_set_reg4(0xcfc,reg32);
+	}
+#endif
 
 	if (sisfb_off)
 		return -ENXIO;
 
-	pci_for_each_dev (pdev)
-	{
+	if (enable_dstn)
+		SetEnableDstn();
+
+	pci_for_each_dev(pdev) {
 		for (b = sisdev_list; b->vendor; b++) {
 			if ((b->vendor == pdev->vendor)
 			    && (b->device == pdev->device)) {
 				pdev_valid = 1;
-				strcpy (fb_info.modename, b->name);
+				strcpy(fb_info.modename, b->name);
 				ivideo.chip_id = pdev->device;
-				pci_read_config_byte (pdev, PCI_REVISION_ID,
-						      &ivideo.revision_id);
-				pci_read_config_word (pdev, PCI_COMMAND, &reg16);
-				// Eden Chen
-				//sishw_ext.uRevisionID = ivideo.revision_id;
+				pci_read_config_byte(pdev, PCI_REVISION_ID,
+				                     &ivideo.revision_id);
+				pci_read_config_word(pdev, PCI_COMMAND, &reg16);
 				sishw_ext.jChipRevision = ivideo.revision_id;
-				// ~Eden Chen
 				sisvga_enabled = reg16 & 0x1;
 				break;
 			}
 		}
-	
+
 		if (pdev_valid)
 			break;
 	}
-	
+
 	if (!pdev_valid)
 		return -1;
-	
-	// Eden Chen
+
+// Eden Chen
 	switch (ivideo.chip_id) {
-	case PCI_DEVICE_ID_SI_300:
+	   case PCI_DEVICE_ID_SI_300:
 		ivideo.chip = SIS_300;
 		sisvga_engine = SIS_300_VGA;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300;
+		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_300;
 		break;
-	case PCI_DEVICE_ID_SI_630_VGA:
-	{
-		sisfb_set_reg4 (0xCF8, 0x80000000);
-		reg32 = sisfb_get_reg3 (0xCFC);
-		if (reg32 == 0x07301039) {
-			ivideo.chip = SIS_730;
-			strcpy (fb_info.modename, "SIS 730");
-		} else
-			ivideo.chip = SIS_630;
-
-		sisvga_engine = SIS_300_VGA;
-		break;
-	}
-	case PCI_DEVICE_ID_SI_540_VGA:
+	   case PCI_DEVICE_ID_SI_630_VGA:
+		{
+			sisfb_set_reg4(0xCF8, 0x80000000);
+			reg32 = sisfb_get_reg3(0xCFC);
+			if (reg32 == 0x07301039) {
+				ivideo.chip = SIS_730;
+				strcpy(fb_info.modename, "SIS 730");
+			} else
+				ivideo.chip = SIS_630;
+
+			sisvga_engine = SIS_300_VGA;
+			sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300;
+			sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_300;
+			break;
+		}
+	   case PCI_DEVICE_ID_SI_540_VGA:
 		ivideo.chip = SIS_540;
 		sisvga_engine = SIS_300_VGA;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_300;
+		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_300;
 		break;
-	case PCI_DEVICE_ID_SI_315H:
+	   case PCI_DEVICE_ID_SI_315H:
 		ivideo.chip = SIS_315H;
 		sisvga_engine = SIS_315_VGA;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
-	case PCI_DEVICE_ID_SI_315:
+	   case PCI_DEVICE_ID_SI_315:
 		ivideo.chip = SIS_315;
 		sisvga_engine = SIS_315_VGA;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
-	case PCI_DEVICE_ID_SI_315PRO:
+	   case PCI_DEVICE_ID_SI_315PRO:
 		ivideo.chip = SIS_315PRO;
 		sisvga_engine = SIS_315_VGA;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
-	case PCI_DEVICE_ID_SI_550_VGA:
+	   case PCI_DEVICE_ID_SI_550_VGA:
 		ivideo.chip = SIS_550;
 		sisvga_engine = SIS_315_VGA;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
+		break;
+	   case PCI_DEVICE_ID_SI_650_VGA:
+		ivideo.chip = SIS_650;
+		sisvga_engine = SIS_315_VGA;
+		sisfb_hwcursor_size = HW_CURSOR_AREA_SIZE_315;
+		sisfb_CRT2_write_enable = IND_SIS_CRT2_WRITE_ENABLE_315;
 		break;
 	}
-
-	// Eden Chen
-	//sishw_ext.jChipID = ivideo.chip;
 	sishw_ext.jChipType = ivideo.chip;
 	// for Debug
-	if ((sishw_ext.jChipType == SIS_315PRO)
-	    || (sishw_ext.jChipType == SIS_315))
+	if ((sishw_ext.jChipType == SIS_315PRO) 
+	   || (sishw_ext.jChipType == SIS_315) )
 		sishw_ext.jChipType = SIS_315H;
-		// ~Eden Chen
 
-	DPRINTK ("%s is used as %s device(VGA Engine %d).\n",
-		 fb_info.modename, sisvga_enabled ? "primary" : "secondary",
-		 sisvga_engine);
-	
-	ivideo.video_base = pci_resource_start (pdev, 0);
-	ivideo.mmio_base = pci_resource_start (pdev, 1);
-	// Eden Chen
-	//sishw_ext.IOAddress = (unsigned short) ivideo.vga_base 
-	//      = pci_resource_start(pdev, 2) + 0x30;
-	sishw_ext.ulIOAddress = (unsigned short) ivideo.vga_base = pci_resource_start (pdev, 2) + 0x30;
-	// ~Eden Chen
+	DPRINTK("%s is used as %s device(VGA Engine %d).\n", 
+		fb_info.modename, sisvga_enabled ? "primary" : "secondary", sisvga_engine);
+
+	ivideo.video_base = pci_resource_start(pdev, 0);
+	ivideo.mmio_base = pci_resource_start(pdev, 1);
+	sishw_ext.ulIOAddress = (unsigned short) ivideo.vga_base =
+		                   pci_resource_start(pdev, 2) + 0x30;
 
-	sisfb_mmio_size = pci_resource_len (pdev, 1);
+	sisfb_mmio_size =  pci_resource_len(pdev, 1);
 
 	if (!sisvga_enabled)
-		if (pci_enable_device (pdev))
-			return -EIO;
+		if (pci_enable_device(pdev))   return -EIO;
+
+// Eden Eden
+//#ifdef LINUXBIOS
+//	sishw_ext.VirtualRomBase = rom_vbase = (unsigned long) rom_data;
+//#else
+//	{
+//	unsigned long rom_base  = 0x000C0000;
+//
+//	request_region(rom_base, 32, "sisfb");
+//	sishw_ext.VirtualRomBase = rom_vbase 
+//		= (unsigned long) ioremap(rom_base, MAX_ROM_SCAN);
+//	}
+//#endif
+// ~Eden Chen
 	
-	vgawb (SEQ_ADR, IND_SIS_PASSWORD);
-	vgawb (SEQ_DATA, SIS_PASSWORD);
+	vgawb(SEQ_ADR, IND_SIS_PASSWORD);
+	vgawb(SEQ_DATA, SIS_PASSWORD);
+
+        /* TW: Debug kernel 2.5 problem */
+	vgawb(SEQ_ADR, 0x14);
+	reg = vgarb(SEQ_DATA);
+	printk("sisfb: SR14 = 0x%02x\n", reg);
+	/* /TW */
 
 #ifdef LINUXBIOS
 #ifdef CONFIG_FB_SIS_300
-	if (sisvga_engine == SIS_300_VGA)
-	{
-		vgawb (SEQ_ADR, 0x28);
-		vgawb (SEQ_DATA, 0x37);
+	if (sisvga_engine == SIS_300_VGA) {
+		vgawb(SEQ_ADR, 0x28);
+		vgawb(SEQ_DATA, 0x37);
 
-		vgawb (SEQ_ADR, 0x29);
-		vgawb (SEQ_DATA, 0x61);
+		vgawb(SEQ_ADR, 0x29);
+		vgawb(SEQ_DATA, 0x61);
 
-		vgawb (SEQ_ADR, IND_SIS_SCRATCH_REG_1A);
-		reg = vgarb (SEQ_DATA);
+		vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_1A);
+		reg = vgarb(SEQ_DATA);
 		reg |= SIS_SCRATCH_REG_1A_MASK;
-		vgawb (SEQ_DATA, reg);
+		vgawb(SEQ_DATA, reg);
 	}
 #endif
 #ifdef CONFIG_FB_SIS_315
-	if (ivideo.chip == SIS_550) {
-		vgawb (SEQ_ADR, 0x28);
-		vgawb (SEQ_DATA, 0x5A);
-	
-		vgawb (SEQ_ADR, 0x29);
-		vgawb (SEQ_DATA, 0x64);
+	if (ivideo.chip == SIS_550 || ivideo.chip == SIS_650) {
+		vgawb(SEQ_ADR,  0x28);
+		vgawb(SEQ_DATA, 0x5A);
 
-		vgawb (CRTC_ADR, 0x3A);
-		vgawb (CRTC_DATA, 0x00);
+		vgawb(SEQ_ADR,  0x29);
+		vgawb(SEQ_DATA, 0x64);
+
+		vgawb(CRTC_ADR,  0x3A);
+		vgawb(CRTC_DATA, 0x00);
 	}
 #endif
-#endif
+#endif /* LinuxBIOS */
 
 	if (sisvga_engine == SIS_315_VGA) {
 		switch (ivideo.chip) {
-		case SIS_315H:
-		case SIS_315:
+		   case SIS_315H:
+		   case SIS_315:
 			sishw_ext.bIntegratedMMEnabled = TRUE;
 			break;
-		case SIS_550:
+		   case SIS_550:
+		   case SIS_650:
 			// Eden Chen
 			//vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_1A);
 			//reg = vgarb(SEQ_DATA);
 			//if (reg & SIS_SCRATCH_REG_1A_MASK)
-			//      sishw_ext.bIntegratedMMEnabled = TRUE;
+			//	sishw_ext.bIntegratedMMEnabled = TRUE;
 			//else
-			//      sishw_ext.bIntegratedMMEnabled = FALSE;
+			//	sishw_ext.bIntegratedMMEnabled = FALSE;
 			//for Debug
 			sishw_ext.bIntegratedMMEnabled = TRUE;
 			// ~Eden Chen
 			break;
-		default:
+		   default:
 			break;
 		}
 	} else if (sisvga_engine == SIS_300_VGA) {
 		if (ivideo.chip == SIS_300) {
 			sishw_ext.bIntegratedMMEnabled = TRUE;
 		} else {
-			vgawb (SEQ_ADR, IND_SIS_SCRATCH_REG_1A);
-			reg = vgarb (SEQ_DATA);
+			vgawb(SEQ_ADR, IND_SIS_SCRATCH_REG_1A);
+			reg = vgarb(SEQ_DATA);
 			if (reg & SIS_SCRATCH_REG_1A_MASK)
 				sishw_ext.bIntegratedMMEnabled = TRUE;
 			else
 				sishw_ext.bIntegratedMMEnabled = FALSE;
 		}
 	}
-	// Eden Chen
+
 	sishw_ext.pDevice = NULL;
 	sishw_ext.pjVirtualRomBase = NULL;
 	sishw_ext.pjCustomizedROMImage = NULL;
 	sishw_ext.bSkipDramSizing = 0;
 	sishw_ext.pQueryVGAConfigSpace = &sisfb_query_VGA_config_space;
 	sishw_ext.pQueryNorthBridgeSpace = &sisfb_query_north_bridge_space;
-	strcpy (sishw_ext.szVBIOSVer, "0.84");
+	strcpy(sishw_ext.szVBIOSVer, "0.84");
+
+	/* TW: Mode numbers for 1280x960 are different for 300 and 310/325 series */
+	if(sisvga_engine == SIS_300_VGA) {
+		sisbios_mode[MODEINDEX_1280x960].mode_no = 0x6e;
+		sisbios_mode[MODEINDEX_1280x960+1].mode_no = 0x6f;
+		sisbios_mode[MODEINDEX_1280x960+2].mode_no = 0x7b;
+		sisbios_mode[MODEINDEX_1280x960+3].mode_no = 0x7b;
+	}
 
-	sishw_ext.pSR = vmalloc (sizeof (SIS_DSReg) * SR_BUFFER_SIZE);
-	if (sishw_ext.pSR == NULL)
-		printk (KERN_DEBUG "Allocated SRReg space fail.\n");
+	sishw_ext.pSR = vmalloc(sizeof(SIS_DSReg) * SR_BUFFER_SIZE);
+	if (sishw_ext.pSR == NULL) {
+		printk(KERN_INFO "sisfb: Fatal error: Allocating SRReg space failed.\n");
+		return -ENODEV;
+	}
 	sishw_ext.pSR[0].jIdx = sishw_ext.pSR[0].jVal = 0xFF;
 
-	sishw_ext.pCR = vmalloc (sizeof (SIS_DSReg) * CR_BUFFER_SIZE);
-	if (sishw_ext.pCR == NULL)
-		printk (KERN_DEBUG "Allocated CRReg space fail.\n");
+	sishw_ext.pCR = vmalloc(sizeof(SIS_DSReg) * CR_BUFFER_SIZE);
+	if (sishw_ext.pCR == NULL) {
+		printk(KERN_INFO "sisfb: Fatal error: Allocating CRReg space failed.\n");
+		return -ENODEV;
+	}
 	sishw_ext.pCR[0].jIdx = sishw_ext.pCR[0].jVal = 0xFF;
-	// ~Eden Chen
 
-	#ifdef CONFIG_FB_SIS_300
+#ifdef CONFIG_FB_SIS_300
 	if (sisvga_engine == SIS_300_VGA) {
 		if (!sisvga_enabled) {
-			// Eden Chen
-			sishw_ext.pjVideoMemoryAddress = ioremap (ivideo.video_base, 0x2000000);
-			//SiSInit300(&sishw_ext);
-			SiSInit (&sishw_ext);
-			vgawb (SEQ_ADR, IND_SIS_PASSWORD);
-			vgawb (SEQ_DATA, SIS_PASSWORD);
-			// ~Eden Chen
+			sishw_ext.pjVideoMemoryAddress
+				= ioremap(ivideo.video_base, 0x2000000);
+			if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+				SiSInit(&sishw_ext);
+				vgawb(SEQ_ADR, IND_SIS_PASSWORD);
+				vgawb(SEQ_DATA, SIS_PASSWORD);
+			}
 		}
 #ifdef LINUXBIOS
 		else {
-			// Eden Chen
 			sishw_ext.pjVideoMemoryAddress
-			    = ioremap (ivideo.video_base, 0x2000000);
-			//SiSInit300(&sishw_ext);
-			SiSInit (&sishw_ext);
-			vgawb (SEQ_ADR, IND_SIS_PASSWORD);
-			vgawb (SEQ_DATA, SIS_PASSWORD);
-			// ~Eden Chen
+				= ioremap(ivideo.video_base, 0x2000000);
+			if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+				SiSInit(&sishw_ext);
+				vgawb(SEQ_ADR, IND_SIS_PASSWORD);
+				vgawb(SEQ_DATA, SIS_PASSWORD);
+			}
+		}
+		if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+			vgawb(SEQ_ADR, 0x7);
+			reg = vgarb(SEQ_DATA);
+			reg |= 0x10;
+			vgawb(SEQ_DATA, reg);
 		}
-		vgawb (SEQ_ADR, 0x7);
-		reg = vgarb (SEQ_DATA);
-		reg |= 0x10;
-		vgawb (SEQ_DATA, reg);
 #endif
-		sisfb_get_dram_size_300 ();
+		if (sisfb_get_dram_size_300()) {
+			printk(KERN_INFO "sisfb: Fatal error: Unable to determine RAM size\n");
+			return -ENODEV;
+		}
 	}
 #endif
 
-	#ifdef CONFIG_FB_SIS_315
+#ifdef CONFIG_FB_SIS_315
 	if (sisvga_engine == SIS_315_VGA) {
 		if (!sisvga_enabled) {
 			/* Mapping Max FB Size for 315 Init */
 			// Eden Chen
 			//sishw_ext.VirtualVideoMemoryAddress 
-			sishw_ext.pjVideoMemoryAddress = ioremap (ivideo.video_base, 0x8000000);
-			//SiSInit310(&sishw_ext);
-			SiSInit (&sishw_ext);
-	
-			vgawb (SEQ_ADR, IND_SIS_PASSWORD);
-			vgawb (SEQ_DATA, SIS_PASSWORD);
-	
-			sishw_ext.bSkipDramSizing = TRUE;
-			vgawb (SEQ_ADR, 0x13);
-			sishw_ext.pSR[0].jIdx = 0x13;
-			sishw_ext.pSR[0].jVal = vgarb (SEQ_DATA);
-			vgawb (SEQ_ADR, 0x14);
-			sishw_ext.pSR[1].jIdx = 0x14;
-			sishw_ext.pSR[1].jVal = vgarb (SEQ_DATA);
-			sishw_ext.pSR[2].jIdx = 0xFF;
-			sishw_ext.pSR[2].jVal = 0xFF;
-			// Eden Chen
+			sishw_ext.pjVideoMemoryAddress 
+				= ioremap(ivideo.video_base, 0x8000000);
+			if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+				SiSInit(&sishw_ext);
+
+				vgawb(SEQ_ADR, IND_SIS_PASSWORD);
+				vgawb(SEQ_DATA, SIS_PASSWORD);
+
+				sishw_ext.bSkipDramSizing = TRUE;
+				vgawb(SEQ_ADR, 0x13);
+				sishw_ext.pSR[0].jIdx = 0x13;
+				sishw_ext.pSR[0].jVal = vgarb(SEQ_DATA);
+				vgawb(SEQ_ADR, 0x14);
+				sishw_ext.pSR[1].jIdx = 0x14;
+				sishw_ext.pSR[1].jVal = vgarb(SEQ_DATA);
+				sishw_ext.pSR[2].jIdx = 0xFF;
+				sishw_ext.pSR[2].jVal = 0xFF;
+			}
 		}
 #ifdef LINUXBIOS
 		else {
-			sishw_ext.pjVideoMemoryAddress = ioremap (ivideo.video_base, 0x8000000);
-			SiSInit (&sishw_ext);
-			vgawb (SEQ_ADR, IND_SIS_PASSWORD);
-			vgawb (SEQ_DATA, SIS_PASSWORD);
-	
-			sishw_ext.bSkipDramSizing = TRUE;
-			vgawb (SEQ_ADR, 0x13);
-			sishw_ext.pSR[0].jIdx = 0x13;
-			sishw_ext.pSR[0].jVal = vgarb (SEQ_DATA);
-			vgawb (SEQ_ADR, 0x14);
-			sishw_ext.pSR[1].jIdx = 0x14;
-			sishw_ext.pSR[1].jVal = vgarb (SEQ_DATA);
-			sishw_ext.pSR[2].jIdx = 0xFF;
-			sishw_ext.pSR[2].jVal = 0xFF;
+			sishw_ext.pjVideoMemoryAddress
+				= ioremap(ivideo.video_base, 0x8000000);
+			if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+				SiSInit(&sishw_ext);
+				vgawb(SEQ_ADR, IND_SIS_PASSWORD);
+				vgawb(SEQ_DATA, SIS_PASSWORD);
+
+				sishw_ext.bSkipDramSizing = TRUE;
+				vgawb(SEQ_ADR, 0x13);
+				sishw_ext.pSR[0].jIdx = 0x13;
+				sishw_ext.pSR[0].jVal = vgarb(SEQ_DATA);
+				vgawb(SEQ_ADR, 0x14);
+				sishw_ext.pSR[1].jIdx = 0x14;
+				sishw_ext.pSR[1].jVal = vgarb(SEQ_DATA);
+				sishw_ext.pSR[2].jIdx = 0xFF;
+				sishw_ext.pSR[2].jVal = 0xFF;
+			}
 		}
 #endif
-		sisfb_get_dram_size_315 ();
+		if (sisfb_get_dram_size_315()) {
+			printk(KERN_INFO "sisfb: Fatal error: Unable to determine RAM size.\n");
+			return -ENODEV;
+		}
 	}
 #endif
-	//Eden Chen 
-	vgawb (SEQ_ADR, IND_SIS_PCI_ADDRESS_SET);
-	reg = vgarb (SEQ_DATA);
-	reg |= SIS_PCI_ADDR_ENABLE;
-	reg |= SIS_MEM_MAP_IO_ENABLE;
-	vgawb (SEQ_DATA, reg);
-
-	vgawb (SEQ_ADR, IND_SIS_MODULE_ENABLE);
-	reg = vgarb (SEQ_DATA);
-	reg |= SIS_ENABLE_2D;
-	vgawb (SEQ_DATA, reg);
-	//~Eden Chen
+	if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+
+		vgawb(SEQ_ADR, IND_SIS_PCI_ADDRESS_SET);
+		reg = vgarb(SEQ_DATA);
+		reg |= SIS_PCI_ADDR_ENABLE;    	/* Enable PCI_LINEAR_ADDRESSING */
+		reg |= SIS_MEM_MAP_IO_ENABLE;  	/* Enable MMIO_ENABLE */
+		vgawb(SEQ_DATA, reg);
+
+		vgawb(SEQ_ADR, IND_SIS_MODULE_ENABLE);
+		reg = vgarb(SEQ_DATA);
+		reg |= SIS_ENABLE_2D;		/* Enable 2D accelerator engine */
+		vgawb(SEQ_DATA, reg);
+
+	}
 
-	// Eden Chen
 	sishw_ext.ulVideoMemorySize = ivideo.video_size;
-	// ~Eden Chen
-	if (!request_mem_region (ivideo.video_base, ivideo.video_size, "sisfb FB")) {
-		printk (KERN_ERR "sisfb: cannot reserve frame buffer memory\n");
+
+	if(sisfb_pdc) {
+	    sishw_ext.pdc = sisfb_pdc;
+	} else {
+	    sishw_ext.pdc = 0;
+	}
+
+	if (!request_mem_region(ivideo.video_base, ivideo.video_size, "sisfb FB")) {
+		printk(KERN_ERR "sisfb: Fatal error: Unable to reserve frame buffer memory\n");
+		printk(KERN_ERR "sisfb: Is there another framebuffer driver active?\n");
 		return -ENODEV;
 	}
 
-	if (!request_mem_region (ivideo.mmio_base, sisfb_mmio_size, "sisfb MMIO")) {
-		printk (KERN_ERR "sisfb: cannot reserve MMIO region\n");
-		release_mem_region (ivideo.video_base, ivideo.video_size);
+	if (!request_mem_region(ivideo.mmio_base, sisfb_mmio_size, "sisfb MMIO")) {
+		printk(KERN_ERR "sisfb: Fatal error: Unable to reserve MMIO region\n");
+		release_mem_region(ivideo.video_base, ivideo.video_size);
 		return -ENODEV;
 	}
-	// Eden Chen
-	//sishw_ext.VirtualVideoMemoryAddress = ivideo.video_vbase 
-	sishw_ext.pjVideoMemoryAddress = ivideo.video_vbase = ioremap (ivideo.video_base, ivideo.video_size);
-	// Eden Chen
-	ivideo.mmio_vbase = ioremap (ivideo.mmio_base, sisfb_mmio_size);
 
-	printk (KERN_INFO
-		"sisfb: framebuffer at 0x%lx, mapped to 0x%p, size %dk\n",
-		ivideo.video_base, ivideo.video_vbase, ivideo.video_size / 1024);
+	sishw_ext.pjVideoMemoryAddress = ivideo.video_vbase
+		= ioremap(ivideo.video_base, ivideo.video_size);
+	ivideo.mmio_vbase = ioremap(ivideo.mmio_base, sisfb_mmio_size);
 
-	printk (KERN_INFO
-		"sisfb: MMIO at 0x%lx, mapped to 0x%p, size %ldk\n",
-		ivideo.mmio_base, ivideo.mmio_vbase, sisfb_mmio_size / 1024);
+	printk(KERN_INFO
+	       "sisfb: Framebuffer at 0x%lx, mapped to 0x%p, size %dk\n",
+	       ivideo.video_base, ivideo.video_vbase,
+	       ivideo.video_size / 1024);
 
-	#ifdef CONFIG_FB_SIS_300
-	if (sisvga_engine == SIS_300_VGA) {
-		sisfb_get_VB_type_300 ();
-		if (ivideo.hasVB != HASVB_NONE) {
-			sisfb_detect_VB_connect_300 ();
+	printk(KERN_INFO
+	       "sisfb: MMIO at 0x%lx, mapped to 0x%p, size %ldk\n",
+	       ivideo.mmio_base, ivideo.mmio_vbase,
+	       sisfb_mmio_size / 1024);
+
+	if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+
+#ifdef CONFIG_FB_SIS_300
+		if (sisvga_engine == SIS_300_VGA) {
+			sisfb_get_VB_type_300();
+			if (ivideo.hasVB != HASVB_NONE) {
+				sisfb_detect_VB_connect_300();
+			}
 		}
-	}
 #endif
 
 #ifdef CONFIG_FB_SIS_315
-	if (sisvga_engine == SIS_315_VGA) {
-		sisfb_get_VB_type_315 ();
-		if (ivideo.hasVB != HASVB_NONE) {
-			sisfb_detect_VB_connect_315 ();
+		if (sisvga_engine == SIS_315_VGA) {
+			sisfb_get_VB_type_315();
+			if (ivideo.hasVB != HASVB_NONE) {
+				sisfb_detect_VB_connect_315();
+			}
 		}
-	}
 #endif
 
-	// Eden Chen
-sishw_ext.ujVBChipID = VB_CHIP_UNKNOWN;
-sishw_ext.usExternalChip = 0;
-
-	switch (ivideo.hasVB) {
-	case HASVB_301:
-		/*karl */
-		vgawb (VB_PART4_ADR, 0x01);
-		reg = vgarb (VB_PART4_DATA);
-		if ((reg != 0xB1) && (reg != 0xB0))
-			sishw_ext.ujVBChipID = VB_CHIP_301;
-		else
-			sishw_ext.ujVBChipID = VB_CHIP_301B;
-		break;
-	case HASVB_302:
-		sishw_ext.ujVBChipID = VB_CHIP_302;
-		break;
-	case HASVB_303:
-		sishw_ext.ujVBChipID = VB_CHIP_303;
-		break;
-	case HASVB_LVDS:
-		sishw_ext.usExternalChip = 0x1;
-		break;
-	case HASVB_TRUMPION:
-		sishw_ext.usExternalChip = 0x2;
-		break;
-	case HASVB_CHRONTEL:
-		sishw_ext.usExternalChip = 0x4;
-		break;
-	case HASVB_LVDS_CHRONTEL:
-		sishw_ext.usExternalChip = 0x5;
-		break;
-	default:
-		break;
-	}
-
-	// ~Eden Chen
-
-	if (ivideo.disp_state & DISPTYPE_DISP2) {
-		if (sisfb_crt1off)
-			ivideo.disp_state |= DISPMODE_SINGLE;
-		else
-			ivideo.disp_state |= (DISPMODE_MIRROR | DISPTYPE_CRT1);
-	} else
-		ivideo.disp_state = DISPMODE_SINGLE | DISPTYPE_CRT1;
-
-	if (ivideo.disp_state & DISPTYPE_LCD) {
-		vgawb (CRTC_ADR, IND_SIS_LCD_PANEL);
-		reg = vgarb (CRTC_DATA);
-		// Eden Chen
-		switch (reg) {
-		case SIS_LCD_PANEL_800X600:
-			sishw_ext.ulCRT2LCDType = LCD_800x600;
-			break;
-		case SIS_LCD_PANEL_1024X768:
-			sishw_ext.ulCRT2LCDType = LCD_1024x768;
+		sishw_ext.ujVBChipID = VB_CHIP_UNKNOWN;
+		sishw_ext.usExternalChip = 0;
+
+		switch (ivideo.hasVB) {
+
+		case HASVB_301:
+			vgawb(VB_PART4_ADR,0x01);
+			reg = vgarb(VB_PART4_DATA);
+			if (reg >= 0xD0) {
+				sishw_ext.ujVBChipID = VB_CHIP_301LV;
+				printk(KERN_INFO "sisfb: SiS301LV bridge detected (revision 0x%02x)\n",reg);
+	  		} else if (reg >= 0xB0) {
+				sishw_ext.ujVBChipID = VB_CHIP_301B;
+				printk(KERN_INFO "sisfb: SiS301B bridge detected (revision 0x%02x\n",reg);
+			} else {
+				sishw_ext.ujVBChipID = VB_CHIP_301;
+				printk(KERN_INFO "sisfb: SiS301 bridge detected\n");
+			}
 			break;
-		case SIS_LCD_PANEL_1280X1024:
-			sishw_ext.ulCRT2LCDType = LCD_1280x1024;
+		case HASVB_302:
+			vgawb(VB_PART4_ADR,0x01);
+			reg = vgarb(VB_PART4_DATA);
+			if (reg >= 0xD0) {
+				sishw_ext.ujVBChipID = VB_CHIP_302LV;
+				printk(KERN_INFO "sisfb: SiS302LV bridge detected (revision 0x%02x)\n",reg);
+	  		} else if (reg >= 0xB0) {
+			        sishw_ext.ujVBChipID = VB_CHIP_302B;
+				printk(KERN_INFO "sisfb: SiS302B bridge detected (revision 0x%02x)\n",reg);
+			} else {
+			        sishw_ext.ujVBChipID = VB_CHIP_302;
+				printk(KERN_INFO "sisfb: SiS302 bridge detected\n");
+			}
 			break;
-		case SIS_LCD_PANEL_640X480:
-			sishw_ext.ulCRT2LCDType = LCD_640x480;
+		case HASVB_303:
+			sishw_ext.ujVBChipID = VB_CHIP_303;
+			printk(KERN_INFO "sisfb: SiS303 bridge detected (not supported)\n");
 			break;
-		case SIS_LCD_PANEL_1280X960:
-			sishw_ext.ulCRT2LCDType = LCD_1280x960;
+		case HASVB_LVDS:
+			sishw_ext.usExternalChip = 0x1;
+			printk(KERN_INFO "sisfb: LVDS transmitter detected\n");
 			break;
-		default:
-			sishw_ext.ulCRT2LCDType = LCD_1024x768;
+		case HASVB_TRUMPION:
+			sishw_ext.usExternalChip = 0x2;
+			printk(KERN_INFO "sisfb: Trumpion Zurac LVDS scaler detected\n");
 			break;
-		}
-	// ~Eden Chen
-	}
-
-	if (sisfb_mode_idx >= 0)
-		sisfb_validate_mode ();
-	
-	if (sisfb_mode_idx < 0) {
-		switch (ivideo.disp_state & DISPTYPE_DISP2) {
-		case DISPTYPE_LCD:
-			sisfb_mode_idx = DEFAULT_LCDMODE;
+		case HASVB_CHRONTEL:
+			sishw_ext.usExternalChip = 0x4;
+			printk(KERN_INFO "sisfb: Chrontel TV encoder detected\n");
 			break;
-		case DISPTYPE_TV:
-			sisfb_mode_idx = DEFAULT_TVMODE;
+		case HASVB_LVDS_CHRONTEL:
+			sishw_ext.usExternalChip = 0x5;
+			printk(KERN_INFO "sisfb: LVDS transmitter and Chrontel TV encoder detected\n");
 			break;
 		default:
-			sisfb_mode_idx = DEFAULT_MODE;
+			printk(KERN_INFO "sisfb: No or unknown bridge type detected\n");
 			break;
 		}
-	}
-	
-	sisfb_mode_no = sisbios_mode[sisfb_mode_idx].mode_no;
-	
-	if (ivideo.refresh_rate != 0)
-		sisfb_search_refresh_rate (ivideo.refresh_rate);
 
-	if (sisfb_rate_idx == 0) {
-		sisfb_rate_idx = sisbios_mode[sisfb_mode_idx].rate_idx;
-		ivideo.refresh_rate = 60;
-	}
+		/* TW: Determine and detect attached TV's on Chrontel */
+		if (sishw_ext.usExternalChip == 0x04 || sishw_ext.usExternalChip == 0x05) {
+		    SiSRegInit(sishw_ext.ulIOAddress);
+		    if(ivideo.chip < SIS_315H) {    /* TW: Chrontel 7005 */
+#ifdef CONFIG_FB_SIS_300
+                       SiS_IF_DEF_CH70xx = 1;
+		       temp1=SiS_GetCH700x(0x25);
+		       if ((temp1 >= 50) && (temp1 <= 100)) {
+	    		   /* TW: Read power status */
+	    		   temp1 = SiS_GetCH700x(0x0e);
+	    		   if ((temp1&0x03)!=0x03) {
+		        	/* TW: Power all outputs */
+	        		SiS_SetCH70xxANDOR(0x030E,0xF8);
+	    		   }
+			   /* TW: Sense connected TV devices */
+	    		   SiS_SetCH700x(0x0110);
+	    		   SiS_SetCH700x(0x0010);
+	    		   temp1 = SiS_GetCH700x(0x10);
+	    		   if (!(temp1 & 0x08)) {
+				/* TW: So we can be sure that there IS a SVHS output */
+				printk(KERN_INFO
+				   "sisfb: Chrontel: Detected TV connected to SVHS output\n");
+				ivideo.TV_plug = TVPLUG_SVIDEO;
+				vgawb(CRTC_ADR, 0x32);
+				temp2 = vgarb(CRTC_DATA) | 0x02;
+				vgawb(CRTC_DATA, temp2);
+			   } else if (!(temp1 & 0x02)) {
+				/* TW: So we can be sure that there IS a CVBS output */
+				printk(KERN_INFO
+				   "sisfb: Chrontel: Detected TV connected to CVBS output\n");
+				ivideo.TV_plug = TVPLUG_COMPOSITE;
+				vgawb(CRTC_ADR, 0x32);
+				temp2 = vgarb(CRTC_DATA) | 0x01;
+				vgawb(CRTC_DATA, temp2);
+	    		   } else {
+		    		SiS_SetCH70xxANDOR(0x010E,0xF8);
+	    		   }
+		       } else if (temp1==0) {
+	    		        SiS_SetCH70xxANDOR(0x010E,0xF8);
+	    	       }
+#endif
+		   } else {  /* TW: Chrontel 7019 */
+#ifdef CONFIG_FB_SIS_315
+			SiS_IF_DEF_CH70xx = 2;
+                        temp1 = SiS_GetCH701x(0x49);
+			SiS_SetCH701x(0x2049);
+			SiS_DDC2Delay(0x96);
+			temp2 = SiS_GetCH701x(0x20);
+			temp2 |= 0x01;
+			SiS_SetCH701x((temp2 << 8) | 0x20);
+			SiS_DDC2Delay(0x96);
+			temp2 ^= 0x01;
+			SiS_SetCH701x((temp2 << 8) | 0x20);
+			SiS_DDC2Delay(0x96);
+			temp2 = SiS_GetCH701x(0x20);
+			SiS_SetCH701x((temp1 << 8) | 0x49);
+                        temp1 = 0;
+			if(temp2 & 0x02) temp1 |= 0x01;
+			if(temp2 & 0x10) temp1 |= 0x01;
+			if(temp2 & 0x04) temp1 |= 0x02;
+			if( (temp1 & 0x01) && (temp1 & 0x02) ) temp1 = 0x04;
+			switch(temp1) {
+			case 0x01:
+			     printk(KERN_INFO
+				"sisfb: Chrontel: Detected TV connected to CVBS output\n");
+			     ivideo.TV_plug = TVPLUG_COMPOSITE;
+			     vgawb(CRTC_ADR, 0x32);
+                             temp2 = vgarb(CRTC_DATA) | 0x01;
+			     vgawb(CRTC_DATA, temp2);
+                             break;
+			case 0x02:
+			     printk(KERN_INFO
+				"sisfb: Chrontel: Detected TV connected to SVHS output\n");
+			     ivideo.TV_plug = TVPLUG_SVIDEO;
+			     vgawb(CRTC_ADR, 0x32);
+			     temp2 = vgarb(CRTC_DATA) | 0x02;
+			     vgawb(CRTC_DATA, temp2);
+                             break;
+			case 0x04:
+			     /* TW: This should not happen */
+			     printk(KERN_INFO
+				"sisfb: Chrontel: Detected TV connected to SCART output!?\n");
+                             break;
+			}
+#endif
+		   }
+	    	}
 
-	ivideo.video_bpp = sisbios_mode[sisfb_mode_idx].bpp;
-	ivideo.video_vwidth = ivideo.video_width = sisbios_mode[sisfb_mode_idx].xres;
-	ivideo.video_vheight = ivideo.video_height = sisbios_mode[sisfb_mode_idx].yres;
-	ivideo.org_x = ivideo.org_y = 0;
-	video_linelength = ivideo.video_width * (ivideo.video_bpp >> 3);
+		if (ivideo.disp_state & DISPTYPE_DISP2) {
+			if (sisfb_crt1off)
+				ivideo.disp_state |= DISPMODE_SINGLE;
+			else
+				ivideo.disp_state |= (DISPMODE_MIRROR | DISPTYPE_CRT1);
+		} else {
+			ivideo.disp_state = DISPMODE_SINGLE | DISPTYPE_CRT1;
+		}
 
-	printk (KERN_INFO "sisfb: mode is %dx%dx%d, linelength=%d\n",
-		ivideo.video_width, ivideo.video_height, ivideo.video_bpp,
-		video_linelength);
+		if (ivideo.disp_state & DISPTYPE_LCD) {
+		    if (!enable_dstn) {
+			vgawb(CRTC_ADR, IND_SIS_LCD_PANEL);
+			reg = vgarb(CRTC_DATA) & 0x0f;
+			if (sisvga_engine == SIS_300_VGA) {
+			    sishw_ext.ulCRT2LCDType = sis300paneltype[reg];
+			} else {
+			    sishw_ext.ulCRT2LCDType = sis310paneltype[reg];
+			}
+		    } else {
+		        /* TW: FSTN/DSTN */
+			sishw_ext.ulCRT2LCDType = LCD_320x480;
+		    }
+		}
 
-	// Eden Chen
-	// Check interface correction  For Debug
-	DPRINTK ("VM Adr=0x%p\n", sishw_ext.pjVideoMemoryAddress);
-	DPRINTK ("VM Size=%ldK\n", sishw_ext.ulVideoMemorySize / 1024);
-	DPRINTK ("IO Adr=0x%lx\n", sishw_ext.ulIOAddress);
-	DPRINTK ("Chip=%d\n", sishw_ext.jChipType);
-	DPRINTK ("ChipRevision=%d\n", sishw_ext.jChipRevision);
-	DPRINTK ("VBChip=%d\n", sishw_ext.ujVBChipID);
-	DPRINTK ("ExtVB=%d\n", sishw_ext.usExternalChip);
-	DPRINTK ("LCD=%ld\n", sishw_ext.ulCRT2LCDType);
-	DPRINTK ("bIntegratedMMEnabled=%d\n", sishw_ext.bIntegratedMMEnabled);
-	// ~Eden Chen
+		if (sisfb_mode_idx >= 0)
+			sisfb_validate_mode();
 
-	sisfb_pre_setmode ();
+		if (sisfb_mode_idx < 0) {
+			switch (ivideo.disp_state & DISPTYPE_DISP2) {
+			   case DISPTYPE_LCD:
+				sisfb_mode_idx = DEFAULT_LCDMODE;
+				break;
+			   case DISPTYPE_TV:
+				sisfb_mode_idx = DEFAULT_TVMODE;
+				break;
+			   default:
+				sisfb_mode_idx = DEFAULT_MODE;
+				break;
+			}
+		}
 
-	if (SiSSetMode (&sishw_ext, sisfb_mode_no) == 0) {
-		DPRINTK ("set mode[0x%x]: failed\n", sisfb_mode_no);
-		return -1;
-	}
-	vgawb (SEQ_ADR, IND_SIS_PASSWORD);
-	vgawb (SEQ_DATA, SIS_PASSWORD);
-	// Eden Chen
+		sisfb_mode_no = sisbios_mode[sisfb_mode_idx].mode_no;
 
-	sisfb_post_setmode ();
+		if (ivideo.refresh_rate != 0)
+			sisfb_search_refresh_rate(ivideo.refresh_rate);
 
-	sisfb_crtc_to_var (&default_var);
+		if (sisfb_rate_idx == 0) {
+			sisfb_rate_idx = sisbios_mode[sisfb_mode_idx].rate_idx;
+			ivideo.refresh_rate = 60;
+		}
 
-	fb_info.changevar = NULL;
-	fb_info.node = NODEV;
-	fb_info.fbops = &sisfb_ops;
-	fb_info.screen_base = ivideo.video_vbase;
-	fb_info.disp = &disp;
-	fb_info.currcon = -1;
-	fb_info.switch_con = &sisfb_switch;
-	fb_info.updatevar = &sisfb_update_var;
-	fb_info.flags = FBINFO_FLAG_DEFAULT;
+		ivideo.video_bpp = sisbios_mode[sisfb_mode_idx].bpp;
+		ivideo.video_vwidth = ivideo.video_width = sisbios_mode[sisfb_mode_idx].xres;
+		ivideo.video_vheight = ivideo.video_height = sisbios_mode[sisfb_mode_idx].yres;
+		ivideo.org_x = ivideo.org_y = 0;
+		video_linelength = ivideo.video_width * (ivideo.video_bpp >> 3);
 
-	sisfb_set_disp (-1, &default_var);
+		printk(KERN_INFO "sisfb: Mode is %dx%dx%d (%dHz), linelength=%d\n",
+	       		ivideo.video_width, ivideo.video_height, ivideo.video_bpp,
+			ivideo.refresh_rate, video_linelength);
 
-	if (sisfb_heap_init ()) {
-		DPRINTK ("sisfb: Failed to enable offscreen heap\n");
-	}
-	
-	/*H.C. */
-	nRes = 	mtrr_add ((unsigned int) ivideo.video_base, (unsigned int) ivideo.video_size,  MTRR_TYPE_WRCOMB, 1);
-	vc_resize_con (1, 1, 0);
+		// Eden Chen
+		// Check interface correction  For Debug
+		DPRINTK("VM Adr=0x%p\n", sishw_ext.pjVideoMemoryAddress);
+		DPRINTK("VM Size=%ldK\n", sishw_ext.ulVideoMemorySize/1024);
+		DPRINTK("IO Adr=0x%lx\n", sishw_ext.ulIOAddress);
+		DPRINTK("Chip=%d\n", sishw_ext.jChipType);
+		DPRINTK("ChipRevision=%d\n", sishw_ext.jChipRevision);
+		DPRINTK("VBChip=%d\n", sishw_ext.ujVBChipID);
+		DPRINTK("ExtVB=%d\n", sishw_ext.usExternalChip);
+		DPRINTK("LCD=%ld\n", sishw_ext.ulCRT2LCDType);
+		DPRINTK("bIntegratedMMEnabled=%d\n", sishw_ext.bIntegratedMMEnabled);
+		// ~Eden Chen
 
-	if (register_framebuffer (&fb_info) < 0)
-		return -EINVAL;
+		sisfb_pre_setmode();
 
-	printk (KERN_INFO "fb%d: %s frame buffer device, Version %d.%d.%02d\n",
-		GET_FB_IDX (fb_info.node), fb_info.modename, VER_MAJOR, VER_MINOR,
-		VER_LEVEL);
+		if (SiSSetMode(&sishw_ext, sisfb_mode_no) == 0) {
+			printk("sisfb: Setting mode[0x%x] failed, using default mode\n", sisfb_mode_no);
+			return -1;
+		}
+
+		vgawb(SEQ_ADR, IND_SIS_PASSWORD);
+		vgawb(SEQ_DATA, SIS_PASSWORD);
+
+		sisfb_post_setmode();
+
+		sisfb_crtc_to_var(&default_var);
 
+		fb_info.changevar = NULL;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+		fb_info.node = -1;
+#else
+		fb_info.node = NODEV;
+#endif
+		fb_info.fbops = &sisfb_ops;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,23)
+		fb_info.screen_base = ivideo.video_vbase;
+		fb_info.currcon = -1;
+#endif
+		fb_info.disp = &disp;
+		fb_info.switch_con = &sisfb_switch;
+		fb_info.updatevar = &sisfb_update_var;
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
+		fb_info.blank = &sisfb_blank;
+#endif
+		fb_info.flags = FBINFO_FLAG_DEFAULT;
+
+		sisfb_set_disp(-1, &default_var);
+
+	} /* TW: if mode = "none" */
+
+	if (sisfb_heap_init()) {
+		printk("sisfb: Failed to initialize offscreen memory heap\n");
+	}
+
+        ivideo.mtrr = (unsigned int) 0;
+	if ((sisbios_mode[sisfb_mode_idx].mode_no) != 0xFF) {   /* TW: for mode "none" */
+         	/*H.C.*/
+		ivideo.mtrr = mtrr_add((unsigned int) ivideo.video_base,
+				(unsigned int) ivideo.video_size,
+				MTRR_TYPE_WRCOMB, 1);
+		/*
+		if (ivideo.mtrr >= 0) {
+           	    printk(KERN_INFO "Succeed to turn on Write-Combining on VideoMemory %08XH, Size: %08XH\n",
+					ivideo.video_base, ivideo.video_size);
+      		} else	{
+           	    printk(KERN_INFO "Fail to turn on Write-Combining on Video Memory 0x%08X, Size: 0x%08X\n",
+					ivideo.video_base, ivideo.video_size);
+      		}
+		*/
+		vc_resize_con(1, 1, 0);
+
+		if (register_framebuffer(&fb_info) < 0)
+			return -EINVAL;
+
+		printk(KERN_INFO "fb%d: %s frame buffer device, Version %d.%d.%02d\n",
+	       		GET_FB_IDX(fb_info.node), fb_info.modename, VER_MAJOR, VER_MINOR,
+	       		VER_LEVEL);
+
+		printk(KERN_INFO "sisfb: Added SISFB_GET_INFO ioctl = %x\n", SISFB_GET_INFO);
+
+	}	/* TW: if mode = "none" */
 	return 0;
 }
 
@@ -2799,38 +3404,151 @@ sishw_ext.usExternalChip = 0;
 
 static char *mode = NULL;
 static unsigned int rate = 0;
-static unsigned int crt1 = 1;
-
-MODULE_PARM (mode, "s");
-MODULE_PARM (rate, "i");
-MODULE_PARM (crt1, "i");
-MODULE_PARM (filter, "i");
-
-int init_module (void)
+static unsigned int crt1off = 1;
+static unsigned int mem = 0;
+static unsigned int dstn = 0;
+static char *forcecrt2type = NULL;
+static int forcecrt1 = -1;
+static char *queuemode = NULL;
+static int pdc = 0;
+
+MODULE_DESCRIPTION("SiS 300/540/630/730/315/550/650/740 framebuffer driver");
+MODULE_LICENSE("GPL");    /* TW (Code is officially open says SiS) */
+MODULE_AUTHOR("Various; SiS; Thomas Winischhofer <thomas@winischhofer.net>");
+
+MODULE_PARM(mode, "s");
+MODULE_PARM_DESC(mode,
+       "Selects the desired display mode in the format [X]x[Y]x[Depth], eg. 800x600x16 "
+       "(default: none; this leaves the console untouched and the driver will only do "
+       "the video memory management for eg. DRM/DRI)");
+
+MODULE_PARM(rate, "i");
+MODULE_PARM_DESC(rate,
+	"Selects the desired vertical refresh rate for CRT1 (external VGA) in Hz. "
+	"(default: 60)");
+
+MODULE_PARM(crt1off,   "i");
+MODULE_PARM_DESC(crt1off,
+	"If this option is set, the driver will switch off CRT1 (external VGA). "
+	"(Deprecated, please use forcecrt1)");
+
+MODULE_PARM(filter, "i");
+MODULE_PARM_DESC(filter,
+	"Selects TV flicker filter type (only for SiS30x video bridges). "
+	"(Possible values 0-7, default: [no filter])");
+
+MODULE_PARM(dstn,   "i"); /* JennyLee 20011211 */
+MODULE_PARM_DESC(dstn,
+	"Selects DSTN/FSTN display mode for SiS550. This sets CRT2 type to LCD and "
+	"overrides forcecrt2type setting. (1=ON, 0=OFF) (default: 0)");
+
+MODULE_PARM(queuemode,   "s");
+MODULE_PARM_DESC(queuemode,
+	"Selects the queue mode on 315/550/650/740. Possible choices are AGP, VRAM "
+	"or MMIO. AGP is only available if the kernel has AGP support. "
+	"The queue mode is important to programs using the 2D/3D accelerator of "
+	"the SiS chip. The modes require a totally different way of programming "
+	"the engines. On 300/540/630/730, this option is ignored. (default: MMIO)");
+
+/* TW: "Import" the options from the X driver */
+MODULE_PARM(mem,    "i");
+MODULE_PARM_DESC(mem,
+	"Determines the beginning of the video memory heap in KB. This heap is used for "
+	"video RAM management for eg. DRM/DRI. The default depends on the amount of video "
+	"memory available. If 8MB of video RAM or less is available, "
+	"the heap starts at 4096KB, if between 8 and 16MB are available at 8192KB, otherwise at 12288MB."
+	"The value is to be specified without 'KB' and should match MaxXFBMem setting for "
+	"XFree 4.x (x>=2). See http://www.winischhofer.net/linuxsis630.shtml for a closer description.");
+
+MODULE_PARM(forcecrt2type, "s");
+MODULE_PARM_DESC(forcecrt2type,
+	"If this option is omitted, the driver autodetects CRT2 output devices, such as LCD, "
+	"TV or secondary VGA (in this order; so if eg. an LCD is there, it will be used regardless "
+	"of a connected TV set). With this option, this autodetection can be overridden. "
+	"Possible parameters are LCD, TV, VGA or NONE. NONE disables CRT2 and makes it "
+	"possible to use higher resolutions on CRT1 than eg. your LCD panel supports. TV "
+	"selects TV output (only resolutions 640x480 and 800x600 are supported for TV!). "
+	"VGA refers to _secondary_ VGA which is unlikely to be available; the VGA plug found "
+	"on most machines is CRT1. (default: [autodetected])");
+
+MODULE_PARM(forcecrt1, "i");
+MODULE_PARM_DESC(forcecrt1,
+	"Normally, the driver autodetects whether or not CRT1 (external VGA) is connected. "
+	"With this option, the detection can be overridden (1=CRT1 ON, 0=CRT1 off) "
+	"(default: [autodetected])");
+
+MODULE_PARM(pdc, "i");
+MODULE_PARM_DESC(pdc,
+        "(300 series only) This is for manually selecting the LCD panel delay compensation. The "
+	"driver should detect this correctly in most cases; however, sometimes this is not possible. If "
+	"you see 'small waves' on the LCD, try setting this to 4, 32 or 24. If the problem persists, "
+	"try other values between 4 and 60 in steps of 4. "
+	"(default: [autodetected])");
+
+
+int init_module(void)
 {
 	if (mode)
-		sisfb_search_mode (mode);
+		sisfb_search_mode(mode);
+	else  /* TW: set mode=none if no mode parameter is given */
+		sisfb_mode_idx = MODE_INDEX_NONE;
 
 	ivideo.refresh_rate = rate;
 
-	if (crt1 == 0)
+	if (forcecrt2type)
+		sisfb_search_crt2type(forcecrt2type);
+
+	if (crt1off == 0)
 		sisfb_crt1off = 1;
 	else
 		sisfb_crt1off = 0;
 
-	sisfb_init ();
+	sisfb_forcecrt1 = forcecrt1;
+	if (forcecrt1 == 1)
+		sisfb_crt1off = 0;
+	else if (forcecrt1 == 0)
+		sisfb_crt1off = 1;
+
+	if (mem)
+		sisfb_mem = mem;
+
+	enable_dstn = dstn; /* JennyLee 20011211 */
+	/* TW: DSTN overrules forcecrt2type */
+	if (enable_dstn) sisfb_crt2type = DISPTYPE_LCD;
+
+	if (queuemode)
+		sisfb_search_queuemode(queuemode);
+
+        if(pdc) {
+	   if(!(pdc & ~0x3c)) {
+	        sisfb_pdc = pdc & 0x3c;
+	   }
+	}
+
+	sisfb_init();
 
 	return 0;
 }
 
-void cleanup_module (void)
+void cleanup_module(void)
 {
-	unregister_framebuffer (&fb_info);
+	/* TW: Release mem regions */
+	release_mem_region(ivideo.video_base, ivideo.video_size);
+	release_mem_region(ivideo.mmio_base, sisfb_mmio_size);
+	/* TW: Release MTRR region */
+	if (ivideo.mtrr) mtrr_del(ivideo.mtrr, 
+			      (unsigned int)ivideo.video_base,
+	                      (unsigned int)ivideo.video_size);
+	/* Unregister the framebuffer */
+	unregister_framebuffer(&fb_info);
+	printk(KERN_INFO "sisfb: Module unloaded\n");
 }
+
 #endif
 
-EXPORT_SYMBOL (sis_malloc);
-EXPORT_SYMBOL (sis_free);
-EXPORT_SYMBOL (sis_dispinfo);
+EXPORT_SYMBOL(sis_malloc);
+EXPORT_SYMBOL(sis_free);
+EXPORT_SYMBOL(sis_dispinfo);
 
-EXPORT_SYMBOL (ivideo);
+EXPORT_SYMBOL(ivideo);
+                                                                                           
diff --git a/drivers/video/sis/sis_main.h b/drivers/video/sis/sis_main.h
index d4d89d9e38b1..6246cdc4b2dc 100644
--- a/drivers/video/sis/sis_main.h
+++ b/drivers/video/sis/sis_main.h
@@ -1,18 +1,25 @@
 #ifndef _SISFB_MAIN
 #define _SISFB_MAIN
 
+/* Comments and changes marked with "TW" by Thomas Winischhofer <tw@webit.com> */
+
 /* ------------------- Constant Definitions ------------------------- */
 
-#undef LINUXBIOS		/* turn on when use LINUXBIOS */
-#define AGPOFF			/* default is turn off AGP */
+#undef LINUXBIOS   /* turn on when use LINUXBIOS */
+#define AGPOFF     /* default is turn off AGP */
 
 #define VER_MAJOR                 1
-#define VER_MINOR                 3
-#define VER_LEVEL                 9
+#define VER_MINOR                 4
+#define VER_LEVEL                 1
 
-#define DEFAULT_MODE              0
-#define DEFAULT_LCDMODE           9
-#define DEFAULT_TVMODE            9
+/* TW: To be included in pci_ids.h */
+#ifndef PCI_DEVICE_ID_SI_650_VGA
+#define PCI_DEVICE_ID_SI_650_VGA  0x6325
+#endif
+#ifndef PCI_DEVICE_ID_SI_650
+#define PCI_DEVICE_ID_SI_650      0x0650
+#endif
+/* TW end */
 
 #define MAX_ROM_SCAN              0x10000
 
@@ -23,17 +30,19 @@
 
 /* For 300 series */
 #ifdef CONFIG_FB_SIS_300
-#define TURBO_QUEUE_AREA_SIZE     0x80000	/* 512K */
-#define HW_CURSOR_AREA_SIZE       0x1000	/* 4K */
+#define TURBO_QUEUE_AREA_SIZE     0x80000 /* 512K */
 #endif
 
 /* For 315 series */
 #ifdef CONFIG_FB_SIS_315
-#define COMMAND_QUEUE_AREA_SIZE   0x80000	/* 512K */
-#define HW_CURSOR_AREA_SIZE       0x4000	/* 16K */
+#define COMMAND_QUEUE_AREA_SIZE   0x80000 /* 512K */
 #define COMMAND_QUEUE_THRESHOLD   0x1F
 #endif
 
+/* TW */
+#define HW_CURSOR_AREA_SIZE_315   0x4000  /* 16K */
+#define HW_CURSOR_AREA_SIZE_300   0x1000  /* 4K */
+
 #define OH_ALLOC_SIZE             4000
 #define SENTINEL                  0x7fffffff
 
@@ -54,7 +63,7 @@
 #define VB_PART4_ADR              (0x14-0x30)
 #define VB_PART4_DATA             (0x15-0x30)
 
-#define IND_SIS_PASSWORD          0x05	/* SRs */
+#define IND_SIS_PASSWORD          0x05  /* SRs */
 #define IND_SIS_COLOR_MODE        0x06
 #define IND_SIS_RAMDAC_CONTROL    0x07
 #define IND_SIS_DRAM_SIZE         0x14
@@ -70,7 +79,7 @@
 #define IND_SIS_CMDQUEUE_SET      0x26
 #define IND_SIS_CMDQUEUE_THRESHOLD  0x27
 
-#define IND_SIS_SCRATCH_REG_CR30  0x30	/* CRs */
+#define IND_SIS_SCRATCH_REG_CR30  0x30  /* CRs */
 #define IND_SIS_SCRATCH_REG_CR31  0x31
 #define IND_SIS_SCRATCH_REG_CR32  0x32
 #define IND_SIS_SCRATCH_REG_CR33  0x33
@@ -78,28 +87,24 @@
 #define IND_SIS_SCRATCH_REG_CR37  0x37
 #define IND_SIS_AGP_IO_PAD        0x48
 
-#define IND_BRI_DRAM_STATUS       0x63
+#define IND_BRI_DRAM_STATUS       0x63 /* PCI config memory size offset */
 
 #define MMIO_QUEUE_PHYBASE        0x85C0
 #define MMIO_QUEUE_WRITEPORT      0x85C4
 #define MMIO_QUEUE_READPORT       0x85C8
 
-// Eden Chen
-#ifdef CONFIG_FB_SIS_300
-#define IND_SIS_CRT2_WRITE_ENABLE 0x24
-#endif
-#ifdef CONFIG_FB_SIS_315
-#define IND_SIS_CRT2_WRITE_ENABLE 0x2F
-#endif
-// ~Eden Chen
-
-#define SIS_PASSWORD              0x86	/* SR05 */
-#define SIS_INTERLACED_MODE       0x20	/* SR06 */
-#define SIS_8BPP_COLOR_MODE       0x0
-#define SIS_15BPP_COLOR_MODE      0x1
-#define SIS_16BPP_COLOR_MODE      0x2
-#define SIS_32BPP_COLOR_MODE      0x4
-#define SIS_DRAM_SIZE_MASK        0x3F	/* SR14 */
+/* Eden Chen; TW */
+#define IND_SIS_CRT2_WRITE_ENABLE_300 0x24
+#define IND_SIS_CRT2_WRITE_ENABLE_315 0x2F
+/* ~Eden Chen; TW */
+
+#define SIS_PASSWORD              0x86  /* SR05 */
+#define SIS_INTERLACED_MODE       0x20  /* SR06 */
+#define SIS_8BPP_COLOR_MODE       0x0 
+#define SIS_15BPP_COLOR_MODE      0x1 
+#define SIS_16BPP_COLOR_MODE      0x2 
+#define SIS_32BPP_COLOR_MODE      0x4 
+#define SIS_DRAM_SIZE_MASK        0x3F  /* SR14 */
 #define SIS_DRAM_SIZE_1MB         0x00
 #define SIS_DRAM_SIZE_2MB         0x01
 #define SIS_DRAM_SIZE_4MB         0x03
@@ -111,7 +116,8 @@
 #define SIS_DATA_BUS_32           0x00
 #define SIS_DATA_BUS_64           0x01
 #define SIS_DATA_BUS_128          0x02
-#define SIS315_DRAM_SIZE_MASK     0xF0	/* 315 SR14 */
+
+#define SIS315_DRAM_SIZE_MASK     0xF0  /* 315 SR14 */
 #define SIS315_DRAM_SIZE_2MB      0x01
 #define SIS315_DRAM_SIZE_4MB      0x02
 #define SIS315_DRAM_SIZE_8MB      0x03
@@ -123,10 +129,12 @@
 #define SIS315_DATA_BUS_64        0x00
 #define SIS315_DATA_BUS_128       0x01
 #define SIS315_DUAL_CHANNEL_MASK  0x0C
-#define SIS315_SINGLE_CHANNEL_1_RANK  0x0
-#define SIS315_SINGLE_CHANNEL_2_RANK  0x1
-#define SIS315_DUAL_CHANNEL_1_RANK    0x3
-#define SIS550_DRAM_SIZE_MASK     0x3F	/* 550 SR14 */
+#define SIS315_SINGLE_CHANNEL_1_RANK  	0x0
+#define SIS315_SINGLE_CHANNEL_2_RANK  	0x1
+#define SIS315_ASYM_DDR		  	0x02
+#define SIS315_DUAL_CHANNEL_1_RANK    	0x3
+
+#define SIS550_DRAM_SIZE_MASK     0x3F  /* 550/650/740 SR14 */
 #define SIS550_DRAM_SIZE_4MB      0x00
 #define SIS550_DRAM_SIZE_8MB      0x01
 #define SIS550_DRAM_SIZE_16MB     0x03
@@ -138,10 +146,13 @@
 #define SIS550_DRAM_SIZE_256MB    0x3F
 
 #define SIS_SCRATCH_REG_1A_MASK   0x10
-#define SIS_ENABLE_2D             0x40	/* SR1E */
-#define SIS_MEM_MAP_IO_ENABLE     0x01	/* SR20 */
+
+#define SIS_ENABLE_2D             0x40  /* SR1E */
+
+#define SIS_MEM_MAP_IO_ENABLE     0x01  /* SR20 */
 #define SIS_PCI_ADDR_ENABLE       0x80
-#define SIS_AGP_CMDQUEUE_ENABLE   0x80	/* 315 SR26 */
+
+#define SIS_AGP_CMDQUEUE_ENABLE   0x80  /* 315/650/740 SR26 */
 #define SIS_VRAM_CMDQUEUE_ENABLE  0x40
 #define SIS_MMIO_CMD_ENABLE       0x20
 #define SIS_CMD_QUEUE_SIZE_512k   0x00
@@ -149,7 +160,9 @@
 #define SIS_CMD_QUEUE_SIZE_2M     0x08
 #define SIS_CMD_QUEUE_SIZE_4M     0x0C
 #define SIS_CMD_QUEUE_RESET       0x01
-#define SIS_SIMULTANEOUS_VIEW_ENABLE  0x01	/* CR30 */
+#define SIS_CMD_AUTO_CORR	  0x02
+
+#define SIS_SIMULTANEOUS_VIEW_ENABLE  0x01  /* CR30 */
 #define SIS_MODE_SELECT_CRT2      0x02
 #define SIS_VB_OUTPUT_COMPOSITE   0x04
 #define SIS_VB_OUTPUT_SVIDEO      0x08
@@ -157,9 +170,11 @@
 #define SIS_VB_OUTPUT_LCD         0x20
 #define SIS_VB_OUTPUT_CRT2        0x40
 #define SIS_VB_OUTPUT_HIVISION    0x80
-#define SIS_VB_OUTPUT_DISABLE     0x20	/* CR31 */
+
+#define SIS_VB_OUTPUT_DISABLE     0x20  /* CR31 */
 #define SIS_DRIVER_MODE           0x40
-#define SIS_VB_COMPOSITE          0x01	/* CR32 */
+
+#define SIS_VB_COMPOSITE          0x01  /* CR32 */
 #define SIS_VB_SVIDEO             0x02
 #define SIS_VB_SCART              0x04
 #define SIS_VB_LCD                0x08
@@ -167,21 +182,21 @@
 #define SIS_CRT1                  0x20
 #define SIS_VB_HIVISION           0x40
 #define SIS_VB_DVI                0x80
-#define SIS_VB_TV                 (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | SIS_VB_SCART | SIS_VB_HIVISION)
-#define SIS_LCD_PANEL_800X600     0x1	/* CR36 */
-#define SIS_LCD_PANEL_1024X768    0x2
-#define SIS_LCD_PANEL_1280X1024   0x3
-#define SIS_LCD_PANEL_1280X960    0x4
-#define SIS_LCD_PANEL_640X480     0x5
-#define SIS_EXTERNAL_CHIP_MASK    0x0E	/* CR37 */
-#define SIS_EXTERNAL_CHIP_SIS301        0x01
-#define SIS_EXTERNAL_CHIP_LVDS          0x02
-#define SIS_EXTERNAL_CHIP_TRUMPION      0x03
-#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04
-#define SIS_EXTERNAL_CHIP_CHRONTEL      0x05
-#define SIS_AGP_2X                0x20	/* CR48 */
-
-#define BRI_DRAM_SIZE_MASK        0x70	/* PCI bridge */
+#define SIS_VB_TV                 (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
+                                   SIS_VB_SCART | SIS_VB_HIVISION)
+
+#define SIS_EXTERNAL_CHIP_MASK    	   0x0E  /* CR37 */
+#define SIS_EXTERNAL_CHIP_SIS301           0x01  /* in CR37 << 1 ! */
+#define SIS_EXTERNAL_CHIP_LVDS             0x02  /* in CR37 << 1 ! */
+#define SIS_EXTERNAL_CHIP_TRUMPION         0x03  /* in CR37 << 1 ! */
+#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL    0x04  /* in CR37 << 1 ! */
+#define SIS_EXTERNAL_CHIP_CHRONTEL         0x05  /* in CR37 << 1 ! */
+#define SIS310_EXTERNAL_CHIP_LVDS          0x02  /* in CR37 << 1 ! */
+#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03  /* in CR37 << 1 ! */
+
+#define SIS_AGP_2X                0x20  /* CR48 */
+
+#define BRI_DRAM_SIZE_MASK        0x70  /* PCI bridge config data */
 #define BRI_DRAM_SIZE_2MB         0x00
 #define BRI_DRAM_SIZE_4MB         0x01
 #define BRI_DRAM_SIZE_8MB         0x02
@@ -190,7 +205,7 @@
 #define BRI_DRAM_SIZE_64MB        0x05
 
 // Eden Chen
-#define HW_DEVICE_EXTENSION	    SIS_HW_DEVICE_INFO
+#define HW_DEVICE_EXTENSION	  SIS_HW_DEVICE_INFO
 #define PHW_DEVICE_EXTENSION      PSIS_HW_DEVICE_INFO
 
 #define SR_BUFFER_SIZE            5
@@ -207,19 +222,33 @@ static int video_linelength;
 static int video_cmap_len;
 static struct display_switch sisfb_sw;
 static struct fb_var_screeninfo default_var = {
-	0, 0, 0, 0,
-	0, 0,
-	0,
-	0,
-	{0, 8, 0},
-	{0, 8, 0},
-	{0, 8, 0},
-	{0, 0, 0},
-	0,
-	FB_ACTIVATE_NOW, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0,
-	0,
-	FB_VMODE_NONINTERLACED,
-	{0, 0, 0, 0, 0, 0}
+	xres:           0,
+	yres:           0,
+	xres_virtual:   0,
+	yres_virtual:   0,
+	xoffset:        0,
+	yoffset:        0,
+	bits_per_pixel: 0,
+	grayscale:      0,
+	red:            {0, 8, 0},
+	green:          {0, 8, 0},
+	blue:           {0, 8, 0},
+	transp:         {0, 0, 0},
+	nonstd:         0,
+	activate:       FB_ACTIVATE_NOW,
+	height:         -1,
+	width:          -1,
+	accel_flags:    0,
+	pixclock:       0,
+	left_margin:    0,
+	right_margin:   0,
+	upper_margin:   0,
+	lower_margin:   0,
+	hsync_len:      0,
+	vsync_len:      0,
+	sync:           0,
+	vmode:          FB_VMODE_NONINTERLACED,
+	reserved:       {0, 0, 0, 0, 0, 0}
 };
 
 static struct {
@@ -240,11 +269,14 @@ static union {
 /* display status */
 static int sisfb_off = 0;
 static int sisfb_crt1off = 0;
+static int sisfb_forcecrt1 = -1;
 static int sisfb_inverse = 0;
 static int sisvga_enabled = 0;
-/*karl*/
+static int currcon = 0;
 static int sisfb_tvmode = 0;
 static int sisfb_mem = 0;
+static int sisfb_pdc = 0;
+static int enable_dstn = 0;
 
 static enum _VGA_ENGINE {
 	UNKNOWN_VGA = 0,
@@ -252,22 +284,28 @@ static enum _VGA_ENGINE {
 	SIS_315_VGA,
 } sisvga_engine = UNKNOWN_VGA;
 
-/* mode-related variables */
-int sisfb_mode_idx = -1;
-u8 sisfb_mode_no = 0;
-u8 sisfb_rate_idx = 0;
+/* TW: These are to adapted according to VGA_ENGINE type */
+static int sisfb_hwcursor_size = 0;
+static int sisfb_CRT2_write_enable = 0;
+
+int sisfb_crt2type = -1;	/* TW: CRT2 type (for overriding autodetection) */
+
+int sisfb_queuemode = -1; 	/* TW: Use MMIO queue mode by default (310 series only) */
 
 /* data for sis components*/
 struct video_info ivideo;
 
-// Eden Chen
+/* TW: For ioctl SISFB_GET_INFO */
+sisfb_info sisfbinfo;
+
+/* TW: Hardware extension; contains data on hardware */
 HW_DEVICE_EXTENSION sishw_ext = {
 	NULL, NULL, NULL, NULL,
 	0, 0, 0, 0, 0, 0, 0, 0, 0,
 	NULL, NULL, NULL, NULL,
-	{0, 0, 0, 0}
+	{0, 0, 0, 0},
+	0
 };
-// ~Eden Chen
 
 /* card parameters */
 static unsigned long sisfb_mmio_size = 0;
@@ -284,19 +322,19 @@ static struct board {
 	u16 vendor, device;
 	const char *name;
 } sisdev_list[] = {
-	{
-	PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_300, "SIS 300"}, {
-	PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_540_VGA, "SIS 540"}, {
-	PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630_VGA, "SIS 630"}, {
-	PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315H, "SIS 315H"}, {
-	PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315, "SIS 315"}, {
-	PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315PRO, "SIS 315Pro"}, {
-	PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_550_VGA, "SIS 550"}, {
-	0, 0, NULL}
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_300,     "SIS 300"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_540_VGA, "SIS 540"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630_VGA, "SIS 630/730"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315H,    "SIS 315H"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315,     "SIS 315"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_315PRO,  "SIS 315PRO"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_550_VGA, "SIS 550"},
+	{PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650_VGA, "SIS 650/M650/740 VGA"},
+	{0, 0, NULL}
 };
 
 /* mode table */
-static const struct _sisbios_mode {
+struct _sisbios_mode {
 	char name[15];
 	u8 mode_no;
 	u16 xres;
@@ -306,32 +344,131 @@ static const struct _sisbios_mode {
 	u16 cols;
 	u16 rows;
 } sisbios_mode[] = {
-	{
-	"640x480x8", 0x2E, 640, 480, 8, 1, 80, 30}, {
-	"640x480x16", 0x44, 640, 480, 16, 1, 80, 30}, {
-	"640x480x32", 0x62, 640, 480, 32, 1, 80, 30}, {
-	"720x480x8", 0x31, 720, 480, 8, 1, 90, 30}, {
-	"720x480x16", 0x33, 720, 480, 16, 1, 90, 30}, {
-	"720x480x32", 0x35, 720, 480, 32, 1, 90, 30}, {
-	"720x576x8", 0x32, 720, 576, 8, 1, 90, 36}, {
-	"720x576x16", 0x34, 720, 576, 16, 1, 90, 36}, {
-	"720x576x32", 0x36, 720, 576, 32, 1, 90, 36}, {
-	"800x600x8", 0x30, 800, 600, 8, 2, 100, 37}, {
-	"800x600x16", 0x47, 800, 600, 16, 2, 100, 37}, {
-	"800x600x32", 0x63, 800, 600, 32, 2, 100, 37}, {
-	"1024x768x8", 0x38, 1024, 768, 8, 2, 128, 48}, {
-	"1024x768x16", 0x4A, 1024, 768, 16, 2, 128, 48}, {
-	"1024x768x32", 0x64, 1024, 768, 32, 2, 128, 48}, {
-	"1280x1024x8", 0x3A, 1280, 1024, 8, 2, 160, 64}, {
-	"1280x1024x16", 0x4D, 1280, 1024, 16, 2, 160, 64}, {
-	"1280x1024x32", 0x65, 1280, 1024, 32, 2, 160, 64}, {
-	"1600x1200x8", 0x3C, 1600, 1200, 8, 1, 200, 75}, {
-	"1600x1200x16", 0x3D, 1600, 1200, 16, 1, 200, 75}, {
-	"1600x1200x32", 0x66, 1600, 1200, 32, 1, 200, 75}, {
-	"1920x1440x8", 0x68, 1920, 1440, 8, 1, 240, 75}, {
-	"1920x1440x16", 0x69, 1920, 1440, 16, 1, 240, 75}, {
-	"1920x1440x32", 0x6B, 1920, 1440, 32, 1, 240, 75}, {
-	"\0", 0x00, 0, 0, 0, 0, 0, 0}
+#define MODE_INDEX_NONE           0  /* TW: index for mode=none */
+	{"none",         0xFF,    0,    0,  0, 0,   0,  0},  /* TW: for mode "none" */
+	{"320x240x16",   0x56,  320,  240, 16, 1,  40, 15},
+	{"320x480x8",    0x5A,  320,  480,  8, 1,  40, 30},  /* TW: FSTN */
+	{"320x480x16",   0x5B,  320,  480, 16, 1,  40, 30},  /* TW: FSTN */
+	{"640x480x8",    0x2E,  640,  480,  8, 1,  80, 30},
+	{"640x480x16",   0x44,  640,  480, 16, 1,  80, 30},
+	{"640x480x24",   0x62,  640,  480, 32, 1,  80, 30},  /* TW: That's for people who mix up color- and fb depth */
+	{"640x480x32",   0x62,  640,  480, 32, 1,  80, 30},
+	{"720x480x8",    0x31,  720,  480,  8, 1,  90, 30},
+	{"720x480x16",   0x33,  720,  480, 16, 1,  90, 30},
+	{"720x480x24",   0x35,  720,  480, 32, 1,  90, 30},
+	{"720x480x32",   0x35,  720,  480, 32, 1,  90, 30},
+	{"720x576x8",    0x32,  720,  576,  8, 1,  90, 36},
+	{"720x576x16",   0x34,  720,  576, 16, 1,  90, 36},
+	{"720x576x24",   0x36,  720,  576, 32, 1,  90, 36},
+	{"720x576x32",   0x36,  720,  576, 32, 1,  90, 36},
+	{"800x480x8",    0x70,  800,  480,  8, 1, 100, 30},  /* TW: 310/325 series only */
+	{"800x480x16",   0x7a,  800,  480, 16, 1, 100, 30},
+	{"800x480x24",   0x76,  800,  480, 32, 1, 100, 30},
+	{"800x480x32",   0x76,  800,  480, 32, 1, 100, 30},
+#define DEFAULT_MODE              20 /* TW: index for 800x600x8 */
+#define DEFAULT_LCDMODE           20 /* TW: index for 800x600x8 */
+#define DEFAULT_TVMODE            20 /* TW: index for 800x600x8 */
+	{"800x600x8",    0x30,  800,  600,  8, 2, 100, 37},
+	{"800x600x16",   0x47,  800,  600, 16, 2, 100, 37},
+	{"800x600x24",   0x63,  800,  600, 32, 2, 100, 37},
+	{"800x600x32",   0x63,  800,  600, 32, 2, 100, 37},
+	{"1024x576x8",   0x71, 1024,  576,  8, 1, 128, 36},  /* TW: 310/325 series only */
+	{"1024x576x16",  0x74, 1024,  576, 16, 1, 128, 36},
+	{"1024x576x24",  0x77, 1024,  576, 32, 1, 128, 36},
+	{"1024x576x32",  0x77, 1024,  576, 32, 1, 128, 36},
+	{"1024x600x8",   0x20, 1024,  600,  8, 1, 128, 37},  /* TW: 300 series only */
+	{"1024x600x16",  0x21, 1024,  600, 16, 1, 128, 37},
+	{"1024x600x24",  0x22, 1024,  600, 32, 1, 128, 37},
+	{"1024x600x32",  0x22, 1024,  600, 32, 1, 128, 37},
+	{"1024x768x8",   0x38, 1024,  768,  8, 2, 128, 48},
+	{"1024x768x16",  0x4A, 1024,  768, 16, 2, 128, 48},
+	{"1024x768x24",  0x64, 1024,  768, 32, 2, 128, 48},
+	{"1024x768x32",  0x64, 1024,  768, 32, 2, 128, 48},
+	{"1152x768x8",   0x23, 1152,  768,  8, 1, 144, 48},  /* TW: 300 series only */
+	{"1152x768x16",  0x24, 1152,  768, 16, 1, 144, 48},
+	{"1152x768x24",  0x25, 1152,  768, 32, 1, 144, 48},
+	{"1152x768x32",  0x25, 1152,  768, 32, 1, 144, 48},
+	{"1280x720x8",   0x79, 1280,  720,  8, 1, 160, 45},  /* TW: 310/325 series only */
+	{"1280x720x16",  0x75, 1280,  720, 16, 1, 160, 45},
+	{"1280x720x24",  0x78, 1280,  720, 32, 1, 160, 45},
+	{"1280x720x32",  0x78, 1280,  720, 32, 1, 160, 45},
+	{"1280x768x8",   0x23, 1280,  768,  8, 1, 160, 48},  /* TW: 3107325 series only */
+	{"1280x768x16",  0x24, 1280,  768, 16, 1, 160, 48},
+	{"1280x768x24",  0x25, 1280,  768, 32, 1, 160, 48},
+	{"1280x768x32",  0x25, 1280,  768, 32, 1, 160, 48},
+#define MODEINDEX_1280x960 48
+	{"1280x960x8",   0x7C, 1280,  960,  8, 1, 160, 60},  /* TW: Modenumbers being patched */
+	{"1280x960x16",  0x7D, 1280,  960, 16, 1, 160, 60},
+	{"1280x960x24",  0x7E, 1280,  960, 32, 1, 160, 60},
+	{"1280x960x32",  0x7E, 1280,  960, 32, 1, 160, 60},
+	{"1280x1024x8",  0x3A, 1280, 1024,  8, 2, 160, 64},
+	{"1280x1024x16", 0x4D, 1280, 1024, 16, 2, 160, 64},
+	{"1280x1024x24", 0x65, 1280, 1024, 32, 2, 160, 64},
+	{"1280x1024x32", 0x65, 1280, 1024, 32, 2, 160, 64},
+	{"1400x1050x8",  0x26, 1400, 1050,  8, 1, 175, 65},  /* TW: 310/325 series only */
+	{"1400x1050x16", 0x27, 1400, 1050, 16, 1, 175, 65},
+	{"1400x1050x24", 0x28, 1400, 1050, 32, 1, 175, 65},
+	{"1400x1050x32", 0x28, 1400, 1050, 32, 1, 175, 65},
+	{"1600x1200x8",  0x3C, 1600, 1200,  8, 1, 200, 75},
+	{"1600x1200x16", 0x3D, 1600, 1200, 16, 1, 200, 75},
+	{"1600x1200x24", 0x66, 1600, 1200, 32, 1, 200, 75},
+	{"1600x1200x32", 0x66, 1600, 1200, 32, 1, 200, 75},
+	{"1920x1440x8",  0x68, 1920, 1440,  8, 1, 240, 75},
+	{"1920x1440x16", 0x69, 1920, 1440, 16, 1, 240, 75},
+	{"1920x1440x24", 0x6B, 1920, 1440, 32, 1, 240, 75},
+	{"1920x1440x32", 0x6B, 1920, 1440, 32, 1, 240, 75},
+	{"2048x1536x8",  0x6c, 2048, 1536,  8, 1, 256, 96},  /* TW: 310/325 series only */
+	{"2048x1536x16", 0x6d, 2048, 1536, 16, 1, 256, 96},
+	{"2048x1536x24", 0x6e, 2048, 1536, 32, 1, 256, 96},
+	{"2048x1536x32", 0x6e, 2048, 1536, 32, 1, 256, 96},
+	{"\0", 0x00, 0, 0, 0, 0, 0, 0}
+};
+
+/* mode-related variables */
+int sisfb_mode_idx = MODE_INDEX_NONE;
+u8  sisfb_mode_no = 0;
+u8  sisfb_rate_idx = 0;
+
+/* TW: CR36 evaluation */
+USHORT sis300paneltype[] =
+    { LCD_UNKNOWN,   LCD_800x600,  LCD_1024x768,  LCD_1280x1024,
+      LCD_1280x960,  LCD_640x480,  LCD_1024x600,  LCD_1152x768,
+      LCD_320x480,   LCD_1024x768, LCD_1024x768,  LCD_1024x768,
+      LCD_1024x768,  LCD_1024x768, LCD_1024x768,  LCD_1024x768 };
+
+USHORT sis310paneltype[] =
+    { LCD_UNKNOWN,   LCD_800x600,  LCD_1024x768,  LCD_1280x1024,
+      LCD_640x480,   LCD_1024x600, LCD_1152x864,  LCD_1280x960,
+      LCD_1152x768,  LCD_1400x1050,LCD_1280x768,  LCD_1600x1200,
+      LCD_320x480,   LCD_1024x768, LCD_1024x768,  LCD_1024x768 };
+
+static const struct _sis_crt2type {
+	char name[6];
+	int type_no;
+} sis_crt2type[] = {
+	{"NONE", 0},
+	{"LCD",  DISPTYPE_LCD},
+	{"TV",   DISPTYPE_TV},
+	{"VGA",  DISPTYPE_CRT2},
+	{"none", 0},	/* TW: make it fool-proof */
+	{"lcd",  DISPTYPE_LCD},
+	{"tv",   DISPTYPE_TV},
+	{"vga",  DISPTYPE_CRT2},
+	{"\0",  -1}
+};
+
+/* Queue mode selection for 310 series */
+static const struct _sis_queuemode {
+	char name[6];
+	int type_no;
+} sis_queuemode[] = {
+	{"AGP",  AGP_CMD_QUEUE},
+	{"VRAM", VM_CMD_QUEUE},
+	{"MMIO", MMIO_CMD},
+	{"agp",  AGP_CMD_QUEUE},
+	{"vram", VM_CMD_QUEUE},
+	{"mmio", MMIO_CMD},
+	{"\0",  -1}
 };
 
 static struct _sis_vrate {
@@ -340,43 +477,32 @@ static struct _sis_vrate {
 	u16 yres;
 	u16 refresh;
 } sisfb_vrate[] = {
-	{
-	1, 640, 480, 60}, {
-	2, 640, 480, 72}, {
-	3, 640, 480, 75}, {
-	4, 640, 480, 85}, {
-	5, 640, 480, 100}, {
-	6, 640, 480, 120}, {
-	7, 640, 480, 160}, {
-	8, 640, 480, 200}, {
-	1, 720, 480, 60}, {
-	1, 720, 576, 50}, {
-	1, 800, 600, 56}, {
-	2, 800, 600, 60}, {
-	3, 800, 600, 72}, {
-	4, 800, 600, 75}, {
-	5, 800, 600, 85}, {
-	6, 800, 600, 100}, {
-	7, 800, 600, 120}, {
-	8, 800, 600, 160}, {
-	1, 1024, 768, 43}, {
-	2, 1024, 768, 60}, {
-	3, 1024, 768, 70}, {
-	4, 1024, 768, 75}, {
-	5, 1024, 768, 85}, {
-	6, 1024, 768, 100}, {
-	7, 1024, 768, 120}, {
-	1, 1280, 1024, 43}, {
-	2, 1280, 1024, 60}, {
-	3, 1280, 1024, 75}, {
-	4, 1280, 1024, 85}, {
-	1, 1600, 1200, 60}, {
-	2, 1600, 1200, 65}, {
-	3, 1600, 1200, 70}, {
-	4, 1600, 1200, 75}, {
-	5, 1600, 1200, 85}, {
-	1, 1920, 1440, 60}, {
-	0, 0, 0, 0}
+	{1,  640,  480, 60}, {2,  640,  480,  72}, {3, 640,   480,  75}, {4,  640, 480,  85},
+	{5,  640,  480,100}, {6,  640,  480, 120}, {7, 640,   480, 160}, {8,  640, 480, 200},
+	{1,  720,  480, 60},
+	{1,  720,  576, 58},
+	{1,  800,  480, 60}, {2,  800,  480,  75}, {3, 800,   480,  85},
+	{1,  800,  600, 56}, {2,  800,  600,  60}, {3, 800,   600,  72}, {4,  800, 600,  75},
+	{5,  800,  600, 85}, {6,  800,  600, 100}, {7, 800,   600, 120}, {8,  800, 600, 160},
+	{1, 1024,  768, 43}, {2, 1024,  768,  60}, {3, 1024,  768,  70}, {4, 1024, 768,  75},
+	{5, 1024,  768, 85}, {6, 1024,  768, 100}, {7, 1024,  768, 120},
+	{1, 1024,  576, 60}, {2, 1024,  576,  65}, {3, 1024,  576,  75},
+	{1, 1024,  600, 60},
+	{1, 1152,  768, 60},
+	{1, 1280,  720, 60}, {2, 1280,  720,  75}, {3, 1280,  720,  85},
+	{1, 1280,  768, 60},
+	{1, 1280, 1024, 43}, {2, 1280, 1024,  60}, {3, 1280, 1024,  75}, {4, 1280, 1024,  85},
+	{1, 1280,  960, 60},
+	{1, 1400, 1050, 60},
+	{1, 1600, 1200, 60}, {2, 1600, 1200,  65}, {3, 1600, 1200,  70}, {4, 1600, 1200,  75},
+	{5, 1600, 1200, 85}, {6, 1600, 1200, 100}, {7, 1600, 1200, 120},
+	/* TW: Clock values for 1920x1440 guessed (except for the first one) */
+	{1, 1920, 1440, 60}, {2, 1920, 1440,  70}, {3, 1920, 1440,  75}, {4, 1920, 1440,  85},
+	{5, 1920, 1440,100}, {6, 1920, 1440, 120},
+	/* TW: Clock values for 2048x1536 guessed */
+	{1, 2048, 1536, 60}, {2, 2048, 1536,  70}, {3, 2048, 1536,  75}, {4, 2048, 1536,  85},
+	{5, 2048, 1536,100},
+	{0, 0, 0, 0}
 };
 
 /* Offscreen layout */
@@ -419,167 +545,150 @@ static SIS_HEAP sisfb_heap;
 static struct _sis_TV_filter {
 	u8 filter[9][4];
 } sis_TV_filter[] = {
-	{ { {
-	0x00, 0x00, 0x00, 0x40},	/* NTSCFilter_0 */
-	{
-	0x00, 0xE0, 0x10, 0x60}, {
-	0x00, 0xEE, 0x10, 0x44}, {
-	0x00, 0xF4, 0x10, 0x38}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xFC, 0xFB, 0x14, 0x2A}, {
-	0x00, 0x00, 0x10, 0x20}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* NTSCFilter_1 */
-	{
-	0x00, 0xE0, 0x10, 0x60}, {
-	0x00, 0xEE, 0x10, 0x44}, {
-	0x00, 0xF4, 0x10, 0x38}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xFC, 0xFB, 0x14, 0x2A}, {
-	0x00, 0x00, 0x10, 0x20}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* NTSCFilter_2 */
-	{
-	0xF5, 0xEE, 0x1B, 0x44}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xEB, 0x04, 0x25, 0x18}, {
-	0xF1, 0x05, 0x1F, 0x16}, {
-	0xF6, 0x06, 0x1A, 0x14}, {
-	0xFA, 0x06, 0x16, 0x14}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* NTSCFilter_3 */
-	{
-	0xF1, 0x04, 0x1F, 0x18}, {
-	0xEE, 0x0D, 0x22, 0x06}, {
-	0xF7, 0x06, 0x19, 0x14}, {
-	0xF4, 0x0B, 0x1C, 0x0A}, {
-	0xFA, 0x07, 0x16, 0x12}, {
-	0xF9, 0x0A, 0x17, 0x0C}, {
-	0x00, 0x07, 0x10, 0x12}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* NTSCFilter_4 */
-	{
-	0x00, 0xE0, 0x10, 0x60}, {
-	0x00, 0xEE, 0x10, 0x44}, {
-	0x00, 0xF4, 0x10, 0x38}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xFC, 0xFB, 0x14, 0x2A}, {
-	0x00, 0x00, 0x10, 0x20}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* NTSCFilter_5 */
-	{
-	0xF5, 0xEE, 0x1B, 0x44}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xEB, 0x04, 0x25, 0x18}, {
-	0xF1, 0x05, 0x1F, 0x16}, {
-	0xF6, 0x06, 0x1A, 0x14}, {
-	0xFA, 0x06, 0x16, 0x14}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* NTSCFilter_6 */
-	{
-	0xEB, 0x04, 0x25, 0x18}, {
-	0xE7, 0x0E, 0x29, 0x04}, {
-	0xEE, 0x0C, 0x22, 0x08}, {
-	0xF6, 0x0B, 0x1A, 0x0A}, {
-	0xF9, 0x0A, 0x17, 0x0C}, {
-	0xFC, 0x0A, 0x14, 0x0C}, {
-	0x00, 0x08, 0x10, 0x10}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* NTSCFilter_7 */
-	{
-	0xEC, 0x02, 0x24, 0x1C}, {
-	0xF2, 0x04, 0x1E, 0x18}, {
-	0xEB, 0x15, 0x25, 0xF6}, {
-	0xF4, 0x10, 0x1C, 0x00}, {
-	0xF8, 0x0F, 0x18, 0x02}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0x01, 0x06, 0x0F, 0x14}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* PALFilter_0 */
-	{
-	0x00, 0xE0, 0x10, 0x60}, {
-	0x00, 0xEE, 0x10, 0x44}, {
-	0x00, 0xF4, 0x10, 0x38}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xFC, 0xFB, 0x14, 0x2A}, {
-	0x00, 0x00, 0x10, 0x20}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* PALFilter_1 */
-	{
-	0x00, 0xE0, 0x10, 0x60}, {
-	0x00, 0xEE, 0x10, 0x44}, {
-	0x00, 0xF4, 0x10, 0x38}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xFC, 0xFB, 0x14, 0x2A}, {
-	0x00, 0x00, 0x10, 0x20}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* PALFilter_2 */
-	{
-	0xF5, 0xEE, 0x1B, 0x44}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xF1, 0xF7, 0x01, 0x32}, {
-	0xF5, 0xFB, 0x1B, 0x2A}, {
-	0xF9, 0xFF, 0x17, 0x22}, {
-	0xFB, 0x01, 0x15, 0x1E}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* PALFilter_3 */
-	{
-	0xF5, 0xFB, 0x1B, 0x2A}, {
-	0xEE, 0xFE, 0x22, 0x24}, {
-	0xF3, 0x00, 0x1D, 0x20}, {
-	0xF9, 0x03, 0x17, 0x1A}, {
-	0xFB, 0x02, 0x14, 0x1E}, {
-	0xFB, 0x04, 0x15, 0x18}, {
-	0x00, 0x06, 0x10, 0x14}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* PALFilter_4 */
-	{
-	0x00, 0xE0, 0x10, 0x60}, {
-	0x00, 0xEE, 0x10, 0x44}, {
-	0x00, 0xF4, 0x10, 0x38}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xFC, 0xFB, 0x14, 0x2A}, {
-	0x00, 0x00, 0x10, 0x20}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* PALFilter_5 */
-	{
-	0xF5, 0xEE, 0x1B, 0x44}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xF1, 0xF7, 0x1F, 0x32}, {
-	0xF5, 0xFB, 0x1B, 0x2A}, {
-	0xF9, 0xFF, 0x17, 0x22}, {
-	0xFB, 0x01, 0x15, 0x1E}, {
-	0x00, 0x04, 0x10, 0x18}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* PALFilter_6 */
-	{
-	0xF5, 0xEE, 0x1B, 0x2A}, {
-	0xEE, 0xFE, 0x22, 0x24}, {
-	0xF3, 0x00, 0x1D, 0x20}, {
-	0xF9, 0x03, 0x17, 0x1A}, {
-	0xFB, 0x02, 0x14, 0x1E}, {
-	0xFB, 0x04, 0x15, 0x18}, {
-	0x00, 0x06, 0x10, 0x14}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}, { { {
-	0x00, 0x00, 0x00, 0x40},	/* PALFilter_7 */
-	{
-	0xF5, 0xEE, 0x1B, 0x44}, {
-	0xF8, 0xF4, 0x18, 0x38}, {
-	0xFC, 0xFB, 0x14, 0x2A}, {
-	0xEB, 0x05, 0x25, 0x16}, {
-	0xF1, 0x05, 0x1F, 0x16}, {
-	0xFA, 0x07, 0x16, 0x12}, {
-	0x00, 0x07, 0x10, 0x12}, {
-	0xFF, 0xFF, 0xFF, 0xFF}}}
+	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_0 */
+	   {0x00,0xE0,0x10,0x60},
+	   {0x00,0xEE,0x10,0x44},
+	   {0x00,0xF4,0x10,0x38},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xFC,0xFB,0x14,0x2A},
+	   {0x00,0x00,0x10,0x20},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_1 */
+	   {0x00,0xE0,0x10,0x60},
+	   {0x00,0xEE,0x10,0x44},
+	   {0x00,0xF4,0x10,0x38},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xFC,0xFB,0x14,0x2A},
+	   {0x00,0x00,0x10,0x20},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_2 */
+	   {0xF5,0xEE,0x1B,0x44},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xEB,0x04,0x25,0x18},
+	   {0xF1,0x05,0x1F,0x16},
+	   {0xF6,0x06,0x1A,0x14},
+	   {0xFA,0x06,0x16,0x14},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_3 */
+	   {0xF1,0x04,0x1F,0x18},
+	   {0xEE,0x0D,0x22,0x06},
+	   {0xF7,0x06,0x19,0x14},
+	   {0xF4,0x0B,0x1C,0x0A},
+	   {0xFA,0x07,0x16,0x12},
+	   {0xF9,0x0A,0x17,0x0C},
+	   {0x00,0x07,0x10,0x12}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_4 */
+	   {0x00,0xE0,0x10,0x60},
+	   {0x00,0xEE,0x10,0x44},
+	   {0x00,0xF4,0x10,0x38},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xFC,0xFB,0x14,0x2A},
+	   {0x00,0x00,0x10,0x20},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_5 */
+	   {0xF5,0xEE,0x1B,0x44},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xEB,0x04,0x25,0x18},
+	   {0xF1,0x05,0x1F,0x16},
+	   {0xF6,0x06,0x1A,0x14},
+	   {0xFA,0x06,0x16,0x14},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_6 */
+	   {0xEB,0x04,0x25,0x18},
+	   {0xE7,0x0E,0x29,0x04},
+	   {0xEE,0x0C,0x22,0x08},
+	   {0xF6,0x0B,0x1A,0x0A},
+	   {0xF9,0x0A,0x17,0x0C},
+	   {0xFC,0x0A,0x14,0x0C},
+	   {0x00,0x08,0x10,0x10}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* NTSCFilter_7 */
+	   {0xEC,0x02,0x24,0x1C},
+	   {0xF2,0x04,0x1E,0x18},
+	   {0xEB,0x15,0x25,0xF6},
+	   {0xF4,0x10,0x1C,0x00},
+	   {0xF8,0x0F,0x18,0x02},
+	   {0x00,0x04,0x10,0x18},
+	   {0x01,0x06,0x0F,0x14}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* PALFilter_0 */
+	   {0x00,0xE0,0x10,0x60},
+	   {0x00,0xEE,0x10,0x44},
+	   {0x00,0xF4,0x10,0x38},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xFC,0xFB,0x14,0x2A},
+	   {0x00,0x00,0x10,0x20},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* PALFilter_1 */
+	   {0x00,0xE0,0x10,0x60},
+	   {0x00,0xEE,0x10,0x44},
+	   {0x00,0xF4,0x10,0x38},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xFC,0xFB,0x14,0x2A},
+	   {0x00,0x00,0x10,0x20},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* PALFilter_2 */
+	   {0xF5,0xEE,0x1B,0x44},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xF1,0xF7,0x01,0x32},
+	   {0xF5,0xFB,0x1B,0x2A},
+	   {0xF9,0xFF,0x17,0x22},
+	   {0xFB,0x01,0x15,0x1E},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* PALFilter_3 */
+	   {0xF5,0xFB,0x1B,0x2A},
+	   {0xEE,0xFE,0x22,0x24},
+	   {0xF3,0x00,0x1D,0x20},
+	   {0xF9,0x03,0x17,0x1A},
+	   {0xFB,0x02,0x14,0x1E},
+	   {0xFB,0x04,0x15,0x18},
+	   {0x00,0x06,0x10,0x14}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* PALFilter_4 */
+	   {0x00,0xE0,0x10,0x60},
+	   {0x00,0xEE,0x10,0x44},
+	   {0x00,0xF4,0x10,0x38},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xFC,0xFB,0x14,0x2A},
+	   {0x00,0x00,0x10,0x20},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* PALFilter_5 */
+	   {0xF5,0xEE,0x1B,0x44},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xF1,0xF7,0x1F,0x32},
+	   {0xF5,0xFB,0x1B,0x2A},
+	   {0xF9,0xFF,0x17,0x22},
+	   {0xFB,0x01,0x15,0x1E},
+	   {0x00,0x04,0x10,0x18}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* PALFilter_6 */
+	   {0xF5,0xEE,0x1B,0x2A},
+	   {0xEE,0xFE,0x22,0x24},
+	   {0xF3,0x00,0x1D,0x20},
+	   {0xF9,0x03,0x17,0x1A},
+	   {0xFB,0x02,0x14,0x1E},
+	   {0xFB,0x04,0x15,0x18},
+	   {0x00,0x06,0x10,0x14}, 
+	   {0xFF,0xFF,0xFF,0xFF} }},
+	{ {{0x00,0x00,0x00,0x40},  /* PALFilter_7 */
+	   {0xF5,0xEE,0x1B,0x44},
+	   {0xF8,0xF4,0x18,0x38},
+	   {0xFC,0xFB,0x14,0x2A},
+	   {0xEB,0x05,0x25,0x16},
+	   {0xF1,0x05,0x1F,0x16},
+	   {0xFA,0x07,0x16,0x12},
+	   {0x00,0x07,0x10,0x12}, 
+	   {0xFF,0xFF,0xFF,0xFF} }}
 };
 
 static int filter = -1;
@@ -589,101 +698,107 @@ static unsigned char filter_tb;
 /* ---------------------- Routine Prototype ------------------------- */
 
 /* Interface used by the world */
-int sisfb_setup (char *options);
-static int sisfb_get_fix (struct fb_fix_screeninfo *fix, int con,
+int sisfb_setup(char *options);
+static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
+			 struct fb_info *info);
+static int sisfb_get_var(struct fb_var_screeninfo *var, int con,
+			 struct fb_info *info);
+static int sisfb_set_var(struct fb_var_screeninfo *var, int con,
+			 struct fb_info *info);
+static int sisfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
 			  struct fb_info *info);
-static int sisfb_get_var (struct fb_var_screeninfo *var, int con,
+static int sisfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
 			  struct fb_info *info);
-static int sisfb_set_var (struct fb_var_screeninfo *var, int con,
-			  struct fb_info *info);
-static int sisfb_get_cmap (struct fb_cmap *cmap, int kspc, int con,
-			   struct fb_info *info);
-static int sisfb_setcolreg (unsigned regno, unsigned red, unsigned green,
-			    unsigned blue, unsigned transp,
-			    struct fb_info *fb_info);
-static int sisfb_ioctl (struct inode *inode, struct file *file,
-			unsigned int cmd, unsigned long arg, int con,
-			struct fb_info *info);
+static int sisfb_ioctl(struct inode *inode, struct file *file,
+		       unsigned int cmd, unsigned long arg, int con,
+		       struct fb_info *info);
 
 /* Interface to the low level console driver */
-int sisfb_init (void);
-static int sisfb_update_var (int con, struct fb_info *info);
-static int sisfb_switch (int con, struct fb_info *info);
-static int sisfb_blank(int blank, struct fb_info *info);
+int sisfb_init(void);
+static int sisfb_update_var(int con, struct fb_info *info);
+static int sisfb_switch(int con, struct fb_info *info);
+static void sisfb_blank(int blank, struct fb_info *info);
 
 /* hardware access routines */
-void sisfb_set_reg1 (u16 port, u16 index, u16 data);
-void sisfb_set_reg3 (u16 port, u16 data);
-void sisfb_set_reg4 (u16 port, unsigned long data);
-u8 sisfb_get_reg1 (u16 port, u16 index);
-u8 sisfb_get_reg2 (u16 port);
-u32 sisfb_get_reg3 (u16 port);
-// Eden Chen
-//void sisfb_clear_DAC(u16 port);
-//void sisfb_clear_buffer(PHW_DEVICE_EXTENSION psishw_ext);
-// ~Eden Chen
+void sisfb_set_reg1(u16 port, u16 index, u16 data);
+void sisfb_set_reg3(u16 port, u16 data);
+void sisfb_set_reg4(u16 port, unsigned long data);
+u8   sisfb_get_reg1(u16 port, u16 index);
+u8   sisfb_get_reg2(u16 port);
+u32  sisfb_get_reg3(u16 port);
 
 /* Internal routines */
-static void sisfb_search_mode (const char *name);
-static void sisfb_validate_mode (void);
-static u8 sisfb_search_refresh_rate (unsigned int rate);
-static int sis_getcolreg (unsigned regno, unsigned *red, unsigned *green,
-			  unsigned *blue, unsigned *transp,
-			  struct fb_info *fb_info);
-static int sisfb_do_set_var (struct fb_var_screeninfo *var, int isactive,
-			     struct fb_info *info);
-static void sisfb_set_disp (int con, struct fb_var_screeninfo *var);
+static void sisfb_search_mode(const char *name);
+static void sisfb_validate_mode(void);
+static u8   sisfb_search_refresh_rate(unsigned int rate);
+static int  sis_getcolreg(unsigned regno, unsigned *red, unsigned *green,
+			 unsigned *blue, unsigned *transp,
+			 struct fb_info *fb_info);
+static int  sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
+			 unsigned blue, unsigned transp,
+			 struct fb_info *fb_info);
+static int  sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
+		      struct fb_info *info);
+static void sisfb_set_disp(int con, struct fb_var_screeninfo *var);
+static void sisfb_do_install_cmap(int con, struct fb_info *info);
 
 /* Chip-dependent Routines */
 #ifdef CONFIG_FB_SIS_300
-static int sisfb_get_dram_size_300 (void);
-//extern BOOLEAN SiSInit300(PHW_DEVICE_EXTENSION HwDeviceExtension);
-static void sisfb_detect_VB_connect_300 (void);
-static void sisfb_get_VB_type_300 (void);
-static int sisfb_has_VB_300 (void);
-//extern BOOLEAN SiSSetMode(PHW_DEVICE_EXTENSION HwDeviceExtension,USHORT ModeNo);
+static int sisfb_get_dram_size_300(void);
+static void sisfb_detect_VB_connect_300(void);
+static void sisfb_get_VB_type_300(void);
+static int sisfb_has_VB_300(void);
 #endif
 #ifdef CONFIG_FB_SIS_315
-static int sisfb_get_dram_size_315 (void);
-//extern BOOLEAN SiSInit310(PHW_DEVICE_EXTENSION HwDeviceExtension);
-static void sisfb_detect_VB_connect_315 (void);
-static void sisfb_get_VB_type_315 (void);
-//extern BOOLEAN SiSSetMode310(PHW_DEVICE_EXTENSION HwDeviceExtension, USHORT ModeNo);
+static int sisfb_get_dram_size_315(void);
+static void sisfb_detect_VB_connect_315(void);
+static void sisfb_get_VB_type_315(void);
+static int sisfb_has_VB_315(void);
 #endif
 
-/* SetMode routines */
+/* Routines from init.c/init301.c */
 
-// Eden Chen
-extern BOOLEAN SiSSetMode (PSIS_HW_DEVICE_INFO HwDeviceExtension,
-			   USHORT ModeNo);
-extern BOOLEAN SiSInit (PSIS_HW_DEVICE_INFO HwDeviceExtension);
-// ~Eden Chen
+extern void 	SiSRegInit(USHORT BaseAddr);
+extern BOOLEAN  SiSInit(PSIS_HW_DEVICE_INFO HwDeviceExtension);
+extern BOOLEAN  SiSSetMode(PSIS_HW_DEVICE_INFO HwDeviceExtension, USHORT ModeNo);
+extern void     SetEnableDstn(void);
 
-static void sisfb_pre_setmode (void);
-static void sisfb_post_setmode (void);
-static void sisfb_crtc_to_var (struct fb_var_screeninfo *var);
+/* TW: Chrontel TV functions */
+extern USHORT   SiS_IF_DEF_CH70xx;
+extern USHORT 	SiS_GetCH700x(USHORT tempbx);
+extern void 	SiS_SetCH700x(USHORT tempbx);
+extern USHORT 	SiS_GetCH701x(USHORT tempbx);
+extern void 	SiS_SetCH701x(USHORT tempbx);
+extern void     SiS_SetCH70xxANDOR(USHORT tempax,USHORT tempbh);
+extern void     SiS_DDC2Delay(USHORT delaytime);
+
+static void sisfb_pre_setmode(void);
+static void sisfb_post_setmode(void);
+static void sisfb_crtc_to_var(struct fb_var_screeninfo *var);
 
 /* Export functions  */
-static void sis_get_glyph (struct fb_info *info, SIS_GLYINFO * gly);
-void sis_dispinfo (struct ap_data *rec);
-void sis_malloc (struct sis_memreq *req);
-void sis_free (unsigned long base);
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,23)
+static void sis_get_glyph(SIS_GLYINFO *gly);
+#else
+static void sis_get_glyph(struct fb_info *info, SIS_GLYINFO *gly);
+#endif
+void sis_dispinfo(struct ap_data *rec);
+void sis_malloc(struct sis_memreq *req);
+void sis_free(unsigned long base);
 
 /* heap routines */
-static int sisfb_heap_init (void);
-static SIS_OH *sisfb_poh_new_node (void);
-static SIS_OH *sisfb_poh_allocate (unsigned long size);
-static void sisfb_delete_node (SIS_OH * poh);
-static void sisfb_insert_node (SIS_OH * pohList, SIS_OH * poh);
-static SIS_OH *sisfb_poh_free (unsigned long base);
-static void sisfb_free_node (SIS_OH * poh);
+static int sisfb_heap_init(void);
+static SIS_OH *sisfb_poh_new_node(void);
+static SIS_OH *sisfb_poh_allocate(unsigned long size);
+static void sisfb_delete_node(SIS_OH *poh);
+static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh);
+static SIS_OH *sisfb_poh_free(unsigned long base);
+static void sisfb_free_node(SIS_OH *poh);
 
 /* routines to access PCI configuration space */
-BOOLEAN sisfb_query_VGA_config_space (PSIS_HW_DEVICE_INFO psishw_ext,
-				      unsigned long offset, unsigned long set,
-				      unsigned long *value);
-BOOLEAN sisfb_query_north_bridge_space (PSIS_HW_DEVICE_INFO psishw_ext,
-					unsigned long offset, unsigned long set,
-					unsigned long *value);
+BOOLEAN sisfb_query_VGA_config_space(PSIS_HW_DEVICE_INFO psishw_ext, 
+	unsigned long offset, unsigned long set, unsigned long *value);
+BOOLEAN sisfb_query_north_bridge_space(PSIS_HW_DEVICE_INFO psishw_ext, 
+	unsigned long offset, unsigned long set, unsigned long *value);
 
 #endif
diff --git a/drivers/video/sis/sisfb.h b/drivers/video/sis/sisfb.h
new file mode 100644
index 000000000000..2216373d5136
--- /dev/null
+++ b/drivers/video/sis/sisfb.h
@@ -0,0 +1,153 @@
+#ifndef _LINUX_SISFB
+#define _LINUX_SISFB
+
+#include <asm/ioctl.h>
+#include <asm/types.h>
+
+#define DISPTYPE_CRT1       0x00000008L
+#define DISPTYPE_CRT2       0x00000004L
+#define DISPTYPE_LCD        0x00000002L
+#define DISPTYPE_TV         0x00000001L
+#define DISPTYPE_DISP1      DISPTYPE_CRT1
+#define DISPTYPE_DISP2      (DISPTYPE_CRT2 | DISPTYPE_LCD | DISPTYPE_TV)
+#define DISPMODE_SINGLE	    0x00000020L
+#define DISPMODE_MIRROR	    0x00000010L
+#define DISPMODE_DUALVIEW   0x00000040L
+
+#define HASVB_NONE      	0x00
+#define HASVB_301       	0x01
+#define HASVB_LVDS      	0x02
+#define HASVB_TRUMPION  	0x04
+#define HASVB_LVDS_CHRONTEL	0x10
+#define HASVB_302       	0x20
+#define HASVB_303       	0x40
+#define HASVB_CHRONTEL  	0x80
+
+/* TW: *Never* change the order of the following enum */
+typedef enum _SIS_CHIP_TYPE {
+	SIS_VGALegacy = 0,
+	SIS_300,
+	SIS_630,
+	SIS_540,
+	SIS_730, 
+	SIS_315H,
+	SIS_315,
+	SIS_550,
+	SIS_315PRO,
+	SIS_640,
+	SIS_740,
+	SIS_650,
+	SIS_330,
+	MAX_SIS_CHIP
+} SIS_CHIP_TYPE;
+
+typedef enum _TVTYPE {
+	TVMODE_NTSC = 0,
+	TVMODE_PAL,
+	TVMODE_HIVISION,
+	TVMODE_TOTAL
+} SIS_TV_TYPE;
+
+typedef enum _TVPLUGTYPE {
+	TVPLUG_Legacy = 0,
+	TVPLUG_COMPOSITE,
+	TVPLUG_SVIDEO,
+	TVPLUG_SCART,
+	TVPLUG_TOTAL
+} SIS_TV_PLUG;
+
+struct sis_memreq {
+	unsigned long offset;
+	unsigned long size;
+};
+
+struct mode_info {
+	int    bpp;
+	int    xres;
+	int    yres;
+	int    v_xres;
+	int    v_yres;
+	int    org_x;
+	int    org_y;
+	unsigned int  vrate;
+};
+
+struct ap_data {
+	struct mode_info minfo;
+	unsigned long iobase;
+	unsigned int  mem_size;
+	unsigned long disp_state;    	
+	SIS_CHIP_TYPE chip;
+	unsigned char hasVB;
+	SIS_TV_TYPE TV_type;
+	SIS_TV_PLUG TV_plug;
+	unsigned long version;
+	char reserved[256];
+};
+
+struct video_info {
+	int    chip_id;
+	unsigned int  video_size;
+	unsigned long video_base;
+	char  *video_vbase;
+	unsigned long mmio_base;
+	char  *mmio_vbase; 
+	unsigned long vga_base;
+	unsigned long mtrr;
+	unsigned long heapstart;
+
+	int    video_bpp;
+	int    video_width;
+	int    video_height;
+	int    video_vwidth;
+	int    video_vheight;
+	int    org_x;
+	int    org_y;
+	unsigned int refresh_rate;
+
+	unsigned long disp_state;
+	unsigned char hasVB;
+	unsigned char TV_type;
+	unsigned char TV_plug;
+
+	SIS_CHIP_TYPE chip;
+	unsigned char revision_id;
+
+	char reserved[256];
+};
+
+
+/* TW: Addtional IOCTL for communication sisfb <> X driver                 */
+/*     If changing this, vgatypes.h must also be changed (for X driver)    */
+
+/* TW: ioctl for identifying and giving some info (esp. memory heap start) */
+#define SISFB_GET_INFO	  _IOR('n',0xF8,sizeof(__u32))
+
+/* TW: Structure argument for SISFB_GET_INFO ioctl  */
+typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
+
+struct _SISFB_INFO {
+	unsigned long sisfb_id;         /* for identifying sisfb */
+#ifndef SISFB_ID
+#define SISFB_ID	  0x53495346    /* Identify myself with 'SISF' */
+#endif
+ 	int    chip_id;			/* PCI ID of detected chip */
+	int    memory;			/* video memory in KB which sisfb manages */
+	int    heapstart;               /* heap start (= sisfb "mem" argument) in KB */
+	unsigned char fbvidmode;	/* current sisfb mode */
+	
+	unsigned char sisfb_version;
+	unsigned char sisfb_revision;
+	unsigned char sisfb_patchlevel;
+
+	char reserved[253]; 		/* for future use */
+};
+
+#ifdef __KERNEL__
+extern struct video_info ivideo;
+
+extern void sis_malloc(struct sis_memreq *req);
+extern void sis_free(unsigned long base);
+extern void sis_dispinfo(struct ap_data *rec);
+#endif
+#endif
diff --git a/drivers/video/sis/vgatypes.h b/drivers/video/sis/vgatypes.h
index 3fc841f7c57a..2385034e3401 100644
--- a/drivers/video/sis/vgatypes.h
+++ b/drivers/video/sis/vgatypes.h
@@ -1,6 +1,14 @@
 #ifndef _VGATYPES_
 #define _VGATYPES_
 
+#ifdef LINUX_XF86
+#include "xf86Pci.h"
+#endif
+
+#ifdef LINUX_KERNEL  /* TW: We don't want the X driver to depend on kernel source */
+#include <linux/ioctl.h>
+#endif
+
 #ifndef TC
 #define far
 #endif
@@ -26,7 +34,7 @@ typedef short SHORT;
 #endif
 
 #ifndef LONG
-typedef long LONG;
+typedef long  LONG;
 #endif
 
 #ifndef UCHAR
@@ -68,27 +76,52 @@ typedef UCHAR BOOLEAN;
 #ifndef bool
 typedef UCHAR bool;
 #endif
-#endif	/* WINCE_HEADER */
+#endif /*WINCE_HEADER*/
 
 #ifndef VBIOS_VER_MAX_LENGTH
 #define VBIOS_VER_MAX_LENGTH         4
 #endif
 
+#ifndef LINUX_KERNEL   /* For kernel, this is defined in sisfb.h */
+#ifndef WIN2000
+#ifndef SIS_CHIP_TYPE
+typedef enum _SIS_CHIP_TYPE {
+    SIS_VGALegacy = 0,
+#ifdef LINUX_XF86
+    SIS_530,	/* TW */
+    SIS_OLD,	/* TW */
+#endif
+    SIS_300,
+    SIS_630,
+    SIS_730,
+    SIS_540,
+    SIS_315H,   /* SiS 310 */
+    SIS_315,
+    SIS_315PRO, /* SiS 325 */
+    SIS_550,
+    SIS_640,
+    SIS_740,
+    SIS_650,
+    SIS_330, 
+    MAX_SIS_CHIP
+} SIS_CHIP_TYPE;
+#endif
+#endif
+#endif
+
 #ifndef WIN2000
 #ifndef SIS_VB_CHIP_TYPE
 typedef enum _SIS_VB_CHIP_TYPE {
-	VB_CHIP_Legacy = 0,
-	VB_CHIP_301,
-	VB_CHIP_301B,
-	VB_CHIP_301BLCD,
-	VB_CHIP_301BTV,
-	VB_CHIP_302,
-	VB_CHIP_302B,
-	VB_CHIP_302BLCD,
-	VB_CHIP_302BTV,
-	VB_CHIP_303,
-	VB_CHIP_UNKNOWN,	/* other video bridge or no video bridge */
-	MAX_VB_CHIP
+    VB_CHIP_Legacy = 0,
+    VB_CHIP_301,
+    VB_CHIP_301B,      
+    VB_CHIP_301LV,
+    VB_CHIP_302,
+    VB_CHIP_302B,
+    VB_CHIP_302LV,
+    VB_CHIP_303,
+    VB_CHIP_UNKNOWN, /* other video bridge or no video bridge */
+    MAX_VB_CHIP
 } SIS_VB_CHIP_TYPE;
 #endif
 #endif
@@ -96,125 +129,169 @@ typedef enum _SIS_VB_CHIP_TYPE {
 #ifndef WIN2000
 #ifndef SIS_LCD_TYPE
 typedef enum _SIS_LCD_TYPE {
-	LCD_INVALID = 0,
-	LCD_800x600,
-	LCD_1024x768,
-	LCD_1280x1024,
-	LCD_1280x960,
-	LCD_640x480,
-	LCD_1600x1200,
-	LCD_1920x1440,
-	LCD_2048x1536,
-	LCD_UNKNOWN
+    LCD_INVALID = 0,
+    LCD_800x600,
+    LCD_1024x768,
+    LCD_1280x1024,
+    LCD_1280x960,
+    LCD_640x480,
+    LCD_1600x1200,
+    LCD_1920x1440,
+    LCD_2048x1536,
+    LCD_320x480,       /* TW: FSTN */
+    LCD_1400x1050,
+    LCD_1152x864,
+    LCD_1152x768,
+    LCD_1280x768,
+    LCD_1024x600,
+    LCD_UNKNOWN
 } SIS_LCD_TYPE;
 #endif
 #endif
 
-#ifndef WIN2000			/* mark by Paul ,Move definition to sisv.h */
+#ifndef WIN2000 /* mark by Paul, Move definition to sisv.h*/
 #ifndef PSIS_DSReg
-typedef struct _SIS_DSReg {
-	UCHAR jIdx;
-	UCHAR jVal;
+typedef struct _SIS_DSReg
+{
+  UCHAR  jIdx;
+  UCHAR  jVal;
 } SIS_DSReg, *PSIS_DSReg;
 #endif
 
 #ifndef SIS_HW_DEVICE_INFO
 
-typedef struct _SIS_HW_DEVICE_INFO SIS_HW_DEVICE_INFO, *PSIS_HW_DEVICE_INFO;
-
-typedef BOOLEAN (*PSIS_QUERYSPACE) (PSIS_HW_DEVICE_INFO, ULONG, ULONG, ULONG *);
-
-struct _SIS_HW_DEVICE_INFO {
-	PVOID pDevice;		/* The pointer to the physical device data structure 
-				   in each OS or NULL for unused. */
-	UCHAR *pjVirtualRomBase;	/* Only for NT, NULL for WinCE & Linux. */
-	/* base virtual address of VBIOS ROM Space */
-	/* or base virtual address of ROM image file. */
-	/* if NULL, then read from pjROMImage; */
-	/* Note:ROM image file is the file of VBIOS ROM */
-
-	UCHAR *pjCustomizedROMImage;	/* base virtual address of ROM image file. */
-	/* wincE:ROM image file is the file for OEM */
-	/*       customized table */
-	/* Linux: not used */
-	/* NT   : not used  */
-	/* Note : pjCustomizedROMImage=NULL if no ROM image file */
-
-	UCHAR *pjVideoMemoryAddress;	/* base virtual memory address */
-	/* of Linear VGA memory */
-
-	ULONG ulVideoMemorySize;	/* size, in bytes, of the memory on the board */
-	ULONG ulIOAddress;	/* base I/O address of VGA ports (0x3B0) */
-	UCHAR jChipType;	/* Used to Identify SiS Graphics Chip */
-	/* defined in the data structure type  */
-	/* "SIS_CHIP_TYPE" */
-
-	UCHAR jChipRevision;	/* Used to Identify SiS Graphics Chip Revision */
-	UCHAR ujVBChipID;	/* the ID of video bridge */
-	/* defined in the data structure type */
-	/* "SIS_VB_CHIP_TYPE" */
-
-	USHORT usExternalChip;	/* NO VB or other video bridge(not  */
-	/* SiS video bridge) */
-	/* if ujVBChipID = VB_CHIP_UNKNOWN, */
-	/* then bit0=1 : LVDS,bit1=1 : trumpion, */
-	/* bit2=1 : CH7005 & no video bridge if */
-	/* usExternalChip = 0. */
-	/* Note: CR37[3:1]: */
-	/*             001:SiS 301 */
-	/*             010:LVDS */
-	/*             011:Trumpion LVDS Scaling Chip */
-	/*             100:LVDS(LCD-out)+Chrontel 7005 */
-	/*             101:Single Chrontel 7005 */
-
-	ULONG ulCRT2LCDType;	/* defined in the data structure type */
-	/* "SIS_LCD_TYPE" */
-
-	BOOLEAN bIntegratedMMEnabled;	/* supporting integration MM enable */
-
-	BOOLEAN bSkipDramSizing;	/* True: Skip video memory sizing. */
-	PSIS_DSReg pSR;		/* restore SR registers in initial function. */
-	/* end data :(idx, val) =  (FF, FF). */
-	/* Note : restore SR registers if  */
-	/* bSkipDramSizing = TRUE */
-
-	PSIS_DSReg pCR;		/* restore CR registers in initial function. */
-	/* end data :(idx, val) =  (FF, FF) */
-	/* Note : restore cR registers if  */
-	/* bSkipDramSizing = TRUE */
-
-	PSIS_QUERYSPACE pQueryVGAConfigSpace;	/* Get/Set VGA Configuration  */
-	/* space */
-
-	PSIS_QUERYSPACE pQueryNorthBridgeSpace;	/* Get/Set North Bridge  */
-	/* space  */
-
-	UCHAR szVBIOSVer[VBIOS_VER_MAX_LENGTH];
+typedef struct _SIS_HW_DEVICE_INFO  SIS_HW_DEVICE_INFO, *PSIS_HW_DEVICE_INFO;
+
+typedef BOOLEAN (*PSIS_QUERYSPACE)   (PSIS_HW_DEVICE_INFO, ULONG, ULONG, ULONG *);
+
+
+struct _SIS_HW_DEVICE_INFO
+{
+    PVOID  pDevice;              /* The pointer to the physical device data structure
+                                    in each OS or NULL for unused. */
+    UCHAR  *pjVirtualRomBase;    /* base virtual address of VBIOS ROM Space */
+                                 /* or base virtual address of ROM image file. */
+                                 /* if NULL, then read from pjROMImage; */
+                                 /* Note:ROM image file is the file of VBIOS ROM */
+
+ 
+    UCHAR  *pjCustomizedROMImage;/* base virtual address of ROM image file. */
+                                 /* wincE:ROM image file is the file for OEM */
+                                 /*       customized table */
+                                 /* Linux: not used */
+                                 /* NT   : not used  */
+                                 /* Note : pjCustomizedROMImage=NULL if no ROM image file */
+
+    UCHAR  *pjVideoMemoryAddress;/* base virtual memory address */
+                                 /* of Linear VGA memory */
+
+    ULONG  ulVideoMemorySize;    /* size, in bytes, of the memory on the board */
+    ULONG  ulIOAddress;          /* base I/O address of VGA ports (0x3B0) */
+    UCHAR  jChipType;            /* Used to Identify SiS Graphics Chip */
+                                 /* defined in the data structure type  */
+                                 /* "SIS_CHIP_TYPE" */
+
+    UCHAR  jChipRevision;        /* Used to Identify SiS Graphics Chip Revision */
+    UCHAR  ujVBChipID;           /* the ID of video bridge */
+                                 /* defined in the data structure type */
+                                 /* "SIS_VB_CHIP_TYPE" */
+
+    USHORT usExternalChip;       /* NO VB or other video bridge(not  */
+                                 /* SiS video bridge) */
+                                 /* if ujVBChipID = VB_CHIP_UNKNOWN, */
+                                 /* then bit0=1 : LVDS,bit1=1 : trumpion, */
+                                 /* bit2=1 : CH7005 & no video bridge if */
+                                 /* usExternalChip = 0. */
+                                 /* Note: CR37[3:1]: */
+                                 /*             001:SiS 301 */
+                                 /*             010:LVDS */
+                                 /*             011:Trumpion LVDS Scaling Chip */
+                                 /*             100:LVDS(LCD-out)+Chrontel 7005 */
+                                 /*             101:Single Chrontel 7005 */
+
+    ULONG  ulCRT2LCDType;        /* defined in the data structure type */
+                                 /* "SIS_LCD_TYPE" */
+                                     
+    BOOLEAN bIntegratedMMEnabled;/* supporting integration MM enable */
+                                      
+    BOOLEAN bSkipDramSizing;     /* True: Skip video memory sizing. */
+    PSIS_DSReg  pSR;             /* restore SR registers in initial function. */
+                                 /* end data :(idx, val) =  (FF, FF). */
+                                 /* Note : restore SR registers if  */
+                                 /* bSkipDramSizing = TRUE */
+
+    PSIS_DSReg  pCR;             /* restore CR registers in initial function. */
+                                 /* end data :(idx, val) =  (FF, FF) */
+                                 /* Note : restore cR registers if  */
+                                 /* bSkipDramSizing = TRUE */
+
+    PSIS_QUERYSPACE  pQueryVGAConfigSpace; /* Get/Set VGA Configuration  */
+                                           /* space */
+ 
+    PSIS_QUERYSPACE  pQueryNorthBridgeSpace;/* Get/Set North Bridge  */
+                                            /* space  */
+
+    UCHAR  szVBIOSVer[VBIOS_VER_MAX_LENGTH];
+
+    UCHAR  pdc;			/* TW: PanelDelayCompensation */
+
+#ifdef LINUX_XF86
+    PCITAG PciTag;		/* PCI Tag for Linux XF86 */
+#endif
+};
+#endif
+#endif /*~ mark by Paul ,Move definition to sisv.h  */
+
+
+/* TW: Addtional IOCTL for communication sisfb <> X driver        */
+/*     If changing this, sisfb.h must also be changed (for sisfb) */
+
+#ifdef LINUX_XF86  /* We don't want the X driver to depend on the kernel source */
+
+/* TW: ioctl for identifying and giving some info (esp. memory heap start) */
+#define SISFB_GET_INFO    0x80046ef8  /* Wow, what a terrible hack... */
+
+/* TW: Structure argument for SISFB_GET_INFO ioctl  */
+typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
+
+struct _SISFB_INFO {
+	unsigned long sisfb_id;         /* for identifying sisfb */
+#ifndef SISFB_ID
+#define SISFB_ID	  0x53495346    /* Identify myself with 'SISF' */
+#endif
+ 	int    chip_id;			/* PCI ID of detected chip */
+	int    memory;			/* video memory in KB which sisfb manages */
+	int    heapstart;               /* heap start (= sisfb "mem" argument) in KB */
+	unsigned char fbvidmode;	/* current sisfb mode */
+
+	unsigned char sisfb_version;
+	unsigned char sisfb_revision;
+	unsigned char sisfb_patchlevel;
 
+	char reserved[253]; 		/* for future use */
 };
 #endif
-#endif				/*~ mark by Paul ,Move definition to sisv.h */
 
 #ifndef WIN2000
 #ifndef WINCE_HEADER
 #ifndef BUS_DATA_TYPE
 typedef enum _BUS_DATA_TYPE {
-	ConfigurationSpaceUndefined = -1,
-	Cmos,
-	EisaConfiguration,
-	Pos,
-	CbusConfiguration,
-	PCIConfiguration,
-	VMEConfiguration,
-	NuBusConfiguration,
-	PCMCIAConfiguration,
-	MPIConfiguration,
-	MPSAConfiguration,
-	PNPISAConfiguration,
-	MaximumBusDataType
+    ConfigurationSpaceUndefined = -1,
+    Cmos,
+    EisaConfiguration,
+    Pos,
+    CbusConfiguration,
+    PCIConfiguration,
+    VMEConfiguration,
+    NuBusConfiguration,
+    PCMCIAConfiguration,
+    MPIConfiguration,
+    MPSAConfiguration,
+    PNPISAConfiguration,
+    MaximumBusDataType
 } BUS_DATA_TYPE, *PBUS_DATA_TYPE;
 #endif
-#endif				/* WINCE_HEADER */
+#endif /* WINCE_HEADER */
 
 #ifndef PCI_TYPE0_ADDRESSES
 #define PCI_TYPE0_ADDRESSES             6
@@ -227,41 +304,42 @@ typedef enum _BUS_DATA_TYPE {
 #ifndef WINCE_HEADER
 #ifndef PCI_COMMON_CONFIG
 typedef struct _PCI_COMMON_CONFIG {
-	USHORT VendorID;	/* (ro)                 */
-	USHORT DeviceID;	/* (ro)                 */
-	USHORT Command;		/* Device control       */
-	USHORT Status;
-	UCHAR RevisionID;	/* (ro)                 */
-	UCHAR ProgIf;		/* (ro)                 */
-	UCHAR SubClass;		/* (ro)                 */
-	UCHAR BaseClass;	/* (ro)                 */
-	UCHAR CacheLineSize;	/* (ro+)                */
-	UCHAR LatencyTimer;	/* (ro+)                */
-	UCHAR HeaderType;	/* (ro)                 */
-	UCHAR BIST;		/* Built in self test   */
-
-	union {
-		struct _PCI_HEADER_TYPE_0 {
-			ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
-			ULONG CIS;
-			USHORT SubVendorID;
-			USHORT SubSystemID;
-			ULONG ROMBaseAddress;
-			ULONG Reserved2[2];
-
-			UCHAR InterruptLine;	/*                    */
-			UCHAR InterruptPin;	/* (ro)               */
-			UCHAR MinimumGrant;	/* (ro)               */
-			UCHAR MaximumLatency;	/* (ro)               */
-		} type0;
-
-	} u;
-
-	UCHAR DeviceSpecific[192];
+    USHORT  VendorID;                   /* (ro)                 */
+    USHORT  DeviceID;                   /* (ro)                 */
+    USHORT  Command;                    /* Device control       */
+    USHORT  Status;
+    UCHAR   RevisionID;                 /* (ro)                 */
+    UCHAR   ProgIf;                     /* (ro)                 */
+    UCHAR   SubClass;                   /* (ro)                 */
+    UCHAR   BaseClass;                  /* (ro)                 */
+    UCHAR   CacheLineSize;              /* (ro+)                */
+    UCHAR   LatencyTimer;               /* (ro+)                */
+    UCHAR   HeaderType;                 /* (ro)                 */
+    UCHAR   BIST;                       /* Built in self test   */
+
+    union {
+        struct _PCI_HEADER_TYPE_0 {
+            ULONG   BaseAddresses[PCI_TYPE0_ADDRESSES];
+            ULONG   CIS;
+            USHORT  SubVendorID;
+            USHORT  SubSystemID;
+            ULONG   ROMBaseAddress;
+            ULONG   Reserved2[2];
+
+            UCHAR   InterruptLine;      /*                    */
+            UCHAR   InterruptPin;       /* (ro)               */
+            UCHAR   MinimumGrant;       /* (ro)               */
+            UCHAR   MaximumLatency;     /* (ro)               */
+        } type0;
+
+
+    } u;
+
+    UCHAR   DeviceSpecific[192];
 
 } PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
 #endif
-#endif				/* WINCE_HEADER */
+#endif /* WINCE_HEADER */
 
 #ifndef FIELD_OFFSET
 #define FIELD_OFFSET(type, field)    ((LONG)&(((type *)0)->field))
diff --git a/drivers/video/sis/vstruct.h b/drivers/video/sis/vstruct.h
index 29f86daf97e1..e903f420406f 100644
--- a/drivers/video/sis/vstruct.h
+++ b/drivers/video/sis/vstruct.h
@@ -2,13 +2,15 @@
 #define EXTERN
 #else
 #define EXTERN extern
-#endif				/* _INIT_ */
+#endif /* _INIT_ */
 
-typedef struct _SiS_PanelDelayTblStruct {
-	UCHAR timer[2];
+typedef struct _SiS_PanelDelayTblStruct
+{
+ UCHAR timer[2];
 } SiS_PanelDelayTblStruct;
 
-typedef struct _SiS_LCDDataStruct {
+typedef struct _SiS_LCDDataStruct
+{
 	USHORT RVBHCMAX;
 	USHORT RVBHCFACT;
 	USHORT VGAHT;
@@ -17,7 +19,8 @@ typedef struct _SiS_LCDDataStruct {
 	USHORT LCDVT;
 } SiS_LCDDataStruct;
 
-typedef struct _SiS_TVDataStruct {
+typedef struct _SiS_TVDataStruct
+{
 	USHORT RVBHCMAX;
 	USHORT RVBHCFACT;
 	USHORT VGAHT;
@@ -33,32 +36,38 @@ typedef struct _SiS_TVDataStruct {
 	UCHAR RY4COE;
 } SiS_TVDataStruct;
 
-typedef struct _SiS_LVDSDataStruct {
+typedef struct _SiS_LVDSDataStruct
+{
 	USHORT VGAHT;
 	USHORT VGAVT;
 	USHORT LCDHT;
 	USHORT LCDVT;
 } SiS_LVDSDataStruct;
 
-typedef struct _SiS_LVDSDesStruct {
+typedef struct _SiS_LVDSDesStruct
+{
 	USHORT LCDHDES;
 	USHORT LCDVDES;
 } SiS_LVDSDesStruct;
 
-typedef struct _SiS_LVDSCRT1DataStruct {
+typedef struct _SiS_LVDSCRT1DataStruct
+{
 	UCHAR CR[15];
 } SiS_LVDSCRT1DataStruct;
 
 /*add for LCDA*/
-typedef struct _SiS_LCDACRT1DataStruct {
+typedef struct _SiS_LCDACRT1DataStruct
+{
 	UCHAR CR[17];
 } SiS_LCDACRT1DataStruct;
 
-typedef struct _SiS_CHTVRegDataStruct {
-	UCHAR Reg[5];
+typedef struct _SiS_CHTVRegDataStruct
+{
+	UCHAR Reg[16];
 } SiS_CHTVRegDataStruct;
 
-typedef struct _SiS_StStruct {
+typedef struct _SiS_StStruct
+{
 	UCHAR St_ModeID;
 	USHORT St_ModeFlag;
 	UCHAR St_StTableIndex;
@@ -69,18 +78,20 @@ typedef struct _SiS_StStruct {
 	UCHAR VB_StTVYFilterIndex;
 } SiS_StStruct;
 
-typedef struct _SiS_VBModeStruct {
-	UCHAR ModeID;
-	UCHAR VB_TVDelayIndex;
-	UCHAR VB_TVFlickerIndex;
-	UCHAR VB_TVPhaseIndex;
-	UCHAR VB_TVYFilterIndex;
-	UCHAR VB_LCDDelayIndex;
-	UCHAR _VB_LCDHIndex;
-	UCHAR _VB_LCDVIndex;
+typedef struct _SiS_VBModeStruct
+{
+	UCHAR  ModeID;
+	UCHAR  VB_TVDelayIndex;
+	UCHAR  VB_TVFlickerIndex;
+	UCHAR  VB_TVPhaseIndex;
+	UCHAR  VB_TVYFilterIndex;
+	UCHAR  VB_LCDDelayIndex;
+	UCHAR  _VB_LCDHIndex;
+	UCHAR  _VB_LCDVIndex;
 } SiS_VBModeStruct;
 
-typedef struct _SiS_StandTableStruct {
+typedef struct _SiS_StandTableStruct
+{
 	UCHAR CRT_COLS;
 	UCHAR ROWS;
 	UCHAR CHAR_HEIGHT;
@@ -92,7 +103,8 @@ typedef struct _SiS_StandTableStruct {
 	UCHAR GRC[9];
 } SiS_StandTableStruct;
 
-typedef struct _SiS_ExtStruct {
+typedef struct _SiS_ExtStruct
+{
 	UCHAR Ext_ModeID;
 	USHORT Ext_ModeFlag;
 	USHORT Ext_ModeInfo;
@@ -106,65 +118,79 @@ typedef struct _SiS_ExtStruct {
 	UCHAR REFindex;
 } SiS_ExtStruct;
 
-typedef struct _SiS_Ext2Struct {
+typedef struct _SiS_Ext2Struct
+{
 	USHORT Ext_InfoFlag;
 	UCHAR Ext_CRT1CRTC;
 	UCHAR Ext_CRTVCLK;
 	UCHAR Ext_CRT2CRTC;
-	UCHAR ModeID;
+	UCHAR  ModeID;
 	USHORT XRes;
 	USHORT YRes;
 	USHORT ROM_OFFSET;
 } SiS_Ext2Struct;
 
-typedef struct _SiS_CRT1TableStruct {
+typedef struct _SiS_Part2PortTblStruct
+{
+ 	UCHAR CR[12];
+} SiS_Part2PortTblStruct;
+
+typedef struct _SiS_CRT1TableStruct
+{
 	UCHAR CR[17];
 } SiS_CRT1TableStruct;
 
-typedef struct _SiS_MCLKDataStruct {
-	UCHAR SR28, SR29, SR2A;
+typedef struct _SiS_MCLKDataStruct
+{
+	UCHAR SR28,SR29,SR2A;
 	USHORT CLOCK;
 } SiS_MCLKDataStruct;
 
-typedef struct _SiS_ECLKDataStruct {
-	UCHAR SR2E, SR2F, SR30;
+typedef struct _SiS_ECLKDataStruct
+{
+	UCHAR SR2E,SR2F,SR30;
 	USHORT CLOCK;
 } SiS_ECLKDataStruct;
 
-typedef struct _SiS_VCLKDataStruct {
-	UCHAR SR2B, SR2C;
+typedef struct _SiS_VCLKDataStruct
+{
+	UCHAR SR2B,SR2C;
 	USHORT CLOCK;
 } SiS_VCLKDataStruct;
 
-typedef struct _SiS_VBVCLKDataStruct {
-	UCHAR Part4_A, Part4_B;
+typedef struct _SiS_VBVCLKDataStruct
+{
+	UCHAR Part4_A,Part4_B;
 	USHORT CLOCK;
 } SiS_VBVCLKDataStruct;
 
-typedef struct _SiS_StResInfoStruct {
+typedef struct _SiS_StResInfoStruct
+{
 	USHORT HTotal;
 	USHORT VTotal;
 } SiS_StResInfoStruct;
 
-typedef struct _SiS_ModeResInfoStruct {
+typedef struct _SiS_ModeResInfoStruct
+{
 	USHORT HTotal;
 	USHORT VTotal;
-	UCHAR XChar;
-	UCHAR YChar;
+	UCHAR  XChar;
+	UCHAR  YChar;
 } SiS_ModeResInfoStruct;
 
 EXTERN SiS_StStruct *SiS_SModeIDTable;
 EXTERN SiS_StandTableStruct *SiS_StandTable;
-EXTERN SiS_ExtStruct *SiS_EModeIDTable;
-EXTERN SiS_Ext2Struct *SiS_RefIndex;
+EXTERN SiS_ExtStruct  *SiS_EModeIDTable;
+EXTERN SiS_Ext2Struct  *SiS_RefIndex;
 EXTERN SiS_VBModeStruct *SiS_VBModeIDTable;
-EXTERN SiS_CRT1TableStruct *SiS_CRT1Table;
-EXTERN SiS_MCLKDataStruct *SiS_MCLKData;
-EXTERN SiS_ECLKDataStruct *SiS_ECLKData;
-EXTERN SiS_VCLKDataStruct *SiS_VCLKData;
-EXTERN SiS_VBVCLKDataStruct *SiS_VBVCLKData;
-EXTERN SiS_StResInfoStruct *SiS_StResInfo;
-EXTERN SiS_ModeResInfoStruct *SiS_ModeResInfo;
+EXTERN SiS_CRT1TableStruct  *SiS_CRT1Table;
+EXTERN SiS_MCLKDataStruct  *SiS_MCLKData_0;
+EXTERN SiS_MCLKDataStruct  *SiS_MCLKData_1;
+EXTERN SiS_ECLKDataStruct  *SiS_ECLKData;
+EXTERN SiS_VCLKDataStruct  *SiS_VCLKData;
+EXTERN SiS_VBVCLKDataStruct  *SiS_VBVCLKData;
+EXTERN SiS_StResInfoStruct  *SiS_StResInfo;
+EXTERN SiS_ModeResInfoStruct  *SiS_ModeResInfo;
 EXTERN UCHAR *SiS_ScreenOffset;
 
 EXTERN UCHAR *pSiS_OutputSelect;
@@ -172,8 +198,8 @@ EXTERN UCHAR *pSiS_SoftSetting;
 EXTERN UCHAR *pSiS_SR07;
 
 typedef UCHAR DRAM4Type[4];
-EXTERN DRAM4Type *SiS_SR15;	/* pointer : point to array */
-EXTERN DRAM4Type *SiS_CR40;	/* pointer : point to array */
+EXTERN DRAM4Type *SiS_SR15; /* pointer : point to array */
+EXTERN DRAM4Type *SiS_CR40; /* pointer : point to array */
 EXTERN UCHAR *SiS_CR49;
 EXTERN UCHAR *SiS_SR25;
 
@@ -192,7 +218,7 @@ EXTERN UCHAR *pSiS_CRT2Data_4_10;
 EXTERN USHORT *pSiS_RGBSenseData;
 EXTERN USHORT *pSiS_VideoSenseData;
 EXTERN USHORT *pSiS_YCSenseData;
-EXTERN USHORT *pSiS_RGBSenseData2;	/*301b */
+EXTERN USHORT *pSiS_RGBSenseData2; /*301b*/
 EXTERN USHORT *pSiS_VideoSenseData2;
 EXTERN USHORT *pSiS_YCSenseData2;
 
@@ -202,21 +228,24 @@ EXTERN UCHAR *SiS_NTSCPhase2;
 EXTERN UCHAR *SiS_PALPhase2;
 EXTERN UCHAR *SiS_PALMPhase;
 EXTERN UCHAR *SiS_PALNPhase;
-EXTERN SiS_LCDDataStruct *SiS_StLCD1024x768Data;
-EXTERN SiS_LCDDataStruct *SiS_ExtLCD1024x768Data;
-EXTERN SiS_LCDDataStruct *SiS_St2LCD1024x768Data;
-EXTERN SiS_LCDDataStruct *SiS_StLCD1280x1024Data;
-EXTERN SiS_LCDDataStruct *SiS_ExtLCD1280x1024Data;
-EXTERN SiS_LCDDataStruct *SiS_St2LCD1280x1024Data;
-EXTERN SiS_LCDDataStruct *SiS_NoScaleData;
-EXTERN SiS_LCDDataStruct *SiS_LCD1280x960Data;
-EXTERN SiS_TVDataStruct *SiS_StPALData;
-EXTERN SiS_TVDataStruct *SiS_ExtPALData;
-EXTERN SiS_TVDataStruct *SiS_StNTSCData;
-EXTERN SiS_TVDataStruct *SiS_ExtNTSCData;
-EXTERN SiS_TVDataStruct *SiS_St1HiTVData;
-EXTERN SiS_TVDataStruct *SiS_St2HiTVData;
-EXTERN SiS_TVDataStruct *SiS_ExtHiTVData;
+EXTERN UCHAR *SiS_PALMPhase2;
+EXTERN UCHAR *SiS_PALNPhase2;
+EXTERN SiS_LCDDataStruct  *SiS_StLCD1024x768Data;
+EXTERN SiS_LCDDataStruct  *SiS_ExtLCD1024x768Data;
+EXTERN SiS_LCDDataStruct  *SiS_St2LCD1024x768Data;
+EXTERN SiS_LCDDataStruct  *SiS_StLCD1280x1024Data;
+EXTERN SiS_LCDDataStruct  *SiS_ExtLCD1280x1024Data;
+EXTERN SiS_LCDDataStruct  *SiS_St2LCD1280x1024Data;
+EXTERN SiS_LCDDataStruct  *SiS_NoScaleData1024x768;
+EXTERN SiS_LCDDataStruct  *SiS_NoScaleData1280x1024;
+EXTERN SiS_LCDDataStruct  *SiS_LCD1280x960Data;
+EXTERN SiS_TVDataStruct   *SiS_StPALData;
+EXTERN SiS_TVDataStruct   *SiS_ExtPALData;
+EXTERN SiS_TVDataStruct   *SiS_StNTSCData;
+EXTERN SiS_TVDataStruct   *SiS_ExtNTSCData;
+EXTERN SiS_TVDataStruct   *SiS_St1HiTVData;
+EXTERN SiS_TVDataStruct   *SiS_St2HiTVData;
+EXTERN SiS_TVDataStruct   *SiS_ExtHiTVData;
 EXTERN UCHAR *SiS_NTSCTiming;
 EXTERN UCHAR *SiS_PALTiming;
 EXTERN UCHAR *SiS_HiTVExtTiming;
@@ -228,91 +257,125 @@ EXTERN UCHAR *SiS_HiTVGroup3Simu;
 EXTERN UCHAR *SiS_HiTVGroup3Text;
 
 EXTERN SiS_PanelDelayTblStruct *SiS_PanelDelayTbl;
-EXTERN SiS_LVDSDataStruct *SiS_LVDS800x600Data_1;
-EXTERN SiS_LVDSDataStruct *SiS_LVDS800x600Data_2;
-EXTERN SiS_LVDSDataStruct *SiS_LVDS1024x768Data_1;
-EXTERN SiS_LVDSDataStruct *SiS_LVDS1024x768Data_2;
-EXTERN SiS_LVDSDataStruct *SiS_LVDS1280x1024Data_1;
-EXTERN SiS_LVDSDataStruct *SiS_LVDS1280x1024Data_2;
-EXTERN SiS_LVDSDataStruct *SiS_LVDS640x480Data_1;
-EXTERN SiS_LVDSDataStruct *SiS_CHTVUNTSCData;
-EXTERN SiS_LVDSDataStruct *SiS_CHTVONTSCData;
-EXTERN SiS_LVDSDataStruct *SiS_CHTVUPALData;
-EXTERN SiS_LVDSDataStruct *SiS_CHTVOPALData;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType00_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType01_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType02_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType03_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType04_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType05_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType06_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType07_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType08_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType09_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0a_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0b_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0c_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0d_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0e_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0f_1;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType00_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType01_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType02_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType03_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType04_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType05_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType06_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType07_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType08_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType09_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0a_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0b_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0c_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0d_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0e_2;
-EXTERN SiS_LVDSDesStruct *SiS_PanelType0f_2;
-/*301b*/
-EXTERN SiS_LVDSDesStruct *LVDS1024x768Des_1;
-EXTERN SiS_LVDSDesStruct *LVDS1280x1024Des_1;
-EXTERN SiS_LVDSDesStruct *LVDS1280x960Des_1;
-EXTERN SiS_LVDSDesStruct *LVDS1024x768Des_2;
-EXTERN SiS_LVDSDesStruct *LVDS1280x1024Des_2;
-EXTERN SiS_LVDSDesStruct *LVDS1280x960Des_2;
-/*end 301b*/
-EXTERN SiS_LVDSDesStruct *SiS_CHTVUNTSCDesData;
-EXTERN SiS_LVDSDesStruct *SiS_CHTVONTSCDesData;
-EXTERN SiS_LVDSDesStruct *SiS_CHTVUPALDesData;
-EXTERN SiS_LVDSDesStruct *SiS_CHTVOPALDesData;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1800x600_1;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x768_1;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x1024_1;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1800x600_1_H;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x768_1_H;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x1024_1_H;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1800x600_2;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x768_2;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x1024_2;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1800x600_2_H;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x768_2_H;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x1024_2_H;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1UNTSC;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1ONTSC;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1UPAL;
-EXTERN SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1OPAL;
-/*add for  LCDA*/
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT1800x600_1;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT11024x768_1;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT11280x1024_1;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT1800x600_1_H;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT11024x768_1_H;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT11280x1024_1_H;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT1800x600_2;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT11024x768_2;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT11280x1024_2;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT1800x600_2_H;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT11024x768_2_H;
-EXTERN SiS_LCDACRT1DataStruct *SiS_LCDACRT11280x1024_2_H;
-/*end 301b*/
+EXTERN SiS_PanelDelayTblStruct *SiS_PanelDelayTblLVDS;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS800x600Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS800x600Data_2;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1024x768Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1024x768Data_2;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1280x1024Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1280x1024Data_2;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1280x960Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1280x960Data_2;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1400x1050Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1400x1050Data_2;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1024x600Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1024x600Data_2;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1152x768Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS1152x768Data_2;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS640x480Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDS320x480Data_1;
+EXTERN SiS_LVDSDataStruct  *SiS_LVDSXXXxXXXData_1;
+EXTERN SiS_LVDSDataStruct  *SiS_CHTVUNTSCData;
+EXTERN SiS_LVDSDataStruct  *SiS_CHTVONTSCData;
+EXTERN SiS_LVDSDataStruct  *SiS_CHTVUPALData;
+EXTERN SiS_LVDSDataStruct  *SiS_CHTVOPALData;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType00_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType01_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType02_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType03_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType04_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType05_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType06_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType07_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType08_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType09_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0a_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0b_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0c_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0d_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0e_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0f_1;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType00_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType01_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType02_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType03_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType04_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType05_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType06_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType07_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType08_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType09_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0a_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0b_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0c_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0d_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0e_2;
+EXTERN SiS_LVDSDesStruct  *SiS_PanelType0f_2;
+
+EXTERN SiS_LVDSDesStruct  *LVDS1024x768Des_1;
+EXTERN SiS_LVDSDesStruct  *LVDS1280x1024Des_1;
+EXTERN SiS_LVDSDesStruct  *LVDS1280x960Des_1;
+EXTERN SiS_LVDSDesStruct  *LVDS1024x768Des_2;
+EXTERN SiS_LVDSDesStruct  *LVDS1280x1024Des_2;
+EXTERN SiS_LVDSDesStruct  *LVDS1280x960Des_2;
+
+EXTERN SiS_LVDSDesStruct  *SiS_CHTVUNTSCDesData;
+EXTERN SiS_LVDSDesStruct  *SiS_CHTVONTSCDesData;
+EXTERN SiS_LVDSDesStruct  *SiS_CHTVUPALDesData;
+EXTERN SiS_LVDSDesStruct  *SiS_CHTVOPALDesData;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_1;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_1;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_1;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_1;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_1;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_1;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_1_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_1_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_1_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_1_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_1_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_1_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_2;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_2;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_2;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_2;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_2;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_2;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1800x600_2_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x768_2_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11280x1024_2_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11400x1050_2_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11024x600_2_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT11152x768_2_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1XXXxXXX_1;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1XXXxXXX_1_H;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1UNTSC;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1ONTSC;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1UPAL;
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_CHTVCRT1OPAL;
+
+EXTERN SiS_LVDSCRT1DataStruct  *SiS_LVDSCRT1320x480_1;
+
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_1;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_1;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_1;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_1_H;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_1_H;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_1_H;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_2;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_2;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_2;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT1800x600_2_H;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11024x768_2_H;
+EXTERN SiS_LCDACRT1DataStruct  *SiS_LCDACRT11280x1024_2_H;
+
+/* TW: New from 650/301LV BIOS */
+EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_1;
+EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_1;
+EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_2;
+EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_2;
+EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_3;
+EXTERN SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_3;
 
 EXTERN SiS_CHTVRegDataStruct *SiS_CHTVReg_UNTSC;
 EXTERN SiS_CHTVRegDataStruct *SiS_CHTVReg_ONTSC;
@@ -322,3 +385,6 @@ EXTERN UCHAR *SiS_CHTVVCLKUNTSC;
 EXTERN UCHAR *SiS_CHTVVCLKONTSC;
 EXTERN UCHAR *SiS_CHTVVCLKUPAL;
 EXTERN UCHAR *SiS_CHTVVCLKOPAL;
+
+
+
diff --git a/drivers/video/sstfb.c b/drivers/video/sstfb.c
index 63972896a6e4..5051c4cbc357 100644
--- a/drivers/video/sstfb.c
+++ b/drivers/video/sstfb.c
@@ -1,7 +1,7 @@
 /*
  * linux/drivers/video/sstfb.c -- voodoo graphics frame buffer
  *
- *     Copyright (c) 2000,2001 Ghozlane Toumi <gtoumi@messel.emse.fr>
+ *     Copyright (c) 2000-2002 Ghozlane Toumi <gtoumi@laposte.net>
  *
  *     Created 15 Jan 2000 by Ghozlane Toumi
  *
@@ -9,11 +9,11 @@
  *
  * 03/2001 James Simmons   <jsimmons@linux-fbdev.org>
  * 04/2001 Paul Mundt      <lethal@chaoticdreams.org>
- * 05/2001 Urs Ganse       <urs.ganse@t-online.de>
- *     (initial work on voodoo2 port)
+ * 05/2001 Urs Ganse       <ursg@uni.de>
+ *     (initial work on voodoo2 port, interlace)
  *
  *
- * $Id: sstfb.c,v 1.26.4.1 2001/08/29 01:30:37 ghoz Exp $
+ * $Id: sstfb.c,v 1.37 2002/05/10 19:35:11 ghoz Exp $
  */
 
 /*
@@ -27,38 +27,22 @@
  * misc notes, TODOs, toASKs, and deep thoughts
 
 -TODO: at one time or another test that the mode is acceptable by the monitor
--ASK: I can choose different ordering for the color bitfields (rgba argb ...) 
-      wich one should i use ? is there any preferred one ? It seems ARGB is 
+-ASK: I can choose different ordering for the color bitfields (rgba argb ...)
+      wich one should i use ? is there any preferred one ? It seems ARGB is
       the one ...
 -ASK: later: how to cope with endianness ? the fbi chip has builtin functions
       to do byte swizling /swapping, maybe use that ...
--TODO: check the error paths . if something get wrong, the error doesn't seem 
-      to be very well handled...if handled at all.. not good. 
--ASK: ioremap ou ioremap_nocache ? : nocache is safe
+-TODO: check the error paths . if something get wrong, the error doesn't seem
+      to be very well handled...if handled at all.. not good.
 -TODO: in  set_var check the validity of timings (hsync vsync)...
--FIXME: I'm not sure i like all the functions with no parameters.. change them 
-        to use a sstfb_par or sstfb_info or something like that.
--TODO: check and recheck the use of sst_wait_idle : we dont flush the fifo via 
-       a nop command . so it's ok as long as the commands we pass don't go 
-       through the fifo. warning: issuing a nop command seems to need pci_fifo 
-       enabled
--ASK: the 24 bits mode is NOT packed . how do i differenciate from a packed mode ?
-      set a pseudo alpha value not used ?
--ASK: how does the 32 bpp work ? should i enable the pipeline so alpha values 
-      are used ?
--TODO: check how the voodoo graphics can cope with 24/32 bpp (engine is 16bpp 
-       only)
--ASK: Do i ioremap the complete area devoted to the lfb (4Mb), or check the 
-      real size, then unmap and remap to the real size of the lfb ? 
-      ... map all the area.
--FIXME: in case of failure in the init sequence, be sure we return to a safe 
+-TODO: check and recheck the use of sst_wait_idle : we dont flush the fifo via
+       a nop command . so it's ok as long as the commands we pass don't go
+       through the fifo. warning: issuing a nop command seems to need pci_fifo
+-FIXME: in case of failure in the init sequence, be sure we return to a safe
         state.
 -FIXME: 4MB boards have banked memory (FbiInit2 bits 1 & 20)
 -ASK: I stole "inverse" but seems it doesn't work... check what it realy does...
-Notes
 -TODO: change struct sst_info fb_info from static to array/dynamic
-  TTT comments is for code i've put there for debuging the "weird peinguin 
-  	syndrome", it should disapear soon
 
  *
  */
@@ -87,8 +71,8 @@ Notes
  *   		test disp  (0x46de) : draws a test motif
  */
 
-/* #define SST_DEBUG */
-#undef SST_DEBUG
+#define SST_DEBUG
+//#undef SST_DEBUG
 
 #define SST_DEBUG_REG   0
 #define SST_DEBUG_FUNC  0
@@ -119,6 +103,7 @@ Notes
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/version.h>
+#include <linux/slab.h>
 
 #include <asm/io.h>
 #include <asm/ioctl.h>
@@ -132,52 +117,11 @@ Notes
 
 #include "sstfb.h"
 
-/* void Dump_regs(void); */
-
-/* sst default init registers */
-#define FBIINIT0_DEFAULT EN_VGA_PASSTHROUGH
-
-#define FBIINIT1_DEFAULT 	\
-	(			\
-	  FAST_PCI_WRITES	\
-/*	  SLOW_PCI_WRITES*/	\
-	| VIDEO_RESET		\
-	| 10 << TILES_IN_X_SHIFT\
-	| SEL_SOURCE_VCLK_2X_SEL\
-	| EN_LFB_READ		\
-	)
-
-#define FBIINIT2_DEFAULT	\
-	(			\
-	 SWAP_DACVSYNC		\
-	| EN_DRAM_OE		\
-	| DRAM_REFRESH_16	\
-	| EN_DRAM_REFRESH	\
-	| EN_FAST_RAS_READ	\
-	| EN_RD_AHEAD_FIFO	\
-	| EN_FAST_RD_AHEAD_WR	\
-	)
-
-#define FBIINIT3_DEFAULT 	\
-	( DISABLE_TEXTURE )
-
-#define FBIINIT4_DEFAULT	\
-	(			\
-	  FAST_PCI_READS	\
-/*	  SLOW_PCI_READS*/	\
-	| LFB_READ_AHEAD	\
-	)
-/* Careful with this one : writing back the data just read will trash the DAC
-   reading some fields give logic value on pins, but setting this field will
-   set the source signal driving the pin. conclusion : just use the default
-   as a base before writing back .
-*/
-#define FBIINIT6_DEFAULT	(0x0)
+void __Dump_regs(struct sstfb_info *);
+#define Dump_regs __Dump_regs(sst_info)  //XXX
 
 /********/
 
-int num_sst; /* =0*/		/* number of initialized boards */
-
 /* initialized by setup */
 static int inverse; /* =0 */	/* invert colormap */
 static int vgapass; /* =0 */	/* enable Vga passthrough cable */
@@ -185,31 +129,17 @@ static int mem;     /* =0 */	/* mem size in Mb , 0 = autodetect */
 static int clipping = 1;	/* use clipping (slower, safer) */
 static int gfxclk;  /* =0 */	/* force FBI freq in Mhz . Dangerous */
 static int slowpci; /* =0 */	/* slow PCI settings */
-static int dev = -1;		/* specify device (0..n) */
-static char * mode_option ;
+static int dev = -2;		/* specify device (0..n) -2=all -1=none*/
 
+static char * mode_option ;
 
-#if defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB24) || defined(FBCON_HAS_CFB32)
-union {
-#  ifdef FBCON_HAS_CFB16
-	u16 cfb16[16];
-#  endif
-#ifdef EN_24_32_BPP
-#  if defined (FBCON_HAS_CFB24) || defined(FBCON_HAS_CFB32)
-	u32 cfb32[16];
-#  endif
-#endif
-	} fbcon_cmap;
-#endif
-static struct { u_int red, green, blue, transp; } palette[16];
-static struct sstfb_info fb_info;
-static struct display disp;
 
 /********/
 
-/* Interface to ze oueurld  */
 int sstfb_init(void);
 int sstfb_setup(char *options);
+static int __devinit sstfb_probe(struct pci_dev *pdev, const struct pci_device_id *id);
+static void __devexit sstfb_remove(struct pci_dev *pdev);
 
 
 /* Framebuffer API */
@@ -223,8 +153,8 @@ static int sstfb_set_var(struct fb_var_screeninfo *var,
                          int con, struct fb_info *info);
 static int sstfb_get_cmap(struct fb_cmap *cmap, int kspc,
                           int con, struct fb_info *info);
-static int sstfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-                           u_int transp, struct fb_info *info);
+static int sstfb_set_cmap(struct fb_cmap *cmap, int kspc,
+                          int con, struct fb_info *info);
 static int sstfb_pan_display(struct fb_var_screeninfo *var,
                              int con, struct fb_info *info);
 static int sstfb_ioctl(struct inode *inode, struct file *file,
@@ -234,10 +164,14 @@ static int sstfb_ioctl(struct inode *inode, struct file *file,
 /* Interface to the low level console driver */
 static int sstfbcon_switch(int con, struct fb_info *info);
 static int sstfbcon_updatevar(int con, struct fb_info *info);
+static void sstfbcon_blank(int blank, struct fb_info *info);
 
 /* Internal routines */
+static void sstfb_install_cmap(int con, struct fb_info *info);
 static int sstfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
                            u_int *transp, struct fb_info *info);
+static int sstfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
+                           u_int transp, struct fb_info *info);
 
 static int sstfb_set_par(const struct sstfb_par *par,
                           struct sstfb_info *sst_info);
@@ -255,21 +189,20 @@ static void sstfb_test32(struct sstfb_info *sst_info);
 #endif
 
 /* Low level routines */
-static int sst_get_memsize(u_long *memsize);
-static int sst_wait_idle(void);
-static int sst_detect_dactype(void);
-static int sst_detect_att(void);
-static int sst_detect_ti(void);
-static int sst_detect_ics(void);
+static int sst_get_memsize(struct sstfb_info *sst_info, u_long *memsize);
+static int __sst_wait_idle(u_long vbase);
+#define sst_wait_idle()	 __sst_wait_idle(sst_info->mmio.vbase)
+static int sst_detect_dactype(struct sstfb_info *sst_info);
+static int sst_detect_att(struct sstfb_info *sst_info);
+static int sst_detect_ti(struct sstfb_info *sst_info);
+static int sst_detect_ics(struct sstfb_info *sst_info);
 static int sst_calc_pll(const int freq, int *freq_out, struct pll_timing *t);
-static int sst_set_pll_att_ti(const struct pll_timing *t, const int clock);
-static int sst_set_pll_ics(const struct pll_timing *t, const int clock);
-static void sst_set_vidmod_att_ti(const int bpp);
-static void sst_set_vidmod_ics(const int bpp);
-static int sst_init(void);
-#ifdef MODULE
-static void sst_shutdown(void);
-#endif
+static int sst_set_pll_att_ti(struct sstfb_info *sst_info, const struct pll_timing *t, const int clock);
+static int sst_set_pll_ics(struct sstfb_info *sst_info, const struct pll_timing *t, const int clock);
+static void sst_set_vidmod_att_ti(struct sstfb_info *sst_info, const int bpp);
+static void sst_set_vidmod_ics(struct sstfb_info *sst_info, const int bpp);
+static int sst_init(struct sstfb_info *sst_info);
+static void sst_shutdown(struct sstfb_info *sst_info);
 
 static struct fb_ops sstfb_ops = {
 	owner : THIS_MODULE,
@@ -279,15 +212,42 @@ static struct fb_ops sstfb_ops = {
 	fb_get_var:	sstfb_get_var,
 	fb_set_var:	sstfb_set_var,
 	fb_get_cmap:	sstfb_get_cmap,
-	fb_set_cmap:	gen_set_cmap,
-	fb_setcolreg:	sstfb_setcolreg,
+	fb_set_cmap:	sstfb_set_cmap,
 	fb_pan_display:	sstfb_pan_display,
 	fb_ioctl:	sstfb_ioctl,
 };
 
-#ifndef DEFAULT_MODE
-#  define DEFAULT_MODE 0
-#endif
+enum {
+	ID_VOODOO1 = 0,
+	ID_VOODOO2 = 1,
+};
+
+#define IS_VOODOO2(info) ((info)->type == ID_VOODOO2 )
+
+static struct sst_spec voodoo_spec[] __devinitdata = {
+	{ name : "Voodoo Graphics",
+	default_gfx_clock : 50000,
+	max_gfxclk : 60, },
+	{ name : "Voodoo2",
+	default_gfx_clock : 75000,
+	max_gfxclk : 85, },
+};
+
+static struct pci_device_id sstfb_id_tbl[] __devinitdata = {
+	{ PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_VOODOO1 },
+	{ PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO2,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_VOODOO2 },
+	{ 0 },
+};
+
+static struct pci_driver sstfb_driver = {
+	name:		"sstfb",
+	id_table:	sstfb_id_tbl,
+	probe:          sstfb_probe,
+	remove:		__devexit_p(sstfb_remove),
+};
+
 static struct fb_var_screeninfo	sstfb_default =
 #if ( DEFAULT_MODE == 0 )
     { /* 800x600@60, 16 bpp .borowed from glide/sst1/include/sst1init.h */
@@ -322,7 +282,7 @@ static struct fb_var_screeninfo	sstfb_default =
     0, FB_VMODE_NONINTERLACED };
 #endif
 
-static struct dac_switch dacs[] = {
+static struct dac_switch dacs[] __devinitdata = {
 	{	name:		"TI TVP3409",
 		detect:		sst_detect_ti,
 		set_pll:	sst_set_pll_att_ti,
@@ -338,17 +298,6 @@ static struct dac_switch dacs[] = {
 		set_vidmod:	sst_set_vidmod_ics },
 };
 
-static struct sst_spec voodoo1_spec = {
-	name : "Voodoo Graphics",
-	default_gfx_clock : 50000,
-	max_gfxclk : 60,
-};
-
-static struct sst_spec voodoo2_spec = {
-	name : "Voodoo2",
-	default_gfx_clock : 75000,
-	max_gfxclk : 85,
-};
 
 /*
  *
@@ -380,8 +329,8 @@ static void sst_dbg_print_var(struct fb_var_screeninfo *var) {
 }
 #endif /* (SST_DEBUG_VAR > 0) */
 
+#if (SST_DEBUG_REG > 0)
 static void sst_dbg_print_read_reg (u32 reg, u32 val) {
-#if (SST_DEBUG_REG > 0) /* i need the init registers :) */
 	char * regname =NULL;
 	switch (reg) {
 	case FBIINIT0: regname="FbiInit0"; break;
@@ -389,17 +338,16 @@ static void sst_dbg_print_read_reg (u32 reg, u32 val) {
 	case FBIINIT2: regname="FbiInit2"; break;
 	case FBIINIT3: regname="FbiInit3"; break;
 	case FBIINIT4: regname="FbiInit4"; break;
+	case FBIINIT5: regname="FbiInit5"; break;
 	case FBIINIT6: regname="FbiInit6"; break;
 	}
 	if (regname == NULL)
 		r_ddprintk("sst_read(%#x): %#x\n", reg, val);
 	else
 		r_dprintk(" sst_read(%s): %#x\n", regname, val);
-#endif /*  (SST_DEBUG_REG > 0) */
 }
 
 static void sst_dbg_print_write_reg (u32 reg, u32 val) {
-#if (SST_DEBUG_REG > 0) /* i need the init registers :) */
 	char * regname = NULL;
 
 	switch (reg) {
@@ -408,157 +356,199 @@ static void sst_dbg_print_write_reg (u32 reg, u32 val) {
 	case FBIINIT2: regname="FbiInit2"; break;
 	case FBIINIT3: regname="FbiInit3"; break;
 	case FBIINIT4: regname="FbiInit4"; break;
+	case FBIINIT5: regname="FbiInit5"; break;
 	case FBIINIT6: regname="FbiInit6"; break;
 	}
 	if (regname == NULL)
 		r_ddprintk("sst_write(%#x, %#x)\n", reg, val);
 	else
 		r_dprintk(" sst_write(%s, %#x)\n", regname, val);
-#endif /*  (SST_DEBUG_REG > 0) */
 }
+#else /*  (SST_DEBUG_REG > 0) */
+#  define sst_dbg_print_read_reg(reg, val)	do {}while(0)
+#  define sst_dbg_print_write_reg(reg, val)	do {}while(0)
+#endif /*  (SST_DEBUG_REG > 0) */
 
 /* register access */
-static inline u32 sst_read(u32 reg)
+#define sst_read(reg)		__sst_read(sst_info->mmio.vbase, reg)
+#define sst_write(reg,val)	__sst_write(sst_info->mmio.vbase, reg, val)
+#define sst_set_bits(reg,val)	__sst_set_bits(sst_info->mmio.vbase, reg, val)
+#define sst_unset_bits(reg,val)	__sst_unset_bits(sst_info->mmio.vbase, reg, val)
+#define sst_dac_read(reg)	__sst_dac_read(sst_info->mmio.vbase, reg)
+#define sst_dac_write(reg,val)	__sst_dac_write(sst_info->mmio.vbase, reg, val)
+#define dac_i_read(reg)		__dac_i_read(sst_info->mmio.vbase, reg)
+#define dac_i_write(reg,val)	__dac_i_write(sst_info->mmio.vbase, reg, val)
+
+static inline u32 __sst_read(u_long vbase, u32 reg)
 {
 	u32 ret;
 
-	ret = readl(fb_info.mmio.vbase + reg);
+	ret = readl(vbase + reg);
 	sst_dbg_print_read_reg(reg, ret);
 	return ret;
 }
 
-static inline void sst_write(u32 reg, u32 val)
+static inline void __sst_write(u_long vbase, u32 reg, u32 val)
 {
 	sst_dbg_print_write_reg(reg, val);
-	writel(val, fb_info.mmio.vbase + reg);
+	writel(val, vbase + reg);
 }
 
-static inline void sst_set_bits(u32 reg, u32 val)
+static inline void __sst_set_bits(u_long vbase, u32 reg, u32 val)
 {
 	r_dprintk("sst_set_bits(%#x, %#x)\n", reg, val);
-	sst_write(reg, sst_read(reg) | val);
+	__sst_write(vbase, reg, __sst_read(vbase, reg) | val);
 }
 
-static inline void sst_unset_bits(u32 reg, u32 val)
+static inline void __sst_unset_bits(u_long vbase, u32 reg, u32 val)
 {
 	r_dprintk("sst_unset_bits(%#x, %#x)\n", reg, val);
-	sst_write(reg, sst_read(reg) & ~val);
+	__sst_write(vbase, reg, __sst_read(vbase, reg) & ~val);
 }
 
 /* dac access */
 /* dac_read should be remaped to FbiInit2 (via the pci reg init_enable) */
-static u8 sst_dac_read(u8 reg)
+static u8 __sst_dac_read(u_long vbase, u8 reg)
 {
 	u8 ret;
 
 #ifdef SST_DEBUG
 	if ((reg & 0x07) != reg) {
-		dprintk("bug line %d: register adress '%d' is to high\n",
+		dprintk("bug line %d: register adress '%d' is too high\n",
 		         __LINE__,reg);
 	}
 #endif
 	reg &= 0x07;
-	sst_write(DAC_DATA, ((u32)reg << 8) | DAC_READ_CMD );
-	sst_wait_idle();
+	__sst_write(vbase, DAC_DATA, ((u32)reg << 8) | DAC_READ_CMD );
+	__sst_wait_idle(vbase);
 	/*udelay(10);*/
-	ret=(sst_read(DAC_READ) & 0xff);
+	ret=(__sst_read(vbase, DAC_READ) & 0xff);
 	r_dprintk("sst_dac_read(%#x): %#x\n", reg, ret);
 	return (u8)ret;
 }
 
-static void sst_dac_write(u8 reg, u8 val)
+static void __sst_dac_write(u_long vbase, u8 reg, u8 val)
 {
 	r_dprintk("sst_dac_write(%#x, %#x)\n", reg, val);
 #ifdef SST_DEBUG
 	if ((reg & 0x07) != reg)
-		dprintk("bug line %d: register adress '%d' is to high\n",
+		dprintk("bug line %d: register adress '%d' is too high\n",
 		         __LINE__,reg);
 #endif
 	reg &= 0x07;
-	sst_write(DAC_DATA,(((u32)reg << 8)) | (u32)val);
+	__sst_write(vbase, DAC_DATA,(((u32)reg << 8)) | (u32)val);
 }
 
 /* indexed access to ti/att dacs */
-static inline u32 dac_i_read(u8 reg)
+static u32 __dac_i_read(u_long vbase, u8 reg)
 {
 	u32 ret;
 
-	sst_dac_write(DACREG_ADDR_I, reg);
-	ret = sst_dac_read(DACREG_DATA_I);
+	__sst_dac_write(vbase, DACREG_ADDR_I, reg);
+	ret = __sst_dac_read(vbase, DACREG_DATA_I);
 	r_dprintk("sst_dac_read_i(%#x): %#x\n", reg, ret);
 	return ret;
 }
-
-static inline void dac_i_write(u8 reg,u8 val)
+static void __dac_i_write(u_long vbase, u8 reg,u8 val)
 {
 	r_dprintk("sst_dac_write_i(%#x, %#x)\n", reg, val);
-	sst_dac_write(DACREG_ADDR_I, reg);
-	sst_dac_write(DACREG_DATA_I, val);
+	__sst_dac_write(vbase, DACREG_ADDR_I, reg);
+	__sst_dac_write(vbase, DACREG_DATA_I, val);
+}
+
+/*
+ *
+ *  Internal routines
+ *
+ */
+
+static void sstfb_install_cmap(int con, struct fb_info *info)
+{
+#define sst_info	((struct sstfb_info *) info)
+	f_dprintk("sstfb_install_cmap(con: %d)\n",con);
+	f_ddprintk("currcon: %d\n", sst_info->currcon);
+	if (con != sst_info->currcon)
+		return;
+	if (fb_display[con].cmap.len)
+		fb_set_cmap(&fb_display[con].cmap, 1, sstfb_setcolreg, info);
+	else
+		fb_set_cmap(
+			fb_default_cmap(1<<fb_display[con].var.bits_per_pixel),
+			1, sstfb_setcolreg, info);
+#undef sst_info
 }
 
 static int sstfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
                            u_int *transp, struct fb_info *info)
 {
-	f_ddprintk("sstfb_getcolreg\n");
+#define sst_info	((struct sstfb_info *) info)
+	f_dddprintk("sstfb_getcolreg\n");
 	if (regno >= 16) return 1;
 
-	*red    = palette[regno].red;
-	*green  = palette[regno].green;
-	*blue   = palette[regno].blue;
-	*transp = palette[regno].transp;
+	*red    = sst_info->palette[regno].red;
+	*green  = sst_info->palette[regno].green;
+	*blue   = sst_info->palette[regno].blue;
+	*transp = sst_info->palette[regno].transp;
 	f_dddprintk("%-2d rvba: %#x, %#x, %#x, %#x\n",
 	            regno,*red, *green, *blue, *transp);
 	return 0;
+#undef sst_info
 }
 
 static int sstfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
                            u_int transp, struct fb_info *info)
 {
+#define sst_info	((struct sstfb_info *) info)
 	u32 col;
+	struct display * disp;
 
-	f_ddprintk("sstfb_setcolreg\n");
+	f_dddprintk("sstfb_setcolreg\n");
 	f_dddprintk("%-2d rvba: %#x, %#x, %#x, %#x\n",
 	            regno, red, green, blue, transp);
 	if (regno >= 16) return 1;
-	palette[regno].red   = red;
-	palette[regno].green = green;
-	palette[regno].blue  = blue;
-
-	red    >>= (16 - disp.var.red.length);
-	green  >>= (16 - disp.var.green.length);
-	blue   >>= (16 - disp.var.blue.length);
-	transp >>= (16 - disp.var.transp.length);
-	col = (red << disp.var.red.offset)
-		| (green << disp.var.green.offset)
-		| (blue  << disp.var.blue.offset)
-		| (transp << disp.var.transp.offset);
-
-	switch(disp.var.bits_per_pixel) {
+
+	sst_info->palette[regno].red   = red;
+	sst_info->palette[regno].green = green;
+	sst_info->palette[regno].blue  = blue;
+	sst_info->palette[regno].transp= transp;
+
+	disp=&sst_info->disp;
+	red    >>= (16 - disp->var.red.length);
+	green  >>= (16 - disp->var.green.length);
+	blue   >>= (16 - disp->var.blue.length);
+	transp >>= (16 - disp->var.transp.length);
+	col = (red << disp->var.red.offset)
+	    | (green << disp->var.green.offset)
+	    | (blue  << disp->var.blue.offset)
+	    | (transp << disp->var.transp.offset);
+
+	switch(disp->var.bits_per_pixel) {
 #ifdef FBCON_HAS_CFB16
 	case 16:
-		fbcon_cmap.cfb16[regno]=(u16)col;
+		sst_info->fbcon_cmap.cfb16[regno]=(u16)col;
 		break;
 #endif
 #ifdef EN_24_32_BPP
 #ifdef FBCON_HAS_CFB24
 	case 24:
-		fbcon_cmap.cfb32[regno]=col;
+		sst_info->fbcon_cmap.cfb32[regno]=col;
 		break;
 #endif
 #ifdef FBCON_HAS_CFB32
 	case 32:
-		fbcon_cmap.cfb32[regno]=col;
+		sst_info->fbcon_cmap.cfb32[regno]=col;
 		break;
 #endif
 #endif
 	default:
 		eprintk("bug line %d: bad depth '%u'\n",__LINE__,
-			disp.var.bits_per_pixel);
+			disp->var.bits_per_pixel);
 		break;
 	}
 	f_dddprintk("bpp: %d . encoded color: %#x\n",
-	            disp.var.bits_per_pixel, col);
+	            disp->var.bits_per_pixel, col);
 	return 0;
+#undef sst_info
 }
 
 /* set par according to var ( checks var ) */
@@ -570,17 +560,7 @@ static int sstfb_decode_var (const struct fb_var_screeninfo *var,
 
 	f_dprintk("sstfb_decode_var\n");
 	/* Check var validity */
-	if ((var->xres > 1024) || (!var->xres) || (!var->xres)) {
-		eprintk ("Unsupported resolution %dx%d\n",
-		         var->xres, var->yres);
-		return -EINVAL;
-	}
-	if ((var->vmode & FB_VMODE_MASK) !=  FB_VMODE_NONINTERLACED) {
-		eprintk("Interlace non supported %#x\n",
-			(var->vmode & FB_VMODE_MASK));
-		return -EINVAL;
-	}
-
+	par->valid=0;
 
 	memset(par, 0, sizeof(par));
 	par->xDim       = var->xres;
@@ -592,6 +572,24 @@ static int sstfb_decode_var (const struct fb_var_screeninfo *var,
 	par->vSyncOff   = var->yres + var->lower_margin + var->upper_margin;
 	par->vBackPorch = var->upper_margin;
 
+	if(sst_calc_pll (PS2KHZ(var->pixclock), &par->freq, &par->pll)) {
+		eprintk("Pixclock %d out of range\n", var->pixclock);
+		return -EINVAL; //XXX
+	}
+
+	par->sync=var->sync & (FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT);
+
+	par->vmode=var->vmode & (FB_VMODE_INTERLACED | FB_VMODE_DOUBLE); 
+	/* in laced mode, vBackPorch should be even. odd -> funky display */
+	if (par->vmode & FB_VMODE_INTERLACED)
+		par->vBackPorch += (par->vBackPorch % 2);
+	if (par->vmode & FB_VMODE_DOUBLE) {
+		par->vBackPorch <<= 1;
+		par->yDim <<=1;
+		par->vSyncOn <<=1;
+		par->vSyncOff <<=1;
+	}
+
 	switch (var->bits_per_pixel) {
 	case 0 ... 16 :
 		par->bpp = 16;
@@ -610,7 +608,7 @@ static int sstfb_decode_var (const struct fb_var_screeninfo *var,
 		break;
 	}
 
-	if (sst_info->is_voodoo2) {
+	if (IS_VOODOO2(sst_info)) {
 		/* voodoo2 has 32 pixel wide tiles , BUT stange things
 		 happen with odd number of tiles */
 		par->tiles_in_X= (par->xDim + 63 ) / 64 * 2;
@@ -619,23 +617,68 @@ static int sstfb_decode_var (const struct fb_var_screeninfo *var,
 		par->tiles_in_X= (par->xDim + 63 ) / 64;
 	}
 
-	/*
-	 *  mem check
-	 */
+	/* validity tests */
+	if((par->xDim <= 1) || (par->yDim <= 0 )
+	   || (par->hSyncOn <= 1)
+	   || (par->hSyncOff <= 1)
+	   || (par->hBackPorch <= 2)
+	   || (par->vSyncOn <= 0)
+	   || (par->vSyncOff <= 0)
+	   || (par->vBackPorch <= 0)
+	   || (par->tiles_in_X <= 0)) {
+		return -EINVAL;
+	}
+	if (IS_VOODOO2(sst_info)) {
+		/* Voodoo 2 limits */
+		if(((par->xDim-1) >= POW2(11)) || (par->yDim >= POW2(11))) {
+			eprintk ("Unsupported resolution %dx%d\n",
+			         var->xres, var->yres);
+			return -EINVAL;
+		}
+		if (((par->hSyncOn-1) >= POW2(9))
+		   || ((par->hSyncOff-1) >= POW2(11))
+		   || ((par->hBackPorch-2) >= POW2(9))
+		   || (par->vSyncOn >= POW2(13))
+		   || (par->vSyncOff >= POW2(13))
+		   || (par->vBackPorch >= POW2(9))
+		   || (par->tiles_in_X >= POW2(6))) {
+			eprintk ("Unsupported Timing\n");
+			return -EINVAL;
+		}
+	} else {
+		/* Voodoo limits */
+		if (par->vmode) {
+			eprintk("Interlace/Doublescan not supported %#x\n",
+				par->vmode);
+			return -EINVAL;
+		}
+		if(((par->xDim-1) >= POW2(10)) || (par->yDim >= POW2(10))) {
+			eprintk ("Unsupported resolution %dx%d\n",
+			         var->xres, var->yres);
+			return -EINVAL;
+		}
+		if (((par->hSyncOn-1) >= POW2(8))
+		   || ((par->hSyncOff-1) >= POW2(10))
+		   || ((par->hBackPorch-2) >= POW2(8))
+		   || (par->vSyncOn >= POW2(12))
+		   || (par->vSyncOff >= POW2(12))
+		   || (par->vBackPorch >= POW2(8))
+		   || (par->tiles_in_X >= POW2(4))) {
+			eprintk ("Unsupported Timings\n");
+			return -EINVAL;
+		}
+	}
+
 	/* it seems that the fbi uses tiles of 64x16 pixels to "map" the mem*/
 	/* FIXME: i don't like this... looks wrong*/
-	real_length = par->tiles_in_X  * (sst_info->is_voodoo2 ? 32 : 64 )
+	real_length = par->tiles_in_X  * (IS_VOODOO2(sst_info) ? 32 : 64 )
 	              * ((par->bpp == 16) ? 2 : 4);
-/*shoud this function change var ? for instance with yvirt > yres  ?*/
 
-	if ((real_length * var->yres) > fb_info.video.len) {
+	if ((real_length * var->yres) > sst_info->video.len) {
 		eprintk ("Not enough video memory\n");
 		return -ENOMEM;
 	}
-
-	par->freq = PS2KHZ(var->pixclock);
-	
-	/* TODO add checks for timings */
+	par->valid=1;
 	return 0;
 }
 
@@ -651,7 +694,7 @@ static int sstfb_encode_var (struct fb_var_screeninfo *var,
 	var->xres_virtual   = par->xDim;
 	var->yres_virtual   = par->yDim;
 	var->bits_per_pixel = par->bpp;
-	/* {x|y}offset = 0 ; sync=0 */
+	/* {x|y}offset = 0 */
 	var->height         = -1;
 	var->width          = -1;
 	var->pixclock       = KHZ2PS(par->freq);
@@ -661,7 +704,15 @@ static int sstfb_encode_var (struct fb_var_screeninfo *var,
 	var->lower_margin   = par->vSyncOff - par->yDim - par->vBackPorch;
 	var->hsync_len      = par->hSyncOn;
 	var->vsync_len      = par->vSyncOn;
-	var->vmode          = FB_VMODE_NONINTERLACED;
+	var->sync           = par->sync;
+	var->vmode          = par->vmode;
+	if (var->vmode & FB_VMODE_DOUBLE) {
+		var->yres           >>=1;
+		var->yres_virtual   >>=1;
+		var->vsync_len      >>=1;
+		var->upper_margin   >>=1;
+		var->lower_margin   >>=1;
+	}
 
 	/*
 	 * correct the color bit fields
@@ -708,14 +759,12 @@ static int sstfb_encode_var (struct fb_var_screeninfo *var,
 static int sstfb_open(struct fb_info *info, int user)
 {
 	f_dprintk("sstfb_open(user: %d)\n",user);
-	MOD_INC_USE_COUNT;
 	return 0;
 }
 
 static int sstfb_release(struct fb_info *info, int user)
 {
 	f_dprintk("sstfb_release(user: %d)\n",user);
-	MOD_DEC_USE_COUNT;
 	return 0;
 }
 
@@ -728,7 +777,7 @@ static int sstfb_get_fix(struct fb_fix_screeninfo *fix,
 
 	f_dprintk("sstfb_get_fix(con: %d)\n",con);
 	if (con == -1)
-		var = &sstfb_default;
+		sstfb_encode_var(var, &sst_info->current_par, sst_info);
 	else
 		var = &fb_display[con].var;
 
@@ -751,21 +800,23 @@ static int sstfb_get_fix(struct fb_fix_screeninfo *fix,
 static int sstfb_get_var(struct fb_var_screeninfo *var,
                          int con, struct fb_info *info)
 {
+#define sst_info	((struct sstfb_info *) info)
 	f_dprintk("sstfb_get_var(con: %d)\n",con);
 	if (con == -1)
-		*var = sstfb_default;
+		sstfb_encode_var(var, &sst_info->current_par, sst_info);
 	else
 		*var = fb_display[con].var;
 	print_var(var, "var");
 	return 0;
+#undef sst_info
  }
 
 static int sstfb_set_var(struct fb_var_screeninfo *var,
                          int con, struct fb_info *info)
 {
-#define sst_info	((struct sstfb_info *) info)	
+#define sst_info	((struct sstfb_info *) info)
 
-	struct sstfb_par par;	
+	struct sstfb_par par;
 	struct display *display;
 	int err;
 	int old_bpp,old_xres,old_yres;
@@ -776,15 +827,14 @@ static int sstfb_set_var(struct fb_var_screeninfo *var,
 		 var->xres,var->yres,var->xres_virtual,var->yres_virtual,
 		 var->bits_per_pixel,var->activate);
 	if (con < 0)
-		display = &disp;
+		display = &sst_info->disp;
 	else
 		display = &fb_display[con];
 
-	err = sstfb_decode_var(var, &par, sst_info);
-	if (err)
+	if ((err = sstfb_decode_var(var, &par, sst_info)))
 		return err;
 	sstfb_encode_var (var, &par, sst_info);
-	
+
 	switch (var->activate & FB_ACTIVATE_MASK) {
 		case FB_ACTIVATE_TEST:
 			return 0;
@@ -802,7 +852,7 @@ static int sstfb_set_var(struct fb_var_screeninfo *var,
 	if ((old_xres != var->xres) || (old_yres != var->yres)
 	    || (old_bpp != var->bits_per_pixel)) {
 		/* 2-3  lignes redondantes avec get_fix */
-		info->screen_base = (char *) sst_info->video.vbase;
+		display->screen_base = (char *) sst_info->video.vbase;
 		display->visual = FB_VISUAL_TRUECOLOR;
 		display->type = FB_TYPE_PACKED_PIXELS;
 		display->type_aux = 0;
@@ -814,7 +864,7 @@ static int sstfb_set_var(struct fb_var_screeninfo *var,
 #ifdef FBCON_HAS_CFB16
 		case 16:
 			display->dispsw = &fbcon_cfb16;
-			display->dispsw_data = fbcon_cmap.cfb16;
+			display->dispsw_data = sst_info->fbcon_cmap.cfb16;
 			break;
 #endif
 #ifdef EN_24_32_BPP
@@ -822,7 +872,7 @@ static int sstfb_set_var(struct fb_var_screeninfo *var,
 		case 24: /*24bpp non packed <=> 32 bpp */
 		case 32:
 			display->dispsw = &fbcon_cfb32;
-			display->dispsw_data = fbcon_cmap.cfb32;
+			display->dispsw_data = sst_info->fbcon_cmap.cfb32;
 			break;
 #endif
 #endif
@@ -840,7 +890,7 @@ static int sstfb_set_var(struct fb_var_screeninfo *var,
 		}
 	}
 
-	if ((con <0) || (con==info->currcon)) {
+	if ((con == -1) || (con==sst_info->currcon)) {
 		sstfb_set_par (&par, sst_info);
 	}
 	print_var(var, "var");
@@ -849,22 +899,48 @@ static int sstfb_set_var(struct fb_var_screeninfo *var,
 	if (old_bpp != var->bits_per_pixel) {
 	    if ((err = fb_alloc_cmap(&display->cmap, 0, 0)))
 		return err;
-	    do_install_cmap(con, info);
+	    sstfb_install_cmap(con, info);
 	}
 
 	return 0;
 #undef sst_info
 }
 
+
+static int sstfb_set_cmap(struct fb_cmap *cmap, int kspc,
+                          int con, struct fb_info *info)
+{
+#define sst_info	((struct sstfb_info *) info)
+	struct display *d = (con<0) ? info->disp : fb_display + con;
+
+	f_dprintk("sstfb_set_cmap\n");
+	f_ddprintk("con: %d, currcon: %d, d->cmap.len %d\n",
+		 con, sst_info->currcon, d->cmap.len);
+
+	if (d->cmap.len != 16 ) {	/* or test if cmap.len == 0 ? */
+		int err;
+		err = fb_alloc_cmap(&d->cmap, 16, 0); /* cmap size=16 */
+		if (err) return err;
+	}
+	if (con == sst_info->currcon) {
+		return fb_set_cmap(cmap, kspc, sstfb_setcolreg, info);
+	} else {
+		fb_copy_cmap(cmap, &d->cmap, kspc ? 0 : 1);
+	}
+	return 0;
+#undef sst_info
+}
+
 static int sstfb_get_cmap(struct fb_cmap *cmap, int kspc,
                           int con, struct fb_info *info)
 {
+#define sst_info	((struct sstfb_info *) info)
 	f_dprintk("sstfb_get_cmap\n");
 	f_ddprintk("con %d, curcon %d, cmap.len %d\n",
-		 con, info->currcon, fb_display[con].cmap.len);
+		 con, sst_info->currcon, fb_display[con].cmap.len);
 
 	/* FIXME: check if con = -1 ? cf sstfb_set_cmap...  */
-	if (con == info->currcon)
+	if (con == sst_info->currcon)
 		return fb_get_cmap(cmap, kspc, sstfb_getcolreg, info);
 	else if (fb_display[con].cmap.len)
 		fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
@@ -873,6 +949,7 @@ static int sstfb_get_cmap(struct fb_cmap *cmap, int kspc,
 			fb_default_cmap(1<<fb_display[con].var.bits_per_pixel),
 			cmap, kspc ? 0 : 2);
 	return 0;
+#undef sst_info
 }
 
 /* TODO */
@@ -887,7 +964,7 @@ static int sstfb_ioctl(struct inode *inode, struct file *file,
                        u_int cmd, u_long arg, int con,
                        struct fb_info *info)
 {
-#define sst_info	((struct sstfb_info *) info)	
+#define sst_info	((struct sstfb_info *) info)
 #if (SST_DEBUG_IOCTL >0)
 	int i;
 	u_long p;
@@ -934,10 +1011,10 @@ static int sstfb_ioctl(struct inode *inode, struct file *file,
 		return 0;
 	case _IO('F', 0xde):		/* 0x46de */
 		f_dprintk("test color display\n");
-		f_ddprintk("currcon: %d, bpp %d\n",
-			  info->currcon, fb_display[currcon].var.bits_per_pixel);
+		f_ddprintk("currcon: %d, bpp %d\n", sst_info->currcon,
+			  sst_info->current_par.bpp);
 		memset_io(sst_info->video.vbase, 0, sst_info->video.len);
-	switch (fb_display[info->currcon].var.bits_per_pixel) {
+	switch (sst_info->current_par.bpp) {
 /* FIXME broken : if we call this ioctl from a tty not bound to the fb, we use its depth and not the current one ... */
 	       	case 16:
 			sstfb_test16(sst_info);
@@ -950,9 +1027,12 @@ static int sstfb_ioctl(struct inode *inode, struct file *file,
 #  endif
 		default:
 			dprintk("bug line %d: bad depth '%u'\n", __LINE__,
-			        fb_display[info->currcon].var.bits_per_pixel);
+			        sst_info->current_par.bpp);
 			}
 		return 0;
+	case _IO('F', 0xdf):		/* 0x46db */
+		Dump_regs;
+		return 0;
 	}
 #endif /* (SST_DEBUG_IOCTL >0) */
 	return -EINVAL;
@@ -966,9 +1046,9 @@ static int sstfb_ioctl(struct inode *inode, struct file *file,
 
 /* get lfb size */
 
-static int sst_get_memsize(u_long *memsize)
+static int __devinit sst_get_memsize(struct sstfb_info *sst_info, u_long *memsize)
 {
-	u32 fbbase_virt = fb_info.video.vbase;
+	u_long fbbase_virt = sst_info->video.vbase;
 	f_dprintk("sst_get_memsize\n");
 
 	/* force memsize */
@@ -1011,13 +1091,13 @@ static int sst_get_memsize(u_long *memsize)
  * in a row a "idle" answer to our requests
  */
 
-static int sst_wait_idle(void)
+static int __sst_wait_idle(u_long vbase)
 {
 	int count = 0;
 
 	f_ddprintk("sst_wait_idle\n");
 	while(1) {
-		if (sst_read(STATUS) & STATUS_FBI_BUSY) {
+		if (__sst_read(vbase, STATUS) & STATUS_FBI_BUSY) {
 			f_dddprintk("status: busy\n");
 /* FIXME basicaly, this is a busy wait. maybe not that good. oh well; this is a small loop after all ...*/
 			count = 0;
@@ -1026,6 +1106,7 @@ static int sst_wait_idle(void)
 			f_dddprintk("status: idle(%d)\n", count);
 		}
 		if (count >= 5) return 1;
+//XXX  do something to avoid hanging the machine if the voodoo is out
 	}
 }
 
@@ -1035,25 +1116,25 @@ static int sst_wait_idle(void)
  * dram refresh disabled, FbiInit remaped.
  * TODO: mmh.. maybe i shoud put the "prerequisite" in the func ...
  */
-static int __init sst_detect_dactype(void)
+static int __devinit sst_detect_dactype(struct sstfb_info * sst_info)
 {
 	int ret=0,i;
 	f_dprintk("sst_detect_dactype\n");
 	for (i=0; i< sizeof(dacs)/sizeof(dacs[0]) ; i++) {
-		ret = dacs[i].detect();
+		ret = dacs[i].detect(sst_info);
 		if (ret) break;
 	}
 	if (!ret)
 		return 0;
 	f_dprintk("found %s\n", dacs[i].name);
-	fb_info.dac_sw=&dacs[i];
+	sst_info->dac_sw=dacs[i];
 	return 1;
 }
 
 /* fbi should be idle, and fifo emty and mem disabled */
 /* supposed to detect AT&T ATT20C409 and Ti TVP3409 ramdacs */
 
-static int __init (sst_detect_att(void))
+static int __devinit sst_detect_att(struct sstfb_info * sst_info)
 {
 	int i, mir, dir;
 
@@ -1078,7 +1159,7 @@ static int __init (sst_detect_att(void))
 	return 0;
 }
 
-static int __init (sst_detect_ti(void))
+static int __devinit sst_detect_ti(struct sstfb_info * sst_info)
 {
 	int i, mir, dir;
 
@@ -1114,7 +1195,7 @@ static int __init (sst_detect_ti(void))
  * touched...
  * is it realy safe ? how can i reset this ramdac ? geee...
  */
-static int __init sst_detect_ics(void)
+static int __devinit sst_detect_ics(struct sstfb_info * sst_info)
 {
 	int i;
 	int m_clk0_1, m_clk0_7, m_clk1_b;
@@ -1200,7 +1281,7 @@ static int sst_calc_pll(const int freq, int *freq_out, struct pll_timing *t)
  * see detect_dac
  */
 
-static int sst_set_pll_att_ti(const struct pll_timing *t, const int clock)
+static int sst_set_pll_att_ti(struct sstfb_info * sst_info, const struct pll_timing *t, const int clock)
 {
 	u8 cr0, cc;
 	f_dprintk("sst_set_pll_att_ti\n");
@@ -1254,7 +1335,7 @@ static int sst_set_pll_att_ti(const struct pll_timing *t, const int clock)
 	return 1;
 }
 
-static int sst_set_pll_ics(const struct pll_timing *t, const int clock)
+static int sst_set_pll_ics(struct sstfb_info * sst_info, const struct pll_timing *t, const int clock)
 {
 	u8 pll_ctrl;
 
@@ -1294,11 +1375,9 @@ static int sst_set_pll_ics(const struct pll_timing *t, const int clock)
 
 static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_info)
 {
-	u32 lfbmode, fbiinit1, fbiinit2, fbiinit3, fbiinit6=0;
+	u32 lfbmode, fbiinit1, fbiinit2, fbiinit3, fbiinit5, fbiinit6=0;
 	int ntiles;
-	struct pll_timing pll;
-	int fout;
-	struct pci_dev  * sst_dev = sst_info->dev;
+	struct pci_dev * sst_dev = sst_info->dev;
 
 	f_dprintk("sst_set_par(%dx%d)\n", par->xDim, par->yDim);
 	f_ddprintk("hSyncOn hSyncOff vSyncOn vSyncOff\n");
@@ -1310,9 +1389,10 @@ static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_i
 	           par->hBackPorch, par->vBackPorch,
 	           par->xDim, par->yDim, par->freq);
 
-
-	sst_calc_pll (par->freq, &fout, &pll);
-
+	if (!par->valid) {
+		BUG();
+		return -1;
+	}
 	sst_write(NOPCMD, 0);
 	sst_wait_idle();
 	pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, PCI_EN_INIT_WR);
@@ -1323,10 +1403,10 @@ static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_i
 
 	/*sst_unset_bits (FBIINIT0, FBI_RESET); / reenable FBI ? */
 
-	sst_write(BACKPORCH,       par->vBackPorch << 16 | (par->hBackPorch-2));
-	sst_write(VIDEODIMENSIONS, (par->yDim - 1) << 16 | (par->xDim - 1));
-	sst_write(HSYNC,         (par->hSyncOff-1) << 16 | (par->hSyncOn-1));
-	sst_write(VSYNC,             par->vSyncOff << 16 | par->vSyncOn);
+	sst_write(BACKPORCH, par->vBackPorch << 16 | (par->hBackPorch - 2));
+	sst_write(VIDEODIMENSIONS, par->yDim << 16 | (par->xDim - 1));
+	sst_write(HSYNC, (par->hSyncOff - 1) << 16 | (par->hSyncOn - 1));
+	sst_write(VSYNC,       par->vSyncOff << 16 | par->vSyncOn);
 
 	fbiinit2=sst_read(FBIINIT2);
 	fbiinit3=sst_read(FBIINIT3);
@@ -1335,12 +1415,15 @@ static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_i
 	pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
 	                       PCI_EN_INIT_WR | PCI_REMAP_DAC );
 
-	sst_info->dac_sw->set_vidmod(par->bpp);
+	sst_info->dac_sw.set_vidmod(sst_info, par->bpp);
+
 	/* set video clock */
-	sst_info->dac_sw->set_pll(&pll, VID_CLOCK);
+	sst_info->dac_sw.set_pll(sst_info, &par->pll, VID_CLOCK);
+
 	/* disable fbiinit2/3 remap */
 	pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
 	                       PCI_EN_INIT_WR);
+
 	/* restore fbiinit2/3 */
 	sst_write(FBIINIT2,fbiinit2);
 	sst_write(FBIINIT3,fbiinit3);
@@ -1363,7 +1446,7 @@ static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_i
 */
 
 	ntiles = par->tiles_in_X;
-	if (sst_info->is_voodoo2) {
+	if (IS_VOODOO2(sst_info)) {
 		fbiinit1 |= ((ntiles & 0x20) >> 5) << TILES_IN_X_MSB_SHIFT
 		            | ((ntiles & 0x1e) >> 1) << TILES_IN_X_SHIFT ;
 /* as the only value of importance for us in fbiinit6 is tiles in X (lsb),
@@ -1393,8 +1476,19 @@ static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_i
 		break;
 	}
 	sst_write(FBIINIT1, fbiinit1);
-	if (sst_info->is_voodoo2)
+	if (IS_VOODOO2(sst_info)) {
 		sst_write(FBIINIT6, fbiinit6);
+		fbiinit5=sst_read(FBIINIT5) & FBIINIT5_MASK ;
+		if (par->vmode & FB_VMODE_INTERLACED)
+			fbiinit5 |= INTERLACE;
+		if (par->vmode & FB_VMODE_DOUBLE )
+			fbiinit5 |= VDOUBLESCAN;
+		if (par->sync & FB_SYNC_HOR_HIGH_ACT)
+			fbiinit5 |= HSYNC_HIGH;
+		if (par->sync & FB_SYNC_VERT_HIGH_ACT)
+			fbiinit5 |= VSYNC_HIGH;
+		sst_write(FBIINIT5, fbiinit5);
+	}
 	sst_wait_idle();
 	sst_unset_bits(FBIINIT1, VIDEO_RESET);
 	sst_unset_bits(FBIINIT0, FBI_RESET | FIFO_RESET);
@@ -1437,9 +1531,6 @@ static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_i
 		f_ddprintk("setting clipping dimensions 0..%d, 0..%d\n",
 		            par->xDim-1, par->yDim-1);
 
-/* warning the fields are 9bits wide on voodoo1 , 11 (or 10) on voodoo2,
-   make sure we check the values before playing with the registers.. */
-
 		sst_write(CLIP_LEFT_RIGHT, par->xDim );
 		sst_write(CLIP_LOWY_HIGHY, par->yDim );
 		sst_set_bits(FBZMODE, EN_CLIPPING | EN_RGB_WRITE);
@@ -1452,7 +1543,7 @@ static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_i
 	return 1;
 }
 
-static void sst_set_vidmod_att_ti(const int bpp)
+static void sst_set_vidmod_att_ti(struct sstfb_info * sst_info, const int bpp)
 {
 	u8 cr0;
 
@@ -1488,7 +1579,7 @@ static void sst_set_vidmod_att_ti(const int bpp)
 	}
 }
 
-static void sst_set_vidmod_ics(const int bpp)
+static void sst_set_vidmod_ics(struct sstfb_info * sst_info, const int bpp)
 {
 	f_dprintk("sst_set_vidmod_ics(bpp: %d)\n", bpp);
 	switch(bpp) {
@@ -1507,14 +1598,18 @@ static void sst_set_vidmod_ics(const int bpp)
 	}
 }
 
-static int __init sst_init(void)
+static int __devinit sst_init(struct sstfb_info *sst_info)
 {
 	struct pll_timing gfx_timings;
+	struct sst_spec * spec;
+	struct pci_dev * sst_dev = sst_info->dev;
 	int Fout;
-	int dac_ok;
 	u32 fbiinit0, fbiinit1, fbiinit4;
-	struct pci_dev * sst_dev = fb_info.dev; /* or define a macro ?*/
 
+	dprintk("sst_init\n"); //XXX
+	Dump_regs; //XXX
+
+	spec = &voodoo_spec[sst_info->type];
 	f_dprintk("sst_init\n");
 	f_ddprintk(" fbiinit0   fbiinit1   fbiinit2   fbiinit3   fbiinit4  "
 	           " fbiinit6\n");
@@ -1547,25 +1642,24 @@ static int __init sst_init(void)
 	pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
 	                               PCI_EN_INIT_WR | PCI_REMAP_DAC );
 	/* detect dac type */
-	dac_ok = sst_detect_dactype();
-	if (!dac_ok) {
+	if (!sst_detect_dactype(sst_info)) {
 		eprintk("Unknown dac type\n");
+		//FIXME watch it : we are not in a safe state , bad bad bad .
 		return 0;
 	}
 
 	/* set graphic clock */
-	if (dac_ok) {
-		fb_info.gfx_clock = fb_info.spec->default_gfx_clock;
-		if ((gfxclk >10 ) && (gfxclk < fb_info.spec->max_gfxclk)) {
-			iprintk ("Using supplied graphic freq : %dMHz\n", gfxclk);
-			 fb_info.gfx_clock = gfxclk *1000;
-		} else if (gfxclk) {
-			wprintk ("You fool, %dMhz is way out of spec! Using default\n", gfxclk);
-		}
-
-		sst_calc_pll(fb_info.gfx_clock, &Fout, &gfx_timings);
-		fb_info.dac_sw->set_pll(&gfx_timings, GFX_CLOCK);
+	sst_info->gfx_clock = spec->default_gfx_clock;
+	if ((gfxclk >10 ) && (gfxclk < spec->max_gfxclk)) {
+		iprintk ("Using supplied graphic freq : %dMHz\n", gfxclk);
+		 sst_info->gfx_clock = gfxclk *1000;
+	} else if (gfxclk) {
+		wprintk ("You fool, %dMhz is way out of spec! Using default\n", gfxclk);
 	}
+
+	sst_calc_pll(sst_info->gfx_clock, &Fout, &gfx_timings);
+	sst_info->dac_sw.set_pll(sst_info, &gfx_timings, GFX_CLOCK);
+
 	/* disable fbiinit remap */
 	pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
 	                       PCI_EN_INIT_WR| PCI_EN_FIFO_WR );
@@ -1595,7 +1689,7 @@ static int __init sst_init(void)
 	sst_wait_idle();
 	sst_write(FBIINIT4, fbiinit4);
 	sst_wait_idle();
-	if (fb_info.is_voodoo2) {
+	if (IS_VOODOO2(sst_info)) {
 		sst_write(FBIINIT6, FBIINIT6_DEFAULT);
 		sst_wait_idle();
 	}
@@ -1603,16 +1697,14 @@ static int __init sst_init(void)
 	pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, PCI_EN_FIFO_WR );
 	pci_write_config_dword(sst_dev, PCI_VCLK_ENABLE, 0);
 
-	return dac_ok;
+	return 1;
 }
 
-#ifdef MODULE
-
-static void  __exit sst_shutdown(void)
+static void  __devexit sst_shutdown(struct sstfb_info *sst_info)
 {
+	struct pci_dev * sst_dev = sst_info->dev;
 	struct pll_timing gfx_timings;
 	int Fout;
-	struct pci_dev * sst_dev = fb_info.dev;
 
 	f_dprintk("sst_shutdown\n");
 	/* reset video, gfx, fifo, disable dram + remap fbiinit2/3 */
@@ -1625,7 +1717,7 @@ static void  __exit sst_shutdown(void)
 	                       PCI_EN_INIT_WR | PCI_REMAP_DAC );
 	/*set 20Mhz gfx clock */
 	sst_calc_pll(20000, &Fout, &gfx_timings);
-	fb_info.dac_sw->set_pll(&gfx_timings, GFX_CLOCK);
+	sst_info->dac_sw.set_pll(sst_info, &gfx_timings, GFX_CLOCK);
 	/* TODO maybe shutdown the dac, vrefresh and so on... */
 	pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
 	                       PCI_EN_INIT_WR);
@@ -1635,7 +1727,6 @@ static void  __exit sst_shutdown(void)
 	pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, 0);
 
 }
-#endif /* MODULE */
 
 /*
  * Interface to the world
@@ -1683,116 +1774,172 @@ int  __init sstfb_setup(char *options)
 	return 0;
 }
 
-int __init sstfb_init(void)
+int __devinit sstfb_init(void)
 {
-	struct pci_dev * pdev;
-	struct fb_var_screeninfo var;
-#define sst_dev	(fb_info.dev)
 	f_dprintk("sstfb_init\n");
 	dprintk("Compile date: "__DATE__" "__TIME__"\n");
+	return pci_module_init(&sstfb_driver);
+}
 
-	memset (&fb_info, 0, sizeof(fb_info));
-	pci_for_each_dev(pdev) {
-		if (pdev->vendor != PCI_VENDOR_ID_3DFX) continue;
-		if (pdev->device == PCI_DEVICE_ID_3DFX_VOODOO) {
-			fb_info.is_voodoo2=0;
-			fb_info.spec=&voodoo1_spec;
-		}
-		else if (pdev->device == PCI_DEVICE_ID_3DFX_VOODOO2) {
-			fb_info.is_voodoo2=1;
-			fb_info.spec=&voodoo2_spec;
-		}
-		else
-			continue;
-		if (dev > 0) {
-			dev--;
-			continue;
-		}
-		f_ddprintk("found device : %s\n", fb_info.spec->name);
-		fb_info.dev = pdev;
-		fb_info.mmio.base = sst_dev->resource[0].start;
-		pci_read_config_byte(sst_dev,
-		                     PCI_REVISION_ID, &fb_info.revision);
-
-		fb_info.mmio.vbase = (u32) ioremap_nocache(fb_info.mmio.base, 0x400000);
-		if (!fb_info.mmio.vbase) {
-			eprintk("cannot remap register area %#lx\n",
-			        fb_info.mmio.base);
-			return -ENXIO;
-		}
-		fb_info.video.base = fb_info.mmio.base+0x400000;
-		fb_info.video.vbase = (u32) ioremap_nocache(fb_info.video.base,
-					            0x400000);
-		if (!fb_info.video.vbase) {
-			eprintk("cannot remap framebuffer %#lx\n",
-			        fb_info.video.base);
-			iounmap((void*) fb_info.mmio.vbase);
-			return -ENXIO;
-		}
-		if(!sst_init()) {
-			eprintk("Init failed\n");
-			iounmap((void*)fb_info.mmio.vbase);
-			iounmap((void*)fb_info.video.vbase);
-			return -ENXIO;
-		}
-		sst_get_memsize(&fb_info.video.len);
-		fb_info.configured = 1;
-		strncpy(fb_info.info.modename, fb_info.spec->name, 16);
-
-		iprintk("%s with %s dac\n", fb_info.info.modename, fb_info.dac_sw->name);
-		iprintk("framebuffer at %#lx, mapped to %#lx,"
-		        " size %ldMb\n",
-		        fb_info.video.base, fb_info.video.vbase,
-		        fb_info.video.len >> 20);
-
-		f_ddprintk("revision: %d\n", fb_info.revision);
-		f_ddprintk("regbase_virt: %#lx\n", fb_info.mmio.vbase);
-		f_ddprintk("membase_phys: %#lx\n", fb_info.video.base);
-		f_ddprintk("fbbase_virt: %#lx\n", fb_info.video.vbase);
-
-		fb_info.info.node       = NODEV;
-		fb_info.info.flags      = FBINFO_FLAG_DEFAULT;
-		fb_info.info.fbops      = &sstfb_ops;
-		fb_info.info.disp       = &disp;
-		fb_info.info.currcon	= -1;
-		fb_info.info.changevar  = NULL;
-		fb_info.info.switch_con = &sstfbcon_switch;
-		fb_info.info.updatevar  = &sstfbcon_updatevar;
-		if ( !mode_option &&
-	             !fb_find_mode(&var, &fb_info.info, mode_option,
-		                   NULL, 0, NULL, 16)) {
-			var = sstfb_default;
-		}
-		if (sstfb_set_var(&var, -1, &fb_info.info)) {
+void __devexit sstfb_exit(void)
+{
+	f_dprintk("sstfb_exit\n");
+	pci_unregister_driver(&sstfb_driver);
+}
+
+#ifdef MODULE
+module_init(sstfb_init);
+module_exit(sstfb_exit);
+#endif
+
+static int __devinit sstfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+	struct fb_var_screeninfo var;
+	struct sstfb_info * sst_info;
+	struct sst_spec * spec;
+	int tmp,err;
+	f_dprintk("sstfb_probe\n");
+
+	/* dev >  0  the device is not the one asked for.   skip */
+	/* dev == 0  this is the device the user asked.     init */
+	/* dev == -1 we already inited the asked device.    skip */
+	/* dev < -1  init all devices. including this one.  init */
+	if ((dev == -1 ) || (dev-- > 0))
+		return -1;
+
+	if ((err=pci_enable_device(pdev))) {
+		eprintk("cannot enable device\n");
+		return err;
+	}
+
+	sst_info = (struct sstfb_info*)kmalloc(sizeof(*sst_info), GFP_KERNEL);
+	if (!sst_info)
+		goto fail_kmalloc;
+	pci_set_drvdata(pdev, sst_info);
+	sst_info->type = id->driver_data;
+	spec = &voodoo_spec[sst_info->type];
+	f_ddprintk("found device : %s\n", spec->name);
+
+	sst_info->dev = pdev;
+	pci_read_config_byte(pdev, PCI_REVISION_ID, &sst_info->revision);
+
+	sst_info->mmio.base = pci_resource_start(pdev,0);
+	sst_info->video.base = sst_info->mmio.base+0x400000;
+
+	if (!request_mem_region(sst_info->mmio.base,0x400000,"sstfb MMIO")) {
+		eprintk ("cannot reserve mmio memory\n");
+		goto fail_mmio_mem;
+	}
+
+	if (!request_mem_region(sst_info->video.base,0x400000,"sstfb FB")) {
+		eprintk ("cannot reserve fb memory\n");
+		goto fail_fb_mem;
+	}
+
+	sst_info->mmio.vbase = (u_long) ioremap_nocache(sst_info->mmio.base, 0x400000);
+	if (!sst_info->mmio.vbase) {
+		eprintk("cannot remap register area %#lx\n",
+		        sst_info->mmio.base);
+		goto fail_mmio_remap;
+	}
+	sst_info->video.vbase = (u_long) ioremap_nocache(sst_info->video.base, 0x400000);
+	if (!sst_info->video.vbase) {
+		eprintk("cannot remap framebuffer %#lx\n",
+		        sst_info->video.base);
+		goto fail_fb_remap;
+	}
+
+	if(!sst_init(sst_info)) {
+		eprintk("Init failed\n");
+		goto fail;
+	}
+	sst_get_memsize(sst_info, &sst_info->video.len);
+	strncpy(sst_info->info.modename, spec->name, 16);
+
+	iprintk("%s with %s dac\n", sst_info->info.modename, sst_info->dac_sw.name);
+	iprintk("framebuffer at %#lx, mapped to %#lx,"
+	        " size %ldMb\n",
+	        sst_info->video.base, sst_info->video.vbase,
+	        sst_info->video.len >> 20);
+
+	f_ddprintk("revision: %d\n", sst_info->revision);
+	f_ddprintk("regbase_virt: %#lx\n", sst_info->mmio.vbase);
+	f_ddprintk("membase_phys: %#lx\n", sst_info->video.base);
+	f_ddprintk("fbbase_virt: %#lx\n", sst_info->video.vbase);
+
+	sst_info->info.node       = -1 ;
+	sst_info->info.flags      = FBINFO_FLAG_DEFAULT;
+	sst_info->info.fbops      = &sstfb_ops;
+	sst_info->info.disp       = &sst_info->disp;
+	sst_info->info.changevar  = NULL;
+	sst_info->info.switch_con = &sstfbcon_switch;
+	sst_info->info.updatevar  = &sstfbcon_updatevar;
+	sst_info->info.blank      = &sstfbcon_blank;
+
+	tmp=0;
+	var = sstfb_default;
+	if ( mode_option  &&
+	     fb_find_mode(&var, &sst_info->info, mode_option,
+	                   NULL, 0, NULL, 16)) {
+		if (sstfb_set_var(&var, -1, &sst_info->info)) {
 			eprintk("can't set supplied video mode. Using default\n");
 			var = sstfb_default;
-			if (sstfb_set_var(&var, -1, &fb_info.info)) {
-				eprintk("can't set default video mode.\n");
-				return -ENXIO;
-			}
-		}
-		/*clear fb */
-		memset_io(fb_info.video.vbase, 0, fb_info.video.len);
-		/* print some squares ... */
-		sstfb_test16(&fb_info); /* FIXME this is only for 16bpp */
-
-		/* register fb */
-		if (register_framebuffer(&fb_info.info) < 0) {
-			eprintk("can't register framebuffer.\n");
-			return -ENXIO;
+		} else {
+			/* set the new default */
+			sstfb_default = var;
+			tmp=1;  /* no need to set the mode. */
 		}
-		printk(KERN_INFO "fb%d: %s frame buffer device\n",
-		       GET_FB_IDX(fb_info.info.node),fb_info.info.modename);
-
-		num_sst++;
+	}
 
-		if (dev <= 0)	/* we use the first card only for now (==0) */
-			return 0;
+	if (!tmp && sstfb_set_var(&var, -1, &sst_info->info)) {
+		eprintk("can't set default video mode.\n");
+		goto fail;
 	}
+	/*clear fb */
+	memset_io(sst_info->video.vbase, 0, sst_info->video.len);
+	/* print some squares ... */
+	sstfb_test16(sst_info); /* FIXME this is only for 16bpp */
+
+	/* register fb */
+	if (register_framebuffer(&sst_info->info) < 0) {
+		eprintk("can't register framebuffer.\n");
+		goto fail;
+	}
+	printk(KERN_INFO "fb%d: %s frame buffer device\n",
+	       GET_FB_IDX(sst_info->info.node),sst_info->info.modename);
+	return 0;
+
+fail:
+	iounmap((void *)sst_info->video.base);
+fail_fb_remap:
+	iounmap((void *)sst_info->mmio.base);
+fail_mmio_remap:
+	release_mem_region(sst_info->video.base,0x400000);
+fail_fb_mem:
+	release_mem_region(sst_info->mmio.base,0x400000);
+fail_mmio_mem:
+	kfree(sst_info);
+fail_kmalloc:
 	return -ENXIO; 	/* no voodoo detected */
-#undef sst_dev
 }
 
+static void __devexit sstfb_remove(struct pci_dev *pdev)
+{
+	struct sstfb_info * sst_info;
+
+	f_dprintk("sstfb_remove\n");
+	sst_info=pci_get_drvdata(pdev);
+	sst_shutdown(sst_info);
+
+	unregister_framebuffer(&sst_info->info);
+	iounmap((void*)sst_info->video.vbase);
+	iounmap((void*)sst_info->mmio.vbase);
+	release_mem_region(sst_info->video.base,0x400000);
+	release_mem_region(sst_info->mmio.base,0x400000);
+	kfree(sst_info);
+}
+
+
 /*
  * console driver
  */
@@ -1802,15 +1949,15 @@ static int sstfbcon_switch(int con, struct fb_info *info)
 	struct sstfb_par par;
 
 	f_dprintk("sstfbcon_switch(con: %d)\n",con);
-	f_ddprintk("currcon: %d\n", info->currcon);
-	v_dprintk("currcon: %d\n", info->currcon);
+	f_ddprintk("currcon: %d\n", sst_info->currcon);
+	v_dprintk("currcon: %d\n", sst_info->currcon);
 
-	if (info->currcon >=  0) {
-		if (fb_display[info->currcon].cmap.len)
-			fb_get_cmap(&fb_display[info->currcon].cmap, 1,
+	if (sst_info->currcon >=  0) {
+		if (fb_display[sst_info->currcon].cmap.len)
+			fb_get_cmap(&fb_display[sst_info->currcon].cmap, 1,
 			            sstfb_getcolreg, info);
 	}
-	info->currcon = con;
+	sst_info->currcon = con;
 	fb_display[con].var.activate = FB_ACTIVATE_NOW;
 
 	print_var(&fb_display[con].var, "&fb_display[con: %d].var",con);
@@ -1818,7 +1965,7 @@ static int sstfbcon_switch(int con, struct fb_info *info)
 	if (memcmp(&par,&(sst_info->current_par),sizeof(par))) {
 		sstfb_set_par(&par, sst_info);
 	}
-	do_install_cmap(con, info);
+	sstfb_install_cmap(con, info);
 	return 0;
 #undef sst_info
 }
@@ -1829,6 +1976,12 @@ static int sstfbcon_updatevar(int con, struct fb_info *info)
 	return -EINVAL;
 }
 
+static void sstfbcon_blank(int blank, struct fb_info *info)
+{
+	f_dprintk("sstfbcon_blank(level %d)\n", blank);
+}
+
+
 /* print some squares on the fb (presuming 16bpp)  */
 static void sstfb_test16(struct sstfb_info *sst_info)
 {
@@ -1877,7 +2030,7 @@ static void sstfb_test32(struct sstfb_info *sst_info)
 {
 	int i,j;
 	u_long p;
-	u32 fbbase_virt = sst_info->video.vbase;
+	u_long fbbase_virt = sst_info->video.vbase;
 
 	f_dprintk("sstfb_test32\n");
 	/* rect blanc 20x100+200+0 */
@@ -1915,31 +2068,7 @@ static void sstfb_test32(struct sstfb_info *sst_info)
 }
 #endif /* EN_24_32_BPP */
 
-#ifdef MODULE
-
-int init_module(void)
-{
-	f_dprintk("init_module\n");
-	sstfb_init();
-	if (num_sst == 0 )
-		return -ENXIO;
-	return 0;
-}
-
-void cleanup_module(void)
-{
-	f_dprintk("cleanup_module\n");
-	f_ddprintk("conf %d\n",fb_info.configured);
-
-	if (fb_info.configured) {
-		sst_shutdown();
-		iounmap((void*)fb_info.mmio.vbase);
-		iounmap((void*)fb_info.video.vbase);
-		unregister_framebuffer(&fb_info.info);
-	}
-}
-
-MODULE_AUTHOR("(c) 2000,2001 Ghozlane Toumi <gtoumi@messel.emse.fr>");
+MODULE_AUTHOR("(c) 2000,2002 Ghozlane Toumi <gtoumi@laposte.net>");
 MODULE_DESCRIPTION("FBDev driver for 3dfx Voodoo Graphics and Voodoo2 based video boards");
 MODULE_LICENSE("GPL");
 
@@ -1957,7 +2086,6 @@ MODULE_PARM(slowpci, "i");
 MODULE_PARM_DESC(slowpci, "Uses slow PCI settings (0 or 1) (default=0)");
 MODULE_PARM(dev,"i");
 MODULE_PARM_DESC(dev , "Attach to device ID (0..n) (default=1st device)");
-#endif	/* MODULE */
 
 /*
  * Overrides for Emacs so that we follow Linus's tabbing style.
@@ -1967,13 +2095,13 @@ MODULE_PARM_DESC(dev , "Attach to device ID (0..n) (default=1st device)");
  * End:
  */
 
-#if 0
-void Dump_regs ( void)
+#if 1
+void __Dump_regs (struct sstfb_info * sst_info)
 {
 	struct { u32 reg ; char * reg_name;}  pci_regs [] =  {
 		{ PCI_INIT_ENABLE, "initenable"},
-		{ PCI_VCLK_ENABLE, "enable vclk"}, 
-		{ PCI_VCLK_DISABLE, "disable vclk"}, 
+		{ PCI_VCLK_ENABLE, "enable vclk"},
+		{ PCI_VCLK_DISABLE, "disable vclk"},
 	};
 
 	struct { u32 reg ; char * reg_name;}  sst_regs [] =  {
@@ -1988,25 +2116,27 @@ void Dump_regs ( void)
 		{LFBMODE,"lfbmode"},
 		{FBZMODE,"fbzmode"},
 	};
-	u32 pci_res[sizeof(pci_regs)/sizeof(pci_regs[0])];
-	u32 sst_res[sizeof(sst_regs)/sizeof(sst_regs[0])];
+	int pci_s = sizeof(pci_regs)/sizeof(*pci_regs);
+	int sst_s = sizeof(sst_regs)/sizeof(*sst_regs);
+	u32 pci_res[pci_s];
+	u32 sst_res[sst_s];
 
-	struct pci_dev * dev = fb_info.dev;
+	struct pci_dev * dev = sst_info->dev;
 
 	int i;
 
-	for (i=0; i<(sizeof(pci_regs)/sizeof(pci_regs[0])) ; i++ ) {
+	for (i=0; i < pci_s ; i++ ) {
 		pci_read_config_dword ( dev, pci_regs[i].reg , &pci_res[i]) ;
 	}
-	for (i=0; i<(sizeof(sst_regs)/sizeof(sst_regs[0])) ; i++ ) {
+	for (i=0; i < sst_s ; i++ ) {
 		sst_res[i]=sst_read(sst_regs[i].reg);
 	}
 
 	dprintk ("Dump regs\n");
-	for (i=0; i<(sizeof(pci_regs)/sizeof(pci_regs[0])) ; i++ ) {
+	for (i=0; i < pci_s ; i++ ) {
 		dprintk("%s = %0#10x\n", pci_regs[i].reg_name , pci_res[i]) ;
 	}
-	for (i=0; i<(sizeof(sst_regs)/sizeof(sst_regs[0])) ; i++ ) {
+	for (i=0; i < sst_s ; i++ ) {
 		dprintk("%s = %0#10x\n", sst_regs[i].reg_name , sst_res[i]) ;
 	}
 }
diff --git a/drivers/video/sstfb.h b/drivers/video/sstfb.h
index 8175f6571948..f12d53177ab6 100644
--- a/drivers/video/sstfb.h
+++ b/drivers/video/sstfb.h
@@ -5,13 +5,13 @@
  *
  *     Created 28 Aug 2001 by Ghozlane Toumi
  *
- * $Id: sstfb.h,v 1.1.4.1 2001/08/29 01:30:38 ghoz Exp $
+ * $Id: sstfb.h,v 1.8 2002/05/10 19:35:11 ghoz Exp $
  */
 
 
 #ifndef _SSTFB_H_
 #define _SSTFB_H_
- 
+
 /*
  *
  *  Debug Stuff
@@ -72,9 +72,10 @@
 #define iprintk(X...)	printk(KERN_INFO "sstfb: " X)
 #define wprintk(X...)	printk(KERN_WARNING "sstfb: " X)
 
-#define BIT(x)		(1ul << (x))
+#define BIT(x)		(1ul<<(x))
 #define PS2KHZ(a)	(1000000000UL/(a))	/* picoseconds to KHz */
 #define KHZ2PS(a)	(1000000000UL/(a))
+#define POW2(x)		(1ul<<(x))
 
 #ifndef ABS
 # define ABS(x)		(((x)<0)?-(x):(x))
@@ -170,9 +171,15 @@
 #define DAC_DATA		0x022c
 #  define DAC_READ_CMD		  BIT(11)	/* set read dacreg mode */
 #define FBIINIT5		0x0244		/* v2 specific */
+#  define FBIINIT5_MASK		  0xfa40ffff    /* mask video bits*/
+#  define HDOUBLESCAN		  BIT(20)
+#  define VDOUBLESCAN		  BIT(21)
+#  define HSYNC_HIGH 		  BIT(23)
+#  define VSYNC_HIGH 		  BIT(24)
+#  define INTERLACE		  BIT(26)
 #define FBIINIT6		0x0248		/* v2 specific */
-#define FBIINIT7		0x024c		/* v2 specific */
 #  define TILES_IN_X_LSB_SHIFT	  30		/* v2 */
+#define FBIINIT7		0x024c		/* v2 specific */
 
 /* Dac Registers */
 #define DACREG_WMA		0x0	/* pixel write mode address */
@@ -275,30 +282,32 @@
  */
 
 /* used to know witch clock to set */
-#define VID_CLOCK	0
-#define GFX_CLOCK	1
+enum {
+	VID_CLOCK=0,
+	GFX_CLOCK=1,
+};
 
 /* freq max */
 #define DAC_FREF	14318	/* DAC reference freq (Khz) */
 #define VCO_MAX		260000
 
 /*
- *
- *  Declarations
- *
+ *  driver structs
  */
 
 struct pll_timing {
-	u8 m;
-	u8 n;
-	u8 p;
+	unsigned int m;
+	unsigned int n;
+	unsigned int p;
 };
 
+struct sstfb_info;
+
 struct dac_switch {
 	char * name;
-	int (*detect) (void);
-	int (*set_pll) (const struct pll_timing *t, const int clock);
-	void (*set_vidmod) (const int bpp);
+	int (*detect) (struct sstfb_info *sst_info);
+	int (*set_pll) (struct sstfb_info *sst_info, const struct pll_timing *t, const int clock);
+	void (*set_vidmod) (struct sstfb_info *sst_info, const int bpp);
 };
 
 struct sst_spec {
@@ -317,8 +326,12 @@ struct sstfb_par {
 	unsigned int vSyncOn;
 	unsigned int vSyncOff;
 	unsigned int vBackPorch;
-	unsigned int freq;	/* freq in picoseconds */
-	unsigned int tiles_in_X; /* num of tiles in X res */
+	unsigned int freq;	/* freq in kHz */
+	struct pll_timing pll;
+	unsigned int tiles_in_X;/* num of tiles in X res */
+	unsigned int vmode;     /* doublescan/interlaced */
+	unsigned int sync;      /* H/V sync polarity */
+	unsigned int valid;	/* par is correct (fool proof) */
 };
 
 struct sstfb_info {
@@ -336,18 +349,34 @@ struct sstfb_info {
 		unsigned long	vbase;
 	} mmio;				/* registers memory info */
 
-	struct dac_switch *	dac_sw;	/* dac specific functions */
-	struct sst_spec *	spec;
+	struct dac_switch 	dac_sw;	/* dac specific functions */
 
-	int	is_voodoo2;
+	int	type;
 	u8	revision;
 
 	/* status */
-	int	configured;
-/*	int	indexed_mode;
+/*XXX	int	configured;
+	int	indexed_mode;
 	int	vgapass;
 	int	clipping; */
 	int	gfx_clock;
+
+	int	currcon;
+	struct display  	disp; /* current display */
+	struct { u_int red, green, blue, transp; } palette[16];
+
+	union {
+#ifdef FBCON_HAS_CFB16
+		u16 cfb16[16];
+#endif
+#ifdef EN_24_32_BPP
+#if defined (FBCON_HAS_CFB24) || defined(FBCON_HAS_CFB32)
+		u32 cfb32[16];
+#endif
+#endif
+	} fbcon_cmap;
+
 };
 
+
 #endif /* _SSTFB_H_ */
diff --git a/drivers/video/tdfxfb.c b/drivers/video/tdfxfb.c
index e275750efc93..6726bb00dd5c 100644
--- a/drivers/video/tdfxfb.c
+++ b/drivers/video/tdfxfb.c
@@ -79,10 +79,6 @@
 #include <video/tdfx.h>
 #include <video/fbcon.h>
 
-#ifndef PCI_DEVICE_ID_3DFX_VOODOO5
-#define PCI_DEVICE_ID_3DFX_VOODOO5      0x0009
-#endif
-
 #undef TDFXFB_DEBUG 
 #ifdef TDFXFB_DEBUG
 #define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
@@ -995,7 +991,7 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
 	info = kmalloc(sizeof(struct fb_info) + sizeof(struct display) +
 			sizeof(u32) * 16, GFP_KERNEL);
 
-	if (!info)	return -ENXIO;
+	if (!info)	return -ENOMEM;
 		
 	memset(info, 0, sizeof(info) + sizeof(struct display) + sizeof(u32) * 16);
      
@@ -1016,25 +1012,25 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
 	}
 
 	tdfx_fix.mmio_start = pci_resource_start(pdev, 0);
-	tdfx_fix.mmio_len = 1 << 24;
-	default_par.regbase_virt = ioremap_nocache(tdfx_fix.mmio_start, 1<<24);
+	tdfx_fix.mmio_len = pci_resource_len(pdev, 0);
+	default_par.regbase_virt = ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
 	if (!default_par.regbase_virt) {
 		printk("fb: Can't remap %s register area.\n", tdfx_fix.id);
-		return -ENXIO;
+		goto out_err;
 	}
     
 	if (!request_mem_region(pci_resource_start(pdev, 0),
 	    pci_resource_len(pdev, 0), "tdfx regbase")) {
 		printk(KERN_WARNING "tdfxfb: Can't reserve regbase\n");
-		iounmap(default_par.regbase_virt);
-		return -ENXIO;
+		goto out_err;
 	} 
 
 	tdfx_fix.smem_start = pci_resource_start(pdev, 1);
 	if (!(tdfx_fix.smem_len = do_lfb_size(pdev->device))) {
-		iounmap(default_par.regbase_virt);
 		printk("fb: Can't count %s memory.\n", tdfx_fix.id);
-		return -ENXIO;
+		release_mem_region(pci_resource_start(pdev, 0),
+				   pci_resource_len(pdev, 0));
+		goto out_err;	
 	}
 
 	if (!request_mem_region(pci_resource_start(pdev, 1),
@@ -1042,16 +1038,18 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
 		printk(KERN_WARNING "tdfxfb: Can't reserve smem\n");
 		release_mem_region(pci_resource_start(pdev, 0),
 				   pci_resource_len(pdev, 0));
-		iounmap(default_par.regbase_virt);
-		return -ENXIO;
+		goto out_err;
 	}
 
 	info->screen_base = ioremap_nocache(tdfx_fix.smem_start, 
-	tdfx_fix.smem_len);
+					    tdfx_fix.smem_len);
 	if (!info->screen_base) {
 		printk("fb: Can't remap %s framebuffer.\n", tdfx_fix.id);
-		iounmap(default_par.regbase_virt);
-		return -ENXIO;
+		release_mem_region(pci_resource_start(pdev, 1),
+				   pci_resource_len(pdev, 1));
+		release_mem_region(pci_resource_start(pdev, 0),
+				   pci_resource_len(pdev, 0));
+		goto out_err;
 	}
 
 	default_par.iobase = pci_resource_start(pdev, 2);
@@ -1063,9 +1061,7 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
 				   pci_resource_len(pdev, 1));
 		release_mem_region(pci_resource_start(pdev, 0),
 				   pci_resource_len(pdev, 0));
-		iounmap(default_par.regbase_virt);
-		iounmap(info->screen_base);
-		return -ENXIO;
+		goto out_err;
 	}
 
 	printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10);
@@ -1104,13 +1100,24 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
 
 	if (register_framebuffer(info) < 0) {
 		printk("tdfxfb: can't register framebuffer\n");
-		return -ENXIO;
+		goto out_err;
 	}
 	/*
 	 * Our driver data
 	 */
 	pci_set_drvdata(pdev, info);
 	return 0; 
+
+out_err:
+	/*
+	 * Cleanup after anything that was remapped/allocated.
+	 */
+	if (default_par.regbase_virt)
+		iounmap(default_par.regbase_virt);
+	if (info->screen_base)
+		iounmap(info->screen_base);
+	kfree(info);
+	return -ENXIO;
 }
 
 /**
@@ -1139,6 +1146,7 @@ static void __devexit tdfxfb_remove(struct pci_dev *pdev)
 	release_mem_region(pci_resource_start(pdev, 0),
 			   pci_resource_len(pdev, 0));
 	pci_set_drvdata(pdev, NULL);
+	kfree(info);
 }
 
 int __init tdfxfb_init(void)
diff --git a/drivers/video/tx3912fb.c b/drivers/video/tx3912fb.c
index 822b17757263..0b0ab6a06c60 100644
--- a/drivers/video/tx3912fb.c
+++ b/drivers/video/tx3912fb.c
@@ -325,7 +325,7 @@ int __init tx3912fb_init(void)
 	return 0;
 }
 
-int __init tx3912fb_setup(char *options)
+void __init tx3912fb_setup(char *options)
 {
 	char *this_opt;
 
diff --git a/drivers/video/valkyriefb.c b/drivers/video/valkyriefb.c
index d407b04e2c18..2570cc2199d5 100644
--- a/drivers/video/valkyriefb.c
+++ b/drivers/video/valkyriefb.c
@@ -53,9 +53,6 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/nvram.h>
-#ifdef CONFIG_FB_COMPAT_XPMAC
-#include <asm/vc_ioctl.h>
-#endif
 #include <linux/adb.h>
 #include <linux/cuda.h>
 #include <asm/io.h>
@@ -370,11 +367,6 @@ static int valkyriefb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 	return 0;
 }
 
-#ifdef CONFIG_FB_COMPAT_XPMAC
-extern struct vc_mode display_info;
-extern struct fb_info *console_fb_info;
-#endif /* CONFIG_FB_COMPAT_XPMAC */
-
 static int valkyrie_vram_reqd(int video_mode, int color_mode)
 {
 	int pitch;
@@ -492,24 +484,6 @@ static void valkyrie_set_par(const struct fb_par_valkyrie *par,
 
 	/* Turn on display */
 	out_8(&valkyrie_regs->mode.r, init->mode);
-
-#ifdef CONFIG_FB_COMPAT_XPMAC
-	/* And let the world know the truth. */
-	if (!console_fb_info || console_fb_info == &p->info) {
-		display_info.height = p->var.yres;
-		display_info.width = p->var.xres;
-		display_info.depth = (cmode == CMODE_16) ? 16 : 8;
-		display_info.pitch = p->fix.line_length;
-		display_info.mode = vmode;
-		strncpy(display_info.name, "valkyrie",
-			sizeof(display_info.name));
-		display_info.fb_address = p->frame_buffer_phys + 0x1000;
-		display_info.cmap_adr_address = p->cmap_regs_phys;
-		display_info.cmap_data_address = p->cmap_regs_phys + 8;
-		display_info.disp_reg_address = p->valkyrie_regs_phys;
-		console_fb_info = &p->info;
-	}
-#endif /* CONFIG_FB_COMPAT_XPMAC */
 }
 
 int __init valkyriefb_init(void)
diff --git a/drivers/video/vesafb.c b/drivers/video/vesafb.c
index 2fd8ab2c661f..3fa57bb84508 100644
--- a/drivers/video/vesafb.c
+++ b/drivers/video/vesafb.c
@@ -32,14 +32,18 @@
 
 /* --------------------------------------------------------------------- */
 
-static struct fb_var_screeninfo vesafb_defined = {
+static struct fb_var_screeninfo vesafb_defined __initdata = {
 	activate:	FB_ACTIVATE_NOW,
 	height:		-1,
 	width:		-1,
+	right_margin:	32,
+	upper_margin:	16,
+	lower_margin:	4,
+	vsync_len:	4,
 	vmode:		FB_VMODE_NONINTERLACED,
 };
 
-static struct fb_fix_screeninfo vesafb_fix = {
+static struct fb_fix_screeninfo vesafb_fix __initdata = {
 	id:	"VESA VGA",
 	type:	FB_TYPE_PACKED_PIXELS,
 	accel:	FB_ACCEL_NONE,
@@ -301,11 +305,7 @@ int __init vesafb_init(void)
 	/* some dummy values for timing to make fbset happy */
 	vesafb_defined.pixclock     = 10000000 / vesafb_defined.xres * 1000 / vesafb_defined.yres;
 	vesafb_defined.left_margin  = (vesafb_defined.xres / 8) & 0xf8;
-	vesafb_defined.right_margin = 32;
-	vesafb_defined.upper_margin = 16;
-	vesafb_defined.lower_margin = 4;
 	vesafb_defined.hsync_len    = (vesafb_defined.xres / 8) & 0xf8;
-	vesafb_defined.vsync_len    = 4;
 
 	if (vesafb_defined.bits_per_pixel > 8) {
 		vesafb_defined.red.offset    = screen_info.red_pos;
diff --git a/drivers/video/vfb.c b/drivers/video/vfb.c
index 5c348a5914f0..ebd94b65836c 100644
--- a/drivers/video/vfb.c
+++ b/drivers/video/vfb.c
@@ -24,7 +24,7 @@
 #include <linux/fb.h>
 #include <linux/init.h>
 
-#include <linux/fbcon.h>
+#include <video/fbcon.h>
 
     /*
      *  RAM we reserve for the frame buffer. This defines the maximum screen
@@ -446,7 +446,7 @@ int __init vfb_init(void)
 	fb_info.pseudo_palette = &vfb_pseudo_palette;
 	fb_info.flags = FBINFO_FLAG_DEFAULT;
 
-	strcpy(fb_info.modename, vesafb_fix.id);
+	strcpy(fb_info.modename, vfb_fix.id);
 	fb_info.changevar = NULL;
 	fb_info.currcon = -1;
 	fb_info.disp = &disp;
author	James Simmons <jsimmons@maxwell.earthlink.net>	2002-07-21 21:42:33 -0700
committer	James Simmons <jsimmons@maxwell.earthlink.net>	2002-07-21 21:42:33 -0700
commit	55bcabb270f83b6350e43c472829c65d8ff86829 (patch)
tree	dbc7ffd76fca5481f2bbffa0495952015117340a /drivers/video
parent	975f679b6b9e7321503694de9ea739280374f741 (diff)
parent	87520e1ea7fe1d4d8c01a06f65a88bba42884f33 (diff)