diff options
| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2025-11-10 14:42:53 +0000 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2025-11-11 17:53:18 -0800 |
| commit | da3d1501235df39d9f2db092ac8592eb6f7c52b1 (patch) | |
| tree | d1ed6d7ad0a36abd3325715cf552e6c254cff6c0 /drivers | |
| parent | 52d639da6feea3c8787a60b1efb534bd48ea053d (diff) | |
net: stmmac: meson8b: use stmmac_get_phy_intf_sel()
Use stmmac_get_phy_intf_sel() to decode the PHY interface mode to the
phy_intf_sel value, validate the result and use that to set the
control register to select the operating mode for the DWMAC core.
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1vIT6b-0000000DpPX-1LQ0@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c index 865cd6166134..e4d5c41294f4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c @@ -238,22 +238,12 @@ static int meson_axg_set_phy_mode(struct meson8b_dwmac *dwmac) { int phy_intf_sel; - switch (dwmac->phy_mode) { - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_RXID: - case PHY_INTERFACE_MODE_RGMII_ID: - case PHY_INTERFACE_MODE_RGMII_TXID: - /* enable RGMII mode */ - phy_intf_sel = PHY_INTF_SEL_RGMII; - break; - case PHY_INTERFACE_MODE_RMII: - /* disable RGMII mode -> enables RMII mode */ - phy_intf_sel = PHY_INTF_SEL_RMII; - break; - default: + phy_intf_sel = stmmac_get_phy_intf_sel(dwmac->phy_mode); + if (phy_intf_sel != PHY_INTF_SEL_RGMII && + phy_intf_sel != PHY_INTF_SEL_RMII) { dev_err(dwmac->dev, "fail to set phy-mode %s\n", phy_modes(dwmac->phy_mode)); - return -EINVAL; + return phy_intf_sel < 0 ? phy_intf_sel : -EINVAL; } meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_EXT_PHY_MODE_MASK, |