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authorRalf Bächle <ralf@linux-mips.org>2003-06-22 22:07:17 -0700
committerLinus Torvalds <torvalds@home.transmeta.com>2003-06-22 22:07:17 -0700
commitf6d64aeef94909c98a054590af61906d2ce5acbf (patch)
tree38b4b00a94874a5da38eae4c81ab14bcf3b237e6 /include/asm-mips/cache.h
parent2e7f53ec14475d56559bcdd07acfb737b7bff1e9 (diff)
[PATCH] MIPS merge, generic mips bits.
This contains all the generic 32-bit MIPS code, so all arch/mips/ and include/asm-mips/ stuff.
Diffstat (limited to 'include/asm-mips/cache.h')
-rw-r--r--include/asm-mips/cache.h25
1 files changed, 5 insertions, 20 deletions
diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h
index 05fc11d65ca9..4057cb45f744 100644
--- a/include/asm-mips/cache.h
+++ b/include/asm-mips/cache.h
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1997, 98, 99, 2000 Ralf Baechle
+ * Copyright (C) 1997, 98, 99, 2000, 2003 Ralf Baechle
* Copyright (C) 1999 Silicon Graphics, Inc.
*/
#ifndef _ASM_CACHE_H
@@ -11,30 +11,15 @@
#include <linux/config.h>
-#ifndef _LANGUAGE_ASSEMBLY
-/*
- * Descriptor for a cache
- */
-struct cache_desc {
- int linesz;
- int sets;
- int ways;
- int flags; /* Details like write thru/back, coherent, etc. */
-};
-#endif
-
-/*
- * Flag definitions
- */
-#define MIPS_CACHE_NOT_PRESENT 0x00000001
-
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_R6000)
+#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_R6000) || \
+ defined(CONFIG_CPU_TX39XX)
#define L1_CACHE_BYTES 16
+#define L1_CACHE_SHIFT_MAX 4 /* largest L1 which this arch supports */
#else
#define L1_CACHE_BYTES 32 /* A guess */
+#define L1_CACHE_SHIFT_MAX 6 /* largest L1 which this arch supports */
#endif
#define SMP_CACHE_BYTES L1_CACHE_BYTES
-#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */
#endif /* _ASM_CACHE_H */