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authorJani Nikula <jani.nikula@intel.com>2023-01-02 11:31:03 +0200
committerJani Nikula <jani.nikula@intel.com>2023-01-02 11:31:03 +0200
commit0d8eae7b124e2ddaee00f186fe922450faad0ed7 (patch)
tree5acf7a7a4300665c26b128d9afd1843b402e8b8e /include/linux/resctrl.h
parentbe3ad78dfed2af3c293e01f3c5f13ee1af3395c3 (diff)
parent1b929c02afd37871d5afb9d498426f83432e71c2 (diff)
Merge drm/drm-next into drm-intel-next
Sync up with v6.2-rc1. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'include/linux/resctrl.h')
-rw-r--r--include/linux/resctrl.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
index 0cf5b20c6ddf..0cee154abc9f 100644
--- a/include/linux/resctrl.h
+++ b/include/linux/resctrl.h
@@ -89,11 +89,12 @@ struct rdt_domain {
/**
* struct resctrl_cache - Cache allocation related data
* @cbm_len: Length of the cache bit mask
- * @min_cbm_bits: Minimum number of consecutive bits to be set
+ * @min_cbm_bits: Minimum number of consecutive bits to be set.
+ * The value 0 means the architecture can support
+ * zero CBM.
* @shareable_bits: Bitmask of shareable resource with other
* executing entities
* @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid.
- * @arch_has_empty_bitmaps: True if the '0' bitmap is valid.
* @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
* level has CPU scope.
*/
@@ -102,7 +103,6 @@ struct resctrl_cache {
unsigned int min_cbm_bits;
unsigned int shareable_bits;
bool arch_has_sparse_bitmaps;
- bool arch_has_empty_bitmaps;
bool arch_has_per_cpu_cfg;
};