diff options
| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2026-01-09 18:17:59 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-01-12 12:40:29 +0000 |
| commit | 0196932f539e306e122b6edf24c9f5e30d1f73ee (patch) | |
| tree | aea798cf741dd8cf4111bcf2e0ead5bc7d37a786 /include/linux/spi | |
| parent | 0f61b1860cc3f52aef9036d7235ed1f017632193 (diff) | |
spi: spi-mem: Make the DTR command operation macro more suitable
In order to introduce DTR support in SPI NAND, a number of macros had to
be created in the spi-mem layer. One of them remained unused at this
point, SPI_MEM_DTR_OP_CMD. Being in the process of introducing octal DTR
support now, experience shows that as-is the macro is not useful. In
order to be really useful in octal DTR mode, the command opcode (one
byte) must always be transmitted on the 8 data lines on both the rising
and falling edge of the clock. Align the macro with the real needs by
duplicating the opcode in the buffer and doubling its size.
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20260109-winbond-v6-17-rc1-oddr-v2-1-1fff6a2ddb80@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/linux/spi')
| -rw-r--r-- | include/linux/spi/spi-mem.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index 82390712794c..81c9c7e793b6 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -20,10 +20,10 @@ .opcode = __opcode, \ } -#define SPI_MEM_DTR_OP_CMD(__opcode, __buswidth) \ +#define SPI_MEM_DTR_OP_RPT_CMD(__opcode, __buswidth) \ { \ - .nbytes = 1, \ - .opcode = __opcode, \ + .nbytes = 2, \ + .opcode = __opcode | __opcode << 8, \ .buswidth = __buswidth, \ .dtr = true, \ } |