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authorIlpo Järvinen <ilpo.jarvinen@linux.intel.com>2024-10-18 17:47:48 +0300
committerBjorn Helgaas <bhelgaas@google.com>2024-10-23 16:50:02 -0500
commit04af8a399fa40310f831b4f1dc9f757085f41983 (patch)
treef8191c9677aa4d0ace2d012d832aa09c5012e14c /include/linux
parentfad610b987132868e3410c530871086552ce6155 (diff)
PCI: Protect Link Control 2 Register with RMW locking
The PCIe Bandwidth Controller performs RMW accesses the Link Control 2 Register which can occur concurrently to other sources of Link Control 2 Register writes. Therefore, add Link Control 2 Register among the PCI Express Capability Registers that need RMW locking. Link: https://lore.kernel.org/r/20241018144755.7875-3-ilpo.jarvinen@linux.intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lukas Wunner <lukas@wunner.de> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/pci.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 573b4c4c2be6..be5ed534c39c 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1274,6 +1274,7 @@ static inline int pcie_capability_clear_and_set_word(struct pci_dev *dev,
{
switch (pos) {
case PCI_EXP_LNKCTL:
+ case PCI_EXP_LNKCTL2:
case PCI_EXP_RTCTL:
return pcie_capability_clear_and_set_word_locked(dev, pos,
clear, set);