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authorLinus Torvalds <torvalds@athlon.transmeta.com>2002-02-04 20:33:52 -0800
committerLinus Torvalds <torvalds@athlon.transmeta.com>2002-02-04 20:33:52 -0800
commit5aa875d2cbee34727963bd81aa992b64480045ca (patch)
tree56e417ffca41ad67797b4354d3e4ab19bd078502 /include/linux
parent6293d56ca18db9ed322b2a5550ac7b27bd538cff (diff)
v2.4.14.7 -> v2.4.14.8
- Richard Henderson: alpha update - Andrew Morton: fix ext3/minix/sysv fsync behaviour.
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/pci.h16
-rw-r--r--include/linux/sched.h1
2 files changed, 8 insertions, 9 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index e1cd3b4203e0..4971fa3c3586 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -116,21 +116,21 @@
#define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */
#define PCI_IO_BASE 0x1c /* I/O range behind the bridge */
#define PCI_IO_LIMIT 0x1d
-#define PCI_IO_RANGE_TYPE_MASK 0x0f /* I/O bridging type */
+#define PCI_IO_RANGE_TYPE_MASK 0x0fUL /* I/O bridging type */
#define PCI_IO_RANGE_TYPE_16 0x00
#define PCI_IO_RANGE_TYPE_32 0x01
-#define PCI_IO_RANGE_MASK ~0x0f
+#define PCI_IO_RANGE_MASK (~0x0fUL)
#define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */
#define PCI_MEMORY_BASE 0x20 /* Memory range behind */
#define PCI_MEMORY_LIMIT 0x22
-#define PCI_MEMORY_RANGE_TYPE_MASK 0x0f
-#define PCI_MEMORY_RANGE_MASK ~0x0f
+#define PCI_MEMORY_RANGE_TYPE_MASK 0x0fUL
+#define PCI_MEMORY_RANGE_MASK (~0x0fUL)
#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */
#define PCI_PREF_MEMORY_LIMIT 0x26
-#define PCI_PREF_RANGE_TYPE_MASK 0x0f
+#define PCI_PREF_RANGE_TYPE_MASK 0x0fUL
#define PCI_PREF_RANGE_TYPE_32 0x00
#define PCI_PREF_RANGE_TYPE_64 0x01
-#define PCI_PREF_RANGE_MASK ~0x0f
+#define PCI_PREF_RANGE_MASK (~0x0fUL)
#define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */
#define PCI_PREF_LIMIT_UPPER32 0x2c
#define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */
@@ -168,7 +168,7 @@
#define PCI_CB_IO_BASE_1_HI 0x36
#define PCI_CB_IO_LIMIT_1 0x38
#define PCI_CB_IO_LIMIT_1_HI 0x3a
-#define PCI_CB_IO_RANGE_MASK ~0x03
+#define PCI_CB_IO_RANGE_MASK (~0x03UL)
/* 0x3c-0x3d are same as for htype 0 */
#define PCI_CB_BRIDGE_CONTROL 0x3e
#define PCI_CB_BRIDGE_CTL_PARITY 0x01 /* Similar to standard bridge control register */
@@ -402,7 +402,7 @@ struct pci_dev {
#define PCI_BRIDGE_RESOURCES 7
#define PCI_NUM_RESOURCES 11
-#define PCI_REGION_FLAG_MASK 0x0f /* These bits of resource flags tell us the PCI region flags */
+#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
struct pci_bus {
struct list_head node; /* node in list of buses */
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 1501cd0e9f8d..9cdc5e05d025 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -88,7 +88,6 @@ extern int last_pid;
#define TASK_UNINTERRUPTIBLE 2
#define TASK_ZOMBIE 4
#define TASK_STOPPED 8
-#define TASK_DEAD 16
#define __set_task_state(tsk, state_value) \
do { (tsk)->state = (state_value); } while (0)